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KVM: clean up directives to compile out irqfds
[thirdparty/kernel/stable.git] / drivers / net / ethernet / mellanox / mlx5 / core / en / ptp.c
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 // Copyright (c) 2020 Mellanox Technologies
3
4 #include "en/ptp.h"
5 #include "en/health.h"
6 #include "en/txrx.h"
7 #include "en/params.h"
8 #include "en/fs_tt_redirect.h"
9 #include <linux/list.h>
10 #include <linux/spinlock.h>
11
12 struct mlx5e_ptp_fs {
13 struct mlx5_flow_handle *l2_rule;
14 struct mlx5_flow_handle *udp_v4_rule;
15 struct mlx5_flow_handle *udp_v6_rule;
16 bool valid;
17 };
18
19 struct mlx5e_ptp_params {
20 struct mlx5e_params params;
21 struct mlx5e_sq_param txq_sq_param;
22 struct mlx5e_rq_param rq_param;
23 };
24
25 struct mlx5e_ptp_port_ts_cqe_tracker {
26 u8 metadata_id;
27 bool inuse : 1;
28 struct list_head entry;
29 };
30
31 struct mlx5e_ptp_port_ts_cqe_list {
32 struct mlx5e_ptp_port_ts_cqe_tracker *nodes;
33 struct list_head tracker_list_head;
34 /* Sync list operations in xmit and napi_poll contexts */
35 spinlock_t tracker_list_lock;
36 };
37
38 static inline void
39 mlx5e_ptp_port_ts_cqe_list_add(struct mlx5e_ptp_port_ts_cqe_list *list, u8 metadata)
40 {
41 struct mlx5e_ptp_port_ts_cqe_tracker *tracker = &list->nodes[metadata];
42
43 WARN_ON_ONCE(tracker->inuse);
44 tracker->inuse = true;
45 spin_lock(&list->tracker_list_lock);
46 list_add_tail(&tracker->entry, &list->tracker_list_head);
47 spin_unlock(&list->tracker_list_lock);
48 }
49
50 static void
51 mlx5e_ptp_port_ts_cqe_list_remove(struct mlx5e_ptp_port_ts_cqe_list *list, u8 metadata)
52 {
53 struct mlx5e_ptp_port_ts_cqe_tracker *tracker = &list->nodes[metadata];
54
55 WARN_ON_ONCE(!tracker->inuse);
56 tracker->inuse = false;
57 spin_lock(&list->tracker_list_lock);
58 list_del(&tracker->entry);
59 spin_unlock(&list->tracker_list_lock);
60 }
61
62 void mlx5e_ptpsq_track_metadata(struct mlx5e_ptpsq *ptpsq, u8 metadata)
63 {
64 mlx5e_ptp_port_ts_cqe_list_add(ptpsq->ts_cqe_pending_list, metadata);
65 }
66
67 struct mlx5e_skb_cb_hwtstamp {
68 ktime_t cqe_hwtstamp;
69 ktime_t port_hwtstamp;
70 };
71
72 void mlx5e_skb_cb_hwtstamp_init(struct sk_buff *skb)
73 {
74 memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
75 }
76
77 static struct mlx5e_skb_cb_hwtstamp *mlx5e_skb_cb_get_hwts(struct sk_buff *skb)
78 {
79 BUILD_BUG_ON(sizeof(struct mlx5e_skb_cb_hwtstamp) > sizeof(skb->cb));
80 return (struct mlx5e_skb_cb_hwtstamp *)skb->cb;
81 }
82
83 static void mlx5e_skb_cb_hwtstamp_tx(struct sk_buff *skb,
84 struct mlx5e_ptp_cq_stats *cq_stats)
85 {
86 struct skb_shared_hwtstamps hwts = {};
87 ktime_t diff;
88
89 diff = abs(mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp -
90 mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp);
91
92 /* Maximal allowed diff is 1 / 128 second */
93 if (diff > (NSEC_PER_SEC >> 7)) {
94 cq_stats->abort++;
95 cq_stats->abort_abs_diff_ns += diff;
96 return;
97 }
98
99 hwts.hwtstamp = mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp;
100 skb_tstamp_tx(skb, &hwts);
101 }
102
103 void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,
104 ktime_t hwtstamp,
105 struct mlx5e_ptp_cq_stats *cq_stats)
106 {
107 switch (hwtstamp_type) {
108 case (MLX5E_SKB_CB_CQE_HWTSTAMP):
109 mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp = hwtstamp;
110 break;
111 case (MLX5E_SKB_CB_PORT_HWTSTAMP):
112 mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp = hwtstamp;
113 break;
114 }
115
116 /* If both CQEs arrive, check and report the port tstamp, and clear skb cb as
117 * skb soon to be released.
118 */
119 if (!mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp ||
120 !mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp)
121 return;
122
123 mlx5e_skb_cb_hwtstamp_tx(skb, cq_stats);
124 memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
125 }
126
127 static struct sk_buff *
128 mlx5e_ptp_metadata_map_lookup(struct mlx5e_ptp_metadata_map *map, u16 metadata)
129 {
130 return map->data[metadata];
131 }
132
133 static struct sk_buff *
134 mlx5e_ptp_metadata_map_remove(struct mlx5e_ptp_metadata_map *map, u16 metadata)
135 {
136 struct sk_buff *skb;
137
138 skb = map->data[metadata];
139 map->data[metadata] = NULL;
140
141 return skb;
142 }
143
144 static bool mlx5e_ptp_metadata_map_unhealthy(struct mlx5e_ptp_metadata_map *map)
145 {
146 /* Considered beginning unhealthy state if size * 15 / 2^4 cannot be reclaimed. */
147 return map->undelivered_counter > (map->capacity >> 4) * 15;
148 }
149
150 static void mlx5e_ptpsq_mark_ts_cqes_undelivered(struct mlx5e_ptpsq *ptpsq,
151 ktime_t port_tstamp)
152 {
153 struct mlx5e_ptp_port_ts_cqe_list *cqe_list = ptpsq->ts_cqe_pending_list;
154 ktime_t timeout = ns_to_ktime(MLX5E_PTP_TS_CQE_UNDELIVERED_TIMEOUT);
155 struct mlx5e_ptp_metadata_map *metadata_map = &ptpsq->metadata_map;
156 struct mlx5e_ptp_port_ts_cqe_tracker *pos, *n;
157
158 spin_lock(&cqe_list->tracker_list_lock);
159 list_for_each_entry_safe(pos, n, &cqe_list->tracker_list_head, entry) {
160 struct sk_buff *skb =
161 mlx5e_ptp_metadata_map_lookup(metadata_map, pos->metadata_id);
162 ktime_t dma_tstamp = mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp;
163
164 if (!dma_tstamp ||
165 ktime_after(ktime_add(dma_tstamp, timeout), port_tstamp))
166 break;
167
168 metadata_map->undelivered_counter++;
169 WARN_ON_ONCE(!pos->inuse);
170 pos->inuse = false;
171 list_del(&pos->entry);
172 }
173 spin_unlock(&cqe_list->tracker_list_lock);
174 }
175
176 #define PTP_WQE_CTR2IDX(val) ((val) & ptpsq->ts_cqe_ctr_mask)
177
178 static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,
179 struct mlx5_cqe64 *cqe,
180 int budget)
181 {
182 struct mlx5e_ptp_port_ts_cqe_list *pending_cqe_list = ptpsq->ts_cqe_pending_list;
183 u8 metadata_id = PTP_WQE_CTR2IDX(be16_to_cpu(cqe->wqe_counter));
184 bool is_err_cqe = !!MLX5E_RX_ERR_CQE(cqe);
185 struct mlx5e_txqsq *sq = &ptpsq->txqsq;
186 struct sk_buff *skb;
187 ktime_t hwtstamp;
188
189 if (likely(pending_cqe_list->nodes[metadata_id].inuse)) {
190 mlx5e_ptp_port_ts_cqe_list_remove(pending_cqe_list, metadata_id);
191 } else {
192 /* Reclaim space in the unlikely event CQE was delivered after
193 * marking it late.
194 */
195 ptpsq->metadata_map.undelivered_counter--;
196 ptpsq->cq_stats->late_cqe++;
197 }
198
199 skb = mlx5e_ptp_metadata_map_remove(&ptpsq->metadata_map, metadata_id);
200
201 if (unlikely(is_err_cqe)) {
202 ptpsq->cq_stats->err_cqe++;
203 goto out;
204 }
205
206 hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, get_cqe_ts(cqe));
207 mlx5e_skb_cb_hwtstamp_handler(skb, MLX5E_SKB_CB_PORT_HWTSTAMP,
208 hwtstamp, ptpsq->cq_stats);
209 ptpsq->cq_stats->cqe++;
210
211 mlx5e_ptpsq_mark_ts_cqes_undelivered(ptpsq, hwtstamp);
212 out:
213 napi_consume_skb(skb, budget);
214 mlx5e_ptp_metadata_fifo_push(&ptpsq->metadata_freelist, metadata_id);
215 if (unlikely(mlx5e_ptp_metadata_map_unhealthy(&ptpsq->metadata_map)) &&
216 !test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state))
217 queue_work(ptpsq->txqsq.priv->wq, &ptpsq->report_unhealthy_work);
218 }
219
220 static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int budget)
221 {
222 struct mlx5e_ptpsq *ptpsq = container_of(cq, struct mlx5e_ptpsq, ts_cq);
223 struct mlx5_cqwq *cqwq = &cq->wq;
224 struct mlx5_cqe64 *cqe;
225 int work_done = 0;
226
227 if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &ptpsq->txqsq.state)))
228 return false;
229
230 cqe = mlx5_cqwq_get_cqe(cqwq);
231 if (!cqe)
232 return false;
233
234 do {
235 mlx5_cqwq_pop(cqwq);
236
237 mlx5e_ptp_handle_ts_cqe(ptpsq, cqe, budget);
238 } while ((++work_done < budget) && (cqe = mlx5_cqwq_get_cqe(cqwq)));
239
240 mlx5_cqwq_update_db_record(cqwq);
241
242 /* ensure cq space is freed before enabling more cqes */
243 wmb();
244
245 mlx5e_txqsq_wake(&ptpsq->txqsq);
246
247 return work_done == budget;
248 }
249
250 static int mlx5e_ptp_napi_poll(struct napi_struct *napi, int budget)
251 {
252 struct mlx5e_ptp *c = container_of(napi, struct mlx5e_ptp, napi);
253 struct mlx5e_ch_stats *ch_stats = c->stats;
254 struct mlx5e_rq *rq = &c->rq;
255 bool busy = false;
256 int work_done = 0;
257 int i;
258
259 rcu_read_lock();
260
261 ch_stats->poll++;
262
263 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
264 for (i = 0; i < c->num_tc; i++) {
265 busy |= mlx5e_poll_tx_cq(&c->ptpsq[i].txqsq.cq, budget);
266 busy |= mlx5e_ptp_poll_ts_cq(&c->ptpsq[i].ts_cq, budget);
267 }
268 }
269 if (test_bit(MLX5E_PTP_STATE_RX, c->state) && likely(budget)) {
270 work_done = mlx5e_poll_rx_cq(&rq->cq, budget);
271 busy |= work_done == budget;
272 busy |= INDIRECT_CALL_2(rq->post_wqes,
273 mlx5e_post_rx_mpwqes,
274 mlx5e_post_rx_wqes,
275 rq);
276 }
277
278 if (busy) {
279 work_done = budget;
280 goto out;
281 }
282
283 if (unlikely(!napi_complete_done(napi, work_done)))
284 goto out;
285
286 ch_stats->arm++;
287
288 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
289 for (i = 0; i < c->num_tc; i++) {
290 mlx5e_cq_arm(&c->ptpsq[i].txqsq.cq);
291 mlx5e_cq_arm(&c->ptpsq[i].ts_cq);
292 }
293 }
294 if (test_bit(MLX5E_PTP_STATE_RX, c->state))
295 mlx5e_cq_arm(&rq->cq);
296
297 out:
298 rcu_read_unlock();
299
300 return work_done;
301 }
302
303 static int mlx5e_ptp_alloc_txqsq(struct mlx5e_ptp *c, int txq_ix,
304 struct mlx5e_params *params,
305 struct mlx5e_sq_param *param,
306 struct mlx5e_txqsq *sq, int tc,
307 struct mlx5e_ptpsq *ptpsq)
308 {
309 void *sqc_wq = MLX5_ADDR_OF(sqc, param->sqc, wq);
310 struct mlx5_core_dev *mdev = c->mdev;
311 struct mlx5_wq_cyc *wq = &sq->wq;
312 int err;
313 int node;
314
315 sq->pdev = c->pdev;
316 sq->clock = &mdev->clock;
317 sq->mkey_be = c->mkey_be;
318 sq->netdev = c->netdev;
319 sq->priv = c->priv;
320 sq->mdev = mdev;
321 sq->ch_ix = MLX5E_PTP_CHANNEL_IX;
322 sq->txq_ix = txq_ix;
323 sq->uar_map = mdev->mlx5e_res.hw_objs.bfreg.map;
324 sq->min_inline_mode = params->tx_min_inline_mode;
325 sq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
326 sq->stats = &c->priv->ptp_stats.sq[tc];
327 sq->ptpsq = ptpsq;
328 INIT_WORK(&sq->recover_work, mlx5e_tx_err_cqe_work);
329 if (!MLX5_CAP_ETH(mdev, wqe_vlan_insert))
330 set_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &sq->state);
331 sq->stop_room = param->stop_room;
332 sq->ptp_cyc2time = mlx5_sq_ts_translator(mdev);
333
334 node = dev_to_node(mlx5_core_dma_dev(mdev));
335
336 param->wq.db_numa_node = node;
337 err = mlx5_wq_cyc_create(mdev, &param->wq, sqc_wq, wq, &sq->wq_ctrl);
338 if (err)
339 return err;
340 wq->db = &wq->db[MLX5_SND_DBR];
341
342 err = mlx5e_alloc_txqsq_db(sq, node);
343 if (err)
344 goto err_sq_wq_destroy;
345
346 return 0;
347
348 err_sq_wq_destroy:
349 mlx5_wq_destroy(&sq->wq_ctrl);
350
351 return err;
352 }
353
354 static void mlx5e_ptp_destroy_sq(struct mlx5_core_dev *mdev, u32 sqn)
355 {
356 mlx5_core_destroy_sq(mdev, sqn);
357 }
358
359 static int mlx5e_ptp_alloc_traffic_db(struct mlx5e_ptpsq *ptpsq, int numa)
360 {
361 struct mlx5e_ptp_metadata_fifo *metadata_freelist = &ptpsq->metadata_freelist;
362 struct mlx5e_ptp_metadata_map *metadata_map = &ptpsq->metadata_map;
363 struct mlx5e_ptp_port_ts_cqe_list *cqe_list;
364 int db_sz;
365 int md;
366
367 cqe_list = kvzalloc_node(sizeof(*ptpsq->ts_cqe_pending_list), GFP_KERNEL, numa);
368 if (!cqe_list)
369 return -ENOMEM;
370 ptpsq->ts_cqe_pending_list = cqe_list;
371
372 db_sz = min_t(u32, mlx5_wq_cyc_get_size(&ptpsq->txqsq.wq),
373 1 << MLX5_CAP_GEN_2(ptpsq->txqsq.mdev,
374 ts_cqe_metadata_size2wqe_counter));
375 ptpsq->ts_cqe_ctr_mask = db_sz - 1;
376
377 cqe_list->nodes = kvzalloc_node(array_size(db_sz, sizeof(*cqe_list->nodes)),
378 GFP_KERNEL, numa);
379 if (!cqe_list->nodes)
380 goto free_cqe_list;
381 INIT_LIST_HEAD(&cqe_list->tracker_list_head);
382 spin_lock_init(&cqe_list->tracker_list_lock);
383
384 metadata_freelist->data =
385 kvzalloc_node(array_size(db_sz, sizeof(*metadata_freelist->data)),
386 GFP_KERNEL, numa);
387 if (!metadata_freelist->data)
388 goto free_cqe_list_nodes;
389 metadata_freelist->mask = ptpsq->ts_cqe_ctr_mask;
390
391 for (md = 0; md < db_sz; ++md) {
392 cqe_list->nodes[md].metadata_id = md;
393 metadata_freelist->data[md] = md;
394 }
395 metadata_freelist->pc = db_sz;
396
397 metadata_map->data =
398 kvzalloc_node(array_size(db_sz, sizeof(*metadata_map->data)),
399 GFP_KERNEL, numa);
400 if (!metadata_map->data)
401 goto free_metadata_freelist;
402 metadata_map->capacity = db_sz;
403
404 return 0;
405
406 free_metadata_freelist:
407 kvfree(metadata_freelist->data);
408 free_cqe_list_nodes:
409 kvfree(cqe_list->nodes);
410 free_cqe_list:
411 kvfree(cqe_list);
412 return -ENOMEM;
413 }
414
415 static void mlx5e_ptp_drain_metadata_map(struct mlx5e_ptp_metadata_map *map)
416 {
417 int idx;
418
419 for (idx = 0; idx < map->capacity; ++idx) {
420 struct sk_buff *skb = map->data[idx];
421
422 dev_kfree_skb_any(skb);
423 }
424 }
425
426 static void mlx5e_ptp_free_traffic_db(struct mlx5e_ptpsq *ptpsq)
427 {
428 mlx5e_ptp_drain_metadata_map(&ptpsq->metadata_map);
429 kvfree(ptpsq->metadata_map.data);
430 kvfree(ptpsq->metadata_freelist.data);
431 kvfree(ptpsq->ts_cqe_pending_list->nodes);
432 kvfree(ptpsq->ts_cqe_pending_list);
433 }
434
435 static void mlx5e_ptpsq_unhealthy_work(struct work_struct *work)
436 {
437 struct mlx5e_ptpsq *ptpsq =
438 container_of(work, struct mlx5e_ptpsq, report_unhealthy_work);
439
440 mlx5e_reporter_tx_ptpsq_unhealthy(ptpsq);
441 }
442
443 static int mlx5e_ptp_open_txqsq(struct mlx5e_ptp *c, u32 tisn,
444 int txq_ix, struct mlx5e_ptp_params *cparams,
445 int tc, struct mlx5e_ptpsq *ptpsq)
446 {
447 struct mlx5e_sq_param *sqp = &cparams->txq_sq_param;
448 struct mlx5e_txqsq *txqsq = &ptpsq->txqsq;
449 struct mlx5e_create_sq_param csp = {};
450 int err;
451
452 err = mlx5e_ptp_alloc_txqsq(c, txq_ix, &cparams->params, sqp,
453 txqsq, tc, ptpsq);
454 if (err)
455 return err;
456
457 csp.tisn = tisn;
458 csp.tis_lst_sz = 1;
459 csp.cqn = txqsq->cq.mcq.cqn;
460 csp.wq_ctrl = &txqsq->wq_ctrl;
461 csp.min_inline_mode = txqsq->min_inline_mode;
462 csp.ts_cqe_to_dest_cqn = ptpsq->ts_cq.mcq.cqn;
463
464 err = mlx5e_create_sq_rdy(c->mdev, sqp, &csp, 0, &txqsq->sqn);
465 if (err)
466 goto err_free_txqsq;
467
468 err = mlx5e_ptp_alloc_traffic_db(ptpsq, dev_to_node(mlx5_core_dma_dev(c->mdev)));
469 if (err)
470 goto err_free_txqsq;
471
472 INIT_WORK(&ptpsq->report_unhealthy_work, mlx5e_ptpsq_unhealthy_work);
473
474 return 0;
475
476 err_free_txqsq:
477 mlx5e_free_txqsq(txqsq);
478
479 return err;
480 }
481
482 static void mlx5e_ptp_close_txqsq(struct mlx5e_ptpsq *ptpsq)
483 {
484 struct mlx5e_txqsq *sq = &ptpsq->txqsq;
485 struct mlx5_core_dev *mdev = sq->mdev;
486
487 if (current_work() != &ptpsq->report_unhealthy_work)
488 cancel_work_sync(&ptpsq->report_unhealthy_work);
489 mlx5e_ptp_free_traffic_db(ptpsq);
490 cancel_work_sync(&sq->recover_work);
491 mlx5e_ptp_destroy_sq(mdev, sq->sqn);
492 mlx5e_free_txqsq_descs(sq);
493 mlx5e_free_txqsq(sq);
494 }
495
496 static int mlx5e_ptp_open_txqsqs(struct mlx5e_ptp *c,
497 struct mlx5e_ptp_params *cparams)
498 {
499 struct mlx5e_params *params = &cparams->params;
500 u8 num_tc = mlx5e_get_dcb_num_tc(params);
501 int ix_base;
502 int err;
503 int tc;
504
505 ix_base = num_tc * params->num_channels;
506
507 for (tc = 0; tc < num_tc; tc++) {
508 int txq_ix = ix_base + tc;
509
510 err = mlx5e_ptp_open_txqsq(c, c->priv->tisn[c->lag_port][tc], txq_ix,
511 cparams, tc, &c->ptpsq[tc]);
512 if (err)
513 goto close_txqsq;
514 }
515
516 return 0;
517
518 close_txqsq:
519 for (--tc; tc >= 0; tc--)
520 mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
521
522 return err;
523 }
524
525 static void mlx5e_ptp_close_txqsqs(struct mlx5e_ptp *c)
526 {
527 int tc;
528
529 for (tc = 0; tc < c->num_tc; tc++)
530 mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
531 }
532
533 static int mlx5e_ptp_open_tx_cqs(struct mlx5e_ptp *c,
534 struct mlx5e_ptp_params *cparams)
535 {
536 struct mlx5e_params *params = &cparams->params;
537 struct mlx5e_create_cq_param ccp = {};
538 struct dim_cq_moder ptp_moder = {};
539 struct mlx5e_cq_param *cq_param;
540 u8 num_tc;
541 int err;
542 int tc;
543
544 num_tc = mlx5e_get_dcb_num_tc(params);
545
546 ccp.node = dev_to_node(mlx5_core_dma_dev(c->mdev));
547 ccp.ch_stats = c->stats;
548 ccp.napi = &c->napi;
549 ccp.ix = MLX5E_PTP_CHANNEL_IX;
550
551 cq_param = &cparams->txq_sq_param.cqp;
552
553 for (tc = 0; tc < num_tc; tc++) {
554 struct mlx5e_cq *cq = &c->ptpsq[tc].txqsq.cq;
555
556 err = mlx5e_open_cq(c->priv, ptp_moder, cq_param, &ccp, cq);
557 if (err)
558 goto out_err_txqsq_cq;
559 }
560
561 for (tc = 0; tc < num_tc; tc++) {
562 struct mlx5e_cq *cq = &c->ptpsq[tc].ts_cq;
563 struct mlx5e_ptpsq *ptpsq = &c->ptpsq[tc];
564
565 err = mlx5e_open_cq(c->priv, ptp_moder, cq_param, &ccp, cq);
566 if (err)
567 goto out_err_ts_cq;
568
569 ptpsq->cq_stats = &c->priv->ptp_stats.cq[tc];
570 }
571
572 return 0;
573
574 out_err_ts_cq:
575 for (--tc; tc >= 0; tc--)
576 mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
577 tc = num_tc;
578 out_err_txqsq_cq:
579 for (--tc; tc >= 0; tc--)
580 mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
581
582 return err;
583 }
584
585 static int mlx5e_ptp_open_rx_cq(struct mlx5e_ptp *c,
586 struct mlx5e_ptp_params *cparams)
587 {
588 struct mlx5e_create_cq_param ccp = {};
589 struct dim_cq_moder ptp_moder = {};
590 struct mlx5e_cq_param *cq_param;
591 struct mlx5e_cq *cq = &c->rq.cq;
592
593 ccp.node = dev_to_node(mlx5_core_dma_dev(c->mdev));
594 ccp.ch_stats = c->stats;
595 ccp.napi = &c->napi;
596 ccp.ix = MLX5E_PTP_CHANNEL_IX;
597
598 cq_param = &cparams->rq_param.cqp;
599
600 return mlx5e_open_cq(c->priv, ptp_moder, cq_param, &ccp, cq);
601 }
602
603 static void mlx5e_ptp_close_tx_cqs(struct mlx5e_ptp *c)
604 {
605 int tc;
606
607 for (tc = 0; tc < c->num_tc; tc++)
608 mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
609
610 for (tc = 0; tc < c->num_tc; tc++)
611 mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
612 }
613
614 static void mlx5e_ptp_build_sq_param(struct mlx5_core_dev *mdev,
615 struct mlx5e_params *params,
616 struct mlx5e_sq_param *param)
617 {
618 void *sqc = param->sqc;
619 void *wq;
620
621 mlx5e_build_sq_param_common(mdev, param);
622
623 wq = MLX5_ADDR_OF(sqc, sqc, wq);
624 MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
625 param->stop_room = mlx5e_stop_room_for_max_wqe(mdev);
626 mlx5e_build_tx_cq_param(mdev, params, &param->cqp);
627 }
628
629 static void mlx5e_ptp_build_rq_param(struct mlx5_core_dev *mdev,
630 struct net_device *netdev,
631 u16 q_counter,
632 struct mlx5e_ptp_params *ptp_params)
633 {
634 struct mlx5e_rq_param *rq_params = &ptp_params->rq_param;
635 struct mlx5e_params *params = &ptp_params->params;
636
637 params->rq_wq_type = MLX5_WQ_TYPE_CYCLIC;
638 mlx5e_init_rq_type_params(mdev, params);
639 params->sw_mtu = netdev->max_mtu;
640 mlx5e_build_rq_param(mdev, params, NULL, q_counter, rq_params);
641 }
642
643 static void mlx5e_ptp_build_params(struct mlx5e_ptp *c,
644 struct mlx5e_ptp_params *cparams,
645 struct mlx5e_params *orig)
646 {
647 struct mlx5e_params *params = &cparams->params;
648
649 params->tx_min_inline_mode = orig->tx_min_inline_mode;
650 params->num_channels = orig->num_channels;
651 params->hard_mtu = orig->hard_mtu;
652 params->sw_mtu = orig->sw_mtu;
653 params->mqprio = orig->mqprio;
654
655 /* SQ */
656 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
657 params->log_sq_size =
658 min(MLX5_CAP_GEN_2(c->mdev, ts_cqe_metadata_size2wqe_counter),
659 MLX5E_PTP_MAX_LOG_SQ_SIZE);
660 params->log_sq_size = min(params->log_sq_size, orig->log_sq_size);
661 mlx5e_ptp_build_sq_param(c->mdev, params, &cparams->txq_sq_param);
662 }
663 /* RQ */
664 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
665 params->vlan_strip_disable = orig->vlan_strip_disable;
666 mlx5e_ptp_build_rq_param(c->mdev, c->netdev, c->priv->q_counter, cparams);
667 }
668 }
669
670 static int mlx5e_init_ptp_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,
671 struct mlx5e_rq *rq)
672 {
673 struct mlx5_core_dev *mdev = c->mdev;
674 struct mlx5e_priv *priv = c->priv;
675 int err;
676
677 rq->wq_type = params->rq_wq_type;
678 rq->pdev = c->pdev;
679 rq->netdev = priv->netdev;
680 rq->priv = priv;
681 rq->clock = &mdev->clock;
682 rq->tstamp = &priv->tstamp;
683 rq->mdev = mdev;
684 rq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
685 rq->stats = &c->priv->ptp_stats.rq;
686 rq->ix = MLX5E_PTP_CHANNEL_IX;
687 rq->ptp_cyc2time = mlx5_rq_ts_translator(mdev);
688 err = mlx5e_rq_set_handlers(rq, params, false);
689 if (err)
690 return err;
691
692 return xdp_rxq_info_reg(&rq->xdp_rxq, rq->netdev, rq->ix, 0);
693 }
694
695 static int mlx5e_ptp_open_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,
696 struct mlx5e_rq_param *rq_param)
697 {
698 int node = dev_to_node(c->mdev->device);
699 int err;
700
701 err = mlx5e_init_ptp_rq(c, params, &c->rq);
702 if (err)
703 return err;
704
705 return mlx5e_open_rq(params, rq_param, NULL, node, &c->rq);
706 }
707
708 static int mlx5e_ptp_open_queues(struct mlx5e_ptp *c,
709 struct mlx5e_ptp_params *cparams)
710 {
711 int err;
712
713 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
714 err = mlx5e_ptp_open_tx_cqs(c, cparams);
715 if (err)
716 return err;
717
718 err = mlx5e_ptp_open_txqsqs(c, cparams);
719 if (err)
720 goto close_tx_cqs;
721 }
722 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
723 err = mlx5e_ptp_open_rx_cq(c, cparams);
724 if (err)
725 goto close_txqsq;
726
727 err = mlx5e_ptp_open_rq(c, &cparams->params, &cparams->rq_param);
728 if (err)
729 goto close_rx_cq;
730 }
731 return 0;
732
733 close_rx_cq:
734 if (test_bit(MLX5E_PTP_STATE_RX, c->state))
735 mlx5e_close_cq(&c->rq.cq);
736 close_txqsq:
737 if (test_bit(MLX5E_PTP_STATE_TX, c->state))
738 mlx5e_ptp_close_txqsqs(c);
739 close_tx_cqs:
740 if (test_bit(MLX5E_PTP_STATE_TX, c->state))
741 mlx5e_ptp_close_tx_cqs(c);
742
743 return err;
744 }
745
746 static void mlx5e_ptp_close_queues(struct mlx5e_ptp *c)
747 {
748 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
749 mlx5e_close_rq(&c->rq);
750 mlx5e_close_cq(&c->rq.cq);
751 }
752 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
753 mlx5e_ptp_close_txqsqs(c);
754 mlx5e_ptp_close_tx_cqs(c);
755 }
756 }
757
758 static int mlx5e_ptp_set_state(struct mlx5e_ptp *c, struct mlx5e_params *params)
759 {
760 if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_TX_PORT_TS))
761 __set_bit(MLX5E_PTP_STATE_TX, c->state);
762
763 if (params->ptp_rx)
764 __set_bit(MLX5E_PTP_STATE_RX, c->state);
765
766 return bitmap_empty(c->state, MLX5E_PTP_STATE_NUM_STATES) ? -EINVAL : 0;
767 }
768
769 static void mlx5e_ptp_rx_unset_fs(struct mlx5e_flow_steering *fs)
770 {
771 struct mlx5e_ptp_fs *ptp_fs = mlx5e_fs_get_ptp(fs);
772
773 if (!ptp_fs->valid)
774 return;
775
776 mlx5e_fs_tt_redirect_del_rule(ptp_fs->l2_rule);
777 mlx5e_fs_tt_redirect_any_destroy(fs);
778
779 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v6_rule);
780 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v4_rule);
781 mlx5e_fs_tt_redirect_udp_destroy(fs);
782 ptp_fs->valid = false;
783 }
784
785 static int mlx5e_ptp_rx_set_fs(struct mlx5e_priv *priv)
786 {
787 u32 tirn = mlx5e_rx_res_get_tirn_ptp(priv->rx_res);
788 struct mlx5e_flow_steering *fs = priv->fs;
789 struct mlx5_flow_handle *rule;
790 struct mlx5e_ptp_fs *ptp_fs;
791 int err;
792
793 ptp_fs = mlx5e_fs_get_ptp(fs);
794 if (ptp_fs->valid)
795 return 0;
796
797 err = mlx5e_fs_tt_redirect_udp_create(fs);
798 if (err)
799 goto out_free;
800
801 rule = mlx5e_fs_tt_redirect_udp_add_rule(fs, MLX5_TT_IPV4_UDP,
802 tirn, PTP_EV_PORT);
803 if (IS_ERR(rule)) {
804 err = PTR_ERR(rule);
805 goto out_destroy_fs_udp;
806 }
807 ptp_fs->udp_v4_rule = rule;
808
809 rule = mlx5e_fs_tt_redirect_udp_add_rule(fs, MLX5_TT_IPV6_UDP,
810 tirn, PTP_EV_PORT);
811 if (IS_ERR(rule)) {
812 err = PTR_ERR(rule);
813 goto out_destroy_udp_v4_rule;
814 }
815 ptp_fs->udp_v6_rule = rule;
816
817 err = mlx5e_fs_tt_redirect_any_create(fs);
818 if (err)
819 goto out_destroy_udp_v6_rule;
820
821 rule = mlx5e_fs_tt_redirect_any_add_rule(fs, tirn, ETH_P_1588);
822 if (IS_ERR(rule)) {
823 err = PTR_ERR(rule);
824 goto out_destroy_fs_any;
825 }
826 ptp_fs->l2_rule = rule;
827 ptp_fs->valid = true;
828
829 return 0;
830
831 out_destroy_fs_any:
832 mlx5e_fs_tt_redirect_any_destroy(fs);
833 out_destroy_udp_v6_rule:
834 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v6_rule);
835 out_destroy_udp_v4_rule:
836 mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v4_rule);
837 out_destroy_fs_udp:
838 mlx5e_fs_tt_redirect_udp_destroy(fs);
839 out_free:
840 return err;
841 }
842
843 int mlx5e_ptp_open(struct mlx5e_priv *priv, struct mlx5e_params *params,
844 u8 lag_port, struct mlx5e_ptp **cp)
845 {
846 struct net_device *netdev = priv->netdev;
847 struct mlx5_core_dev *mdev = priv->mdev;
848 struct mlx5e_ptp_params *cparams;
849 struct mlx5e_ptp *c;
850 int err;
851
852
853 c = kvzalloc_node(sizeof(*c), GFP_KERNEL, dev_to_node(mlx5_core_dma_dev(mdev)));
854 cparams = kvzalloc(sizeof(*cparams), GFP_KERNEL);
855 if (!c || !cparams) {
856 err = -ENOMEM;
857 goto err_free;
858 }
859
860 c->priv = priv;
861 c->mdev = priv->mdev;
862 c->tstamp = &priv->tstamp;
863 c->pdev = mlx5_core_dma_dev(priv->mdev);
864 c->netdev = priv->netdev;
865 c->mkey_be = cpu_to_be32(priv->mdev->mlx5e_res.hw_objs.mkey);
866 c->num_tc = mlx5e_get_dcb_num_tc(params);
867 c->stats = &priv->ptp_stats.ch;
868 c->lag_port = lag_port;
869
870 err = mlx5e_ptp_set_state(c, params);
871 if (err)
872 goto err_free;
873
874 netif_napi_add(netdev, &c->napi, mlx5e_ptp_napi_poll);
875
876 mlx5e_ptp_build_params(c, cparams, params);
877
878 err = mlx5e_ptp_open_queues(c, cparams);
879 if (unlikely(err))
880 goto err_napi_del;
881
882 if (test_bit(MLX5E_PTP_STATE_RX, c->state))
883 priv->rx_ptp_opened = true;
884
885 *cp = c;
886
887 kvfree(cparams);
888
889 return 0;
890
891 err_napi_del:
892 netif_napi_del(&c->napi);
893 err_free:
894 kvfree(cparams);
895 kvfree(c);
896 return err;
897 }
898
899 void mlx5e_ptp_close(struct mlx5e_ptp *c)
900 {
901 mlx5e_ptp_close_queues(c);
902 netif_napi_del(&c->napi);
903
904 kvfree(c);
905 }
906
907 void mlx5e_ptp_activate_channel(struct mlx5e_ptp *c)
908 {
909 int tc;
910
911 napi_enable(&c->napi);
912
913 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
914 for (tc = 0; tc < c->num_tc; tc++)
915 mlx5e_activate_txqsq(&c->ptpsq[tc].txqsq);
916 }
917 if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
918 mlx5e_ptp_rx_set_fs(c->priv);
919 mlx5e_activate_rq(&c->rq);
920 }
921 mlx5e_trigger_napi_sched(&c->napi);
922 }
923
924 void mlx5e_ptp_deactivate_channel(struct mlx5e_ptp *c)
925 {
926 int tc;
927
928 if (test_bit(MLX5E_PTP_STATE_RX, c->state))
929 mlx5e_deactivate_rq(&c->rq);
930
931 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
932 for (tc = 0; tc < c->num_tc; tc++)
933 mlx5e_deactivate_txqsq(&c->ptpsq[tc].txqsq);
934 }
935
936 napi_disable(&c->napi);
937 }
938
939 int mlx5e_ptp_get_rqn(struct mlx5e_ptp *c, u32 *rqn)
940 {
941 if (!c || !test_bit(MLX5E_PTP_STATE_RX, c->state))
942 return -EINVAL;
943
944 *rqn = c->rq.rqn;
945 return 0;
946 }
947
948 int mlx5e_ptp_alloc_rx_fs(struct mlx5e_flow_steering *fs,
949 const struct mlx5e_profile *profile)
950 {
951 struct mlx5e_ptp_fs *ptp_fs;
952
953 if (!mlx5e_profile_feature_cap(profile, PTP_RX))
954 return 0;
955
956 ptp_fs = kzalloc(sizeof(*ptp_fs), GFP_KERNEL);
957 if (!ptp_fs)
958 return -ENOMEM;
959 mlx5e_fs_set_ptp(fs, ptp_fs);
960
961 return 0;
962 }
963
964 void mlx5e_ptp_free_rx_fs(struct mlx5e_flow_steering *fs,
965 const struct mlx5e_profile *profile)
966 {
967 struct mlx5e_ptp_fs *ptp_fs = mlx5e_fs_get_ptp(fs);
968
969 if (!mlx5e_profile_feature_cap(profile, PTP_RX))
970 return;
971
972 mlx5e_ptp_rx_unset_fs(fs);
973 kfree(ptp_fs);
974 }
975
976 int mlx5e_ptp_rx_manage_fs(struct mlx5e_priv *priv, bool set)
977 {
978 struct mlx5e_ptp *c = priv->channels.ptp;
979
980 if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
981 return 0;
982
983 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
984 return 0;
985
986 if (set) {
987 if (!c || !test_bit(MLX5E_PTP_STATE_RX, c->state)) {
988 netdev_WARN_ONCE(priv->netdev, "Don't try to add PTP RX-FS rules");
989 return -EINVAL;
990 }
991 return mlx5e_ptp_rx_set_fs(priv);
992 }
993 /* set == false */
994 if (c && test_bit(MLX5E_PTP_STATE_RX, c->state)) {
995 netdev_WARN_ONCE(priv->netdev, "Don't try to remove PTP RX-FS rules");
996 return -EINVAL;
997 }
998 mlx5e_ptp_rx_unset_fs(priv->fs);
999 return 0;
1000 }