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riscv: select ARCH_HAS_STRICT_KERNEL_RWX only if MMU
[thirdparty/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_txrx.c
1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/irq.h>
34 #include <linux/indirect_call_wrapper.h>
35 #include "en.h"
36 #include "en/xdp.h"
37 #include "en/xsk/rx.h"
38 #include "en/xsk/tx.h"
39
40 static inline bool mlx5e_channel_no_affinity_change(struct mlx5e_channel *c)
41 {
42 int current_cpu = smp_processor_id();
43 const struct cpumask *aff;
44 struct irq_data *idata;
45
46 idata = irq_desc_get_irq_data(c->irq_desc);
47 aff = irq_data_get_affinity_mask(idata);
48 return cpumask_test_cpu(current_cpu, aff);
49 }
50
51 static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq)
52 {
53 struct mlx5e_sq_stats *stats = sq->stats;
54 struct dim_sample dim_sample = {};
55
56 if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state)))
57 return;
58
59 dim_update_sample(sq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
60 net_dim(&sq->dim, dim_sample);
61 }
62
63 static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)
64 {
65 struct mlx5e_rq_stats *stats = rq->stats;
66 struct dim_sample dim_sample = {};
67
68 if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state)))
69 return;
70
71 dim_update_sample(rq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
72 net_dim(&rq->dim, dim_sample);
73 }
74
75 void mlx5e_trigger_irq(struct mlx5e_icosq *sq)
76 {
77 struct mlx5_wq_cyc *wq = &sq->wq;
78 struct mlx5e_tx_wqe *nopwqe;
79 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
80
81 sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
82 sq->db.ico_wqe[pi].num_wqebbs = 1;
83 nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc);
84 mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl);
85 }
86
87 static bool mlx5e_napi_xsk_post(struct mlx5e_xdpsq *xsksq, struct mlx5e_rq *xskrq)
88 {
89 bool busy_xsk = false, xsk_rx_alloc_err;
90
91 /* Handle the race between the application querying need_wakeup and the
92 * driver setting it:
93 * 1. Update need_wakeup both before and after the TX. If it goes to
94 * "yes", it can only happen with the first update.
95 * 2. If the application queried need_wakeup before we set it, the
96 * packets will be transmitted anyway, even w/o a wakeup.
97 * 3. Give a chance to clear need_wakeup after new packets were queued
98 * for TX.
99 */
100 mlx5e_xsk_update_tx_wakeup(xsksq);
101 busy_xsk |= mlx5e_xsk_tx(xsksq, MLX5E_TX_XSK_POLL_BUDGET);
102 mlx5e_xsk_update_tx_wakeup(xsksq);
103
104 xsk_rx_alloc_err = INDIRECT_CALL_2(xskrq->post_wqes,
105 mlx5e_post_rx_mpwqes,
106 mlx5e_post_rx_wqes,
107 xskrq);
108 busy_xsk |= mlx5e_xsk_update_rx_wakeup(xskrq, xsk_rx_alloc_err);
109
110 return busy_xsk;
111 }
112
113 int mlx5e_napi_poll(struct napi_struct *napi, int budget)
114 {
115 struct mlx5e_channel *c = container_of(napi, struct mlx5e_channel,
116 napi);
117 struct mlx5e_ch_stats *ch_stats = c->stats;
118 struct mlx5e_xdpsq *xsksq = &c->xsksq;
119 struct mlx5e_rq *xskrq = &c->xskrq;
120 struct mlx5e_rq *rq = &c->rq;
121 bool xsk_open = test_bit(MLX5E_CHANNEL_STATE_XSK, c->state);
122 bool aff_change = false;
123 bool busy_xsk = false;
124 bool busy = false;
125 int work_done = 0;
126 int i;
127
128 ch_stats->poll++;
129
130 for (i = 0; i < c->num_tc; i++)
131 busy |= mlx5e_poll_tx_cq(&c->sq[i].cq, budget);
132
133 busy |= mlx5e_poll_xdpsq_cq(&c->xdpsq.cq);
134
135 if (c->xdp)
136 busy |= mlx5e_poll_xdpsq_cq(&c->rq_xdpsq.cq);
137
138 if (likely(budget)) { /* budget=0 means: don't poll rx rings */
139 if (xsk_open)
140 work_done = mlx5e_poll_rx_cq(&xskrq->cq, budget);
141
142 if (likely(budget - work_done))
143 work_done += mlx5e_poll_rx_cq(&rq->cq, budget - work_done);
144
145 busy |= work_done == budget;
146 }
147
148 mlx5e_poll_ico_cq(&c->icosq.cq);
149
150 busy |= INDIRECT_CALL_2(rq->post_wqes,
151 mlx5e_post_rx_mpwqes,
152 mlx5e_post_rx_wqes,
153 rq);
154 if (xsk_open) {
155 mlx5e_poll_ico_cq(&c->xskicosq.cq);
156 busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq);
157 busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq);
158 }
159
160 busy |= busy_xsk;
161
162 if (busy) {
163 if (likely(mlx5e_channel_no_affinity_change(c)))
164 return budget;
165 ch_stats->aff_change++;
166 aff_change = true;
167 if (budget && work_done == budget)
168 work_done--;
169 }
170
171 if (unlikely(!napi_complete_done(napi, work_done)))
172 return work_done;
173
174 ch_stats->arm++;
175
176 for (i = 0; i < c->num_tc; i++) {
177 mlx5e_handle_tx_dim(&c->sq[i]);
178 mlx5e_cq_arm(&c->sq[i].cq);
179 }
180
181 mlx5e_handle_rx_dim(rq);
182
183 mlx5e_cq_arm(&rq->cq);
184 mlx5e_cq_arm(&c->icosq.cq);
185 mlx5e_cq_arm(&c->xdpsq.cq);
186
187 if (xsk_open) {
188 mlx5e_handle_rx_dim(xskrq);
189 mlx5e_cq_arm(&c->xskicosq.cq);
190 mlx5e_cq_arm(&xsksq->cq);
191 mlx5e_cq_arm(&xskrq->cq);
192 }
193
194 if (unlikely(aff_change && busy_xsk)) {
195 mlx5e_trigger_irq(&c->icosq);
196 ch_stats->force_irq++;
197 }
198
199 return work_done;
200 }
201
202 void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
203 {
204 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
205
206 napi_schedule(cq->napi);
207 cq->event_ctr++;
208 cq->channel->stats->events++;
209 }
210
211 void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event)
212 {
213 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
214 struct mlx5e_channel *c = cq->channel;
215 struct net_device *netdev = c->netdev;
216
217 netdev_err(netdev, "%s: cqn=0x%.6x event=0x%.2x\n",
218 __func__, mcq->cqn, event);
219 }