2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Roy Zang <tie-fei.zang@freescale.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/immap_85xx.h>
12 #include <asm/fsl_serdes.h>
15 u32 port_to_devdisr
[] = {
16 [FM1_DTSEC1
] = FSL_CORENET_DEVDISR2_DTSEC1_1
,
17 [FM1_DTSEC2
] = FSL_CORENET_DEVDISR2_DTSEC1_2
,
18 [FM1_DTSEC3
] = FSL_CORENET_DEVDISR2_DTSEC1_3
,
19 [FM1_DTSEC4
] = FSL_CORENET_DEVDISR2_DTSEC1_4
,
20 [FM1_DTSEC5
] = FSL_CORENET_DEVDISR2_DTSEC1_5
,
21 [FM1_DTSEC6
] = FSL_CORENET_DEVDISR2_DTSEC1_6
,
22 [FM1_10GEC1
] = FSL_CORENET_DEVDISR2_10GEC1_1
,
23 [FM1_10GEC2
] = FSL_CORENET_DEVDISR2_10GEC1_2
,
26 static int is_device_disabled(enum fm_port port
)
28 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
29 u32 devdisr2
= in_be32(&gur
->devdisr2
);
31 return port_to_devdisr
[port
] & devdisr2
;
34 void fman_disable_port(enum fm_port port
)
36 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
38 setbits_be32(&gur
->devdisr2
, port_to_devdisr
[port
]);
41 void fman_enable_port(enum fm_port port
)
43 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
45 clrbits_be32(&gur
->devdisr2
, port_to_devdisr
[port
]);
48 phy_interface_t
fman_port_enet_if(enum fm_port port
)
50 #if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS)
52 char buffer
[HWCONFIG_BUFFER_SIZE
];
54 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
57 if (is_device_disabled(port
))
58 return PHY_INTERFACE_MODE_NONE
;
60 /*B4860 has two 10Gig Mac*/
61 if ((port
== FM1_10GEC1
|| port
== FM1_10GEC2
) &&
62 ((is_serdes_configured(XAUI_FM1_MAC9
)) ||
63 #if (!defined(CONFIG_TARGET_B4860QDS) && \
64 !defined(CONFIG_TARGET_B4R420QDS))
65 (is_serdes_configured(XFI_FM1_MAC9
)) ||
66 (is_serdes_configured(XFI_FM1_MAC10
)) ||
68 (is_serdes_configured(XAUI_FM1_MAC10
))
70 return PHY_INTERFACE_MODE_XGMII
;
72 #if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS)
73 serdes2_prtcl
= in_be32(&gur
->rcwsr
[4]) &
74 FSL_CORENET2_RCWSR4_SRDS2_PRTCL
;
77 serdes2_prtcl
>>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT
;
78 switch (serdes2_prtcl
) {
97 * Extract hwconfig from environment since environment
100 env_get_f("hwconfig", buffer
, sizeof(buffer
));
103 /* check if XFI interface enable in hwconfig for 10g */
104 if (hwconfig_subarg_cmp_f("fsl_b4860_serdes2",
105 "sfp_amc", "sfp", buf
)) {
106 if ((port
== FM1_10GEC1
||
107 port
== FM1_10GEC2
) &&
108 ((is_serdes_configured(XFI_FM1_MAC9
)) ||
109 (is_serdes_configured(XFI_FM1_MAC10
))))
110 return PHY_INTERFACE_MODE_XGMII
;
111 else if ((port
== FM1_DTSEC1
) ||
112 (port
== FM1_DTSEC2
) ||
113 (port
== FM1_DTSEC3
) ||
114 (port
== FM1_DTSEC4
))
115 return PHY_INTERFACE_MODE_NONE
;
121 /* Fix me need to handle RGMII here first */
130 if (is_serdes_configured(SGMII_FM1_DTSEC1
+ port
- FM1_DTSEC1
))
131 return PHY_INTERFACE_MODE_SGMII
;
134 return PHY_INTERFACE_MODE_NONE
;
137 return PHY_INTERFACE_MODE_NONE
;