drivers/net/ftmac100.h

   1 /*
   2  * Faraday FTMAC100 Ethernet
   3  *
   4  * (C) Copyright 2009 Faraday Technology
   5  * Po-Yu Chuang <ratbert@faraday-tech.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __FTMAC100_H
  11 #define __FTMAC100_H
  12
  13 struct ftmac100 {
  14         unsigned int    isr;            /* 0x00 */
  15         unsigned int    imr;            /* 0x04 */
  16         unsigned int    mac_madr;       /* 0x08 */
  17         unsigned int    mac_ladr;       /* 0x0c */
  18         unsigned int    maht0;          /* 0x10 */
  19         unsigned int    maht1;          /* 0x14 */
  20         unsigned int    txpd;           /* 0x18 */
  21         unsigned int    rxpd;           /* 0x1c */
  22         unsigned int    txr_badr;       /* 0x20 */
  23         unsigned int    rxr_badr;       /* 0x24 */
  24         unsigned int    itc;            /* 0x28 */
  25         unsigned int    aptc;           /* 0x2c */
  26         unsigned int    dblac;          /* 0x30 */
  27         unsigned int    pad1[3];        /* 0x34 - 0x3c */
  28         unsigned int    pad2[16];       /* 0x40 - 0x7c */
  29         unsigned int    pad3[2];        /* 0x80 - 0x84 */
  30         unsigned int    maccr;          /* 0x88 */
  31         unsigned int    macsr;          /* 0x8c */
  32         unsigned int    phycr;          /* 0x90 */
  33         unsigned int    phywdata;       /* 0x94 */
  34         unsigned int    fcr;            /* 0x98 */
  35         unsigned int    bpr;            /* 0x9c */
  36         unsigned int    pad4[8];        /* 0xa0 - 0xbc */
  37         unsigned int    pad5;           /* 0xc0 */
  38         unsigned int    ts;             /* 0xc4 */
  39         unsigned int    dmafifos;       /* 0xc8 */
  40         unsigned int    tm;             /* 0xcc */
  41         unsigned int    pad6;           /* 0xd0 */
  42         unsigned int    tx_mcol_scol;   /* 0xd4 */
  43         unsigned int    rpf_aep;        /* 0xd8 */
  44         unsigned int    xm_pg;          /* 0xdc */
  45         unsigned int    runt_tlcc;      /* 0xe0 */
  46         unsigned int    crcer_ftl;      /* 0xe4 */
  47         unsigned int    rlc_rcc;        /* 0xe8 */
  48         unsigned int    broc;           /* 0xec */
  49         unsigned int    mulca;          /* 0xf0 */
  50         unsigned int    rp;             /* 0xf4 */
  51         unsigned int    xp;             /* 0xf8 */
  52 };
  53
  54 /*
  55  * Interrupt status register & interrupt mask register
  56  */
  57 #define FTMAC100_INT_RPKT_FINISH        (1 << 0)
  58 #define FTMAC100_INT_NORXBUF            (1 << 1)
  59 #define FTMAC100_INT_XPKT_FINISH        (1 << 2)
  60 #define FTMAC100_INT_NOTXBUF            (1 << 3)
  61 #define FTMAC100_INT_XPKT_OK            (1 << 4)
  62 #define FTMAC100_INT_XPKT_LOST          (1 << 5)
  63 #define FTMAC100_INT_RPKT_SAV           (1 << 6)
  64 #define FTMAC100_INT_RPKT_LOST          (1 << 7)
  65 #define FTMAC100_INT_AHB_ERR            (1 << 8)
  66 #define FTMAC100_INT_PHYSTS_CHG         (1 << 9)
  67
  68 /*
  69  * Automatic polling timer control register
  70  */
  71 #define FTMAC100_APTC_RXPOLL_CNT(x)     (((x) & 0xf) << 0)
  72 #define FTMAC100_APTC_RXPOLL_TIME_SEL   (1 << 4)
  73 #define FTMAC100_APTC_TXPOLL_CNT(x)     (((x) & 0xf) << 8)
  74 #define FTMAC100_APTC_TXPOLL_TIME_SEL   (1 << 12)
  75
  76 /*
  77  * MAC control register
  78  */
  79 #define FTMAC100_MACCR_XDMA_EN          (1 << 0)
  80 #define FTMAC100_MACCR_RDMA_EN          (1 << 1)
  81 #define FTMAC100_MACCR_SW_RST           (1 << 2)
  82 #define FTMAC100_MACCR_LOOP_EN          (1 << 3)
  83 #define FTMAC100_MACCR_CRC_DIS          (1 << 4)
  84 #define FTMAC100_MACCR_XMT_EN           (1 << 5)
  85 #define FTMAC100_MACCR_ENRX_IN_HALFTX   (1 << 6)
  86 #define FTMAC100_MACCR_RCV_EN           (1 << 8)
  87 #define FTMAC100_MACCR_HT_MULTI_EN      (1 << 9)
  88 #define FTMAC100_MACCR_RX_RUNT          (1 << 10)
  89 #define FTMAC100_MACCR_RX_FTL           (1 << 11)
  90 #define FTMAC100_MACCR_RCV_ALL          (1 << 12)
  91 #define FTMAC100_MACCR_CRC_APD          (1 << 14)
  92 #define FTMAC100_MACCR_FULLDUP          (1 << 15)
  93 #define FTMAC100_MACCR_RX_MULTIPKT      (1 << 16)
  94 #define FTMAC100_MACCR_RX_BROADPKT      (1 << 17)
  95
  96 /*
  97  * Transmit descriptor, aligned to 16 bytes
  98  */
  99 struct ftmac100_txdes {
 100         unsigned int    txdes0;
 101         unsigned int    txdes1;
 102         unsigned int    txdes2; /* TXBUF_BADR */
 103         unsigned int    txdes3; /* not used by HW */
 104 } __attribute__ ((aligned(16)));
 105
 106 #define FTMAC100_TXDES0_TXPKT_LATECOL   (1 << 0)
 107 #define FTMAC100_TXDES0_TXPKT_EXSCOL    (1 << 1)
 108 #define FTMAC100_TXDES0_TXDMA_OWN       (1 << 31)
 109
 110 #define FTMAC100_TXDES1_TXBUF_SIZE(x)   ((x) & 0x7ff)
 111 #define FTMAC100_TXDES1_LTS             (1 << 27)
 112 #define FTMAC100_TXDES1_FTS             (1 << 28)
 113 #define FTMAC100_TXDES1_TX2FIC          (1 << 29)
 114 #define FTMAC100_TXDES1_TXIC            (1 << 30)
 115 #define FTMAC100_TXDES1_EDOTR           (1 << 31)
 116
 117 /*
 118  * Receive descriptor, aligned to 16 bytes
 119  */
 120 struct ftmac100_rxdes {
 121         unsigned int    rxdes0;
 122         unsigned int    rxdes1;
 123         unsigned int    rxdes2; /* RXBUF_BADR */
 124         unsigned int    rxdes3; /* not used by HW */
 125 } __attribute__ ((aligned(16)));
 126
 127 #define FTMAC100_RXDES0_RFL(des)        ((des) & 0x7ff)
 128 #define FTMAC100_RXDES0_MULTICAST       (1 << 16)
 129 #define FTMAC100_RXDES0_BROADCAST       (1 << 17)
 130 #define FTMAC100_RXDES0_RX_ERR          (1 << 18)
 131 #define FTMAC100_RXDES0_CRC_ERR         (1 << 19)
 132 #define FTMAC100_RXDES0_FTL             (1 << 20)
 133 #define FTMAC100_RXDES0_RUNT            (1 << 21)
 134 #define FTMAC100_RXDES0_RX_ODD_NB       (1 << 22)
 135 #define FTMAC100_RXDES0_LRS             (1 << 28)
 136 #define FTMAC100_RXDES0_FRS             (1 << 29)
 137 #define FTMAC100_RXDES0_RXDMA_OWN       (1 << 31)
 138
 139 #define FTMAC100_RXDES1_RXBUF_SIZE(x)   ((x) & 0x7ff)
 140 #define FTMAC100_RXDES1_EDORR           (1 << 31)
 141
 142 #endif  /* __FTMAC100_H */