drivers/net/greth.c

   1 /* Gaisler.com GRETH 10/100/1000 Ethernet MAC driver
   2  *
   3  * Driver use polling mode (no Interrupt)
   4  *
   5  * (C) Copyright 2007
   6  * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <command.h>
  29 #include <net.h>
  30 #include <netdev.h>
  31 #include <malloc.h>
  32 #include <asm/processor.h>
  33 #include <ambapp.h>
  34 #include <asm/leon.h>
  35
  36 /* #define DEBUG */
  37
  38 #include "greth.h"
  39
  40 /* Default to 3s timeout on autonegotiation */
  41 #ifndef GRETH_PHY_TIMEOUT_MS
  42 #define GRETH_PHY_TIMEOUT_MS 3000
  43 #endif
  44
  45 /* ByPass Cache when reading regs */
  46 #define GRETH_REGLOAD(addr)             SPARC_NOCACHE_READ(addr)
  47 /* Write-through cache ==> no bypassing needed on writes */
  48 #define GRETH_REGSAVE(addr,data)        (*(unsigned int *)(addr) = (data))
  49 #define GRETH_REGORIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)|data)
  50 #define GRETH_REGANDIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)&data)
  51
  52 #define GRETH_RXBD_CNT 4
  53 #define GRETH_TXBD_CNT 1
  54
  55 #define GRETH_RXBUF_SIZE 1540
  56 #define GRETH_BUF_ALIGN 4
  57 #define GRETH_RXBUF_EFF_SIZE \
  58         ( (GRETH_RXBUF_SIZE&~(GRETH_BUF_ALIGN-1))+GRETH_BUF_ALIGN )
  59
  60 typedef struct {
  61         greth_regs *regs;
  62         int irq;
  63         struct eth_device *dev;
  64
  65         /* Hardware info */
  66         unsigned char phyaddr;
  67         int gbit_mac;
  68
  69         /* Current operating Mode */
  70         int gb;                 /* GigaBit */
  71         int fd;                 /* Full Duplex */
  72         int sp;                 /* 10/100Mbps speed (1=100,0=10) */
  73         int auto_neg;           /* Auto negotiate done */
  74
  75         unsigned char hwaddr[6];        /* MAC Address */
  76
  77         /* Descriptors */
  78         greth_bd *rxbd_base, *rxbd_max;
  79         greth_bd *txbd_base, *txbd_max;
  80
  81         greth_bd *rxbd_curr;
  82
  83         /* rx buffers in rx descriptors */
  84         void *rxbuf_base;       /* (GRETH_RXBUF_SIZE+ALIGNBYTES) * GRETH_RXBD_CNT */
  85
  86         /* unused for gbit_mac, temp buffer for sending packets with unligned
  87          * start.
  88          * Pointer to packet allocated with malloc.
  89          */
  90         void *txbuf;
  91
  92         struct {
  93                 /* rx status */
  94                 unsigned int rx_packets,
  95                     rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors;
  96
  97                 /* tx stats */
  98                 unsigned int tx_packets,
  99                     tx_latecol_errors,
 100                     tx_underrun_errors, tx_limit_errors, tx_errors;
 101         } stats;
 102 } greth_priv;
 103
 104 /* Read MII register 'addr' from core 'regs' */
 105 static int read_mii(int addr, volatile greth_regs * regs)
 106 {
 107         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 108         }
 109
 110         GRETH_REGSAVE(&regs->mdio, (0 << 11) | ((addr & 0x1F) << 6) | 2);
 111
 112         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 113         }
 114
 115         if (!(GRETH_REGLOAD(&regs->mdio) & GRETH_MII_NVALID)) {
 116                 return (GRETH_REGLOAD(&regs->mdio) >> 16) & 0xFFFF;
 117         } else {
 118                 return -1;
 119         }
 120 }
 121
 122 static void write_mii(int addr, int data, volatile greth_regs * regs)
 123 {
 124         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 125         }
 126
 127         GRETH_REGSAVE(&regs->mdio,
 128                       ((data & 0xFFFF) << 16) | (0 << 11) | ((addr & 0x1F) << 6)
 129                       | 1);
 130
 131         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 132         }
 133
 134 }
 135
 136 /* init/start hardware and allocate descriptor buffers for rx side
 137  *
 138  */
 139 int greth_init(struct eth_device *dev, bd_t * bis)
 140 {
 141         int i;
 142
 143         greth_priv *greth = dev->priv;
 144         greth_regs *regs = greth->regs;
 145 #ifdef DEBUG
 146         printf("greth_init\n");
 147 #endif
 148
 149         GRETH_REGSAVE(&regs->control, 0);
 150
 151         if (!greth->rxbd_base) {
 152
 153                 /* allocate descriptors */
 154                 greth->rxbd_base = (greth_bd *)
 155                     memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
 156                 greth->txbd_base = (greth_bd *)
 157                     memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
 158
 159                 /* allocate buffers to all descriptors  */
 160                 greth->rxbuf_base =
 161                     malloc(GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT);
 162         }
 163
 164         /* initate rx decriptors */
 165         for (i = 0; i < GRETH_RXBD_CNT; i++) {
 166                 greth->rxbd_base[i].addr = (unsigned int)
 167                     greth->rxbuf_base + (GRETH_RXBUF_EFF_SIZE * i);
 168                 /* enable desciptor & set wrap bit if last descriptor */
 169                 if (i >= (GRETH_RXBD_CNT - 1)) {
 170                         greth->rxbd_base[i].stat = GRETH_BD_EN | GRETH_BD_WR;
 171                 } else {
 172                         greth->rxbd_base[i].stat = GRETH_BD_EN;
 173                 }
 174         }
 175
 176         /* initiate indexes */
 177         greth->rxbd_curr = greth->rxbd_base;
 178         greth->rxbd_max = greth->rxbd_base + (GRETH_RXBD_CNT - 1);
 179         greth->txbd_max = greth->txbd_base + (GRETH_TXBD_CNT - 1);
 180         /*
 181          * greth->txbd_base->addr = 0;
 182          * greth->txbd_base->stat = GRETH_BD_WR;
 183          */
 184
 185         /* initate tx decriptors */
 186         for (i = 0; i < GRETH_TXBD_CNT; i++) {
 187                 greth->txbd_base[i].addr = 0;
 188                 /* enable desciptor & set wrap bit if last descriptor */
 189                 if (i >= (GRETH_RXBD_CNT - 1)) {
 190                         greth->txbd_base[i].stat = GRETH_BD_WR;
 191                 } else {
 192                         greth->txbd_base[i].stat = 0;
 193                 }
 194         }
 195
 196         /**** SET HARDWARE REGS ****/
 197
 198         /* Set pointer to tx/rx descriptor areas */
 199         GRETH_REGSAVE(&regs->rx_desc_p, (unsigned int)&greth->rxbd_base[0]);
 200         GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)&greth->txbd_base[0]);
 201
 202         /* Enable Transmitter, GRETH will now scan descriptors for packets
 203          * to transmitt */
 204 #ifdef DEBUG
 205         printf("greth_init: enabling receiver\n");
 206 #endif
 207         GRETH_REGORIN(&regs->control, GRETH_RXEN);
 208
 209         return 0;
 210 }
 211
 212 /* Initiate PHY to a relevant speed
 213  * return:
 214  *  - 0 = success
 215  *  - 1 = timeout/fail
 216  */
 217 int greth_init_phy(greth_priv * dev, bd_t * bis)
 218 {
 219         greth_regs *regs = dev->regs;
 220         int tmp, tmp1, tmp2, i;
 221         unsigned int start, timeout;
 222
 223         /* X msecs to ticks */
 224         timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000);
 225
 226         /* Get system timer0 current value
 227          * Total timeout is 5s
 228          */
 229         start = get_timer(0);
 230
 231         /* get phy control register default values */
 232
 233         while ((tmp = read_mii(0, regs)) & 0x8000) {
 234                 if (get_timer(start) > timeout)
 235                         return 1;       /* Fail */
 236         }
 237
 238         /* reset PHY and wait for completion */
 239         write_mii(0, 0x8000 | tmp, regs);
 240
 241         while (((tmp = read_mii(0, regs))) & 0x8000) {
 242                 if (get_timer(start) > timeout)
 243                         return 1;       /* Fail */
 244         }
 245
 246         /* Check if PHY is autoneg capable and then determine operating
 247          * mode, otherwise force it to 10 Mbit halfduplex
 248          */
 249         dev->gb = 0;
 250         dev->fd = 0;
 251         dev->sp = 0;
 252         dev->auto_neg = 0;
 253         if (!((tmp >> 12) & 1)) {
 254                 write_mii(0, 0, regs);
 255         } else {
 256                 /* wait for auto negotiation to complete and then check operating mode */
 257                 dev->auto_neg = 1;
 258                 i = 0;
 259                 while (!(((tmp = read_mii(1, regs)) >> 5) & 1)) {
 260                         if (get_timer(start) > timeout) {
 261                                 printf("Auto negotiation timed out. "
 262                                        "Selecting default config\n");
 263                                 tmp = read_mii(0, regs);
 264                                 dev->gb = ((tmp >> 6) & 1)
 265                                     && !((tmp >> 13) & 1);
 266                                 dev->sp = !((tmp >> 6) & 1)
 267                                     && ((tmp >> 13) & 1);
 268                                 dev->fd = (tmp >> 8) & 1;
 269                                 goto auto_neg_done;
 270                         }
 271                 }
 272                 if ((tmp >> 8) & 1) {
 273                         tmp1 = read_mii(9, regs);
 274                         tmp2 = read_mii(10, regs);
 275                         if ((tmp1 & GRETH_MII_EXTADV_1000FD) &&
 276                             (tmp2 & GRETH_MII_EXTPRT_1000FD)) {
 277                                 dev->gb = 1;
 278                                 dev->fd = 1;
 279                         }
 280                         if ((tmp1 & GRETH_MII_EXTADV_1000HD) &&
 281                             (tmp2 & GRETH_MII_EXTPRT_1000HD)) {
 282                                 dev->gb = 1;
 283                                 dev->fd = 0;
 284                         }
 285                 }
 286                 if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) {
 287                         tmp1 = read_mii(4, regs);
 288                         tmp2 = read_mii(5, regs);
 289                         if ((tmp1 & GRETH_MII_100TXFD) &&
 290                             (tmp2 & GRETH_MII_100TXFD)) {
 291                                 dev->sp = 1;
 292                                 dev->fd = 1;
 293                         }
 294                         if ((tmp1 & GRETH_MII_100TXHD) &&
 295                             (tmp2 & GRETH_MII_100TXHD)) {
 296                                 dev->sp = 1;
 297                                 dev->fd = 0;
 298                         }
 299                         if ((tmp1 & GRETH_MII_10FD) && (tmp2 & GRETH_MII_10FD)) {
 300                                 dev->fd = 1;
 301                         }
 302                         if ((dev->gb == 1) && (dev->gbit_mac == 0)) {
 303                                 dev->gb = 0;
 304                                 dev->fd = 0;
 305                                 write_mii(0, dev->sp << 13, regs);
 306                         }
 307                 }
 308
 309         }
 310       auto_neg_done:
 311 #ifdef DEBUG
 312         printf("%s GRETH Ethermac at [0x%x] irq %d. Running \
 313                 %d Mbps %s duplex\n", dev->gbit_mac ? "10/100/1000" : "10/100", (unsigned int)(regs), (unsigned int)(dev->irq), dev->gb ? 1000 : (dev->sp ? 100 : 10), dev->fd ? "full" : "half");
 314 #endif
 315         /* Read out PHY info if extended registers are available */
 316         if (tmp & 1) {
 317                 tmp1 = read_mii(2, regs);
 318                 tmp2 = read_mii(3, regs);
 319                 tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F);
 320                 tmp = tmp2 & 0xF;
 321
 322                 tmp2 = (tmp2 >> 4) & 0x3F;
 323 #ifdef DEBUG
 324                 printf("PHY: Vendor %x   Device %x    Revision %d\n", tmp1,
 325                        tmp2, tmp);
 326 #endif
 327         } else {
 328                 printf("PHY info not available\n");
 329         }
 330
 331         /* set speed and duplex bits in control register */
 332         GRETH_REGORIN(&regs->control,
 333                       (dev->gb << 8) | (dev->sp << 7) | (dev->fd << 4));
 334
 335         return 0;
 336 }
 337
 338 void greth_halt(struct eth_device *dev)
 339 {
 340         greth_priv *greth;
 341         greth_regs *regs;
 342         int i;
 343 #ifdef DEBUG
 344         printf("greth_halt\n");
 345 #endif
 346         if (!dev || !dev->priv)
 347                 return;
 348
 349         greth = dev->priv;
 350         regs = greth->regs;
 351
 352         if (!regs)
 353                 return;
 354
 355         /* disable receiver/transmitter by clearing the enable bits */
 356         GRETH_REGANDIN(&regs->control, ~(GRETH_RXEN | GRETH_TXEN));
 357
 358         /* reset rx/tx descriptors */
 359         if (greth->rxbd_base) {
 360                 for (i = 0; i < GRETH_RXBD_CNT; i++) {
 361                         greth->rxbd_base[i].stat =
 362                             (i >= (GRETH_RXBD_CNT - 1)) ? GRETH_BD_WR : 0;
 363                 }
 364         }
 365
 366         if (greth->txbd_base) {
 367                 for (i = 0; i < GRETH_TXBD_CNT; i++) {
 368                         greth->txbd_base[i].stat =
 369                             (i >= (GRETH_TXBD_CNT - 1)) ? GRETH_BD_WR : 0;
 370                 }
 371         }
 372 }
 373
 374 int greth_send(struct eth_device *dev, volatile void *eth_data, int data_length)
 375 {
 376         greth_priv *greth = dev->priv;
 377         greth_regs *regs = greth->regs;
 378         greth_bd *txbd;
 379         void *txbuf;
 380         unsigned int status;
 381 #ifdef DEBUG
 382         printf("greth_send\n");
 383 #endif
 384         /* send data, wait for data to be sent, then return */
 385         if (((unsigned int)eth_data & (GRETH_BUF_ALIGN - 1))
 386             && !greth->gbit_mac) {
 387                 /* data not aligned as needed by GRETH 10/100, solve this by allocating 4 byte aligned buffer
 388                  * and copy data to before giving it to GRETH.
 389                  */
 390                 if (!greth->txbuf) {
 391                         greth->txbuf = malloc(GRETH_RXBUF_SIZE);
 392 #ifdef DEBUG
 393                         printf("GRETH: allocated aligned tx-buf\n");
 394 #endif
 395                 }
 396
 397                 txbuf = greth->txbuf;
 398
 399                 /* copy data info buffer */
 400                 memcpy((char *)txbuf, (char *)eth_data, data_length);
 401
 402                 /* keep buffer to next time */
 403         } else {
 404                 txbuf = (void *)eth_data;
 405         }
 406         /* get descriptor to use, only 1 supported... hehe easy */
 407         txbd = greth->txbd_base;
 408
 409         /* setup descriptor to wrap around to it self */
 410         txbd->addr = (unsigned int)txbuf;
 411         txbd->stat = GRETH_BD_EN | GRETH_BD_WR | data_length;
 412
 413         /* Remind Core which descriptor to use when sending */
 414         GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)txbd);
 415
 416         /* initate send by enabling transmitter */
 417         GRETH_REGORIN(&regs->control, GRETH_TXEN);
 418
 419         /* Wait for data to be sent */
 420         while ((status = GRETH_REGLOAD(&txbd->stat)) & GRETH_BD_EN) {
 421                 ;
 422         }
 423
 424         /* was the packet transmitted succesfully? */
 425         if (status & GRETH_TXBD_ERR_AL) {
 426                 greth->stats.tx_limit_errors++;
 427         }
 428
 429         if (status & GRETH_TXBD_ERR_UE) {
 430                 greth->stats.tx_underrun_errors++;
 431         }
 432
 433         if (status & GRETH_TXBD_ERR_LC) {
 434                 greth->stats.tx_latecol_errors++;
 435         }
 436
 437         if (status &
 438             (GRETH_TXBD_ERR_LC | GRETH_TXBD_ERR_UE | GRETH_TXBD_ERR_AL)) {
 439                 /* any error */
 440                 greth->stats.tx_errors++;
 441                 return -1;
 442         }
 443
 444         /* bump tx packet counter */
 445         greth->stats.tx_packets++;
 446
 447         /* return succefully */
 448         return 0;
 449 }
 450
 451 int greth_recv(struct eth_device *dev)
 452 {
 453         greth_priv *greth = dev->priv;
 454         greth_regs *regs = greth->regs;
 455         greth_bd *rxbd;
 456         unsigned int status, len = 0, bad;
 457         unsigned char *d;
 458         int enable = 0;
 459         int i;
 460 #ifdef DEBUG
 461 /*      printf("greth_recv\n"); */
 462 #endif
 463         /* Receive One packet only, but clear as many error packets as there are
 464          * available.
 465          */
 466         {
 467                 /* current receive descriptor */
 468                 rxbd = greth->rxbd_curr;
 469
 470                 /* get status of next received packet */
 471                 status = GRETH_REGLOAD(&rxbd->stat);
 472
 473                 bad = 0;
 474
 475                 /* stop if no more packets received */
 476                 if (status & GRETH_BD_EN) {
 477                         goto done;
 478                 }
 479 #ifdef DEBUG
 480                 printf("greth_recv: packet 0x%lx, 0x%lx, len: %d\n",
 481                        (unsigned int)rxbd, status, status & GRETH_BD_LEN);
 482 #endif
 483
 484                 /* Check status for errors.
 485                  */
 486                 if (status & GRETH_RXBD_ERR_FT) {
 487                         greth->stats.rx_length_errors++;
 488                         bad = 1;
 489                 }
 490                 if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) {
 491                         greth->stats.rx_frame_errors++;
 492                         bad = 1;
 493                 }
 494                 if (status & GRETH_RXBD_ERR_CRC) {
 495                         greth->stats.rx_crc_errors++;
 496                         bad = 1;
 497                 }
 498                 if (bad) {
 499                         greth->stats.rx_errors++;
 500                         printf
 501                             ("greth_recv: Bad packet (%d, %d, %d, 0x%08x, %d)\n",
 502                              greth->stats.rx_length_errors,
 503                              greth->stats.rx_frame_errors,
 504                              greth->stats.rx_crc_errors, status,
 505                              greth->stats.rx_packets);
 506                         /* print all rx descriptors */
 507                         for (i = 0; i < GRETH_RXBD_CNT; i++) {
 508                                 printf("[%d]: Stat=0x%lx, Addr=0x%lx\n", i,
 509                                        GRETH_REGLOAD(&greth->rxbd_base[i].stat),
 510                                        GRETH_REGLOAD(&greth->rxbd_base[i].
 511                                                      addr));
 512                         }
 513                 } else {
 514                         /* Process the incoming packet. */
 515                         len = status & GRETH_BD_LEN;
 516                         d = (char *)rxbd->addr;
 517 #ifdef DEBUG
 518                         printf
 519                             ("greth_recv: new packet, length: %d. data: %x %x %x %x %x %x %x %x\n",
 520                              len, d[0], d[1], d[2], d[3], d[4], d[5], d[6],
 521                              d[7]);
 522 #endif
 523                         /* flush all data cache to make sure we're not reading old packet data */
 524                         sparc_dcache_flush_all();
 525
 526                         /* pass packet on to network subsystem */
 527                         NetReceive((void *)d, len);
 528
 529                         /* bump stats counters */
 530                         greth->stats.rx_packets++;
 531
 532                         /* bad is now 0 ==> will stop loop */
 533                 }
 534
 535                 /* reenable descriptor to receive more packet with this descriptor, wrap around if needed */
 536                 rxbd->stat =
 537                     GRETH_BD_EN |
 538                     (((unsigned int)greth->rxbd_curr >=
 539                       (unsigned int)greth->rxbd_max) ? GRETH_BD_WR : 0);
 540                 enable = 1;
 541
 542                 /* increase index */
 543                 greth->rxbd_curr =
 544                     ((unsigned int)greth->rxbd_curr >=
 545                      (unsigned int)greth->rxbd_max) ? greth->
 546                     rxbd_base : (greth->rxbd_curr + 1);
 547
 548         };
 549
 550         if (enable) {
 551                 GRETH_REGORIN(&regs->control, GRETH_RXEN);
 552         }
 553       done:
 554         /* return positive length of packet or 0 if non recieved */
 555         return len;
 556 }
 557
 558 void greth_set_hwaddr(greth_priv * greth, unsigned char *mac)
 559 {
 560         /* save new MAC address */
 561         greth->dev->enetaddr[0] = greth->hwaddr[0] = mac[0];
 562         greth->dev->enetaddr[1] = greth->hwaddr[1] = mac[1];
 563         greth->dev->enetaddr[2] = greth->hwaddr[2] = mac[2];
 564         greth->dev->enetaddr[3] = greth->hwaddr[3] = mac[3];
 565         greth->dev->enetaddr[4] = greth->hwaddr[4] = mac[4];
 566         greth->dev->enetaddr[5] = greth->hwaddr[5] = mac[5];
 567         greth->regs->esa_msb = (mac[0] << 8) | mac[1];
 568         greth->regs->esa_lsb =
 569             (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5];
 570 #ifdef DEBUG
 571         printf("GRETH: New MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
 572                mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 573 #endif
 574 }
 575
 576 int greth_initialize(bd_t * bis)
 577 {
 578         greth_priv *greth;
 579         ambapp_apbdev apbdev;
 580         struct eth_device *dev;
 581         int i;
 582         char *addr_str, *end;
 583         unsigned char addr[6];
 584 #ifdef DEBUG
 585         printf("Scanning for GRETH\n");
 586 #endif
 587         /* Find Device & IRQ via AMBA Plug&Play information */
 588         if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) {
 589                 return -1;      /* GRETH not found */
 590         }
 591
 592         greth = (greth_priv *) malloc(sizeof(greth_priv));
 593         dev = (struct eth_device *)malloc(sizeof(struct eth_device));
 594         memset(dev, 0, sizeof(struct eth_device));
 595         memset(greth, 0, sizeof(greth_priv));
 596
 597         greth->regs = (greth_regs *) apbdev.address;
 598         greth->irq = apbdev.irq;
 599 #ifdef DEBUG
 600         printf("Found GRETH at 0x%lx, irq %d\n", greth->regs, greth->irq);
 601 #endif
 602         dev->priv = (void *)greth;
 603         dev->iobase = (unsigned int)greth->regs;
 604         dev->init = greth_init;
 605         dev->halt = greth_halt;
 606         dev->send = greth_send;
 607         dev->recv = greth_recv;
 608         greth->dev = dev;
 609
 610         /* Reset Core */
 611         GRETH_REGSAVE(&greth->regs->control, GRETH_RESET);
 612
 613         /* Wait for core to finish reset cycle */
 614         while (GRETH_REGLOAD(&greth->regs->control) & GRETH_RESET) ;
 615
 616         /* Get the phy address which assumed to have been set
 617            correctly with the reset value in hardware */
 618         greth->phyaddr = (GRETH_REGLOAD(&greth->regs->mdio) >> 11) & 0x1F;
 619
 620         /* Check if mac is gigabit capable */
 621         greth->gbit_mac = (GRETH_REGLOAD(&greth->regs->control) >> 27) & 1;
 622
 623         /* Make descriptor string */
 624         if (greth->gbit_mac) {
 625                 sprintf(dev->name, "GRETH 10/100/GB");
 626         } else {
 627                 sprintf(dev->name, "GRETH 10/100");
 628         }
 629
 630         /* initiate PHY, select speed/duplex depending on connected PHY */
 631         if (greth_init_phy(greth, bis)) {
 632                 /* Failed to init PHY (timedout) */
 633                 return -1;
 634         }
 635
 636         /* Register Device to EtherNet subsystem  */
 637         eth_register(dev);
 638
 639         /* Get MAC address */
 640         if ((addr_str = getenv("ethaddr")) != NULL) {
 641                 for (i = 0; i < 6; i++) {
 642                         addr[i] =
 643                             addr_str ? simple_strtoul(addr_str, &end, 16) : 0;
 644                         if (addr_str) {
 645                                 addr_str = (*end) ? end + 1 : end;
 646                         }
 647                 }
 648         } else {
 649                 /* HW Address not found in environment, Set default HW address */
 650                 addr[0] = GRETH_HWADDR_0;       /* MSB */
 651                 addr[1] = GRETH_HWADDR_1;
 652                 addr[2] = GRETH_HWADDR_2;
 653                 addr[3] = GRETH_HWADDR_3;
 654                 addr[4] = GRETH_HWADDR_4;
 655                 addr[5] = GRETH_HWADDR_5;       /* LSB */
 656         }
 657
 658         /* set and remember MAC address */
 659         greth_set_hwaddr(greth, addr);
 660
 661         return 0;
 662 }