drivers/net/greth.c

   1 /* Gaisler.com GRETH 10/100/1000 Ethernet MAC driver
   2  *
   3  * Driver use polling mode (no Interrupt)
   4  *
   5  * (C) Copyright 2007
   6  * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <command.h>
  29 #include <net.h>
  30 #include <netdev.h>
  31 #include <malloc.h>
  32 #include <asm/processor.h>
  33 #include <ambapp.h>
  34 #include <asm/leon.h>
  35
  36 /* #define DEBUG */
  37
  38 #include "greth.h"
  39
  40 /* Default to 3s timeout on autonegotiation */
  41 #ifndef GRETH_PHY_TIMEOUT_MS
  42 #define GRETH_PHY_TIMEOUT_MS 3000
  43 #endif
  44
  45 /* ByPass Cache when reading regs */
  46 #define GRETH_REGLOAD(addr)             SPARC_NOCACHE_READ(addr)
  47 /* Write-through cache ==> no bypassing needed on writes */
  48 #define GRETH_REGSAVE(addr,data) (*(volatile unsigned int *)(addr) = (data))
  49 #define GRETH_REGORIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)|data)
  50 #define GRETH_REGANDIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)&data)
  51
  52 #define GRETH_RXBD_CNT 4
  53 #define GRETH_TXBD_CNT 1
  54
  55 #define GRETH_RXBUF_SIZE 1540
  56 #define GRETH_BUF_ALIGN 4
  57 #define GRETH_RXBUF_EFF_SIZE \
  58         ( (GRETH_RXBUF_SIZE&~(GRETH_BUF_ALIGN-1))+GRETH_BUF_ALIGN )
  59
  60 typedef struct {
  61         greth_regs *regs;
  62         int irq;
  63         struct eth_device *dev;
  64
  65         /* Hardware info */
  66         unsigned char phyaddr;
  67         int gbit_mac;
  68
  69         /* Current operating Mode */
  70         int gb;                 /* GigaBit */
  71         int fd;                 /* Full Duplex */
  72         int sp;                 /* 10/100Mbps speed (1=100,0=10) */
  73         int auto_neg;           /* Auto negotiate done */
  74
  75         unsigned char hwaddr[6];        /* MAC Address */
  76
  77         /* Descriptors */
  78         greth_bd *rxbd_base, *rxbd_max;
  79         greth_bd *txbd_base, *txbd_max;
  80
  81         greth_bd *rxbd_curr;
  82
  83         /* rx buffers in rx descriptors */
  84         void *rxbuf_base;       /* (GRETH_RXBUF_SIZE+ALIGNBYTES) * GRETH_RXBD_CNT */
  85
  86         /* unused for gbit_mac, temp buffer for sending packets with unligned
  87          * start.
  88          * Pointer to packet allocated with malloc.
  89          */
  90         void *txbuf;
  91
  92         struct {
  93                 /* rx status */
  94                 unsigned int rx_packets,
  95                     rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors;
  96
  97                 /* tx stats */
  98                 unsigned int tx_packets,
  99                     tx_latecol_errors,
 100                     tx_underrun_errors, tx_limit_errors, tx_errors;
 101         } stats;
 102 } greth_priv;
 103
 104 /* Read MII register 'addr' from core 'regs' */
 105 static int read_mii(int addr, volatile greth_regs * regs)
 106 {
 107         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 108         }
 109
 110         GRETH_REGSAVE(&regs->mdio, (0 << 11) | ((addr & 0x1F) << 6) | 2);
 111
 112         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 113         }
 114
 115         if (!(GRETH_REGLOAD(&regs->mdio) & GRETH_MII_NVALID)) {
 116                 return (GRETH_REGLOAD(&regs->mdio) >> 16) & 0xFFFF;
 117         } else {
 118                 return -1;
 119         }
 120 }
 121
 122 static void write_mii(int addr, int data, volatile greth_regs * regs)
 123 {
 124         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 125         }
 126
 127         GRETH_REGSAVE(&regs->mdio,
 128                       ((data & 0xFFFF) << 16) | (0 << 11) | ((addr & 0x1F) << 6)
 129                       | 1);
 130
 131         while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
 132         }
 133
 134 }
 135
 136 /* init/start hardware and allocate descriptor buffers for rx side
 137  *
 138  */
 139 int greth_init(struct eth_device *dev, bd_t * bis)
 140 {
 141         int i;
 142
 143         greth_priv *greth = dev->priv;
 144         greth_regs *regs = greth->regs;
 145 #ifdef DEBUG
 146         printf("greth_init\n");
 147 #endif
 148
 149         if (!greth->rxbd_base) {
 150
 151                 /* allocate descriptors */
 152                 greth->rxbd_base = (greth_bd *)
 153                     memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
 154                 greth->txbd_base = (greth_bd *)
 155                     memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
 156
 157                 /* allocate buffers to all descriptors  */
 158                 greth->rxbuf_base =
 159                     malloc(GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT);
 160         }
 161
 162         /* initate rx decriptors */
 163         for (i = 0; i < GRETH_RXBD_CNT; i++) {
 164                 greth->rxbd_base[i].addr = (unsigned int)
 165                     greth->rxbuf_base + (GRETH_RXBUF_EFF_SIZE * i);
 166                 /* enable desciptor & set wrap bit if last descriptor */
 167                 if (i >= (GRETH_RXBD_CNT - 1)) {
 168                         greth->rxbd_base[i].stat = GRETH_BD_EN | GRETH_BD_WR;
 169                 } else {
 170                         greth->rxbd_base[i].stat = GRETH_BD_EN;
 171                 }
 172         }
 173
 174         /* initiate indexes */
 175         greth->rxbd_curr = greth->rxbd_base;
 176         greth->rxbd_max = greth->rxbd_base + (GRETH_RXBD_CNT - 1);
 177         greth->txbd_max = greth->txbd_base + (GRETH_TXBD_CNT - 1);
 178         /*
 179          * greth->txbd_base->addr = 0;
 180          * greth->txbd_base->stat = GRETH_BD_WR;
 181          */
 182
 183         /* initate tx decriptors */
 184         for (i = 0; i < GRETH_TXBD_CNT; i++) {
 185                 greth->txbd_base[i].addr = 0;
 186                 /* enable desciptor & set wrap bit if last descriptor */
 187                 if (i >= (GRETH_RXBD_CNT - 1)) {
 188                         greth->txbd_base[i].stat = GRETH_BD_WR;
 189                 } else {
 190                         greth->txbd_base[i].stat = 0;
 191                 }
 192         }
 193
 194         /**** SET HARDWARE REGS ****/
 195
 196         /* Set pointer to tx/rx descriptor areas */
 197         GRETH_REGSAVE(&regs->rx_desc_p, (unsigned int)&greth->rxbd_base[0]);
 198         GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)&greth->txbd_base[0]);
 199
 200         /* Enable Transmitter, GRETH will now scan descriptors for packets
 201          * to transmitt */
 202 #ifdef DEBUG
 203         printf("greth_init: enabling receiver\n");
 204 #endif
 205         GRETH_REGORIN(&regs->control, GRETH_RXEN);
 206
 207         return 0;
 208 }
 209
 210 /* Initiate PHY to a relevant speed
 211  * return:
 212  *  - 0 = success
 213  *  - 1 = timeout/fail
 214  */
 215 int greth_init_phy(greth_priv * dev, bd_t * bis)
 216 {
 217         greth_regs *regs = dev->regs;
 218         int tmp, tmp1, tmp2, i;
 219         unsigned int start, timeout;
 220
 221         /* X msecs to ticks */
 222         timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000);
 223
 224         /* Get system timer0 current value
 225          * Total timeout is 5s
 226          */
 227         start = get_timer(0);
 228
 229         /* get phy control register default values */
 230
 231         while ((tmp = read_mii(0, regs)) & 0x8000) {
 232                 if (get_timer(start) > timeout)
 233                         return 1;       /* Fail */
 234         }
 235
 236         /* reset PHY and wait for completion */
 237         write_mii(0, 0x8000 | tmp, regs);
 238
 239         while (((tmp = read_mii(0, regs))) & 0x8000) {
 240                 if (get_timer(start) > timeout)
 241                         return 1;       /* Fail */
 242         }
 243
 244         /* Check if PHY is autoneg capable and then determine operating
 245          * mode, otherwise force it to 10 Mbit halfduplex
 246          */
 247         dev->gb = 0;
 248         dev->fd = 0;
 249         dev->sp = 0;
 250         dev->auto_neg = 0;
 251         if (!((tmp >> 12) & 1)) {
 252                 write_mii(0, 0, regs);
 253         } else {
 254                 /* wait for auto negotiation to complete and then check operating mode */
 255                 dev->auto_neg = 1;
 256                 i = 0;
 257                 while (!(((tmp = read_mii(1, regs)) >> 5) & 1)) {
 258                         if (get_timer(start) > timeout) {
 259                                 printf("Auto negotiation timed out. "
 260                                        "Selecting default config\n");
 261                                 tmp = read_mii(0, regs);
 262                                 dev->gb = ((tmp >> 6) & 1)
 263                                     && !((tmp >> 13) & 1);
 264                                 dev->sp = !((tmp >> 6) & 1)
 265                                     && ((tmp >> 13) & 1);
 266                                 dev->fd = (tmp >> 8) & 1;
 267                                 goto auto_neg_done;
 268                         }
 269                 }
 270                 if ((tmp >> 8) & 1) {
 271                         tmp1 = read_mii(9, regs);
 272                         tmp2 = read_mii(10, regs);
 273                         if ((tmp1 & GRETH_MII_EXTADV_1000FD) &&
 274                             (tmp2 & GRETH_MII_EXTPRT_1000FD)) {
 275                                 dev->gb = 1;
 276                                 dev->fd = 1;
 277                         }
 278                         if ((tmp1 & GRETH_MII_EXTADV_1000HD) &&
 279                             (tmp2 & GRETH_MII_EXTPRT_1000HD)) {
 280                                 dev->gb = 1;
 281                                 dev->fd = 0;
 282                         }
 283                 }
 284                 if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) {
 285                         tmp1 = read_mii(4, regs);
 286                         tmp2 = read_mii(5, regs);
 287                         if ((tmp1 & GRETH_MII_100TXFD) &&
 288                             (tmp2 & GRETH_MII_100TXFD)) {
 289                                 dev->sp = 1;
 290                                 dev->fd = 1;
 291                         }
 292                         if ((tmp1 & GRETH_MII_100TXHD) &&
 293                             (tmp2 & GRETH_MII_100TXHD)) {
 294                                 dev->sp = 1;
 295                                 dev->fd = 0;
 296                         }
 297                         if ((tmp1 & GRETH_MII_10FD) && (tmp2 & GRETH_MII_10FD)) {
 298                                 dev->fd = 1;
 299                         }
 300                         if ((dev->gb == 1) && (dev->gbit_mac == 0)) {
 301                                 dev->gb = 0;
 302                                 dev->fd = 0;
 303                                 write_mii(0, dev->sp << 13, regs);
 304                         }
 305                 }
 306
 307         }
 308       auto_neg_done:
 309 #ifdef DEBUG
 310         printf("%s GRETH Ethermac at [0x%x] irq %d. Running \
 311                 %d Mbps %s duplex\n", dev->gbit_mac ? "10/100/1000" : "10/100", (unsigned int)(regs), (unsigned int)(dev->irq), dev->gb ? 1000 : (dev->sp ? 100 : 10), dev->fd ? "full" : "half");
 312 #endif
 313         /* Read out PHY info if extended registers are available */
 314         if (tmp & 1) {
 315                 tmp1 = read_mii(2, regs);
 316                 tmp2 = read_mii(3, regs);
 317                 tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F);
 318                 tmp = tmp2 & 0xF;
 319
 320                 tmp2 = (tmp2 >> 4) & 0x3F;
 321 #ifdef DEBUG
 322                 printf("PHY: Vendor %x   Device %x    Revision %d\n", tmp1,
 323                        tmp2, tmp);
 324 #endif
 325         } else {
 326                 printf("PHY info not available\n");
 327         }
 328
 329         /* set speed and duplex bits in control register */
 330         GRETH_REGORIN(&regs->control,
 331                       (dev->gb << 8) | (dev->sp << 7) | (dev->fd << 4));
 332
 333         return 0;
 334 }
 335
 336 void greth_halt(struct eth_device *dev)
 337 {
 338         greth_priv *greth;
 339         greth_regs *regs;
 340         int i;
 341 #ifdef DEBUG
 342         printf("greth_halt\n");
 343 #endif
 344         if (!dev || !dev->priv)
 345                 return;
 346
 347         greth = dev->priv;
 348         regs = greth->regs;
 349
 350         if (!regs)
 351                 return;
 352
 353         /* disable receiver/transmitter by clearing the enable bits */
 354         GRETH_REGANDIN(&regs->control, ~(GRETH_RXEN | GRETH_TXEN));
 355
 356         /* reset rx/tx descriptors */
 357         if (greth->rxbd_base) {
 358                 for (i = 0; i < GRETH_RXBD_CNT; i++) {
 359                         greth->rxbd_base[i].stat =
 360                             (i >= (GRETH_RXBD_CNT - 1)) ? GRETH_BD_WR : 0;
 361                 }
 362         }
 363
 364         if (greth->txbd_base) {
 365                 for (i = 0; i < GRETH_TXBD_CNT; i++) {
 366                         greth->txbd_base[i].stat =
 367                             (i >= (GRETH_TXBD_CNT - 1)) ? GRETH_BD_WR : 0;
 368                 }
 369         }
 370 }
 371
 372 int greth_send(struct eth_device *dev, volatile void *eth_data, int data_length)
 373 {
 374         greth_priv *greth = dev->priv;
 375         greth_regs *regs = greth->regs;
 376         greth_bd *txbd;
 377         void *txbuf;
 378         unsigned int status;
 379 #ifdef DEBUG
 380         printf("greth_send\n");
 381 #endif
 382         /* send data, wait for data to be sent, then return */
 383         if (((unsigned int)eth_data & (GRETH_BUF_ALIGN - 1))
 384             && !greth->gbit_mac) {
 385                 /* data not aligned as needed by GRETH 10/100, solve this by allocating 4 byte aligned buffer
 386                  * and copy data to before giving it to GRETH.
 387                  */
 388                 if (!greth->txbuf) {
 389                         greth->txbuf = malloc(GRETH_RXBUF_SIZE);
 390 #ifdef DEBUG
 391                         printf("GRETH: allocated aligned tx-buf\n");
 392 #endif
 393                 }
 394
 395                 txbuf = greth->txbuf;
 396
 397                 /* copy data info buffer */
 398                 memcpy((char *)txbuf, (char *)eth_data, data_length);
 399
 400                 /* keep buffer to next time */
 401         } else {
 402                 txbuf = (void *)eth_data;
 403         }
 404         /* get descriptor to use, only 1 supported... hehe easy */
 405         txbd = greth->txbd_base;
 406
 407         /* setup descriptor to wrap around to it self */
 408         txbd->addr = (unsigned int)txbuf;
 409         txbd->stat = GRETH_BD_EN | GRETH_BD_WR | data_length;
 410
 411         /* Remind Core which descriptor to use when sending */
 412         GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)txbd);
 413
 414         /* initate send by enabling transmitter */
 415         GRETH_REGORIN(&regs->control, GRETH_TXEN);
 416
 417         /* Wait for data to be sent */
 418         while ((status = GRETH_REGLOAD(&txbd->stat)) & GRETH_BD_EN) {
 419                 ;
 420         }
 421
 422         /* was the packet transmitted succesfully? */
 423         if (status & GRETH_TXBD_ERR_AL) {
 424                 greth->stats.tx_limit_errors++;
 425         }
 426
 427         if (status & GRETH_TXBD_ERR_UE) {
 428                 greth->stats.tx_underrun_errors++;
 429         }
 430
 431         if (status & GRETH_TXBD_ERR_LC) {
 432                 greth->stats.tx_latecol_errors++;
 433         }
 434
 435         if (status &
 436             (GRETH_TXBD_ERR_LC | GRETH_TXBD_ERR_UE | GRETH_TXBD_ERR_AL)) {
 437                 /* any error */
 438                 greth->stats.tx_errors++;
 439                 return -1;
 440         }
 441
 442         /* bump tx packet counter */
 443         greth->stats.tx_packets++;
 444
 445         /* return succefully */
 446         return 0;
 447 }
 448
 449 int greth_recv(struct eth_device *dev)
 450 {
 451         greth_priv *greth = dev->priv;
 452         greth_regs *regs = greth->regs;
 453         greth_bd *rxbd;
 454         unsigned int status, len = 0, bad;
 455         unsigned char *d;
 456         int enable = 0;
 457         int i;
 458 #ifdef DEBUG
 459 /*      printf("greth_recv\n"); */
 460 #endif
 461         /* Receive One packet only, but clear as many error packets as there are
 462          * available.
 463          */
 464         {
 465                 /* current receive descriptor */
 466                 rxbd = greth->rxbd_curr;
 467
 468                 /* get status of next received packet */
 469                 status = GRETH_REGLOAD(&rxbd->stat);
 470
 471                 bad = 0;
 472
 473                 /* stop if no more packets received */
 474                 if (status & GRETH_BD_EN) {
 475                         goto done;
 476                 }
 477 #ifdef DEBUG
 478                 printf("greth_recv: packet 0x%lx, 0x%lx, len: %d\n",
 479                        (unsigned int)rxbd, status, status & GRETH_BD_LEN);
 480 #endif
 481
 482                 /* Check status for errors.
 483                  */
 484                 if (status & GRETH_RXBD_ERR_FT) {
 485                         greth->stats.rx_length_errors++;
 486                         bad = 1;
 487                 }
 488                 if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) {
 489                         greth->stats.rx_frame_errors++;
 490                         bad = 1;
 491                 }
 492                 if (status & GRETH_RXBD_ERR_CRC) {
 493                         greth->stats.rx_crc_errors++;
 494                         bad = 1;
 495                 }
 496                 if (bad) {
 497                         greth->stats.rx_errors++;
 498                         printf
 499                             ("greth_recv: Bad packet (%d, %d, %d, 0x%08x, %d)\n",
 500                              greth->stats.rx_length_errors,
 501                              greth->stats.rx_frame_errors,
 502                              greth->stats.rx_crc_errors, status,
 503                              greth->stats.rx_packets);
 504                         /* print all rx descriptors */
 505                         for (i = 0; i < GRETH_RXBD_CNT; i++) {
 506                                 printf("[%d]: Stat=0x%lx, Addr=0x%lx\n", i,
 507                                        GRETH_REGLOAD(&greth->rxbd_base[i].stat),
 508                                        GRETH_REGLOAD(&greth->rxbd_base[i].
 509                                                      addr));
 510                         }
 511                 } else {
 512                         /* Process the incoming packet. */
 513                         len = status & GRETH_BD_LEN;
 514                         d = (char *)rxbd->addr;
 515 #ifdef DEBUG
 516                         printf
 517                             ("greth_recv: new packet, length: %d. data: %x %x %x %x %x %x %x %x\n",
 518                              len, d[0], d[1], d[2], d[3], d[4], d[5], d[6],
 519                              d[7]);
 520 #endif
 521                         /* flush all data cache to make sure we're not reading old packet data */
 522                         sparc_dcache_flush_all();
 523
 524                         /* pass packet on to network subsystem */
 525                         NetReceive((void *)d, len);
 526
 527                         /* bump stats counters */
 528                         greth->stats.rx_packets++;
 529
 530                         /* bad is now 0 ==> will stop loop */
 531                 }
 532
 533                 /* reenable descriptor to receive more packet with this descriptor, wrap around if needed */
 534                 rxbd->stat =
 535                     GRETH_BD_EN |
 536                     (((unsigned int)greth->rxbd_curr >=
 537                       (unsigned int)greth->rxbd_max) ? GRETH_BD_WR : 0);
 538                 enable = 1;
 539
 540                 /* increase index */
 541                 greth->rxbd_curr =
 542                     ((unsigned int)greth->rxbd_curr >=
 543                      (unsigned int)greth->rxbd_max) ? greth->
 544                     rxbd_base : (greth->rxbd_curr + 1);
 545
 546         };
 547
 548         if (enable) {
 549                 GRETH_REGORIN(&regs->control, GRETH_RXEN);
 550         }
 551       done:
 552         /* return positive length of packet or 0 if non recieved */
 553         return len;
 554 }
 555
 556 void greth_set_hwaddr(greth_priv * greth, unsigned char *mac)
 557 {
 558         /* save new MAC address */
 559         greth->dev->enetaddr[0] = greth->hwaddr[0] = mac[0];
 560         greth->dev->enetaddr[1] = greth->hwaddr[1] = mac[1];
 561         greth->dev->enetaddr[2] = greth->hwaddr[2] = mac[2];
 562         greth->dev->enetaddr[3] = greth->hwaddr[3] = mac[3];
 563         greth->dev->enetaddr[4] = greth->hwaddr[4] = mac[4];
 564         greth->dev->enetaddr[5] = greth->hwaddr[5] = mac[5];
 565         greth->regs->esa_msb = (mac[0] << 8) | mac[1];
 566         greth->regs->esa_lsb =
 567             (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5];
 568 #ifdef DEBUG
 569         printf("GRETH: New MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
 570                mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
 571 #endif
 572 }
 573
 574 int greth_initialize(bd_t * bis)
 575 {
 576         greth_priv *greth;
 577         ambapp_apbdev apbdev;
 578         struct eth_device *dev;
 579         int i;
 580         char *addr_str, *end;
 581         unsigned char addr[6];
 582 #ifdef DEBUG
 583         printf("Scanning for GRETH\n");
 584 #endif
 585         /* Find Device & IRQ via AMBA Plug&Play information */
 586         if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) {
 587                 return -1;      /* GRETH not found */
 588         }
 589
 590         greth = (greth_priv *) malloc(sizeof(greth_priv));
 591         dev = (struct eth_device *)malloc(sizeof(struct eth_device));
 592         memset(dev, 0, sizeof(struct eth_device));
 593         memset(greth, 0, sizeof(greth_priv));
 594
 595         greth->regs = (greth_regs *) apbdev.address;
 596         greth->irq = apbdev.irq;
 597 #ifdef DEBUG
 598         printf("Found GRETH at 0x%lx, irq %d\n", greth->regs, greth->irq);
 599 #endif
 600         dev->priv = (void *)greth;
 601         dev->iobase = (unsigned int)greth->regs;
 602         dev->init = greth_init;
 603         dev->halt = greth_halt;
 604         dev->send = greth_send;
 605         dev->recv = greth_recv;
 606         greth->dev = dev;
 607
 608         /* Reset Core */
 609         GRETH_REGSAVE(&greth->regs->control, GRETH_RESET);
 610
 611         /* Wait for core to finish reset cycle */
 612         while (GRETH_REGLOAD(&greth->regs->control) & GRETH_RESET) ;
 613
 614         /* Get the phy address which assumed to have been set
 615            correctly with the reset value in hardware */
 616         greth->phyaddr = (GRETH_REGLOAD(&greth->regs->mdio) >> 11) & 0x1F;
 617
 618         /* Check if mac is gigabit capable */
 619         greth->gbit_mac = (GRETH_REGLOAD(&greth->regs->control) >> 27) & 1;
 620
 621         /* Make descriptor string */
 622         if (greth->gbit_mac) {
 623                 sprintf(dev->name, "GRETH 10/100/GB");
 624         } else {
 625                 sprintf(dev->name, "GRETH 10/100");
 626         }
 627
 628         /* initiate PHY, select speed/duplex depending on connected PHY */
 629         if (greth_init_phy(greth, bis)) {
 630                 /* Failed to init PHY (timedout) */
 631                 return -1;
 632         }
 633
 634         /* Register Device to EtherNet subsystem  */
 635         eth_register(dev);
 636
 637         /* Get MAC address */
 638         if ((addr_str = getenv("ethaddr")) != NULL) {
 639                 for (i = 0; i < 6; i++) {
 640                         addr[i] =
 641                             addr_str ? simple_strtoul(addr_str, &end, 16) : 0;
 642                         if (addr_str) {
 643                                 addr_str = (*end) ? end + 1 : end;
 644                         }
 645                 }
 646         } else {
 647                 /* HW Address not found in environment, Set default HW address */
 648                 addr[0] = GRETH_HWADDR_0;       /* MSB */
 649                 addr[1] = GRETH_HWADDR_1;
 650                 addr[2] = GRETH_HWADDR_2;
 651                 addr[3] = GRETH_HWADDR_3;
 652                 addr[4] = GRETH_HWADDR_4;
 653                 addr[5] = GRETH_HWADDR_5;       /* LSB */
 654         }
 655
 656         /* set and remember MAC address */
 657         greth_set_hwaddr(greth, addr);
 658
 659         return 0;
 660 }