2 * Copyright (C) 2005-2006 Atmel Corporation
4 * SPDX-License-Identifier: GPL-2.0+
9 * The u-boot networking stack is a little weird. It seems like the
10 * networking core allocates receive buffers up front without any
11 * regard to the hardware that's supposed to actually receive those
14 * The MACB receives packets into 128-byte receive buffers, so the
15 * buffers allocated by the core isn't very practical to use. We'll
16 * allocate our own, but we need one such buffer in case a packet
17 * wraps around the DMA ring so that we have to copy it.
19 * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
20 * configuration header. This way, the core allocates one RX buffer
21 * and one TX buffer, each of which can hold a ethernet packet of
24 * For some reason, the networking core unconditionally specifies a
25 * 32-byte packet "alignment" (which really should be called
26 * "padding"). MACB shouldn't need that, but we'll refrain from any
27 * core modifications here...
35 #include <linux/mii.h>
37 #include <asm/dma-mapping.h>
38 #include <asm/arch/clk.h>
42 #define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096
43 #define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128)
44 #define CONFIG_SYS_MACB_TX_RING_SIZE 16
45 #define CONFIG_SYS_MACB_TX_TIMEOUT 1000
46 #define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000
48 struct macb_dma_desc
{
53 #define RXADDR_USED 0x00000001
54 #define RXADDR_WRAP 0x00000002
56 #define RXBUF_FRMLEN_MASK 0x00000fff
57 #define RXBUF_FRAME_START 0x00004000
58 #define RXBUF_FRAME_END 0x00008000
59 #define RXBUF_TYPEID_MATCH 0x00400000
60 #define RXBUF_ADDR4_MATCH 0x00800000
61 #define RXBUF_ADDR3_MATCH 0x01000000
62 #define RXBUF_ADDR2_MATCH 0x02000000
63 #define RXBUF_ADDR1_MATCH 0x04000000
64 #define RXBUF_BROADCAST 0x80000000
66 #define TXBUF_FRMLEN_MASK 0x000007ff
67 #define TXBUF_FRAME_END 0x00008000
68 #define TXBUF_NOCRC 0x00010000
69 #define TXBUF_EXHAUSTED 0x08000000
70 #define TXBUF_UNDERRUN 0x10000000
71 #define TXBUF_MAXRETRY 0x20000000
72 #define TXBUF_WRAP 0x40000000
73 #define TXBUF_USED 0x80000000
84 struct macb_dma_desc
*rx_ring
;
85 struct macb_dma_desc
*tx_ring
;
87 unsigned long rx_buffer_dma
;
88 unsigned long rx_ring_dma
;
89 unsigned long tx_ring_dma
;
91 const struct device
*dev
;
92 struct eth_device netdev
;
93 unsigned short phy_addr
;
96 #define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
98 static int macb_is_gem(struct macb_device
*macb
)
100 return MACB_BFEXT(IDNUM
, macb_readl(macb
, MID
)) == 0x2;
103 static void macb_mdio_write(struct macb_device
*macb
, u8 reg
, u16 value
)
105 unsigned long netctl
;
106 unsigned long netstat
;
109 netctl
= macb_readl(macb
, NCR
);
110 netctl
|= MACB_BIT(MPE
);
111 macb_writel(macb
, NCR
, netctl
);
113 frame
= (MACB_BF(SOF
, 1)
115 | MACB_BF(PHYA
, macb
->phy_addr
)
118 | MACB_BF(DATA
, value
));
119 macb_writel(macb
, MAN
, frame
);
122 netstat
= macb_readl(macb
, NSR
);
123 } while (!(netstat
& MACB_BIT(IDLE
)));
125 netctl
= macb_readl(macb
, NCR
);
126 netctl
&= ~MACB_BIT(MPE
);
127 macb_writel(macb
, NCR
, netctl
);
130 static u16
macb_mdio_read(struct macb_device
*macb
, u8 reg
)
132 unsigned long netctl
;
133 unsigned long netstat
;
136 netctl
= macb_readl(macb
, NCR
);
137 netctl
|= MACB_BIT(MPE
);
138 macb_writel(macb
, NCR
, netctl
);
140 frame
= (MACB_BF(SOF
, 1)
142 | MACB_BF(PHYA
, macb
->phy_addr
)
145 macb_writel(macb
, MAN
, frame
);
148 netstat
= macb_readl(macb
, NSR
);
149 } while (!(netstat
& MACB_BIT(IDLE
)));
151 frame
= macb_readl(macb
, MAN
);
153 netctl
= macb_readl(macb
, NCR
);
154 netctl
&= ~MACB_BIT(MPE
);
155 macb_writel(macb
, NCR
, netctl
);
157 return MACB_BFEXT(DATA
, frame
);
160 void __weak
arch_get_mdio_control(const char *name
)
165 #if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
167 int macb_miiphy_read(const char *devname
, u8 phy_adr
, u8 reg
, u16
*value
)
169 struct eth_device
*dev
= eth_get_dev_by_name(devname
);
170 struct macb_device
*macb
= to_macb(dev
);
172 if ( macb
->phy_addr
!= phy_adr
)
175 arch_get_mdio_control(devname
);
176 *value
= macb_mdio_read(macb
, reg
);
181 int macb_miiphy_write(const char *devname
, u8 phy_adr
, u8 reg
, u16 value
)
183 struct eth_device
*dev
= eth_get_dev_by_name(devname
);
184 struct macb_device
*macb
= to_macb(dev
);
186 if ( macb
->phy_addr
!= phy_adr
)
189 arch_get_mdio_control(devname
);
190 macb_mdio_write(macb
, reg
, value
);
197 #if defined(CONFIG_CMD_NET)
199 static int macb_send(struct eth_device
*netdev
, void *packet
, int length
)
201 struct macb_device
*macb
= to_macb(netdev
);
202 unsigned long paddr
, ctrl
;
203 unsigned int tx_head
= macb
->tx_head
;
206 paddr
= dma_map_single(packet
, length
, DMA_TO_DEVICE
);
208 ctrl
= length
& TXBUF_FRMLEN_MASK
;
209 ctrl
|= TXBUF_FRAME_END
;
210 if (tx_head
== (CONFIG_SYS_MACB_TX_RING_SIZE
- 1)) {
216 macb
->tx_ring
[tx_head
].ctrl
= ctrl
;
217 macb
->tx_ring
[tx_head
].addr
= paddr
;
219 macb_writel(macb
, NCR
, MACB_BIT(TE
) | MACB_BIT(RE
) | MACB_BIT(TSTART
));
222 * I guess this is necessary because the networking core may
223 * re-use the transmit buffer as soon as we return...
225 for (i
= 0; i
<= CONFIG_SYS_MACB_TX_TIMEOUT
; i
++) {
227 ctrl
= macb
->tx_ring
[tx_head
].ctrl
;
228 if (ctrl
& TXBUF_USED
)
233 dma_unmap_single(packet
, length
, paddr
);
235 if (i
<= CONFIG_SYS_MACB_TX_TIMEOUT
) {
236 if (ctrl
& TXBUF_UNDERRUN
)
237 printf("%s: TX underrun\n", netdev
->name
);
238 if (ctrl
& TXBUF_EXHAUSTED
)
239 printf("%s: TX buffers exhausted in mid frame\n",
242 printf("%s: TX timeout\n", netdev
->name
);
245 /* No one cares anyway */
249 static void reclaim_rx_buffers(struct macb_device
*macb
,
250 unsigned int new_tail
)
255 while (i
> new_tail
) {
256 macb
->rx_ring
[i
].addr
&= ~RXADDR_USED
;
258 if (i
> CONFIG_SYS_MACB_RX_RING_SIZE
)
262 while (i
< new_tail
) {
263 macb
->rx_ring
[i
].addr
&= ~RXADDR_USED
;
268 macb
->rx_tail
= new_tail
;
271 static int macb_recv(struct eth_device
*netdev
)
273 struct macb_device
*macb
= to_macb(netdev
);
274 unsigned int rx_tail
= macb
->rx_tail
;
281 if (!(macb
->rx_ring
[rx_tail
].addr
& RXADDR_USED
))
284 status
= macb
->rx_ring
[rx_tail
].ctrl
;
285 if (status
& RXBUF_FRAME_START
) {
286 if (rx_tail
!= macb
->rx_tail
)
287 reclaim_rx_buffers(macb
, rx_tail
);
291 if (status
& RXBUF_FRAME_END
) {
292 buffer
= macb
->rx_buffer
+ 128 * macb
->rx_tail
;
293 length
= status
& RXBUF_FRMLEN_MASK
;
295 unsigned int headlen
, taillen
;
297 headlen
= 128 * (CONFIG_SYS_MACB_RX_RING_SIZE
299 taillen
= length
- headlen
;
300 memcpy((void *)NetRxPackets
[0],
302 memcpy((void *)NetRxPackets
[0] + headlen
,
303 macb
->rx_buffer
, taillen
);
304 buffer
= (void *)NetRxPackets
[0];
307 NetReceive(buffer
, length
);
308 if (++rx_tail
>= CONFIG_SYS_MACB_RX_RING_SIZE
)
310 reclaim_rx_buffers(macb
, rx_tail
);
312 if (++rx_tail
>= CONFIG_SYS_MACB_RX_RING_SIZE
) {
323 static void macb_phy_reset(struct macb_device
*macb
)
325 struct eth_device
*netdev
= &macb
->netdev
;
329 adv
= ADVERTISE_CSMA
| ADVERTISE_ALL
;
330 macb_mdio_write(macb
, MII_ADVERTISE
, adv
);
331 printf("%s: Starting autonegotiation...\n", netdev
->name
);
332 macb_mdio_write(macb
, MII_BMCR
, (BMCR_ANENABLE
335 for (i
= 0; i
< CONFIG_SYS_MACB_AUTONEG_TIMEOUT
/ 100; i
++) {
336 status
= macb_mdio_read(macb
, MII_BMSR
);
337 if (status
& BMSR_ANEGCOMPLETE
)
342 if (status
& BMSR_ANEGCOMPLETE
)
343 printf("%s: Autonegotiation complete\n", netdev
->name
);
345 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
346 netdev
->name
, status
);
349 #ifdef CONFIG_MACB_SEARCH_PHY
350 static int macb_phy_find(struct macb_device
*macb
)
355 /* Search for PHY... */
356 for (i
= 0; i
< 32; i
++) {
358 phy_id
= macb_mdio_read(macb
, MII_PHYSID1
);
359 if (phy_id
!= 0xffff) {
360 printf("%s: PHY present at %d\n", macb
->netdev
.name
, i
);
365 /* PHY isn't up to snuff */
366 printf("%s: PHY not found\n", macb
->netdev
.name
);
370 #endif /* CONFIG_MACB_SEARCH_PHY */
373 static int macb_phy_init(struct macb_device
*macb
)
375 struct eth_device
*netdev
= &macb
->netdev
;
377 struct phy_device
*phydev
;
380 u16 phy_id
, status
, adv
, lpa
;
381 int media
, speed
, duplex
;
384 arch_get_mdio_control(netdev
->name
);
385 #ifdef CONFIG_MACB_SEARCH_PHY
386 /* Auto-detect phy_addr */
387 if (!macb_phy_find(macb
)) {
390 #endif /* CONFIG_MACB_SEARCH_PHY */
392 /* Check if the PHY is up to snuff... */
393 phy_id
= macb_mdio_read(macb
, MII_PHYSID1
);
394 if (phy_id
== 0xffff) {
395 printf("%s: No PHY present\n", netdev
->name
);
400 phydev
->bus
= macb
->bus
;
401 phydev
->dev
= netdev
;
402 phydev
->addr
= macb
->phy_addr
;
406 status
= macb_mdio_read(macb
, MII_BMSR
);
407 if (!(status
& BMSR_LSTATUS
)) {
408 /* Try to re-negotiate if we don't have link already. */
409 macb_phy_reset(macb
);
411 for (i
= 0; i
< CONFIG_SYS_MACB_AUTONEG_TIMEOUT
/ 100; i
++) {
412 status
= macb_mdio_read(macb
, MII_BMSR
);
413 if (status
& BMSR_LSTATUS
)
419 if (!(status
& BMSR_LSTATUS
)) {
420 printf("%s: link down (status: 0x%04x)\n",
421 netdev
->name
, status
);
425 /* First check for GMAC */
426 if (macb_is_gem(macb
)) {
427 lpa
= macb_mdio_read(macb
, MII_STAT1000
);
428 if (lpa
& (1 << 11)) {
432 if (lpa
& (1 << 10)) {
441 printf("%s: link up, %dMbps %s-duplex (lpa: 0x%04x)\n",
444 duplex
? "full" : "half",
447 ncfgr
= macb_readl(macb
, NCFGR
);
448 ncfgr
&= ~(GEM_BIT(GBE
) | MACB_BIT(SPD
) | MACB_BIT(FD
));
450 ncfgr
|= GEM_BIT(GBE
);
452 ncfgr
|= MACB_BIT(FD
);
453 macb_writel(macb
, NCFGR
, ncfgr
);
459 /* fall back for EMAC checking */
460 adv
= macb_mdio_read(macb
, MII_ADVERTISE
);
461 lpa
= macb_mdio_read(macb
, MII_LPA
);
462 media
= mii_nway_result(lpa
& adv
);
463 speed
= (media
& (ADVERTISE_100FULL
| ADVERTISE_100HALF
)
465 duplex
= (media
& ADVERTISE_FULL
) ? 1 : 0;
466 printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
468 speed
? "100" : "10",
469 duplex
? "full" : "half",
472 ncfgr
= macb_readl(macb
, NCFGR
);
473 ncfgr
&= ~(MACB_BIT(SPD
) | MACB_BIT(FD
));
475 ncfgr
|= MACB_BIT(SPD
);
477 ncfgr
|= MACB_BIT(FD
);
478 macb_writel(macb
, NCFGR
, ncfgr
);
483 static int macb_init(struct eth_device
*netdev
, bd_t
*bd
)
485 struct macb_device
*macb
= to_macb(netdev
);
490 * macb_halt should have been called at some point before now,
491 * so we'll assume the controller is idle.
494 /* initialize DMA descriptors */
495 paddr
= macb
->rx_buffer_dma
;
496 for (i
= 0; i
< CONFIG_SYS_MACB_RX_RING_SIZE
; i
++) {
497 if (i
== (CONFIG_SYS_MACB_RX_RING_SIZE
- 1))
498 paddr
|= RXADDR_WRAP
;
499 macb
->rx_ring
[i
].addr
= paddr
;
500 macb
->rx_ring
[i
].ctrl
= 0;
503 for (i
= 0; i
< CONFIG_SYS_MACB_TX_RING_SIZE
; i
++) {
504 macb
->tx_ring
[i
].addr
= 0;
505 if (i
== (CONFIG_SYS_MACB_TX_RING_SIZE
- 1))
506 macb
->tx_ring
[i
].ctrl
= TXBUF_USED
| TXBUF_WRAP
;
508 macb
->tx_ring
[i
].ctrl
= TXBUF_USED
;
510 macb
->rx_tail
= macb
->tx_head
= macb
->tx_tail
= 0;
512 macb_writel(macb
, RBQP
, macb
->rx_ring_dma
);
513 macb_writel(macb
, TBQP
, macb
->tx_ring_dma
);
515 if (macb_is_gem(macb
)) {
517 gem_writel(macb
, UR
, GEM_BIT(RGMII
));
519 gem_writel(macb
, UR
, 0);
522 /* choose RMII or MII mode. This depends on the board */
524 #ifdef CONFIG_AT91FAMILY
525 macb_writel(macb
, USRIO
, MACB_BIT(RMII
) | MACB_BIT(CLKEN
));
527 macb_writel(macb
, USRIO
, 0);
530 #ifdef CONFIG_AT91FAMILY
531 macb_writel(macb
, USRIO
, MACB_BIT(CLKEN
));
533 macb_writel(macb
, USRIO
, MACB_BIT(MII
));
535 #endif /* CONFIG_RMII */
538 if (!macb_phy_init(macb
))
541 /* Enable TX and RX */
542 macb_writel(macb
, NCR
, MACB_BIT(TE
) | MACB_BIT(RE
));
547 static void macb_halt(struct eth_device
*netdev
)
549 struct macb_device
*macb
= to_macb(netdev
);
552 /* Halt the controller and wait for any ongoing transmission to end. */
553 ncr
= macb_readl(macb
, NCR
);
554 ncr
|= MACB_BIT(THALT
);
555 macb_writel(macb
, NCR
, ncr
);
558 tsr
= macb_readl(macb
, TSR
);
559 } while (tsr
& MACB_BIT(TGO
));
561 /* Disable TX and RX, and clear statistics */
562 macb_writel(macb
, NCR
, MACB_BIT(CLRSTAT
));
565 static int macb_write_hwaddr(struct eth_device
*dev
)
567 struct macb_device
*macb
= to_macb(dev
);
571 /* set hardware address */
572 hwaddr_bottom
= dev
->enetaddr
[0] | dev
->enetaddr
[1] << 8 |
573 dev
->enetaddr
[2] << 16 | dev
->enetaddr
[3] << 24;
574 macb_writel(macb
, SA1B
, hwaddr_bottom
);
575 hwaddr_top
= dev
->enetaddr
[4] | dev
->enetaddr
[5] << 8;
576 macb_writel(macb
, SA1T
, hwaddr_top
);
580 static u32
macb_mdc_clk_div(int id
, struct macb_device
*macb
)
583 unsigned long macb_hz
= get_macb_pclk_rate(id
);
585 if (macb_hz
< 20000000)
586 config
= MACB_BF(CLK
, MACB_CLK_DIV8
);
587 else if (macb_hz
< 40000000)
588 config
= MACB_BF(CLK
, MACB_CLK_DIV16
);
589 else if (macb_hz
< 80000000)
590 config
= MACB_BF(CLK
, MACB_CLK_DIV32
);
592 config
= MACB_BF(CLK
, MACB_CLK_DIV64
);
597 static u32
gem_mdc_clk_div(int id
, struct macb_device
*macb
)
600 unsigned long macb_hz
= get_macb_pclk_rate(id
);
602 if (macb_hz
< 20000000)
603 config
= GEM_BF(CLK
, GEM_CLK_DIV8
);
604 else if (macb_hz
< 40000000)
605 config
= GEM_BF(CLK
, GEM_CLK_DIV16
);
606 else if (macb_hz
< 80000000)
607 config
= GEM_BF(CLK
, GEM_CLK_DIV32
);
608 else if (macb_hz
< 120000000)
609 config
= GEM_BF(CLK
, GEM_CLK_DIV48
);
610 else if (macb_hz
< 160000000)
611 config
= GEM_BF(CLK
, GEM_CLK_DIV64
);
613 config
= GEM_BF(CLK
, GEM_CLK_DIV96
);
618 int macb_eth_initialize(int id
, void *regs
, unsigned int phy_addr
)
620 struct macb_device
*macb
;
621 struct eth_device
*netdev
;
624 macb
= malloc(sizeof(struct macb_device
));
626 printf("Error: Failed to allocate memory for MACB%d\n", id
);
629 memset(macb
, 0, sizeof(struct macb_device
));
631 netdev
= &macb
->netdev
;
633 macb
->rx_buffer
= dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE
,
634 &macb
->rx_buffer_dma
);
635 macb
->rx_ring
= dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
636 * sizeof(struct macb_dma_desc
),
638 macb
->tx_ring
= dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
639 * sizeof(struct macb_dma_desc
),
643 macb
->phy_addr
= phy_addr
;
645 if (macb_is_gem(macb
))
646 sprintf(netdev
->name
, "gmac%d", id
);
648 sprintf(netdev
->name
, "macb%d", id
);
650 netdev
->init
= macb_init
;
651 netdev
->halt
= macb_halt
;
652 netdev
->send
= macb_send
;
653 netdev
->recv
= macb_recv
;
654 netdev
->write_hwaddr
= macb_write_hwaddr
;
657 * Do some basic initialization so that we at least can talk
660 if (macb_is_gem(macb
)) {
661 ncfgr
= gem_mdc_clk_div(id
, macb
);
662 ncfgr
|= GEM_BF(DBW
, 1);
664 ncfgr
= macb_mdc_clk_div(id
, macb
);
667 macb_writel(macb
, NCFGR
, ncfgr
);
669 eth_register(netdev
);
671 #if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
672 miiphy_register(netdev
->name
, macb_miiphy_read
, macb_miiphy_write
);
673 macb
->bus
= miiphy_get_dev_by_name(netdev
->name
);