2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 * SPDX-License-Identifier: GPL-2.0+
20 #include <asm/immap.h>
25 /* Ethernet Transmit and Receive Buffers */
26 #define DBUF_LENGTH 1520
28 #define PKT_MAXBUF_SIZE 1518
29 #define PKT_MINBUF_SIZE 64
30 #define PKT_MAXBLR_SIZE 1520
31 #define LAST_PKTBUFSRX PKTBUFSRX - 1
32 #define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY)
33 #define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST)
35 DECLARE_GLOBAL_DATA_PTR
;
37 struct fec_info_s fec_info
[] = {
38 #ifdef CONFIG_SYS_FEC0_IOBASE
41 CONFIG_SYS_FEC0_IOBASE
, /* io base */
42 CONFIG_SYS_FEC0_PINMUX
, /* gpio pin muxing */
43 CONFIG_SYS_FEC0_MIIBASE
, /* mii base */
45 0, /* duplex and speed */
53 0, /* initialized flag */
54 (struct fec_info_s
*)-1,
57 #ifdef CONFIG_SYS_FEC1_IOBASE
60 CONFIG_SYS_FEC1_IOBASE
, /* io base */
61 CONFIG_SYS_FEC1_PINMUX
, /* gpio pin muxing */
62 CONFIG_SYS_FEC1_MIIBASE
, /* mii base */
64 0, /* duplex and speed */
66 0, /* phy name init */
67 #ifdef CONFIG_SYS_FEC_BUF_USE_SRAM
68 (cbd_t
*)DBUF_LENGTH
, /* RX BD */
76 0, /* initialized flag */
77 (struct fec_info_s
*)-1,
82 int fec_recv(struct eth_device
*dev
);
83 int fec_init(struct eth_device
*dev
, bd_t
* bd
);
84 void fec_halt(struct eth_device
*dev
);
85 void fec_reset(struct eth_device
*dev
);
87 void setFecDuplexSpeed(volatile fec_t
* fecp
, bd_t
* bd
, int dup_spd
)
89 if ((dup_spd
>> 16) == FULL
) {
90 /* Set maximum frame length */
91 fecp
->rcr
= FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE
) | FEC_RCR_MII_MODE
|
93 fecp
->tcr
= FEC_TCR_FDEN
;
95 /* Half duplex mode */
96 fecp
->rcr
= FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE
) |
97 FEC_RCR_MII_MODE
| FEC_RCR_DRT
;
98 fecp
->tcr
&= ~FEC_TCR_FDEN
;
101 if ((dup_spd
& 0xFFFF) == _100BASET
) {
102 #ifdef CONFIG_MCF5445x
103 fecp
->rcr
&= ~0x200; /* disabled 10T base */
108 bd
->bi_ethspeed
= 100;
110 #ifdef CONFIG_MCF5445x
111 fecp
->rcr
|= 0x200; /* enabled 10T base */
116 bd
->bi_ethspeed
= 10;
120 static int fec_send(struct eth_device
*dev
, void *packet
, int length
)
122 struct fec_info_s
*info
= dev
->priv
;
123 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
127 miiphy_read(dev
->name
, info
->phy_addr
, MII_BMSR
, &phyStatus
);
133 while ((info
->txbd
[info
->txIdx
].cbd_sc
& BD_ENET_TX_READY
) &&
134 (j
< MCFFEC_TOUT_LOOP
)) {
138 if (j
>= MCFFEC_TOUT_LOOP
) {
139 printf("TX not ready\n");
142 info
->txbd
[info
->txIdx
].cbd_bufaddr
= (uint
) packet
;
143 info
->txbd
[info
->txIdx
].cbd_datlen
= length
;
144 info
->txbd
[info
->txIdx
].cbd_sc
|= BD_ENET_TX_RDY_LST
;
146 /* Activate transmit Buffer Descriptor polling */
147 fecp
->tdar
= 0x01000000; /* Descriptor polling active */
149 #ifndef CONFIG_SYS_FEC_BUF_USE_SRAM
151 * FEC unable to initial transmit data packet.
152 * A nop will ensure the descriptor polling active completed.
153 * CF Internal RAM has shorter cycle access than DRAM. If use
154 * DRAM as Buffer descriptor and data, a nop is a must.
155 * Affect only V2 and V3.
161 #ifdef CONFIG_SYS_UNIFY_CACHE
166 while ((info
->txbd
[info
->txIdx
].cbd_sc
& BD_ENET_TX_READY
) &&
167 (j
< MCFFEC_TOUT_LOOP
)) {
171 if (j
>= MCFFEC_TOUT_LOOP
) {
172 printf("TX timeout\n");
176 printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
177 __FILE__
, __LINE__
, __FUNCTION__
, j
,
178 info
->txbd
[info
->txIdx
].cbd_sc
,
179 (info
->txbd
[info
->txIdx
].cbd_sc
& 0x003C) >> 2);
182 /* return only status bits */
183 rc
= (info
->txbd
[info
->txIdx
].cbd_sc
& BD_ENET_TX_STATS
);
184 info
->txIdx
= (info
->txIdx
+ 1) % TX_BUF_CNT
;
189 int fec_recv(struct eth_device
*dev
)
191 struct fec_info_s
*info
= dev
->priv
;
192 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
196 #ifndef CONFIG_SYS_FEC_BUF_USE_SRAM
198 #ifdef CONFIG_SYS_UNIFY_CACHE
201 /* section 16.9.23.2 */
202 if (info
->rxbd
[info
->rxIdx
].cbd_sc
& BD_ENET_RX_EMPTY
) {
204 break; /* nothing received - leave for() loop */
207 length
= info
->rxbd
[info
->rxIdx
].cbd_datlen
;
209 if (info
->rxbd
[info
->rxIdx
].cbd_sc
& 0x003f) {
210 printf("%s[%d] err: %x\n",
211 __FUNCTION__
, __LINE__
,
212 info
->rxbd
[info
->rxIdx
].cbd_sc
);
214 printf("%s[%d] err: %x\n",
215 __FUNCTION__
, __LINE__
,
216 info
->rxbd
[info
->rxIdx
].cbd_sc
);
221 /* Pass the packet up to the protocol layers. */
222 NetReceive(NetRxPackets
[info
->rxIdx
], length
);
224 fecp
->eir
|= FEC_EIR_RXF
;
227 /* Give the buffer back to the FEC. */
228 info
->rxbd
[info
->rxIdx
].cbd_datlen
= 0;
230 /* wrap around buffer index when necessary */
231 if (info
->rxIdx
== LAST_PKTBUFSRX
) {
232 info
->rxbd
[PKTBUFSRX
- 1].cbd_sc
= BD_ENET_RX_W_E
;
235 info
->rxbd
[info
->rxIdx
].cbd_sc
= BD_ENET_RX_EMPTY
;
239 /* Try to fill Buffer Descriptors */
240 fecp
->rdar
= 0x01000000; /* Descriptor polling active */
247 void dbgFecRegs(struct eth_device
*dev
)
249 struct fec_info_s
*info
= dev
->priv
;
250 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
253 printf("ievent %x - %x\n", (int)&fecp
->eir
, fecp
->eir
);
254 printf("imask %x - %x\n", (int)&fecp
->eimr
, fecp
->eimr
);
255 printf("r_des_active %x - %x\n", (int)&fecp
->rdar
, fecp
->rdar
);
256 printf("x_des_active %x - %x\n", (int)&fecp
->tdar
, fecp
->tdar
);
257 printf("ecntrl %x - %x\n", (int)&fecp
->ecr
, fecp
->ecr
);
258 printf("mii_mframe %x - %x\n", (int)&fecp
->mmfr
, fecp
->mmfr
);
259 printf("mii_speed %x - %x\n", (int)&fecp
->mscr
, fecp
->mscr
);
260 printf("mii_ctrlstat %x - %x\n", (int)&fecp
->mibc
, fecp
->mibc
);
261 printf("r_cntrl %x - %x\n", (int)&fecp
->rcr
, fecp
->rcr
);
262 printf("x_cntrl %x - %x\n", (int)&fecp
->tcr
, fecp
->tcr
);
263 printf("padr_l %x - %x\n", (int)&fecp
->palr
, fecp
->palr
);
264 printf("padr_u %x - %x\n", (int)&fecp
->paur
, fecp
->paur
);
265 printf("op_pause %x - %x\n", (int)&fecp
->opd
, fecp
->opd
);
266 printf("iadr_u %x - %x\n", (int)&fecp
->iaur
, fecp
->iaur
);
267 printf("iadr_l %x - %x\n", (int)&fecp
->ialr
, fecp
->ialr
);
268 printf("gadr_u %x - %x\n", (int)&fecp
->gaur
, fecp
->gaur
);
269 printf("gadr_l %x - %x\n", (int)&fecp
->galr
, fecp
->galr
);
270 printf("x_wmrk %x - %x\n", (int)&fecp
->tfwr
, fecp
->tfwr
);
271 printf("r_bound %x - %x\n", (int)&fecp
->frbr
, fecp
->frbr
);
272 printf("r_fstart %x - %x\n", (int)&fecp
->frsr
, fecp
->frsr
);
273 printf("r_drng %x - %x\n", (int)&fecp
->erdsr
, fecp
->erdsr
);
274 printf("x_drng %x - %x\n", (int)&fecp
->etdsr
, fecp
->etdsr
);
275 printf("r_bufsz %x - %x\n", (int)&fecp
->emrbr
, fecp
->emrbr
);
278 printf("rmon_t_drop %x - %x\n", (int)&fecp
->rmon_t_drop
,
280 printf("rmon_t_packets %x - %x\n", (int)&fecp
->rmon_t_packets
,
281 fecp
->rmon_t_packets
);
282 printf("rmon_t_bc_pkt %x - %x\n", (int)&fecp
->rmon_t_bc_pkt
,
283 fecp
->rmon_t_bc_pkt
);
284 printf("rmon_t_mc_pkt %x - %x\n", (int)&fecp
->rmon_t_mc_pkt
,
285 fecp
->rmon_t_mc_pkt
);
286 printf("rmon_t_crc_align %x - %x\n", (int)&fecp
->rmon_t_crc_align
,
287 fecp
->rmon_t_crc_align
);
288 printf("rmon_t_undersize %x - %x\n", (int)&fecp
->rmon_t_undersize
,
289 fecp
->rmon_t_undersize
);
290 printf("rmon_t_oversize %x - %x\n", (int)&fecp
->rmon_t_oversize
,
291 fecp
->rmon_t_oversize
);
292 printf("rmon_t_frag %x - %x\n", (int)&fecp
->rmon_t_frag
,
294 printf("rmon_t_jab %x - %x\n", (int)&fecp
->rmon_t_jab
,
296 printf("rmon_t_col %x - %x\n", (int)&fecp
->rmon_t_col
,
298 printf("rmon_t_p64 %x - %x\n", (int)&fecp
->rmon_t_p64
,
300 printf("rmon_t_p65to127 %x - %x\n", (int)&fecp
->rmon_t_p65to127
,
301 fecp
->rmon_t_p65to127
);
302 printf("rmon_t_p128to255 %x - %x\n", (int)&fecp
->rmon_t_p128to255
,
303 fecp
->rmon_t_p128to255
);
304 printf("rmon_t_p256to511 %x - %x\n", (int)&fecp
->rmon_t_p256to511
,
305 fecp
->rmon_t_p256to511
);
306 printf("rmon_t_p512to1023 %x - %x\n", (int)&fecp
->rmon_t_p512to1023
,
307 fecp
->rmon_t_p512to1023
);
308 printf("rmon_t_p1024to2047 %x - %x\n", (int)&fecp
->rmon_t_p1024to2047
,
309 fecp
->rmon_t_p1024to2047
);
310 printf("rmon_t_p_gte2048 %x - %x\n", (int)&fecp
->rmon_t_p_gte2048
,
311 fecp
->rmon_t_p_gte2048
);
312 printf("rmon_t_octets %x - %x\n", (int)&fecp
->rmon_t_octets
,
313 fecp
->rmon_t_octets
);
316 printf("ieee_t_drop %x - %x\n", (int)&fecp
->ieee_t_drop
,
318 printf("ieee_t_frame_ok %x - %x\n", (int)&fecp
->ieee_t_frame_ok
,
319 fecp
->ieee_t_frame_ok
);
320 printf("ieee_t_1col %x - %x\n", (int)&fecp
->ieee_t_1col
,
322 printf("ieee_t_mcol %x - %x\n", (int)&fecp
->ieee_t_mcol
,
324 printf("ieee_t_def %x - %x\n", (int)&fecp
->ieee_t_def
,
326 printf("ieee_t_lcol %x - %x\n", (int)&fecp
->ieee_t_lcol
,
328 printf("ieee_t_excol %x - %x\n", (int)&fecp
->ieee_t_excol
,
330 printf("ieee_t_macerr %x - %x\n", (int)&fecp
->ieee_t_macerr
,
331 fecp
->ieee_t_macerr
);
332 printf("ieee_t_cserr %x - %x\n", (int)&fecp
->ieee_t_cserr
,
334 printf("ieee_t_sqe %x - %x\n", (int)&fecp
->ieee_t_sqe
,
336 printf("ieee_t_fdxfc %x - %x\n", (int)&fecp
->ieee_t_fdxfc
,
338 printf("ieee_t_octets_ok %x - %x\n", (int)&fecp
->ieee_t_octets_ok
,
339 fecp
->ieee_t_octets_ok
);
342 printf("rmon_r_drop %x - %x\n", (int)&fecp
->rmon_r_drop
,
344 printf("rmon_r_packets %x - %x\n", (int)&fecp
->rmon_r_packets
,
345 fecp
->rmon_r_packets
);
346 printf("rmon_r_bc_pkt %x - %x\n", (int)&fecp
->rmon_r_bc_pkt
,
347 fecp
->rmon_r_bc_pkt
);
348 printf("rmon_r_mc_pkt %x - %x\n", (int)&fecp
->rmon_r_mc_pkt
,
349 fecp
->rmon_r_mc_pkt
);
350 printf("rmon_r_crc_align %x - %x\n", (int)&fecp
->rmon_r_crc_align
,
351 fecp
->rmon_r_crc_align
);
352 printf("rmon_r_undersize %x - %x\n", (int)&fecp
->rmon_r_undersize
,
353 fecp
->rmon_r_undersize
);
354 printf("rmon_r_oversize %x - %x\n", (int)&fecp
->rmon_r_oversize
,
355 fecp
->rmon_r_oversize
);
356 printf("rmon_r_frag %x - %x\n", (int)&fecp
->rmon_r_frag
,
358 printf("rmon_r_jab %x - %x\n", (int)&fecp
->rmon_r_jab
,
360 printf("rmon_r_p64 %x - %x\n", (int)&fecp
->rmon_r_p64
,
362 printf("rmon_r_p65to127 %x - %x\n", (int)&fecp
->rmon_r_p65to127
,
363 fecp
->rmon_r_p65to127
);
364 printf("rmon_r_p128to255 %x - %x\n", (int)&fecp
->rmon_r_p128to255
,
365 fecp
->rmon_r_p128to255
);
366 printf("rmon_r_p256to511 %x - %x\n", (int)&fecp
->rmon_r_p256to511
,
367 fecp
->rmon_r_p256to511
);
368 printf("rmon_r_p512to1023 %x - %x\n", (int)&fecp
->rmon_r_p512to1023
,
369 fecp
->rmon_r_p512to1023
);
370 printf("rmon_r_p1024to2047 %x - %x\n", (int)&fecp
->rmon_r_p1024to2047
,
371 fecp
->rmon_r_p1024to2047
);
372 printf("rmon_r_p_gte2048 %x - %x\n", (int)&fecp
->rmon_r_p_gte2048
,
373 fecp
->rmon_r_p_gte2048
);
374 printf("rmon_r_octets %x - %x\n", (int)&fecp
->rmon_r_octets
,
375 fecp
->rmon_r_octets
);
378 printf("ieee_r_drop %x - %x\n", (int)&fecp
->ieee_r_drop
,
380 printf("ieee_r_frame_ok %x - %x\n", (int)&fecp
->ieee_r_frame_ok
,
381 fecp
->ieee_r_frame_ok
);
382 printf("ieee_r_crc %x - %x\n", (int)&fecp
->ieee_r_crc
,
384 printf("ieee_r_align %x - %x\n", (int)&fecp
->ieee_r_align
,
386 printf("ieee_r_macerr %x - %x\n", (int)&fecp
->ieee_r_macerr
,
387 fecp
->ieee_r_macerr
);
388 printf("ieee_r_fdxfc %x - %x\n", (int)&fecp
->ieee_r_fdxfc
,
390 printf("ieee_r_octets_ok %x - %x\n", (int)&fecp
->ieee_r_octets_ok
,
391 fecp
->ieee_r_octets_ok
);
397 int fec_init(struct eth_device
*dev
, bd_t
* bd
)
399 struct fec_info_s
*info
= dev
->priv
;
400 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
404 fecpin_setclear(dev
, 1);
408 #if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \
409 defined (CONFIG_SYS_DISCOVER_PHY)
413 setFecDuplexSpeed(fecp
, bd
, info
->dup_spd
);
415 #ifndef CONFIG_SYS_DISCOVER_PHY
416 setFecDuplexSpeed(fecp
, bd
, (FECDUPLEX
<< 16) | FECSPEED
);
417 #endif /* ifndef CONFIG_SYS_DISCOVER_PHY */
418 #endif /* CONFIG_CMD_MII || CONFIG_MII */
420 /* We use strictly polling mode only */
423 /* Clear any pending interrupt */
424 fecp
->eir
= 0xffffffff;
426 /* Set station address */
427 if ((u32
) fecp
== CONFIG_SYS_FEC0_IOBASE
) {
428 #ifdef CONFIG_SYS_FEC1_IOBASE
429 volatile fec_t
*fecp1
= (fec_t
*) (CONFIG_SYS_FEC1_IOBASE
);
430 eth_getenv_enetaddr("eth1addr", ea
);
432 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
433 fecp1
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
435 eth_getenv_enetaddr("ethaddr", ea
);
437 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
438 fecp
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
440 #ifdef CONFIG_SYS_FEC0_IOBASE
441 volatile fec_t
*fecp0
= (fec_t
*) (CONFIG_SYS_FEC0_IOBASE
);
442 eth_getenv_enetaddr("ethaddr", ea
);
444 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
445 fecp0
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
447 #ifdef CONFIG_SYS_FEC1_IOBASE
448 eth_getenv_enetaddr("eth1addr", ea
);
450 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
451 fecp
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
455 /* Clear unicast address hash table */
459 /* Clear multicast address hash table */
463 /* Set maximum receive buffer size. */
464 fecp
->emrbr
= PKT_MAXBLR_SIZE
;
467 * Setup Buffers and Buffer Desriptors
473 * Setup Receiver Buffer Descriptors (13.14.24.18)
477 for (i
= 0; i
< PKTBUFSRX
; i
++) {
478 info
->rxbd
[i
].cbd_sc
= BD_ENET_RX_EMPTY
;
479 info
->rxbd
[i
].cbd_datlen
= 0; /* Reset */
480 info
->rxbd
[i
].cbd_bufaddr
= (uint
) NetRxPackets
[i
];
482 info
->rxbd
[PKTBUFSRX
- 1].cbd_sc
|= BD_ENET_RX_WRAP
;
485 * Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
489 for (i
= 0; i
< TX_BUF_CNT
; i
++) {
490 info
->txbd
[i
].cbd_sc
= BD_ENET_TX_LAST
| BD_ENET_TX_TC
;
491 info
->txbd
[i
].cbd_datlen
= 0; /* Reset */
492 info
->txbd
[i
].cbd_bufaddr
= (uint
) (&info
->txbuf
[0]);
494 info
->txbd
[TX_BUF_CNT
- 1].cbd_sc
|= BD_ENET_TX_WRAP
;
496 /* Set receive and transmit descriptor base */
497 fecp
->erdsr
= (unsigned int)(&info
->rxbd
[0]);
498 fecp
->etdsr
= (unsigned int)(&info
->txbd
[0]);
500 /* Now enable the transmit and receive processing */
501 fecp
->ecr
|= FEC_ECR_ETHER_EN
;
503 /* And last, try to fill Rx Buffer Descriptors */
504 fecp
->rdar
= 0x01000000; /* Descriptor polling active */
509 void fec_reset(struct eth_device
*dev
)
511 struct fec_info_s
*info
= dev
->priv
;
512 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
515 fecp
->ecr
= FEC_ECR_RESET
;
516 for (i
= 0; (fecp
->ecr
& FEC_ECR_RESET
) && (i
< FEC_RESET_DELAY
); ++i
) {
519 if (i
== FEC_RESET_DELAY
) {
520 printf("FEC_RESET_DELAY timeout\n");
524 void fec_halt(struct eth_device
*dev
)
526 struct fec_info_s
*info
= dev
->priv
;
530 fecpin_setclear(dev
, 0);
532 info
->rxIdx
= info
->txIdx
= 0;
533 memset(info
->rxbd
, 0, PKTBUFSRX
* sizeof(cbd_t
));
534 memset(info
->txbd
, 0, TX_BUF_CNT
* sizeof(cbd_t
));
535 memset(info
->txbuf
, 0, DBUF_LENGTH
);
538 int mcffec_initialize(bd_t
* bis
)
540 struct eth_device
*dev
;
542 #ifdef CONFIG_SYS_FEC_BUF_USE_SRAM
543 u32 tmp
= CONFIG_SYS_INIT_RAM_ADDR
+ 0x1000;
546 for (i
= 0; i
< ARRAY_SIZE(fec_info
); i
++) {
549 (struct eth_device
*)memalign(CONFIG_SYS_CACHELINE_SIZE
,
554 memset(dev
, 0, sizeof(*dev
));
556 sprintf(dev
->name
, "FEC%d", fec_info
[i
].index
);
558 dev
->priv
= &fec_info
[i
];
559 dev
->init
= fec_init
;
560 dev
->halt
= fec_halt
;
561 dev
->send
= fec_send
;
562 dev
->recv
= fec_recv
;
564 /* setup Receive and Transmit buffer descriptor */
565 #ifdef CONFIG_SYS_FEC_BUF_USE_SRAM
566 fec_info
[i
].rxbd
= (cbd_t
*)((u32
)fec_info
[i
].rxbd
+ tmp
);
567 tmp
= (u32
)fec_info
[i
].rxbd
;
569 (cbd_t
*)((u32
)fec_info
[i
].txbd
+ tmp
+
570 (PKTBUFSRX
* sizeof(cbd_t
)));
571 tmp
= (u32
)fec_info
[i
].txbd
;
573 (char *)((u32
)fec_info
[i
].txbuf
+ tmp
+
574 (CONFIG_SYS_TX_ETH_BUFFER
* sizeof(cbd_t
)));
575 tmp
= (u32
)fec_info
[i
].txbuf
;
578 (cbd_t
*) memalign(CONFIG_SYS_CACHELINE_SIZE
,
579 (PKTBUFSRX
* sizeof(cbd_t
)));
581 (cbd_t
*) memalign(CONFIG_SYS_CACHELINE_SIZE
,
582 (TX_BUF_CNT
* sizeof(cbd_t
)));
584 (char *)memalign(CONFIG_SYS_CACHELINE_SIZE
, DBUF_LENGTH
);
588 printf("rxbd %x txbd %x\n",
589 (int)fec_info
[i
].rxbd
, (int)fec_info
[i
].txbd
);
592 fec_info
[i
].phy_name
= (char *)memalign(CONFIG_SYS_CACHELINE_SIZE
, 32);
596 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
597 miiphy_register(dev
->name
,
598 mcffec_miiphy_read
, mcffec_miiphy_write
);
601 fec_info
[i
- 1].next
= &fec_info
[i
];
603 fec_info
[i
- 1].next
= &fec_info
[0];
606 bis
->bi_ethspeed
= 10;