]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/net/mcffec.c
2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm/immap.h>
42 /* Ethernet Transmit and Receive Buffers */
43 #define DBUF_LENGTH 1520
45 #define PKT_MAXBUF_SIZE 1518
46 #define PKT_MINBUF_SIZE 64
47 #define PKT_MAXBLR_SIZE 1520
48 #define LAST_PKTBUFSRX PKTBUFSRX - 1
49 #define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY)
50 #define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST)
52 DECLARE_GLOBAL_DATA_PTR
;
54 #if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
56 struct fec_info_s fec_info
[] = {
57 #ifdef CFG_FEC0_IOBASE
60 CFG_FEC0_IOBASE
, /* io base */
61 CFG_FEC0_PINMUX
, /* gpio pin muxing */
62 CFG_FEC0_MIIBASE
, /* mii base */
64 0, /* duplex and speed */
72 0, /* initialized flag */
75 #ifdef CFG_FEC1_IOBASE
78 CFG_FEC1_IOBASE
, /* io base */
79 CFG_FEC1_PINMUX
, /* gpio pin muxing */
80 CFG_FEC1_MIIBASE
, /* mii base */
82 0, /* duplex and speed */
84 0, /* phy name init */
90 0, /* initialized flag */
95 int fec_send(struct eth_device
*dev
, volatile void *packet
, int length
);
96 int fec_recv(struct eth_device
*dev
);
97 int fec_init(struct eth_device
*dev
, bd_t
* bd
);
98 void fec_halt(struct eth_device
*dev
);
99 void fec_reset(struct eth_device
*dev
);
101 extern int fecpin_setclear(struct eth_device
*dev
, int setclear
);
103 #ifdef CFG_DISCOVER_PHY
104 extern void __mii_init(void);
105 extern uint
mii_send(uint mii_cmd
);
106 extern int mii_discover_phy(struct eth_device
*dev
);
107 extern int mcffec_miiphy_read(char *devname
, unsigned char addr
,
108 unsigned char reg
, unsigned short *value
);
109 extern int mcffec_miiphy_write(char *devname
, unsigned char addr
,
110 unsigned char reg
, unsigned short value
);
113 void setFecDuplexSpeed(volatile fec_t
* fecp
, bd_t
* bd
, int dup_spd
)
115 if ((dup_spd
>> 16) == FULL
) {
116 /* Set maximum frame length */
117 fecp
->rcr
= FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE
) | FEC_RCR_MII_MODE
|
118 FEC_RCR_PROM
| 0x100;
119 fecp
->tcr
= FEC_TCR_FDEN
;
121 /* Half duplex mode */
122 fecp
->rcr
= FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE
) |
123 FEC_RCR_MII_MODE
| FEC_RCR_DRT
;
124 fecp
->tcr
&= ~FEC_TCR_FDEN
;
127 if ((dup_spd
& 0xFFFF) == _100BASET
) {
131 bd
->bi_ethspeed
= 100;
136 bd
->bi_ethspeed
= 10;
140 int fec_send(struct eth_device
*dev
, volatile void *packet
, int length
)
142 struct fec_info_s
*info
= dev
->priv
;
143 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
147 miiphy_read(dev
->name
, info
->phy_addr
, PHY_BMSR
, &phyStatus
);
153 while ((info
->txbd
[info
->txIdx
].cbd_sc
& BD_ENET_TX_READY
) &&
154 (j
< MCFFEC_TOUT_LOOP
)) {
158 if (j
>= MCFFEC_TOUT_LOOP
) {
159 printf("TX not ready\n");
162 info
->txbd
[info
->txIdx
].cbd_bufaddr
= (uint
) packet
;
163 info
->txbd
[info
->txIdx
].cbd_datlen
= length
;
164 info
->txbd
[info
->txIdx
].cbd_sc
|= BD_ENET_TX_RDY_LST
;
166 /* Activate transmit Buffer Descriptor polling */
167 fecp
->tdar
= 0x01000000; /* Descriptor polling active */
169 /* FEC fix for MCF5275, FEC unable to initial transmit data packet.
170 * A nop will ensure the descriptor polling active completed.
176 #ifdef CFG_UNIFY_CACHE
180 while ((info
->txbd
[info
->txIdx
].cbd_sc
& BD_ENET_TX_READY
) &&
181 (j
< MCFFEC_TOUT_LOOP
)) {
185 if (j
>= MCFFEC_TOUT_LOOP
) {
186 printf("TX timeout\n");
190 printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
191 __FILE__
, __LINE__
, __FUNCTION__
, j
,
192 info
->txbd
[info
->txIdx
].cbd_sc
,
193 (info
->txbd
[info
->txIdx
].cbd_sc
& 0x003C) >> 2);
196 /* return only status bits */
197 rc
= (info
->txbd
[info
->txIdx
].cbd_sc
& BD_ENET_TX_STATS
);
198 info
->txIdx
= (info
->txIdx
+ 1) % TX_BUF_CNT
;
203 int fec_recv(struct eth_device
*dev
)
205 struct fec_info_s
*info
= dev
->priv
;
206 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
210 #ifdef CFG_UNIFY_CACHE
213 /* section 16.9.23.2 */
214 if (info
->rxbd
[info
->rxIdx
].cbd_sc
& BD_ENET_RX_EMPTY
) {
216 break; /* nothing received - leave for() loop */
219 length
= info
->rxbd
[info
->rxIdx
].cbd_datlen
;
221 if (info
->rxbd
[info
->rxIdx
].cbd_sc
& 0x003f) {
222 printf("%s[%d] err: %x\n",
223 __FUNCTION__
, __LINE__
,
224 info
->rxbd
[info
->rxIdx
].cbd_sc
);
226 printf("%s[%d] err: %x\n",
227 __FUNCTION__
, __LINE__
,
228 info
->rxbd
[info
->rxIdx
].cbd_sc
);
233 /* Pass the packet up to the protocol layers. */
234 NetReceive(NetRxPackets
[info
->rxIdx
], length
);
236 fecp
->eir
|= FEC_EIR_RXF
;
239 /* Give the buffer back to the FEC. */
240 info
->rxbd
[info
->rxIdx
].cbd_datlen
= 0;
242 /* wrap around buffer index when necessary */
243 if (info
->rxIdx
== LAST_PKTBUFSRX
) {
244 info
->rxbd
[PKTBUFSRX
- 1].cbd_sc
= BD_ENET_RX_W_E
;
247 info
->rxbd
[info
->rxIdx
].cbd_sc
= BD_ENET_RX_EMPTY
;
251 /* Try to fill Buffer Descriptors */
252 fecp
->rdar
= 0x01000000; /* Descriptor polling active */
259 void dbgFecRegs(struct eth_device
*dev
)
261 struct fec_info_s
*info
= dev
->priv
;
262 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
265 printf("ievent %x - %x\n", (int)&fecp
->eir
, fecp
->eir
);
266 printf("imask %x - %x\n", (int)&fecp
->eimr
, fecp
->eimr
);
267 printf("r_des_active %x - %x\n", (int)&fecp
->rdar
, fecp
->rdar
);
268 printf("x_des_active %x - %x\n", (int)&fecp
->tdar
, fecp
->tdar
);
269 printf("ecntrl %x - %x\n", (int)&fecp
->ecr
, fecp
->ecr
);
270 printf("mii_mframe %x - %x\n", (int)&fecp
->mmfr
, fecp
->mmfr
);
271 printf("mii_speed %x - %x\n", (int)&fecp
->mscr
, fecp
->mscr
);
272 printf("mii_ctrlstat %x - %x\n", (int)&fecp
->mibc
, fecp
->mibc
);
273 printf("r_cntrl %x - %x\n", (int)&fecp
->rcr
, fecp
->rcr
);
274 printf("x_cntrl %x - %x\n", (int)&fecp
->tcr
, fecp
->tcr
);
275 printf("padr_l %x - %x\n", (int)&fecp
->palr
, fecp
->palr
);
276 printf("padr_u %x - %x\n", (int)&fecp
->paur
, fecp
->paur
);
277 printf("op_pause %x - %x\n", (int)&fecp
->opd
, fecp
->opd
);
278 printf("iadr_u %x - %x\n", (int)&fecp
->iaur
, fecp
->iaur
);
279 printf("iadr_l %x - %x\n", (int)&fecp
->ialr
, fecp
->ialr
);
280 printf("gadr_u %x - %x\n", (int)&fecp
->gaur
, fecp
->gaur
);
281 printf("gadr_l %x - %x\n", (int)&fecp
->galr
, fecp
->galr
);
282 printf("x_wmrk %x - %x\n", (int)&fecp
->tfwr
, fecp
->tfwr
);
283 printf("r_bound %x - %x\n", (int)&fecp
->frbr
, fecp
->frbr
);
284 printf("r_fstart %x - %x\n", (int)&fecp
->frsr
, fecp
->frsr
);
285 printf("r_drng %x - %x\n", (int)&fecp
->erdsr
, fecp
->erdsr
);
286 printf("x_drng %x - %x\n", (int)&fecp
->etdsr
, fecp
->etdsr
);
287 printf("r_bufsz %x - %x\n", (int)&fecp
->emrbr
, fecp
->emrbr
);
290 printf("rmon_t_drop %x - %x\n", (int)&fecp
->rmon_t_drop
,
292 printf("rmon_t_packets %x - %x\n", (int)&fecp
->rmon_t_packets
,
293 fecp
->rmon_t_packets
);
294 printf("rmon_t_bc_pkt %x - %x\n", (int)&fecp
->rmon_t_bc_pkt
,
295 fecp
->rmon_t_bc_pkt
);
296 printf("rmon_t_mc_pkt %x - %x\n", (int)&fecp
->rmon_t_mc_pkt
,
297 fecp
->rmon_t_mc_pkt
);
298 printf("rmon_t_crc_align %x - %x\n", (int)&fecp
->rmon_t_crc_align
,
299 fecp
->rmon_t_crc_align
);
300 printf("rmon_t_undersize %x - %x\n", (int)&fecp
->rmon_t_undersize
,
301 fecp
->rmon_t_undersize
);
302 printf("rmon_t_oversize %x - %x\n", (int)&fecp
->rmon_t_oversize
,
303 fecp
->rmon_t_oversize
);
304 printf("rmon_t_frag %x - %x\n", (int)&fecp
->rmon_t_frag
,
306 printf("rmon_t_jab %x - %x\n", (int)&fecp
->rmon_t_jab
,
308 printf("rmon_t_col %x - %x\n", (int)&fecp
->rmon_t_col
,
310 printf("rmon_t_p64 %x - %x\n", (int)&fecp
->rmon_t_p64
,
312 printf("rmon_t_p65to127 %x - %x\n", (int)&fecp
->rmon_t_p65to127
,
313 fecp
->rmon_t_p65to127
);
314 printf("rmon_t_p128to255 %x - %x\n", (int)&fecp
->rmon_t_p128to255
,
315 fecp
->rmon_t_p128to255
);
316 printf("rmon_t_p256to511 %x - %x\n", (int)&fecp
->rmon_t_p256to511
,
317 fecp
->rmon_t_p256to511
);
318 printf("rmon_t_p512to1023 %x - %x\n", (int)&fecp
->rmon_t_p512to1023
,
319 fecp
->rmon_t_p512to1023
);
320 printf("rmon_t_p1024to2047 %x - %x\n", (int)&fecp
->rmon_t_p1024to2047
,
321 fecp
->rmon_t_p1024to2047
);
322 printf("rmon_t_p_gte2048 %x - %x\n", (int)&fecp
->rmon_t_p_gte2048
,
323 fecp
->rmon_t_p_gte2048
);
324 printf("rmon_t_octets %x - %x\n", (int)&fecp
->rmon_t_octets
,
325 fecp
->rmon_t_octets
);
328 printf("ieee_t_drop %x - %x\n", (int)&fecp
->ieee_t_drop
,
330 printf("ieee_t_frame_ok %x - %x\n", (int)&fecp
->ieee_t_frame_ok
,
331 fecp
->ieee_t_frame_ok
);
332 printf("ieee_t_1col %x - %x\n", (int)&fecp
->ieee_t_1col
,
334 printf("ieee_t_mcol %x - %x\n", (int)&fecp
->ieee_t_mcol
,
336 printf("ieee_t_def %x - %x\n", (int)&fecp
->ieee_t_def
,
338 printf("ieee_t_lcol %x - %x\n", (int)&fecp
->ieee_t_lcol
,
340 printf("ieee_t_excol %x - %x\n", (int)&fecp
->ieee_t_excol
,
342 printf("ieee_t_macerr %x - %x\n", (int)&fecp
->ieee_t_macerr
,
343 fecp
->ieee_t_macerr
);
344 printf("ieee_t_cserr %x - %x\n", (int)&fecp
->ieee_t_cserr
,
346 printf("ieee_t_sqe %x - %x\n", (int)&fecp
->ieee_t_sqe
,
348 printf("ieee_t_fdxfc %x - %x\n", (int)&fecp
->ieee_t_fdxfc
,
350 printf("ieee_t_octets_ok %x - %x\n", (int)&fecp
->ieee_t_octets_ok
,
351 fecp
->ieee_t_octets_ok
);
354 printf("rmon_r_drop %x - %x\n", (int)&fecp
->rmon_r_drop
,
356 printf("rmon_r_packets %x - %x\n", (int)&fecp
->rmon_r_packets
,
357 fecp
->rmon_r_packets
);
358 printf("rmon_r_bc_pkt %x - %x\n", (int)&fecp
->rmon_r_bc_pkt
,
359 fecp
->rmon_r_bc_pkt
);
360 printf("rmon_r_mc_pkt %x - %x\n", (int)&fecp
->rmon_r_mc_pkt
,
361 fecp
->rmon_r_mc_pkt
);
362 printf("rmon_r_crc_align %x - %x\n", (int)&fecp
->rmon_r_crc_align
,
363 fecp
->rmon_r_crc_align
);
364 printf("rmon_r_undersize %x - %x\n", (int)&fecp
->rmon_r_undersize
,
365 fecp
->rmon_r_undersize
);
366 printf("rmon_r_oversize %x - %x\n", (int)&fecp
->rmon_r_oversize
,
367 fecp
->rmon_r_oversize
);
368 printf("rmon_r_frag %x - %x\n", (int)&fecp
->rmon_r_frag
,
370 printf("rmon_r_jab %x - %x\n", (int)&fecp
->rmon_r_jab
,
372 printf("rmon_r_p64 %x - %x\n", (int)&fecp
->rmon_r_p64
,
374 printf("rmon_r_p65to127 %x - %x\n", (int)&fecp
->rmon_r_p65to127
,
375 fecp
->rmon_r_p65to127
);
376 printf("rmon_r_p128to255 %x - %x\n", (int)&fecp
->rmon_r_p128to255
,
377 fecp
->rmon_r_p128to255
);
378 printf("rmon_r_p256to511 %x - %x\n", (int)&fecp
->rmon_r_p256to511
,
379 fecp
->rmon_r_p256to511
);
380 printf("rmon_r_p512to1023 %x - %x\n", (int)&fecp
->rmon_r_p512to1023
,
381 fecp
->rmon_r_p512to1023
);
382 printf("rmon_r_p1024to2047 %x - %x\n", (int)&fecp
->rmon_r_p1024to2047
,
383 fecp
->rmon_r_p1024to2047
);
384 printf("rmon_r_p_gte2048 %x - %x\n", (int)&fecp
->rmon_r_p_gte2048
,
385 fecp
->rmon_r_p_gte2048
);
386 printf("rmon_r_octets %x - %x\n", (int)&fecp
->rmon_r_octets
,
387 fecp
->rmon_r_octets
);
390 printf("ieee_r_drop %x - %x\n", (int)&fecp
->ieee_r_drop
,
392 printf("ieee_r_frame_ok %x - %x\n", (int)&fecp
->ieee_r_frame_ok
,
393 fecp
->ieee_r_frame_ok
);
394 printf("ieee_r_crc %x - %x\n", (int)&fecp
->ieee_r_crc
,
396 printf("ieee_r_align %x - %x\n", (int)&fecp
->ieee_r_align
,
398 printf("ieee_r_macerr %x - %x\n", (int)&fecp
->ieee_r_macerr
,
399 fecp
->ieee_r_macerr
);
400 printf("ieee_r_fdxfc %x - %x\n", (int)&fecp
->ieee_r_fdxfc
,
402 printf("ieee_r_octets_ok %x - %x\n", (int)&fecp
->ieee_r_octets_ok
,
403 fecp
->ieee_r_octets_ok
);
409 int fec_init(struct eth_device
*dev
, bd_t
* bd
)
411 struct fec_info_s
*info
= dev
->priv
;
412 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
416 fecpin_setclear(dev
, 1);
420 #if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \
421 defined (CFG_DISCOVER_PHY)
425 setFecDuplexSpeed(fecp
, bd
, info
->dup_spd
);
427 #ifndef CFG_DISCOVER_PHY
428 setFecDuplexSpeed(fecp
, bd
, (FECDUPLEX
<< 16) | FECSPEED
);
429 #endif /* ifndef CFG_DISCOVER_PHY */
430 #endif /* CONFIG_CMD_MII || CONFIG_MII */
432 /* We use strictly polling mode only */
435 /* Clear any pending interrupt */
436 fecp
->eir
= 0xffffffff;
438 /* Set station address */
439 if ((u32
) fecp
== CFG_FEC0_IOBASE
) {
440 #ifdef CFG_FEC1_IOBASE
441 volatile fec_t
*fecp1
= (fec_t
*) (CFG_FEC1_IOBASE
);
442 ea
= &bd
->bi_enet1addr
[0];
444 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
445 fecp1
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
447 ea
= &bd
->bi_enetaddr
[0];
449 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
450 fecp
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
452 #ifdef CFG_FEC0_IOBASE
453 volatile fec_t
*fecp0
= (fec_t
*) (CFG_FEC0_IOBASE
);
454 ea
= &bd
->bi_enetaddr
[0];
456 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
457 fecp0
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
459 #ifdef CFG_FEC1_IOBASE
460 ea
= &bd
->bi_enet1addr
[0];
462 (ea
[0] << 24) | (ea
[1] << 16) | (ea
[2] << 8) | (ea
[3]);
463 fecp
->paur
= (ea
[4] << 24) | (ea
[5] << 16);
467 /* Clear unicast address hash table */
471 /* Clear multicast address hash table */
475 /* Set maximum receive buffer size. */
476 fecp
->emrbr
= PKT_MAXBLR_SIZE
;
479 * Setup Buffers and Buffer Desriptors
485 * Setup Receiver Buffer Descriptors (13.14.24.18)
489 for (i
= 0; i
< PKTBUFSRX
; i
++) {
490 info
->rxbd
[i
].cbd_sc
= BD_ENET_RX_EMPTY
;
491 info
->rxbd
[i
].cbd_datlen
= 0; /* Reset */
492 info
->rxbd
[i
].cbd_bufaddr
= (uint
) NetRxPackets
[i
];
494 info
->rxbd
[PKTBUFSRX
- 1].cbd_sc
|= BD_ENET_RX_WRAP
;
497 * Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
501 for (i
= 0; i
< TX_BUF_CNT
; i
++) {
502 info
->txbd
[i
].cbd_sc
= BD_ENET_TX_LAST
| BD_ENET_TX_TC
;
503 info
->txbd
[i
].cbd_datlen
= 0; /* Reset */
504 info
->txbd
[i
].cbd_bufaddr
= (uint
) (&info
->txbuf
[0]);
506 info
->txbd
[TX_BUF_CNT
- 1].cbd_sc
|= BD_ENET_TX_WRAP
;
508 /* Set receive and transmit descriptor base */
509 fecp
->erdsr
= (unsigned int)(&info
->rxbd
[0]);
510 fecp
->etdsr
= (unsigned int)(&info
->txbd
[0]);
512 /* Now enable the transmit and receive processing */
513 fecp
->ecr
|= FEC_ECR_ETHER_EN
;
515 /* And last, try to fill Rx Buffer Descriptors */
516 fecp
->rdar
= 0x01000000; /* Descriptor polling active */
521 void fec_reset(struct eth_device
*dev
)
523 struct fec_info_s
*info
= dev
->priv
;
524 volatile fec_t
*fecp
= (fec_t
*) (info
->iobase
);
527 fecp
->ecr
= FEC_ECR_RESET
;
528 for (i
= 0; (fecp
->ecr
& FEC_ECR_RESET
) && (i
< FEC_RESET_DELAY
); ++i
) {
531 if (i
== FEC_RESET_DELAY
) {
532 printf("FEC_RESET_DELAY timeout\n");
536 void fec_halt(struct eth_device
*dev
)
538 struct fec_info_s
*info
= dev
->priv
;
542 fecpin_setclear(dev
, 0);
544 info
->rxIdx
= info
->txIdx
= 0;
545 memset(info
->rxbd
, 0, PKTBUFSRX
* sizeof(cbd_t
));
546 memset(info
->txbd
, 0, TX_BUF_CNT
* sizeof(cbd_t
));
547 memset(info
->txbuf
, 0, DBUF_LENGTH
);
550 int mcffec_initialize(bd_t
* bis
)
552 struct eth_device
*dev
;
555 for (i
= 0; i
< sizeof(fec_info
) / sizeof(fec_info
[0]); i
++) {
558 (struct eth_device
*)memalign(CFG_CACHELINE_SIZE
,
563 memset(dev
, 0, sizeof(*dev
));
565 sprintf(dev
->name
, "FEC%d", fec_info
[i
].index
);
567 dev
->priv
= &fec_info
[i
];
568 dev
->init
= fec_init
;
569 dev
->halt
= fec_halt
;
570 dev
->send
= fec_send
;
571 dev
->recv
= fec_recv
;
573 /* setup Receive and Transmit buffer descriptor */
575 (cbd_t
*) memalign(CFG_CACHELINE_SIZE
,
576 (PKTBUFSRX
* sizeof(cbd_t
)));
578 (cbd_t
*) memalign(CFG_CACHELINE_SIZE
,
579 (TX_BUF_CNT
* sizeof(cbd_t
)));
581 (char *)memalign(CFG_CACHELINE_SIZE
, DBUF_LENGTH
);
583 printf("rxbd %x txbd %x\n",
584 (int)fec_info
[i
].rxbd
, (int)fec_info
[i
].txbd
);
587 fec_info
[i
].phy_name
= (char *)memalign(CFG_CACHELINE_SIZE
, 32);
591 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
592 miiphy_register(dev
->name
,
593 mcffec_miiphy_read
, mcffec_miiphy_write
);
598 bis
->bi_ethspeed
= 10;
603 #endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
604 #endif /* CONFIG_MCFFEC */