4 * SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2014 Freescale Semiconductor, Inc.
12 #ifndef CONFIG_PHYLIB_10G
13 #error The Aquantia PHY needs 10G support
16 #define AQUNTIA_10G_CTL 0x20
17 #define AQUNTIA_VENDOR_P1 0xc400
19 #define AQUNTIA_SPEED_LSB_MASK 0x2000
20 #define AQUNTIA_SPEED_MSB_MASK 0x40
22 int aquantia_config(struct phy_device
*phydev
)
24 u32 val
= phy_read(phydev
, MDIO_MMD_PMAPMD
, MII_BMCR
);
26 if (phydev
->interface
== PHY_INTERFACE_MODE_SGMII
) {
28 phydev
->advertising
= SUPPORTED_1000baseT_Full
;
29 phydev
->supported
= phydev
->advertising
;
31 val
= (val
& ~AQUNTIA_SPEED_LSB_MASK
) | AQUNTIA_SPEED_MSB_MASK
;
32 phy_write(phydev
, MDIO_MMD_PMAPMD
, MII_BMCR
, val
);
33 } else if (phydev
->interface
== PHY_INTERFACE_MODE_XGMII
) {
35 phydev
->advertising
= SUPPORTED_10000baseT_Full
;
36 phydev
->supported
= phydev
->advertising
;
38 if (!(val
& AQUNTIA_SPEED_LSB_MASK
) ||
39 !(val
& AQUNTIA_SPEED_MSB_MASK
))
40 phy_write(phydev
, MDIO_MMD_PMAPMD
, MII_BMCR
,
41 AQUNTIA_SPEED_LSB_MASK
|
42 AQUNTIA_SPEED_MSB_MASK
);
43 } else if (phydev
->interface
== PHY_INTERFACE_MODE_SGMII_2500
) {
45 phydev
->advertising
= SUPPORTED_1000baseT_Full
;
46 phydev
->supported
= phydev
->advertising
;
48 phy_write(phydev
, MDIO_MMD_AN
, AQUNTIA_10G_CTL
, 1);
49 phy_write(phydev
, MDIO_MMD_AN
, AQUNTIA_VENDOR_P1
, 0x9440);
50 } else if (phydev
->interface
== PHY_INTERFACE_MODE_MII
) {
52 phydev
->advertising
= SUPPORTED_100baseT_Full
;
53 phydev
->supported
= phydev
->advertising
;
55 val
= (val
& ~AQUNTIA_SPEED_MSB_MASK
) | AQUNTIA_SPEED_LSB_MASK
;
56 phy_write(phydev
, MDIO_MMD_PMAPMD
, MII_BMCR
, val
);
61 int aquantia_startup(struct phy_device
*phydev
)
66 phydev
->duplex
= DUPLEX_FULL
;
68 /* if the AN is still in progress, wait till timeout. */
69 phy_read(phydev
, MDIO_MMD_AN
, MDIO_STAT1
);
70 reg
= phy_read(phydev
, MDIO_MMD_AN
, MDIO_STAT1
);
71 if (!(reg
& MDIO_AN_STAT1_COMPLETE
)) {
72 printf("%s Waiting for PHY auto negotiation to complete",
76 reg
= phy_read(phydev
, MDIO_MMD_AN
, MDIO_STAT1
);
79 } while (!(reg
& MDIO_AN_STAT1_COMPLETE
) &&
80 i
< (4 * PHY_ANEG_TIMEOUT
));
82 if (i
> PHY_ANEG_TIMEOUT
)
83 printf(" TIMEOUT !\n");
86 /* Read twice because link state is latched and a
87 * read moves the current state into the register */
88 phy_read(phydev
, MDIO_MMD_AN
, MDIO_STAT1
);
89 reg
= phy_read(phydev
, MDIO_MMD_AN
, MDIO_STAT1
);
90 if (reg
< 0 || !(reg
& MDIO_STAT1_LSTATUS
))
95 speed
= phy_read(phydev
, MDIO_MMD_PMAPMD
, MII_BMCR
);
96 if (speed
& AQUNTIA_SPEED_MSB_MASK
) {
97 if (speed
& AQUNTIA_SPEED_LSB_MASK
)
98 phydev
->speed
= SPEED_10000
;
100 phydev
->speed
= SPEED_1000
;
102 if (speed
& AQUNTIA_SPEED_LSB_MASK
)
103 phydev
->speed
= SPEED_100
;
105 phydev
->speed
= SPEED_10
;
111 struct phy_driver aq1202_driver
= {
112 .name
= "Aquantia AQ1202",
115 .features
= PHY_10G_FEATURES
,
116 .mmds
= (MDIO_MMD_PMAPMD
| MDIO_MMD_PCS
|
117 MDIO_MMD_PHYXS
| MDIO_MMD_AN
|
119 .config
= &aquantia_config
,
120 .startup
= &aquantia_startup
,
121 .shutdown
= &gen10g_shutdown
,
124 struct phy_driver aq2104_driver
= {
125 .name
= "Aquantia AQ2104",
128 .features
= PHY_10G_FEATURES
,
129 .mmds
= (MDIO_MMD_PMAPMD
| MDIO_MMD_PCS
|
130 MDIO_MMD_PHYXS
| MDIO_MMD_AN
|
132 .config
= &aquantia_config
,
133 .startup
= &aquantia_startup
,
134 .shutdown
= &gen10g_shutdown
,
137 struct phy_driver aqr105_driver
= {
138 .name
= "Aquantia AQR105",
141 .features
= PHY_10G_FEATURES
,
142 .mmds
= (MDIO_MMD_PMAPMD
| MDIO_MMD_PCS
|
143 MDIO_MMD_PHYXS
| MDIO_MMD_AN
|
145 .config
= &aquantia_config
,
146 .startup
= &aquantia_startup
,
147 .shutdown
= &gen10g_shutdown
,
149 int phy_aquantia_init(void)
151 phy_register(&aq1202_driver
);
152 phy_register(&aq2104_driver
);
153 phy_register(&aqr105_driver
);