drivers/net/phy/phy.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Generic PHY Management code
   4  *
   5  * Copyright 2011 Freescale Semiconductor, Inc.
   6  * author Andy Fleming
   7  *
   8  * Based loosely off of Linux's PHY Lib
   9  */
  10 #include <common.h>
  11 #include <console.h>
  12 #include <dm.h>
  13 #include <log.h>
  14 #include <malloc.h>
  15 #include <net.h>
  16 #include <command.h>
  17 #include <miiphy.h>
  18 #include <phy.h>
  19 #include <errno.h>
  20 #include <asm/global_data.h>
  21 #include <dm/of_extra.h>
  22 #include <linux/bitops.h>
  23 #include <linux/delay.h>
  24 #include <linux/err.h>
  25 #include <linux/compiler.h>
  26
  27 DECLARE_GLOBAL_DATA_PTR;
  28
  29 /* Generic PHY support and helper functions */
  30
  31 /**
  32  * genphy_config_advert - sanitize and advertise auto-negotiation parameters
  33  * @phydev: target phy_device struct
  34  *
  35  * Description: Writes MII_ADVERTISE with the appropriate values,
  36  *   after sanitizing the values to make sure we only advertise
  37  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
  38  *   hasn't changed, and > 0 if it has changed.
  39  */
  40 static int genphy_config_advert(struct phy_device *phydev)
  41 {
  42         u32 advertise;
  43         int oldadv, adv, bmsr;
  44         int err, changed = 0;
  45
  46         /* Only allow advertising what this PHY supports */
  47         phydev->advertising &= phydev->supported;
  48         advertise = phydev->advertising;
  49
  50         /* Setup standard advertisement */
  51         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  52         oldadv = adv;
  53
  54         if (adv < 0)
  55                 return adv;
  56
  57         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  58                  ADVERTISE_PAUSE_ASYM);
  59         if (advertise & ADVERTISED_10baseT_Half)
  60                 adv |= ADVERTISE_10HALF;
  61         if (advertise & ADVERTISED_10baseT_Full)
  62                 adv |= ADVERTISE_10FULL;
  63         if (advertise & ADVERTISED_100baseT_Half)
  64                 adv |= ADVERTISE_100HALF;
  65         if (advertise & ADVERTISED_100baseT_Full)
  66                 adv |= ADVERTISE_100FULL;
  67         if (advertise & ADVERTISED_Pause)
  68                 adv |= ADVERTISE_PAUSE_CAP;
  69         if (advertise & ADVERTISED_Asym_Pause)
  70                 adv |= ADVERTISE_PAUSE_ASYM;
  71         if (advertise & ADVERTISED_1000baseX_Half)
  72                 adv |= ADVERTISE_1000XHALF;
  73         if (advertise & ADVERTISED_1000baseX_Full)
  74                 adv |= ADVERTISE_1000XFULL;
  75
  76         if (adv != oldadv) {
  77                 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  78
  79                 if (err < 0)
  80                         return err;
  81                 changed = 1;
  82         }
  83
  84         bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  85         if (bmsr < 0)
  86                 return bmsr;
  87
  88         /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
  89          * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
  90          * logical 1.
  91          */
  92         if (!(bmsr & BMSR_ESTATEN))
  93                 return changed;
  94
  95         /* Configure gigabit if it's supported */
  96         adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  97         oldadv = adv;
  98
  99         if (adv < 0)
 100                 return adv;
 101
 102         adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 103
 104         if (phydev->supported & (SUPPORTED_1000baseT_Half |
 105                                 SUPPORTED_1000baseT_Full)) {
 106                 if (advertise & SUPPORTED_1000baseT_Half)
 107                         adv |= ADVERTISE_1000HALF;
 108                 if (advertise & SUPPORTED_1000baseT_Full)
 109                         adv |= ADVERTISE_1000FULL;
 110         }
 111
 112         if (adv != oldadv)
 113                 changed = 1;
 114
 115         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
 116         if (err < 0)
 117                 return err;
 118
 119         return changed;
 120 }
 121
 122 /**
 123  * genphy_setup_forced - configures/forces speed/duplex from @phydev
 124  * @phydev: target phy_device struct
 125  *
 126  * Description: Configures MII_BMCR to force speed/duplex
 127  *   to the values in phydev. Assumes that the values are valid.
 128  */
 129 static int genphy_setup_forced(struct phy_device *phydev)
 130 {
 131         int err;
 132         int ctl = BMCR_ANRESTART;
 133
 134         phydev->pause = 0;
 135         phydev->asym_pause = 0;
 136
 137         if (phydev->speed == SPEED_1000)
 138                 ctl |= BMCR_SPEED1000;
 139         else if (phydev->speed == SPEED_100)
 140                 ctl |= BMCR_SPEED100;
 141
 142         if (phydev->duplex == DUPLEX_FULL)
 143                 ctl |= BMCR_FULLDPLX;
 144
 145         err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
 146
 147         return err;
 148 }
 149
 150 /**
 151  * genphy_restart_aneg - Enable and Restart Autonegotiation
 152  * @phydev: target phy_device struct
 153  */
 154 int genphy_restart_aneg(struct phy_device *phydev)
 155 {
 156         int ctl;
 157
 158         ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 159
 160         if (ctl < 0)
 161                 return ctl;
 162
 163         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
 164
 165         /* Don't isolate the PHY if we're negotiating */
 166         ctl &= ~(BMCR_ISOLATE);
 167
 168         ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
 169
 170         return ctl;
 171 }
 172
 173 /**
 174  * genphy_config_aneg - restart auto-negotiation or write BMCR
 175  * @phydev: target phy_device struct
 176  *
 177  * Description: If auto-negotiation is enabled, we configure the
 178  *   advertising, and then restart auto-negotiation.  If it is not
 179  *   enabled, then we write the BMCR.
 180  */
 181 int genphy_config_aneg(struct phy_device *phydev)
 182 {
 183         int result;
 184
 185         if (phydev->autoneg != AUTONEG_ENABLE)
 186                 return genphy_setup_forced(phydev);
 187
 188         result = genphy_config_advert(phydev);
 189
 190         if (result < 0) /* error */
 191                 return result;
 192
 193         if (result == 0) {
 194                 /*
 195                  * Advertisment hasn't changed, but maybe aneg was never on to
 196                  * begin with?  Or maybe phy was isolated?
 197                  */
 198                 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 199
 200                 if (ctl < 0)
 201                         return ctl;
 202
 203                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
 204                         result = 1; /* do restart aneg */
 205         }
 206
 207         /*
 208          * Only restart aneg if we are advertising something different
 209          * than we were before.
 210          */
 211         if (result > 0)
 212                 result = genphy_restart_aneg(phydev);
 213
 214         return result;
 215 }
 216
 217 /**
 218  * genphy_update_link - update link status in @phydev
 219  * @phydev: target phy_device struct
 220  *
 221  * Description: Update the value in phydev->link to reflect the
 222  *   current link value.  In order to do this, we need to read
 223  *   the status register twice, keeping the second value.
 224  */
 225 int genphy_update_link(struct phy_device *phydev)
 226 {
 227         unsigned int mii_reg;
 228
 229         /*
 230          * Wait if the link is up, and autonegotiation is in progress
 231          * (ie - we're capable and it's not done)
 232          */
 233         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 234
 235         /*
 236          * If we already saw the link up, and it hasn't gone down, then
 237          * we don't need to wait for autoneg again
 238          */
 239         if (phydev->link && mii_reg & BMSR_LSTATUS)
 240                 return 0;
 241
 242         if ((phydev->autoneg == AUTONEG_ENABLE) &&
 243             !(mii_reg & BMSR_ANEGCOMPLETE)) {
 244                 int i = 0;
 245
 246                 printf("%s Waiting for PHY auto negotiation to complete",
 247                        phydev->dev->name);
 248                 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
 249                         /*
 250                          * Timeout reached ?
 251                          */
 252                         if (i > (PHY_ANEG_TIMEOUT / 50)) {
 253                                 printf(" TIMEOUT !\n");
 254                                 phydev->link = 0;
 255                                 return -ETIMEDOUT;
 256                         }
 257
 258                         if (ctrlc()) {
 259                                 puts("user interrupt!\n");
 260                                 phydev->link = 0;
 261                                 return -EINTR;
 262                         }
 263
 264                         if ((i++ % 10) == 0)
 265                                 printf(".");
 266
 267                         mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 268                         mdelay(50);     /* 50 ms */
 269                 }
 270                 printf(" done\n");
 271                 phydev->link = 1;
 272         } else {
 273                 /* Read the link a second time to clear the latched state */
 274                 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 275
 276                 if (mii_reg & BMSR_LSTATUS)
 277                         phydev->link = 1;
 278                 else
 279                         phydev->link = 0;
 280         }
 281
 282         return 0;
 283 }
 284
 285 /*
 286  * Generic function which updates the speed and duplex.  If
 287  * autonegotiation is enabled, it uses the AND of the link
 288  * partner's advertised capabilities and our advertised
 289  * capabilities.  If autonegotiation is disabled, we use the
 290  * appropriate bits in the control register.
 291  *
 292  * Stolen from Linux's mii.c and phy_device.c
 293  */
 294 int genphy_parse_link(struct phy_device *phydev)
 295 {
 296         int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 297
 298         /* We're using autonegotiation */
 299         if (phydev->autoneg == AUTONEG_ENABLE) {
 300                 u32 lpa = 0;
 301                 int gblpa = 0;
 302                 u32 estatus = 0;
 303
 304                 /* Check for gigabit capability */
 305                 if (phydev->supported & (SUPPORTED_1000baseT_Full |
 306                                         SUPPORTED_1000baseT_Half)) {
 307                         /* We want a list of states supported by
 308                          * both PHYs in the link
 309                          */
 310                         gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
 311                         if (gblpa < 0) {
 312                                 debug("Could not read MII_STAT1000. ");
 313                                 debug("Ignoring gigabit capability\n");
 314                                 gblpa = 0;
 315                         }
 316                         gblpa &= phy_read(phydev,
 317                                         MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
 318                 }
 319
 320                 /* Set the baseline so we only have to set them
 321                  * if they're different
 322                  */
 323                 phydev->speed = SPEED_10;
 324                 phydev->duplex = DUPLEX_HALF;
 325
 326                 /* Check the gigabit fields */
 327                 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
 328                         phydev->speed = SPEED_1000;
 329
 330                         if (gblpa & PHY_1000BTSR_1000FD)
 331                                 phydev->duplex = DUPLEX_FULL;
 332
 333                         /* We're done! */
 334                         return 0;
 335                 }
 336
 337                 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
 338                 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
 339
 340                 if (lpa & (LPA_100FULL | LPA_100HALF)) {
 341                         phydev->speed = SPEED_100;
 342
 343                         if (lpa & LPA_100FULL)
 344                                 phydev->duplex = DUPLEX_FULL;
 345
 346                 } else if (lpa & LPA_10FULL) {
 347                         phydev->duplex = DUPLEX_FULL;
 348                 }
 349
 350                 /*
 351                  * Extended status may indicate that the PHY supports
 352                  * 1000BASE-T/X even though the 1000BASE-T registers
 353                  * are missing. In this case we can't tell whether the
 354                  * peer also supports it, so we only check extended
 355                  * status if the 1000BASE-T registers are actually
 356                  * missing.
 357                  */
 358                 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
 359                         estatus = phy_read(phydev, MDIO_DEVAD_NONE,
 360                                            MII_ESTATUS);
 361
 362                 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
 363                                 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
 364                         phydev->speed = SPEED_1000;
 365                         if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
 366                                 phydev->duplex = DUPLEX_FULL;
 367                 }
 368
 369         } else {
 370                 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 371
 372                 phydev->speed = SPEED_10;
 373                 phydev->duplex = DUPLEX_HALF;
 374
 375                 if (bmcr & BMCR_FULLDPLX)
 376                         phydev->duplex = DUPLEX_FULL;
 377
 378                 if (bmcr & BMCR_SPEED1000)
 379                         phydev->speed = SPEED_1000;
 380                 else if (bmcr & BMCR_SPEED100)
 381                         phydev->speed = SPEED_100;
 382         }
 383
 384         return 0;
 385 }
 386
 387 int genphy_config(struct phy_device *phydev)
 388 {
 389         int val;
 390         u32 features;
 391
 392         features = (SUPPORTED_TP | SUPPORTED_MII
 393                         | SUPPORTED_AUI | SUPPORTED_FIBRE |
 394                         SUPPORTED_BNC);
 395
 396         /* Do we support autonegotiation? */
 397         val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
 398
 399         if (val < 0)
 400                 return val;
 401
 402         if (val & BMSR_ANEGCAPABLE)
 403                 features |= SUPPORTED_Autoneg;
 404
 405         if (val & BMSR_100FULL)
 406                 features |= SUPPORTED_100baseT_Full;
 407         if (val & BMSR_100HALF)
 408                 features |= SUPPORTED_100baseT_Half;
 409         if (val & BMSR_10FULL)
 410                 features |= SUPPORTED_10baseT_Full;
 411         if (val & BMSR_10HALF)
 412                 features |= SUPPORTED_10baseT_Half;
 413
 414         if (val & BMSR_ESTATEN) {
 415                 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
 416
 417                 if (val < 0)
 418                         return val;
 419
 420                 if (val & ESTATUS_1000_TFULL)
 421                         features |= SUPPORTED_1000baseT_Full;
 422                 if (val & ESTATUS_1000_THALF)
 423                         features |= SUPPORTED_1000baseT_Half;
 424                 if (val & ESTATUS_1000_XFULL)
 425                         features |= SUPPORTED_1000baseX_Full;
 426                 if (val & ESTATUS_1000_XHALF)
 427                         features |= SUPPORTED_1000baseX_Half;
 428         }
 429
 430         phydev->supported &= features;
 431         phydev->advertising &= features;
 432
 433         genphy_config_aneg(phydev);
 434
 435         return 0;
 436 }
 437
 438 int genphy_startup(struct phy_device *phydev)
 439 {
 440         int ret;
 441
 442         ret = genphy_update_link(phydev);
 443         if (ret)
 444                 return ret;
 445
 446         return genphy_parse_link(phydev);
 447 }
 448
 449 int genphy_shutdown(struct phy_device *phydev)
 450 {
 451         return 0;
 452 }
 453
 454 U_BOOT_PHY_DRIVER(genphy) = {
 455         .uid            = 0xffffffff,
 456         .mask           = 0xffffffff,
 457         .name           = "Generic PHY",
 458         .features       = PHY_GBIT_FEATURES | SUPPORTED_MII |
 459                           SUPPORTED_AUI | SUPPORTED_FIBRE |
 460                           SUPPORTED_BNC,
 461         .config         = genphy_config,
 462         .startup        = genphy_startup,
 463         .shutdown       = genphy_shutdown,
 464 };
 465
 466 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
 467 {
 468         /* The default values for phydev->supported are provided by the PHY
 469          * driver "features" member, we want to reset to sane defaults first
 470          * before supporting higher speeds.
 471          */
 472         phydev->supported &= PHY_DEFAULT_FEATURES;
 473
 474         switch (max_speed) {
 475         default:
 476                 return -ENOTSUPP;
 477         case SPEED_1000:
 478                 phydev->supported |= PHY_1000BT_FEATURES;
 479                 /* fall through */
 480         case SPEED_100:
 481                 phydev->supported |= PHY_100BT_FEATURES;
 482                 /* fall through */
 483         case SPEED_10:
 484                 phydev->supported |= PHY_10BT_FEATURES;
 485         }
 486
 487         return 0;
 488 }
 489
 490 static int phy_probe(struct phy_device *phydev)
 491 {
 492         int err = 0;
 493
 494         phydev->advertising = phydev->drv->features;
 495         phydev->supported = phydev->drv->features;
 496
 497         phydev->mmds = phydev->drv->mmds;
 498
 499         if (phydev->drv->probe)
 500                 err = phydev->drv->probe(phydev);
 501
 502         return err;
 503 }
 504
 505 static struct phy_driver *generic_for_phy(struct phy_device *phydev)
 506 {
 507 #ifdef CONFIG_PHYLIB_10G
 508         if (phydev->is_c45)
 509                 return ll_entry_get(struct phy_driver, gen10g, phy_driver);
 510 #endif
 511
 512         return ll_entry_get(struct phy_driver, genphy, phy_driver);
 513 }
 514
 515 static struct phy_driver *get_phy_driver(struct phy_device *phydev)
 516 {
 517         const int ll_n_ents = ll_entry_count(struct phy_driver, phy_driver);
 518         int phy_id = phydev->phy_id;
 519         struct phy_driver *ll_entry;
 520         struct phy_driver *drv;
 521
 522         ll_entry = ll_entry_start(struct phy_driver, phy_driver);
 523         for (drv = ll_entry; drv != ll_entry + ll_n_ents; drv++)
 524                 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
 525                         return drv;
 526
 527         /* If we made it here, there's no driver for this PHY */
 528         return generic_for_phy(phydev);
 529 }
 530
 531 struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
 532                                      u32 phy_id, bool is_c45)
 533 {
 534         struct phy_device *dev;
 535
 536         /*
 537          * We allocate the device, and initialize the
 538          * default values
 539          */
 540         dev = malloc(sizeof(*dev));
 541         if (!dev) {
 542                 printf("Failed to allocate PHY device for %s:%d\n",
 543                        bus ? bus->name : "(null bus)", addr);
 544                 return NULL;
 545         }
 546
 547         memset(dev, 0, sizeof(*dev));
 548
 549         dev->duplex = -1;
 550         dev->link = 0;
 551         dev->interface = PHY_INTERFACE_MODE_NA;
 552
 553         dev->node = ofnode_null();
 554
 555         dev->autoneg = AUTONEG_ENABLE;
 556
 557         dev->addr = addr;
 558         dev->phy_id = phy_id;
 559         dev->is_c45 = is_c45;
 560         dev->bus = bus;
 561
 562         dev->drv = get_phy_driver(dev);
 563
 564         if (phy_probe(dev)) {
 565                 printf("%s, PHY probe failed\n", __func__);
 566                 return NULL;
 567         }
 568
 569         if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
 570                 bus->phymap[addr] = dev;
 571
 572         return dev;
 573 }
 574
 575 /**
 576  * get_phy_id - reads the specified addr for its ID.
 577  * @bus: the target MII bus
 578  * @addr: PHY address on the MII bus
 579  * @phy_id: where to store the ID retrieved.
 580  *
 581  * Description: Reads the ID registers of the PHY at @addr on the
 582  *   @bus, stores it in @phy_id and returns zero on success.
 583  */
 584 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
 585 {
 586         int phy_reg;
 587
 588         /*
 589          * Grab the bits from PHYIR1, and put them
 590          * in the upper half
 591          */
 592         phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
 593
 594         if (phy_reg < 0)
 595                 return -EIO;
 596
 597         *phy_id = (phy_reg & 0xffff) << 16;
 598
 599         /* Grab the bits from PHYIR2, and put them in the lower half */
 600         phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
 601
 602         if (phy_reg < 0)
 603                 return -EIO;
 604
 605         *phy_id |= (phy_reg & 0xffff);
 606
 607         return 0;
 608 }
 609
 610 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
 611                                              uint phy_mask, int devad)
 612 {
 613         u32 phy_id = 0xffffffff;
 614         bool is_c45;
 615
 616         while (phy_mask) {
 617                 int addr = ffs(phy_mask) - 1;
 618                 int r = get_phy_id(bus, addr, devad, &phy_id);
 619
 620                 /*
 621                  * If the PHY ID is flat 0 we ignore it.  There are C45 PHYs
 622                  * that return all 0s for C22 reads (like Aquantia AQR112) and
 623                  * there are C22 PHYs that return all 0s for C45 reads (like
 624                  * Atheros AR8035).
 625                  */
 626                 if (r == 0 && phy_id == 0)
 627                         goto next;
 628
 629                 /* If the PHY ID is mostly f's, we didn't find anything */
 630                 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
 631                         is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
 632                         return phy_device_create(bus, addr, phy_id, is_c45);
 633                 }
 634 next:
 635                 phy_mask &= ~(1 << addr);
 636         }
 637         return NULL;
 638 }
 639
 640 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
 641                                                   uint phy_mask)
 642 {
 643         /* If we have one, return the existing device, with new interface */
 644         while (phy_mask) {
 645                 unsigned int addr = ffs(phy_mask) - 1;
 646
 647                 if (bus->phymap[addr])
 648                         return bus->phymap[addr];
 649
 650                 phy_mask &= ~(1U << addr);
 651         }
 652         return NULL;
 653 }
 654
 655 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
 656                                                  uint phy_mask)
 657 {
 658         struct phy_device *phydev;
 659         int devad[] = {
 660                 /* Clause-22 */
 661                 MDIO_DEVAD_NONE,
 662                 /* Clause-45 */
 663                 MDIO_MMD_PMAPMD,
 664                 MDIO_MMD_WIS,
 665                 MDIO_MMD_PCS,
 666                 MDIO_MMD_PHYXS,
 667                 MDIO_MMD_VEND1,
 668         };
 669         int i, devad_cnt;
 670
 671         devad_cnt = sizeof(devad)/sizeof(int);
 672         phydev = search_for_existing_phy(bus, phy_mask);
 673         if (phydev)
 674                 return phydev;
 675         /* try different access clauses  */
 676         for (i = 0; i < devad_cnt; i++) {
 677                 phydev = create_phy_by_mask(bus, phy_mask, devad[i]);
 678                 if (IS_ERR(phydev))
 679                         return NULL;
 680                 if (phydev)
 681                         return phydev;
 682         }
 683
 684         debug("\n%s PHY: ", bus->name);
 685         while (phy_mask) {
 686                 int addr = ffs(phy_mask) - 1;
 687
 688                 debug("%d ", addr);
 689                 phy_mask &= ~(1 << addr);
 690         }
 691         debug("not found\n");
 692
 693         return NULL;
 694 }
 695
 696 /**
 697  * get_phy_device - reads the specified PHY device and returns its
 698  *                  @phy_device struct
 699  * @bus: the target MII bus
 700  * @addr: PHY address on the MII bus
 701  *
 702  * Description: Reads the ID registers of the PHY at @addr on the
 703  *   @bus, then allocates and returns the phy_device to represent it.
 704  */
 705 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr)
 706 {
 707         return get_phy_device_by_mask(bus, 1 << addr);
 708 }
 709
 710 int phy_reset(struct phy_device *phydev)
 711 {
 712         int reg;
 713         int timeout = 500;
 714         int devad = MDIO_DEVAD_NONE;
 715
 716         if (phydev->flags & PHY_FLAG_BROKEN_RESET)
 717                 return 0;
 718
 719 #ifdef CONFIG_PHYLIB_10G
 720         /* If it's 10G, we need to issue reset through one of the MMDs */
 721         if (phydev->is_c45) {
 722                 if (!phydev->mmds)
 723                         gen10g_discover_mmds(phydev);
 724
 725                 devad = ffs(phydev->mmds) - 1;
 726         }
 727 #endif
 728
 729         if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
 730                 debug("PHY reset failed\n");
 731                 return -1;
 732         }
 733
 734 #if CONFIG_PHY_RESET_DELAY > 0
 735         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
 736 #endif
 737         /*
 738          * Poll the control register for the reset bit to go to 0 (it is
 739          * auto-clearing).  This should happen within 0.5 seconds per the
 740          * IEEE spec.
 741          */
 742         reg = phy_read(phydev, devad, MII_BMCR);
 743         while ((reg & BMCR_RESET) && timeout--) {
 744                 reg = phy_read(phydev, devad, MII_BMCR);
 745
 746                 if (reg < 0) {
 747                         debug("PHY status read failed\n");
 748                         return -1;
 749                 }
 750                 udelay(1000);
 751         }
 752
 753         if (reg & BMCR_RESET) {
 754                 puts("PHY reset timed out\n");
 755                 return -1;
 756         }
 757
 758         return 0;
 759 }
 760
 761 int miiphy_reset(const char *devname, unsigned char addr)
 762 {
 763         struct mii_dev *bus = miiphy_get_dev_by_name(devname);
 764         struct phy_device *phydev;
 765
 766         phydev = get_phy_device(bus, addr);
 767
 768         return phy_reset(phydev);
 769 }
 770
 771 struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask)
 772 {
 773         /* Reset the bus */
 774         if (bus->reset) {
 775                 bus->reset(bus);
 776
 777                 /* Wait 15ms to make sure the PHY has come out of hard reset */
 778                 mdelay(15);
 779         }
 780
 781         return get_phy_device_by_mask(bus, phy_mask);
 782 }
 783
 784 static void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
 785                             phy_interface_t interface)
 786 {
 787         /* Soft Reset the PHY */
 788         phy_reset(phydev);
 789         if (phydev->dev && phydev->dev != dev) {
 790                 printf("%s:%d is connected to %s.  Reconnecting to %s\n",
 791                        phydev->bus->name, phydev->addr,
 792                        phydev->dev->name, dev->name);
 793         }
 794         phydev->dev = dev;
 795         phydev->interface = interface;
 796         debug("%s connected to %s mode %s\n", dev->name, phydev->drv->name,
 797               phy_string_for_interface(interface));
 798 }
 799
 800 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
 801 static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
 802                                                  struct udevice *dev)
 803 {
 804         struct phy_device *phydev = NULL;
 805         ofnode node;
 806
 807         ofnode_for_each_subnode(node, dev_ofnode(dev)) {
 808                 node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0");
 809                 if (ofnode_valid(node)) {
 810                         int gmiirgmii_phyaddr;
 811
 812                         gmiirgmii_phyaddr = ofnode_read_u32_default(node, "reg", 0);
 813                         phydev = phy_device_create(bus, gmiirgmii_phyaddr,
 814                                                    PHY_GMII2RGMII_ID, false);
 815                         if (phydev)
 816                                 phydev->node = node;
 817                         break;
 818                 }
 819
 820                 node = ofnode_first_subnode(node);
 821         }
 822
 823         return phydev;
 824 }
 825 #endif
 826
 827 #ifdef CONFIG_PHY_FIXED
 828 /**
 829  * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
 830  * @node: OF node for the container of the fixed-link node
 831  *
 832  * Description: Creates a struct phy_device based on a fixed-link of_node
 833  * description. Can be used without phy_connect by drivers which do not expose
 834  * a UCLASS_ETH udevice.
 835  */
 836 struct phy_device *fixed_phy_create(ofnode node)
 837 {
 838         struct phy_device *phydev;
 839         ofnode subnode;
 840
 841         subnode = ofnode_find_subnode(node, "fixed-link");
 842         if (!ofnode_valid(subnode)) {
 843                 return NULL;
 844         }
 845
 846         phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false);
 847         if (phydev) {
 848                 phydev->node = subnode;
 849                 phydev->interface = ofnode_read_phy_mode(node);
 850         }
 851
 852         return phydev;
 853 }
 854
 855 static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
 856                                             struct udevice *dev)
 857 {
 858         ofnode node = dev_ofnode(dev), subnode;
 859         struct phy_device *phydev = NULL;
 860
 861         if (ofnode_phy_is_fixed_link(node, &subnode)) {
 862                 phydev = phy_device_create(bus, 0, PHY_FIXED_ID, false);
 863                 if (phydev)
 864                         phydev->node = subnode;
 865         }
 866
 867         return phydev;
 868 }
 869 #endif
 870
 871 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
 872                                struct udevice *dev,
 873                                phy_interface_t interface)
 874 {
 875         struct phy_device *phydev = NULL;
 876         uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
 877
 878 #ifdef CONFIG_PHY_FIXED
 879         phydev = phy_connect_fixed(bus, dev);
 880 #endif
 881
 882 #ifdef CONFIG_PHY_NCSI
 883         if (!phydev && interface == PHY_INTERFACE_MODE_NCSI)
 884                 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false);
 885 #endif
 886
 887 #ifdef CONFIG_PHY_ETHERNET_ID
 888         if (!phydev)
 889                 phydev = phy_connect_phy_id(bus, dev, addr);
 890 #endif
 891
 892 #ifdef CONFIG_PHY_XILINX_GMII2RGMII
 893         if (!phydev)
 894                 phydev = phy_connect_gmii2rgmii(bus, dev);
 895 #endif
 896
 897         if (!phydev)
 898                 phydev = phy_find_by_mask(bus, mask);
 899
 900         if (phydev)
 901                 phy_connect_dev(phydev, dev, interface);
 902         else
 903                 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
 904         return phydev;
 905 }
 906
 907 /*
 908  * Start the PHY.  Returns 0 on success, or a negative error code.
 909  */
 910 int phy_startup(struct phy_device *phydev)
 911 {
 912         if (phydev->drv->startup)
 913                 return phydev->drv->startup(phydev);
 914
 915         return 0;
 916 }
 917
 918 __weak int board_phy_config(struct phy_device *phydev)
 919 {
 920         if (phydev->drv->config)
 921                 return phydev->drv->config(phydev);
 922         return 0;
 923 }
 924
 925 int phy_config(struct phy_device *phydev)
 926 {
 927         /* Invoke an optional board-specific helper */
 928         return board_phy_config(phydev);
 929 }
 930
 931 int phy_shutdown(struct phy_device *phydev)
 932 {
 933         if (phydev->drv->shutdown)
 934                 phydev->drv->shutdown(phydev);
 935
 936         return 0;
 937 }
 938
 939 /**
 940  * phy_modify - Convenience function for modifying a given PHY register
 941  * @phydev: the phy_device struct
 942  * @devad: The MMD to read from
 943  * @regnum: register number to write
 944  * @mask: bit mask of bits to clear
 945  * @set: new value of bits set in mask to write to @regnum
 946  */
 947 int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
 948                u16 set)
 949 {
 950         int ret;
 951
 952         ret = phy_read(phydev, devad, regnum);
 953         if (ret < 0)
 954                 return ret;
 955
 956         return phy_write(phydev, devad, regnum, (ret & ~mask) | set);
 957 }
 958
 959 /**
 960  * phy_read - Convenience function for reading a given PHY register
 961  * @phydev: the phy_device struct
 962  * @devad: The MMD to read from
 963  * @regnum: register number to read
 964  * @return: value for success or negative errno for failure
 965  */
 966 int phy_read(struct phy_device *phydev, int devad, int regnum)
 967 {
 968         struct mii_dev *bus = phydev->bus;
 969
 970         if (!bus || !bus->read) {
 971                 debug("%s: No bus configured\n", __func__);
 972                 return -1;
 973         }
 974
 975         return bus->read(bus, phydev->addr, devad, regnum);
 976 }
 977
 978 /**
 979  * phy_write - Convenience function for writing a given PHY register
 980  * @phydev: the phy_device struct
 981  * @devad: The MMD to read from
 982  * @regnum: register number to write
 983  * @val: value to write to @regnum
 984  * @return: 0 for success or negative errno for failure
 985  */
 986 int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val)
 987 {
 988         struct mii_dev *bus = phydev->bus;
 989
 990         if (!bus || !bus->write) {
 991                 debug("%s: No bus configured\n", __func__);
 992                 return -1;
 993         }
 994
 995         return bus->write(bus, phydev->addr, devad, regnum, val);
 996 }
 997
 998 /**
 999  * phy_mmd_start_indirect - Convenience function for writing MMD registers
1000  * @phydev: the phy_device struct
1001  * @devad: The MMD to read from
1002  * @regnum: register number to write
1003  * @return: None
1004  */
1005 void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum)
1006 {
1007         /* Write the desired MMD Devad */
1008         phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
1009
1010         /* Write the desired MMD register address */
1011         phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
1012
1013         /* Select the Function : DATA with no post increment */
1014         phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
1015                   (devad | MII_MMD_CTRL_NOINCR));
1016 }
1017
1018 /**
1019  * phy_read_mmd - Convenience function for reading a register
1020  * from an MMD on a given PHY.
1021  * @phydev: The phy_device struct
1022  * @devad: The MMD to read from
1023  * @regnum: The register on the MMD to read
1024  * @return: Value for success or negative errno for failure
1025  */
1026 int phy_read_mmd(struct phy_device *phydev, int devad, int regnum)
1027 {
1028         struct phy_driver *drv = phydev->drv;
1029
1030         if (regnum > (u16)~0 || devad > 32)
1031                 return -EINVAL;
1032
1033         /* driver-specific access */
1034         if (drv->read_mmd)
1035                 return drv->read_mmd(phydev, devad, regnum);
1036
1037         /* direct C45 / C22 access */
1038         if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
1039             devad == MDIO_DEVAD_NONE || !devad)
1040                 return phy_read(phydev, devad, regnum);
1041
1042         /* indirect C22 access */
1043         phy_mmd_start_indirect(phydev, devad, regnum);
1044
1045         /* Read the content of the MMD's selected register */
1046         return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
1047 }
1048
1049 /**
1050  * phy_write_mmd - Convenience function for writing a register
1051  * on an MMD on a given PHY.
1052  * @phydev: The phy_device struct
1053  * @devad: The MMD to read from
1054  * @regnum: The register on the MMD to read
1055  * @val: value to write to @regnum
1056  * @return: 0 for success or negative errno for failure
1057  */
1058 int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val)
1059 {
1060         struct phy_driver *drv = phydev->drv;
1061
1062         if (regnum > (u16)~0 || devad > 32)
1063                 return -EINVAL;
1064
1065         /* driver-specific access */
1066         if (drv->write_mmd)
1067                 return drv->write_mmd(phydev, devad, regnum, val);
1068
1069         /* direct C45 / C22 access */
1070         if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
1071             devad == MDIO_DEVAD_NONE || !devad)
1072                 return phy_write(phydev, devad, regnum, val);
1073
1074         /* indirect C22 access */
1075         phy_mmd_start_indirect(phydev, devad, regnum);
1076
1077         /* Write the data into MMD's selected register */
1078         return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
1079 }
1080
1081 /**
1082  * phy_set_bits_mmd - Convenience function for setting bits in a register
1083  * on MMD
1084  * @phydev: the phy_device struct
1085  * @devad: the MMD containing register to modify
1086  * @regnum: register number to modify
1087  * @val: bits to set
1088  * @return: 0 for success or negative errno for failure
1089  */
1090 int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
1091 {
1092         int value, ret;
1093
1094         value = phy_read_mmd(phydev, devad, regnum);
1095         if (value < 0)
1096                 return value;
1097
1098         value |= val;
1099
1100         ret = phy_write_mmd(phydev, devad, regnum, value);
1101         if (ret < 0)
1102                 return ret;
1103
1104         return 0;
1105 }
1106
1107 /**
1108  * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1109  * on MMD
1110  * @phydev: the phy_device struct
1111  * @devad: the MMD containing register to modify
1112  * @regnum: register number to modify
1113  * @val: bits to clear
1114  * @return: 0 for success or negative errno for failure
1115  */
1116 int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
1117 {
1118         int value, ret;
1119
1120         value = phy_read_mmd(phydev, devad, regnum);
1121         if (value < 0)
1122                 return value;
1123
1124         value &= ~val;
1125
1126         ret = phy_write_mmd(phydev, devad, regnum, value);
1127         if (ret < 0)
1128                 return ret;
1129
1130         return 0;
1131 }
1132
1133 /**
1134  * phy_modify_mmd_changed - Function for modifying a register on MMD
1135  * @phydev: the phy_device struct
1136  * @devad: the MMD containing register to modify
1137  * @regnum: register number to modify
1138  * @mask: bit mask of bits to clear
1139  * @set: new value of bits set in mask to write to @regnum
1140  *
1141  * NOTE: MUST NOT be called from interrupt context,
1142  * because the bus read/write functions may wait for an interrupt
1143  * to conclude the operation.
1144  *
1145  * Returns negative errno, 0 if there was no change, and 1 in case of change
1146  */
1147 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1148                            u16 mask, u16 set)
1149 {
1150         int new, ret;
1151
1152         ret = phy_read_mmd(phydev, devad, regnum);
1153         if (ret < 0)
1154                 return ret;
1155
1156         new = (ret & ~mask) | set;
1157         if (new == ret)
1158                 return 0;
1159
1160         ret = phy_write_mmd(phydev, devad, regnum, new);
1161
1162         return ret < 0 ? ret : 1;
1163 }
1164
1165 /**
1166  * phy_modify_mmd - Convenience function for modifying a register on MMD
1167  * @phydev: the phy_device struct
1168  * @devad: the MMD containing register to modify
1169  * @regnum: register number to modify
1170  * @mask: bit mask of bits to clear
1171  * @set: new value of bits set in mask to write to @regnum
1172  *
1173  * NOTE: MUST NOT be called from interrupt context,
1174  * because the bus read/write functions may wait for an interrupt
1175  * to conclude the operation.
1176  */
1177 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1178                    u16 mask, u16 set)
1179 {
1180         int ret;
1181
1182         ret = phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
1183
1184         return ret < 0 ? ret : 0;
1185 }
1186
1187 bool phy_interface_is_ncsi(void)
1188 {
1189 #ifdef CONFIG_PHY_NCSI
1190         struct eth_pdata *pdata = dev_get_plat(eth_get_dev());
1191
1192         return pdata->phy_interface == PHY_INTERFACE_MODE_NCSI;
1193 #else
1194         return 0;
1195 #endif
1196 }