2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "8"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_LAN_ON 3
398 #define PHY_STAT_PWRDN 5
401 #define EEE_CLKDIV_EN 0x8000
402 #define EN_ALDPS 0x0004
403 #define EN_10M_PLLOFF 0x0001
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP 0x8000
407 #define RG_MATCLR_EN 0x4000
408 #define EEE_10_CAP 0x2000
409 #define EEE_NWAY_EN 0x1000
410 #define TX_QUIET_EN 0x0200
411 #define RX_QUIET_EN 0x0100
412 #define sd_rise_time_mask 0x0070
413 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP 0x0008
415 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN 0x0400
420 #define RG_LDVQUIET_EN 0x0200
421 #define RG_CKRSEL 0x0020
422 #define RG_EEEPRG_EN 0x0010
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask 0xff80
426 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
427 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
428 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
431 /* bit[15:14] function */
432 #define FUN_ADDR 0x0000
433 #define FUN_DATA 0x4000
434 /* bit[4:0] device addr */
437 #define CTAP_SHORT_EN 0x0040
438 #define EEE10_EN 0x0010
441 #define EN_10M_BGOFF 0x0080
444 #define TXDIS_STATE 0x01
445 #define ABD_STATE 0x02
448 #define CKADSEL_L 0x0100
449 #define ADC_EN 0x0080
450 #define EN_EMI_L 0x0040
453 #define LPF_AUTO_TUNE 0x8000
456 #define GDAC_IB_UPALL 0x0008
459 #define AMP_DN 0x0200
462 #define RX_DRIVING_MASK 0x6000
465 #define AD_MASK 0xfee0
467 #define PASS_THRU_MASK 0x1
469 enum rtl_register_content
{
477 #define RTL8152_MAX_TX 4
478 #define RTL8152_MAX_RX 10
484 #define INTR_LINK 0x0004
486 #define RTL8152_REQT_READ 0xc0
487 #define RTL8152_REQT_WRITE 0x40
488 #define RTL8152_REQ_GET_REGS 0x05
489 #define RTL8152_REQ_SET_REGS 0x05
491 #define BYTE_EN_DWORD 0xff
492 #define BYTE_EN_WORD 0x33
493 #define BYTE_EN_BYTE 0x11
494 #define BYTE_EN_SIX_BYTES 0x3f
495 #define BYTE_EN_START_MASK 0x0f
496 #define BYTE_EN_END_MASK 0xf0
498 #define RTL8153_MAX_PACKET 9216 /* 9K */
499 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT 64
516 /* Define these values to match your device */
517 #define VENDOR_ID_REALTEK 0x0bda
518 #define VENDOR_ID_SAMSUNG 0x04e8
519 #define VENDOR_ID_LENOVO 0x17ef
520 #define VENDOR_ID_NVIDIA 0x0955
522 #define MCU_TYPE_PLA 0x0100
523 #define MCU_TYPE_USB 0x0000
525 struct tally_counter
{
532 __le32 tx_one_collision
;
533 __le32 tx_multi_collision
;
543 #define RX_LEN_MASK 0x7fff
546 #define RD_UDP_CS BIT(23)
547 #define RD_TCP_CS BIT(22)
548 #define RD_IPV6_CS BIT(20)
549 #define RD_IPV4_CS BIT(19)
552 #define IPF BIT(23) /* IP checksum fail */
553 #define UDPF BIT(22) /* UDP checksum fail */
554 #define TCPF BIT(21) /* TCP checksum fail */
555 #define RX_VLAN_TAG BIT(16)
564 #define TX_FS BIT(31) /* First segment of a packet */
565 #define TX_LS BIT(30) /* Final segment of a packet */
566 #define GTSENDV4 BIT(28)
567 #define GTSENDV6 BIT(27)
568 #define GTTCPHO_SHIFT 18
569 #define GTTCPHO_MAX 0x7fU
570 #define TX_LEN_MAX 0x3ffffU
573 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
574 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
575 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
576 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
578 #define MSS_MAX 0x7ffU
579 #define TCPHO_SHIFT 17
580 #define TCPHO_MAX 0x7ffU
581 #define TX_VLAN_TAG BIT(16)
587 struct list_head list
;
589 struct r8152
*context
;
595 struct list_head list
;
597 struct r8152
*context
;
606 struct usb_device
*udev
;
607 struct napi_struct napi
;
608 struct usb_interface
*intf
;
609 struct net_device
*netdev
;
610 struct urb
*intr_urb
;
611 struct tx_agg tx_info
[RTL8152_MAX_TX
];
612 struct rx_agg rx_info
[RTL8152_MAX_RX
];
613 struct list_head rx_done
, tx_free
;
614 struct sk_buff_head tx_queue
, rx_queue
;
615 spinlock_t rx_lock
, tx_lock
;
616 struct delayed_work schedule
, hw_phy_work
;
617 struct mii_if_info mii
;
618 struct mutex control
; /* use for hw setting */
619 #ifdef CONFIG_PM_SLEEP
620 struct notifier_block pm_notifier
;
624 void (*init
)(struct r8152
*);
625 int (*enable
)(struct r8152
*);
626 void (*disable
)(struct r8152
*);
627 void (*up
)(struct r8152
*);
628 void (*down
)(struct r8152
*);
629 void (*unload
)(struct r8152
*);
630 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
631 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
632 bool (*in_nway
)(struct r8152
*);
633 void (*hw_phy_cfg
)(struct r8152
*);
634 void (*autosuspend_en
)(struct r8152
*tp
, bool enable
);
667 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
668 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
670 static const int multicast_filter_limit
= 32;
671 static unsigned int agg_buf_sz
= 16384;
673 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
674 VLAN_ETH_HLEN - VLAN_HLEN)
677 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
682 tmp
= kmalloc(size
, GFP_KERNEL
);
686 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
687 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
688 value
, index
, tmp
, size
, 500);
690 memcpy(data
, tmp
, size
);
697 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
702 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
706 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
707 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
708 value
, index
, tmp
, size
, 500);
715 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
716 void *data
, u16 type
)
721 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
724 /* both size and indix must be 4 bytes align */
725 if ((size
& 3) || !size
|| (index
& 3) || !data
)
728 if ((u32
)index
+ (u32
)size
> 0xffff)
733 ret
= get_registers(tp
, index
, type
, limit
, data
);
741 ret
= get_registers(tp
, index
, type
, size
, data
);
753 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
758 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
759 u16 size
, void *data
, u16 type
)
762 u16 byteen_start
, byteen_end
, byen
;
765 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
768 /* both size and indix must be 4 bytes align */
769 if ((size
& 3) || !size
|| (index
& 3) || !data
)
772 if ((u32
)index
+ (u32
)size
> 0xffff)
775 byteen_start
= byteen
& BYTE_EN_START_MASK
;
776 byteen_end
= byteen
& BYTE_EN_END_MASK
;
778 byen
= byteen_start
| (byteen_start
<< 4);
779 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
792 ret
= set_registers(tp
, index
,
793 type
| BYTE_EN_DWORD
,
802 ret
= set_registers(tp
, index
,
803 type
| BYTE_EN_DWORD
,
815 byen
= byteen_end
| (byteen_end
>> 4);
816 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
823 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
829 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
831 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
835 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
837 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
841 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
843 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
847 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
849 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
852 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
856 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
858 return __le32_to_cpu(data
);
861 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
863 __le32 tmp
= __cpu_to_le32(data
);
865 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
868 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
872 u8 shift
= index
& 2;
876 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
878 data
= __le32_to_cpu(tmp
);
879 data
>>= (shift
* 8);
885 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
889 u16 byen
= BYTE_EN_WORD
;
890 u8 shift
= index
& 2;
896 mask
<<= (shift
* 8);
897 data
<<= (shift
* 8);
901 tmp
= __cpu_to_le32(data
);
903 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
906 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
910 u8 shift
= index
& 3;
914 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
916 data
= __le32_to_cpu(tmp
);
917 data
>>= (shift
* 8);
923 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
927 u16 byen
= BYTE_EN_BYTE
;
928 u8 shift
= index
& 3;
934 mask
<<= (shift
* 8);
935 data
<<= (shift
* 8);
939 tmp
= __cpu_to_le32(data
);
941 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
944 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
946 u16 ocp_base
, ocp_index
;
948 ocp_base
= addr
& 0xf000;
949 if (ocp_base
!= tp
->ocp_base
) {
950 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
951 tp
->ocp_base
= ocp_base
;
954 ocp_index
= (addr
& 0x0fff) | 0xb000;
955 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
958 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
960 u16 ocp_base
, ocp_index
;
962 ocp_base
= addr
& 0xf000;
963 if (ocp_base
!= tp
->ocp_base
) {
964 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
965 tp
->ocp_base
= ocp_base
;
968 ocp_index
= (addr
& 0x0fff) | 0xb000;
969 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
972 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
974 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
977 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
979 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
982 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
984 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
985 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
988 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
990 struct r8152
*tp
= netdev_priv(netdev
);
993 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
996 if (phy_id
!= R8152_PHY_ID
)
999 ret
= r8152_mdio_read(tp
, reg
);
1005 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
1007 struct r8152
*tp
= netdev_priv(netdev
);
1009 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1012 if (phy_id
!= R8152_PHY_ID
)
1015 r8152_mdio_write(tp
, reg
, val
);
1019 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
1021 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
1023 struct r8152
*tp
= netdev_priv(netdev
);
1024 struct sockaddr
*addr
= p
;
1025 int ret
= -EADDRNOTAVAIL
;
1027 if (!is_valid_ether_addr(addr
->sa_data
))
1030 ret
= usb_autopm_get_interface(tp
->intf
);
1034 mutex_lock(&tp
->control
);
1036 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1038 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1039 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1040 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1042 mutex_unlock(&tp
->control
);
1044 usb_autopm_put_interface(tp
->intf
);
1049 /* Devices containing RTL8153-AD can support a persistent
1050 * host system provided MAC address.
1051 * Examples of this are Dell TB15 and Dell WD15 docks
1053 static int vendor_mac_passthru_addr_read(struct r8152
*tp
, struct sockaddr
*sa
)
1056 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
1057 union acpi_object
*obj
;
1060 unsigned char buf
[6];
1062 /* test for -AD variant of RTL8153 */
1063 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
1064 if ((ocp_data
& AD_MASK
) != 0x1000)
1067 /* test for MAC address pass-through bit */
1068 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, EFUSE
);
1069 if ((ocp_data
& PASS_THRU_MASK
) != 1)
1072 /* returns _AUXMAC_#AABBCCDDEEFF# */
1073 status
= acpi_evaluate_object(NULL
, "\\_SB.AMAC", NULL
, &buffer
);
1074 obj
= (union acpi_object
*)buffer
.pointer
;
1075 if (!ACPI_SUCCESS(status
))
1077 if (obj
->type
!= ACPI_TYPE_BUFFER
|| obj
->string
.length
!= 0x17) {
1078 netif_warn(tp
, probe
, tp
->netdev
,
1079 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1080 obj
->type
, obj
->string
.length
);
1083 if (strncmp(obj
->string
.pointer
, "_AUXMAC_#", 9) != 0 ||
1084 strncmp(obj
->string
.pointer
+ 0x15, "#", 1) != 0) {
1085 netif_warn(tp
, probe
, tp
->netdev
,
1086 "Invalid header when reading pass-thru MAC addr\n");
1089 ret
= hex2bin(buf
, obj
->string
.pointer
+ 9, 6);
1090 if (!(ret
== 0 && is_valid_ether_addr(buf
))) {
1091 netif_warn(tp
, probe
, tp
->netdev
,
1092 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1097 memcpy(sa
->sa_data
, buf
, 6);
1098 ether_addr_copy(tp
->netdev
->dev_addr
, sa
->sa_data
);
1099 netif_info(tp
, probe
, tp
->netdev
,
1100 "Using pass-thru MAC addr %pM\n", sa
->sa_data
);
1107 static int set_ethernet_addr(struct r8152
*tp
)
1109 struct net_device
*dev
= tp
->netdev
;
1113 if (tp
->version
== RTL_VER_01
) {
1114 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1116 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1117 * or system doesn't provide valid _SB.AMAC this will be
1118 * be expected to non-zero
1120 ret
= vendor_mac_passthru_addr_read(tp
, &sa
);
1122 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1126 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1127 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1128 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1130 eth_hw_addr_random(dev
);
1131 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1132 ret
= rtl8152_set_mac_address(dev
, &sa
);
1133 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1136 if (tp
->version
== RTL_VER_01
)
1137 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1139 ret
= rtl8152_set_mac_address(dev
, &sa
);
1145 static void read_bulk_callback(struct urb
*urb
)
1147 struct net_device
*netdev
;
1148 int status
= urb
->status
;
1160 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1163 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1166 netdev
= tp
->netdev
;
1168 /* When link down, the driver would cancel all bulks. */
1169 /* This avoid the re-submitting bulk */
1170 if (!netif_carrier_ok(netdev
))
1173 usb_mark_last_busy(tp
->udev
);
1177 if (urb
->actual_length
< ETH_ZLEN
)
1180 spin_lock(&tp
->rx_lock
);
1181 list_add_tail(&agg
->list
, &tp
->rx_done
);
1182 spin_unlock(&tp
->rx_lock
);
1183 napi_schedule(&tp
->napi
);
1186 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1187 netif_device_detach(tp
->netdev
);
1190 return; /* the urb is in unlink state */
1192 if (net_ratelimit())
1193 netdev_warn(netdev
, "maybe reset is needed?\n");
1196 if (net_ratelimit())
1197 netdev_warn(netdev
, "Rx status %d\n", status
);
1201 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1204 static void write_bulk_callback(struct urb
*urb
)
1206 struct net_device_stats
*stats
;
1207 struct net_device
*netdev
;
1210 int status
= urb
->status
;
1220 netdev
= tp
->netdev
;
1221 stats
= &netdev
->stats
;
1223 if (net_ratelimit())
1224 netdev_warn(netdev
, "Tx status %d\n", status
);
1225 stats
->tx_errors
+= agg
->skb_num
;
1227 stats
->tx_packets
+= agg
->skb_num
;
1228 stats
->tx_bytes
+= agg
->skb_len
;
1231 spin_lock(&tp
->tx_lock
);
1232 list_add_tail(&agg
->list
, &tp
->tx_free
);
1233 spin_unlock(&tp
->tx_lock
);
1235 usb_autopm_put_interface_async(tp
->intf
);
1237 if (!netif_carrier_ok(netdev
))
1240 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1243 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1246 if (!skb_queue_empty(&tp
->tx_queue
))
1247 napi_schedule(&tp
->napi
);
1250 static void intr_callback(struct urb
*urb
)
1254 int status
= urb
->status
;
1261 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1264 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1268 case 0: /* success */
1270 case -ECONNRESET
: /* unlink */
1272 netif_device_detach(tp
->netdev
);
1275 netif_info(tp
, intr
, tp
->netdev
,
1276 "Stop submitting intr, status %d\n", status
);
1279 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1281 /* -EPIPE: should clear the halt */
1283 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1287 d
= urb
->transfer_buffer
;
1288 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1289 if (!netif_carrier_ok(tp
->netdev
)) {
1290 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1291 schedule_delayed_work(&tp
->schedule
, 0);
1294 if (netif_carrier_ok(tp
->netdev
)) {
1295 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1296 schedule_delayed_work(&tp
->schedule
, 0);
1301 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1302 if (res
== -ENODEV
) {
1303 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1304 netif_device_detach(tp
->netdev
);
1306 netif_err(tp
, intr
, tp
->netdev
,
1307 "can't resubmit intr, status %d\n", res
);
1311 static inline void *rx_agg_align(void *data
)
1313 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1316 static inline void *tx_agg_align(void *data
)
1318 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1321 static void free_all_mem(struct r8152
*tp
)
1325 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1326 usb_free_urb(tp
->rx_info
[i
].urb
);
1327 tp
->rx_info
[i
].urb
= NULL
;
1329 kfree(tp
->rx_info
[i
].buffer
);
1330 tp
->rx_info
[i
].buffer
= NULL
;
1331 tp
->rx_info
[i
].head
= NULL
;
1334 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1335 usb_free_urb(tp
->tx_info
[i
].urb
);
1336 tp
->tx_info
[i
].urb
= NULL
;
1338 kfree(tp
->tx_info
[i
].buffer
);
1339 tp
->tx_info
[i
].buffer
= NULL
;
1340 tp
->tx_info
[i
].head
= NULL
;
1343 usb_free_urb(tp
->intr_urb
);
1344 tp
->intr_urb
= NULL
;
1346 kfree(tp
->intr_buff
);
1347 tp
->intr_buff
= NULL
;
1350 static int alloc_all_mem(struct r8152
*tp
)
1352 struct net_device
*netdev
= tp
->netdev
;
1353 struct usb_interface
*intf
= tp
->intf
;
1354 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1355 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1360 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1362 spin_lock_init(&tp
->rx_lock
);
1363 spin_lock_init(&tp
->tx_lock
);
1364 INIT_LIST_HEAD(&tp
->tx_free
);
1365 skb_queue_head_init(&tp
->tx_queue
);
1366 skb_queue_head_init(&tp
->rx_queue
);
1368 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1369 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1373 if (buf
!= rx_agg_align(buf
)) {
1375 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1381 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1387 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1388 tp
->rx_info
[i
].context
= tp
;
1389 tp
->rx_info
[i
].urb
= urb
;
1390 tp
->rx_info
[i
].buffer
= buf
;
1391 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1394 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1395 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1399 if (buf
!= tx_agg_align(buf
)) {
1401 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1407 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1413 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1414 tp
->tx_info
[i
].context
= tp
;
1415 tp
->tx_info
[i
].urb
= urb
;
1416 tp
->tx_info
[i
].buffer
= buf
;
1417 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1419 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1422 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1426 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1430 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1431 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1432 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1433 tp
, tp
->intr_interval
);
1442 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1444 struct tx_agg
*agg
= NULL
;
1445 unsigned long flags
;
1447 if (list_empty(&tp
->tx_free
))
1450 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1451 if (!list_empty(&tp
->tx_free
)) {
1452 struct list_head
*cursor
;
1454 cursor
= tp
->tx_free
.next
;
1455 list_del_init(cursor
);
1456 agg
= list_entry(cursor
, struct tx_agg
, list
);
1458 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1463 /* r8152_csum_workaround()
1464 * The hw limites the value the transport offset. When the offset is out of the
1465 * range, calculate the checksum by sw.
1467 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1468 struct sk_buff_head
*list
)
1470 if (skb_shinfo(skb
)->gso_size
) {
1471 netdev_features_t features
= tp
->netdev
->features
;
1472 struct sk_buff_head seg_list
;
1473 struct sk_buff
*segs
, *nskb
;
1475 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1476 segs
= skb_gso_segment(skb
, features
);
1477 if (IS_ERR(segs
) || !segs
)
1480 __skb_queue_head_init(&seg_list
);
1486 __skb_queue_tail(&seg_list
, nskb
);
1489 skb_queue_splice(&seg_list
, list
);
1491 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1492 if (skb_checksum_help(skb
) < 0)
1495 __skb_queue_head(list
, skb
);
1497 struct net_device_stats
*stats
;
1500 stats
= &tp
->netdev
->stats
;
1501 stats
->tx_dropped
++;
1506 /* msdn_giant_send_check()
1507 * According to the document of microsoft, the TCP Pseudo Header excludes the
1508 * packet length for IPv6 TCP large packets.
1510 static int msdn_giant_send_check(struct sk_buff
*skb
)
1512 const struct ipv6hdr
*ipv6h
;
1516 ret
= skb_cow_head(skb
, 0);
1520 ipv6h
= ipv6_hdr(skb
);
1524 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1529 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1531 if (skb_vlan_tag_present(skb
)) {
1534 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1535 desc
->opts2
|= cpu_to_le32(opts2
);
1539 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1541 u32 opts2
= le32_to_cpu(desc
->opts2
);
1543 if (opts2
& RX_VLAN_TAG
)
1544 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1545 swab16(opts2
& 0xffff));
1548 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1549 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1551 u32 mss
= skb_shinfo(skb
)->gso_size
;
1552 u32 opts1
, opts2
= 0;
1553 int ret
= TX_CSUM_SUCCESS
;
1555 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1557 opts1
= len
| TX_FS
| TX_LS
;
1560 if (transport_offset
> GTTCPHO_MAX
) {
1561 netif_warn(tp
, tx_err
, tp
->netdev
,
1562 "Invalid transport offset 0x%x for TSO\n",
1568 switch (vlan_get_protocol(skb
)) {
1569 case htons(ETH_P_IP
):
1573 case htons(ETH_P_IPV6
):
1574 if (msdn_giant_send_check(skb
)) {
1586 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1587 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1588 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1591 if (transport_offset
> TCPHO_MAX
) {
1592 netif_warn(tp
, tx_err
, tp
->netdev
,
1593 "Invalid transport offset 0x%x\n",
1599 switch (vlan_get_protocol(skb
)) {
1600 case htons(ETH_P_IP
):
1602 ip_protocol
= ip_hdr(skb
)->protocol
;
1605 case htons(ETH_P_IPV6
):
1607 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1611 ip_protocol
= IPPROTO_RAW
;
1615 if (ip_protocol
== IPPROTO_TCP
)
1617 else if (ip_protocol
== IPPROTO_UDP
)
1622 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1625 desc
->opts2
= cpu_to_le32(opts2
);
1626 desc
->opts1
= cpu_to_le32(opts1
);
1632 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1634 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1638 __skb_queue_head_init(&skb_head
);
1639 spin_lock(&tx_queue
->lock
);
1640 skb_queue_splice_init(tx_queue
, &skb_head
);
1641 spin_unlock(&tx_queue
->lock
);
1643 tx_data
= agg
->head
;
1646 remain
= agg_buf_sz
;
1648 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1649 struct tx_desc
*tx_desc
;
1650 struct sk_buff
*skb
;
1654 skb
= __skb_dequeue(&skb_head
);
1658 len
= skb
->len
+ sizeof(*tx_desc
);
1661 __skb_queue_head(&skb_head
, skb
);
1665 tx_data
= tx_agg_align(tx_data
);
1666 tx_desc
= (struct tx_desc
*)tx_data
;
1668 offset
= (u32
)skb_transport_offset(skb
);
1670 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1671 r8152_csum_workaround(tp
, skb
, &skb_head
);
1675 rtl_tx_vlan_tag(tx_desc
, skb
);
1677 tx_data
+= sizeof(*tx_desc
);
1680 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1681 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1683 stats
->tx_dropped
++;
1684 dev_kfree_skb_any(skb
);
1685 tx_data
-= sizeof(*tx_desc
);
1690 agg
->skb_len
+= len
;
1693 dev_kfree_skb_any(skb
);
1695 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1698 if (!skb_queue_empty(&skb_head
)) {
1699 spin_lock(&tx_queue
->lock
);
1700 skb_queue_splice(&skb_head
, tx_queue
);
1701 spin_unlock(&tx_queue
->lock
);
1704 netif_tx_lock(tp
->netdev
);
1706 if (netif_queue_stopped(tp
->netdev
) &&
1707 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1708 netif_wake_queue(tp
->netdev
);
1710 netif_tx_unlock(tp
->netdev
);
1712 ret
= usb_autopm_get_interface_async(tp
->intf
);
1716 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1717 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1718 (usb_complete_t
)write_bulk_callback
, agg
);
1720 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1722 usb_autopm_put_interface_async(tp
->intf
);
1728 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1730 u8 checksum
= CHECKSUM_NONE
;
1733 if (!(tp
->netdev
->features
& NETIF_F_RXCSUM
))
1736 opts2
= le32_to_cpu(rx_desc
->opts2
);
1737 opts3
= le32_to_cpu(rx_desc
->opts3
);
1739 if (opts2
& RD_IPV4_CS
) {
1741 checksum
= CHECKSUM_NONE
;
1742 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1743 checksum
= CHECKSUM_NONE
;
1744 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1745 checksum
= CHECKSUM_NONE
;
1747 checksum
= CHECKSUM_UNNECESSARY
;
1748 } else if (opts2
& RD_IPV6_CS
) {
1749 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1750 checksum
= CHECKSUM_UNNECESSARY
;
1751 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1752 checksum
= CHECKSUM_UNNECESSARY
;
1759 static int rx_bottom(struct r8152
*tp
, int budget
)
1761 unsigned long flags
;
1762 struct list_head
*cursor
, *next
, rx_queue
;
1763 int ret
= 0, work_done
= 0;
1765 if (!skb_queue_empty(&tp
->rx_queue
)) {
1766 while (work_done
< budget
) {
1767 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1768 struct net_device
*netdev
= tp
->netdev
;
1769 struct net_device_stats
*stats
= &netdev
->stats
;
1770 unsigned int pkt_len
;
1776 napi_gro_receive(&tp
->napi
, skb
);
1778 stats
->rx_packets
++;
1779 stats
->rx_bytes
+= pkt_len
;
1783 if (list_empty(&tp
->rx_done
))
1786 INIT_LIST_HEAD(&rx_queue
);
1787 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1788 list_splice_init(&tp
->rx_done
, &rx_queue
);
1789 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1791 list_for_each_safe(cursor
, next
, &rx_queue
) {
1792 struct rx_desc
*rx_desc
;
1798 list_del_init(cursor
);
1800 agg
= list_entry(cursor
, struct rx_agg
, list
);
1802 if (urb
->actual_length
< ETH_ZLEN
)
1805 rx_desc
= agg
->head
;
1806 rx_data
= agg
->head
;
1807 len_used
+= sizeof(struct rx_desc
);
1809 while (urb
->actual_length
> len_used
) {
1810 struct net_device
*netdev
= tp
->netdev
;
1811 struct net_device_stats
*stats
= &netdev
->stats
;
1812 unsigned int pkt_len
;
1813 struct sk_buff
*skb
;
1815 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1816 if (pkt_len
< ETH_ZLEN
)
1819 len_used
+= pkt_len
;
1820 if (urb
->actual_length
< len_used
)
1823 pkt_len
-= CRC_SIZE
;
1824 rx_data
+= sizeof(struct rx_desc
);
1826 skb
= napi_alloc_skb(&tp
->napi
, pkt_len
);
1828 stats
->rx_dropped
++;
1832 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1833 memcpy(skb
->data
, rx_data
, pkt_len
);
1834 skb_put(skb
, pkt_len
);
1835 skb
->protocol
= eth_type_trans(skb
, netdev
);
1836 rtl_rx_vlan_tag(rx_desc
, skb
);
1837 if (work_done
< budget
) {
1838 napi_gro_receive(&tp
->napi
, skb
);
1840 stats
->rx_packets
++;
1841 stats
->rx_bytes
+= pkt_len
;
1843 __skb_queue_tail(&tp
->rx_queue
, skb
);
1847 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1848 rx_desc
= (struct rx_desc
*)rx_data
;
1849 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1850 len_used
+= sizeof(struct rx_desc
);
1855 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1857 urb
->actual_length
= 0;
1858 list_add_tail(&agg
->list
, next
);
1862 if (!list_empty(&rx_queue
)) {
1863 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1864 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1865 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1872 static void tx_bottom(struct r8152
*tp
)
1879 if (skb_queue_empty(&tp
->tx_queue
))
1882 agg
= r8152_get_tx_agg(tp
);
1886 res
= r8152_tx_agg_fill(tp
, agg
);
1888 struct net_device
*netdev
= tp
->netdev
;
1890 if (res
== -ENODEV
) {
1891 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1892 netif_device_detach(netdev
);
1894 struct net_device_stats
*stats
= &netdev
->stats
;
1895 unsigned long flags
;
1897 netif_warn(tp
, tx_err
, netdev
,
1898 "failed tx_urb %d\n", res
);
1899 stats
->tx_dropped
+= agg
->skb_num
;
1901 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1902 list_add_tail(&agg
->list
, &tp
->tx_free
);
1903 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1909 static void bottom_half(struct r8152
*tp
)
1911 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1914 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1917 /* When link down, the driver would cancel all bulks. */
1918 /* This avoid the re-submitting bulk */
1919 if (!netif_carrier_ok(tp
->netdev
))
1922 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
1927 static int r8152_poll(struct napi_struct
*napi
, int budget
)
1929 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
1932 work_done
= rx_bottom(tp
, budget
);
1935 if (work_done
< budget
) {
1936 napi_complete(napi
);
1937 if (!list_empty(&tp
->rx_done
))
1938 napi_schedule(napi
);
1939 else if (!skb_queue_empty(&tp
->tx_queue
) &&
1940 !list_empty(&tp
->tx_free
))
1941 napi_schedule(napi
);
1948 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1952 /* The rx would be stopped, so skip submitting */
1953 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
1954 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
1957 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1958 agg
->head
, agg_buf_sz
,
1959 (usb_complete_t
)read_bulk_callback
, agg
);
1961 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
1962 if (ret
== -ENODEV
) {
1963 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1964 netif_device_detach(tp
->netdev
);
1966 struct urb
*urb
= agg
->urb
;
1967 unsigned long flags
;
1969 urb
->actual_length
= 0;
1970 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1971 list_add_tail(&agg
->list
, &tp
->rx_done
);
1972 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1974 netif_err(tp
, rx_err
, tp
->netdev
,
1975 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
1977 napi_schedule(&tp
->napi
);
1983 static void rtl_drop_queued_tx(struct r8152
*tp
)
1985 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1986 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1987 struct sk_buff
*skb
;
1989 if (skb_queue_empty(tx_queue
))
1992 __skb_queue_head_init(&skb_head
);
1993 spin_lock_bh(&tx_queue
->lock
);
1994 skb_queue_splice_init(tx_queue
, &skb_head
);
1995 spin_unlock_bh(&tx_queue
->lock
);
1997 while ((skb
= __skb_dequeue(&skb_head
))) {
1999 stats
->tx_dropped
++;
2003 static void rtl8152_tx_timeout(struct net_device
*netdev
)
2005 struct r8152
*tp
= netdev_priv(netdev
);
2007 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
2009 usb_queue_reset_device(tp
->intf
);
2012 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
2014 struct r8152
*tp
= netdev_priv(netdev
);
2016 if (netif_carrier_ok(netdev
)) {
2017 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2018 schedule_delayed_work(&tp
->schedule
, 0);
2022 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
2024 struct r8152
*tp
= netdev_priv(netdev
);
2025 u32 mc_filter
[2]; /* Multicast hash filter */
2029 netif_stop_queue(netdev
);
2030 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2031 ocp_data
&= ~RCR_ACPT_ALL
;
2032 ocp_data
|= RCR_AB
| RCR_APM
;
2034 if (netdev
->flags
& IFF_PROMISC
) {
2035 /* Unconditionally log net taps. */
2036 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
2037 ocp_data
|= RCR_AM
| RCR_AAP
;
2038 mc_filter
[1] = 0xffffffff;
2039 mc_filter
[0] = 0xffffffff;
2040 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
2041 (netdev
->flags
& IFF_ALLMULTI
)) {
2042 /* Too many to filter perfectly -- accept all multicasts. */
2044 mc_filter
[1] = 0xffffffff;
2045 mc_filter
[0] = 0xffffffff;
2047 struct netdev_hw_addr
*ha
;
2051 netdev_for_each_mc_addr(ha
, netdev
) {
2052 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
2054 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2059 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
2060 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
2062 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
2063 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2064 netif_wake_queue(netdev
);
2067 static netdev_features_t
2068 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
2069 netdev_features_t features
)
2071 u32 mss
= skb_shinfo(skb
)->gso_size
;
2072 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
2073 int offset
= skb_transport_offset(skb
);
2075 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
2076 features
&= ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
2077 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
2078 features
&= ~NETIF_F_GSO_MASK
;
2083 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
2084 struct net_device
*netdev
)
2086 struct r8152
*tp
= netdev_priv(netdev
);
2088 skb_tx_timestamp(skb
);
2090 skb_queue_tail(&tp
->tx_queue
, skb
);
2092 if (!list_empty(&tp
->tx_free
)) {
2093 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2094 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
2095 schedule_delayed_work(&tp
->schedule
, 0);
2097 usb_mark_last_busy(tp
->udev
);
2098 napi_schedule(&tp
->napi
);
2100 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2101 netif_stop_queue(netdev
);
2104 return NETDEV_TX_OK
;
2107 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2111 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2112 ocp_data
&= ~FMC_FCR_MCU_EN
;
2113 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2114 ocp_data
|= FMC_FCR_MCU_EN
;
2115 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2118 static void rtl8152_nic_reset(struct r8152
*tp
)
2122 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2124 for (i
= 0; i
< 1000; i
++) {
2125 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2127 usleep_range(100, 400);
2131 static void set_tx_qlen(struct r8152
*tp
)
2133 struct net_device
*netdev
= tp
->netdev
;
2135 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2136 sizeof(struct tx_desc
));
2139 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2141 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2144 static void rtl_set_eee_plus(struct r8152
*tp
)
2149 speed
= rtl8152_get_speed(tp
);
2150 if (speed
& _10bps
) {
2151 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2152 ocp_data
|= EEEP_CR_EEEP_TX
;
2153 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2155 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2156 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2157 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2161 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2165 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2167 ocp_data
|= RXDY_GATED_EN
;
2169 ocp_data
&= ~RXDY_GATED_EN
;
2170 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2173 static int rtl_start_rx(struct r8152
*tp
)
2177 INIT_LIST_HEAD(&tp
->rx_done
);
2178 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2179 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2180 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2185 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2186 struct list_head rx_queue
;
2187 unsigned long flags
;
2189 INIT_LIST_HEAD(&rx_queue
);
2192 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2193 struct urb
*urb
= agg
->urb
;
2195 urb
->actual_length
= 0;
2196 list_add_tail(&agg
->list
, &rx_queue
);
2197 } while (i
< RTL8152_MAX_RX
);
2199 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2200 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2201 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2207 static int rtl_stop_rx(struct r8152
*tp
)
2211 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2212 usb_kill_urb(tp
->rx_info
[i
].urb
);
2214 while (!skb_queue_empty(&tp
->rx_queue
))
2215 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2220 static int rtl_enable(struct r8152
*tp
)
2224 r8152b_reset_packet_filter(tp
);
2226 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2227 ocp_data
|= CR_RE
| CR_TE
;
2228 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2230 rxdy_gated_en(tp
, false);
2235 static int rtl8152_enable(struct r8152
*tp
)
2237 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2241 rtl_set_eee_plus(tp
);
2243 return rtl_enable(tp
);
2246 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2248 u32 ocp_data
= tp
->coalesce
/ 8;
2250 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
, ocp_data
);
2253 static void r8153_set_rx_early_size(struct r8152
*tp
)
2255 u32 mtu
= tp
->netdev
->mtu
;
2256 u32 ocp_data
= (agg_buf_sz
- mtu
- VLAN_ETH_HLEN
- VLAN_HLEN
) / 8;
2258 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
, ocp_data
);
2261 static int rtl8153_enable(struct r8152
*tp
)
2263 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2266 usb_disable_lpm(tp
->udev
);
2268 rtl_set_eee_plus(tp
);
2269 r8153_set_rx_early_timeout(tp
);
2270 r8153_set_rx_early_size(tp
);
2272 return rtl_enable(tp
);
2275 static void rtl_disable(struct r8152
*tp
)
2280 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2281 rtl_drop_queued_tx(tp
);
2285 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2286 ocp_data
&= ~RCR_ACPT_ALL
;
2287 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2289 rtl_drop_queued_tx(tp
);
2291 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2292 usb_kill_urb(tp
->tx_info
[i
].urb
);
2294 rxdy_gated_en(tp
, true);
2296 for (i
= 0; i
< 1000; i
++) {
2297 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2298 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2300 usleep_range(1000, 2000);
2303 for (i
= 0; i
< 1000; i
++) {
2304 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2306 usleep_range(1000, 2000);
2311 rtl8152_nic_reset(tp
);
2314 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2318 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2320 ocp_data
|= POWER_CUT
;
2322 ocp_data
&= ~POWER_CUT
;
2323 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2325 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2326 ocp_data
&= ~RESUME_INDICATE
;
2327 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2330 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2334 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2336 ocp_data
|= CPCR_RX_VLAN
;
2338 ocp_data
&= ~CPCR_RX_VLAN
;
2339 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2342 static int rtl8152_set_features(struct net_device
*dev
,
2343 netdev_features_t features
)
2345 netdev_features_t changed
= features
^ dev
->features
;
2346 struct r8152
*tp
= netdev_priv(dev
);
2349 ret
= usb_autopm_get_interface(tp
->intf
);
2353 mutex_lock(&tp
->control
);
2355 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2356 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2357 rtl_rx_vlan_en(tp
, true);
2359 rtl_rx_vlan_en(tp
, false);
2362 mutex_unlock(&tp
->control
);
2364 usb_autopm_put_interface(tp
->intf
);
2370 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2372 static u32
__rtl_get_wol(struct r8152
*tp
)
2377 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2378 if (ocp_data
& LINK_ON_WAKE_EN
)
2379 wolopts
|= WAKE_PHY
;
2381 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2382 if (ocp_data
& UWF_EN
)
2383 wolopts
|= WAKE_UCAST
;
2384 if (ocp_data
& BWF_EN
)
2385 wolopts
|= WAKE_BCAST
;
2386 if (ocp_data
& MWF_EN
)
2387 wolopts
|= WAKE_MCAST
;
2389 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2390 if (ocp_data
& MAGIC_EN
)
2391 wolopts
|= WAKE_MAGIC
;
2396 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2400 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2402 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2403 ocp_data
&= ~LINK_ON_WAKE_EN
;
2404 if (wolopts
& WAKE_PHY
)
2405 ocp_data
|= LINK_ON_WAKE_EN
;
2406 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2408 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2409 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
);
2410 if (wolopts
& WAKE_UCAST
)
2412 if (wolopts
& WAKE_BCAST
)
2414 if (wolopts
& WAKE_MCAST
)
2416 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2418 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2420 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2421 ocp_data
&= ~MAGIC_EN
;
2422 if (wolopts
& WAKE_MAGIC
)
2423 ocp_data
|= MAGIC_EN
;
2424 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2426 if (wolopts
& WAKE_ANY
)
2427 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2429 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2432 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2437 memset(u1u2
, 0xff, sizeof(u1u2
));
2439 memset(u1u2
, 0x00, sizeof(u1u2
));
2441 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2444 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2448 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2449 if (enable
&& tp
->version
!= RTL_VER_03
&& tp
->version
!= RTL_VER_04
)
2450 ocp_data
|= U2P3_ENABLE
;
2452 ocp_data
&= ~U2P3_ENABLE
;
2453 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2456 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2460 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2462 ocp_data
|= PWR_EN
| PHASE2_EN
;
2464 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2465 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2467 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2468 ocp_data
&= ~PCUT_STATUS
;
2469 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2472 static bool rtl_can_wakeup(struct r8152
*tp
)
2474 struct usb_device
*udev
= tp
->udev
;
2476 return (udev
->actconfig
->desc
.bmAttributes
& USB_CONFIG_ATT_WAKEUP
);
2479 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2484 __rtl_set_wol(tp
, WAKE_ANY
);
2486 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2488 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2489 ocp_data
|= LINK_OFF_WAKE_EN
;
2490 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2492 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2496 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2498 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2500 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2501 ocp_data
&= ~LINK_OFF_WAKE_EN
;
2502 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2504 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2508 static void rtl8153_runtime_enable(struct r8152
*tp
, bool enable
)
2510 rtl_runtime_suspend_enable(tp
, enable
);
2513 r8153_u1u2en(tp
, false);
2514 r8153_u2p3en(tp
, false);
2516 r8153_u2p3en(tp
, true);
2517 r8153_u1u2en(tp
, true);
2521 static void r8153_teredo_off(struct r8152
*tp
)
2525 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2526 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2527 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2529 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2530 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2531 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2534 static void rtl_reset_bmu(struct r8152
*tp
)
2538 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
);
2539 ocp_data
&= ~(BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
);
2540 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2541 ocp_data
|= BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
;
2542 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2545 static void r8152_aldps_en(struct r8152
*tp
, bool enable
)
2548 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2549 LINKENA
| DIS_SDSAVE
);
2551 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
|
2557 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
2559 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
2560 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
2561 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
2564 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
2568 r8152_mmd_indirect(tp
, dev
, reg
);
2569 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
2570 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2575 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
2577 r8152_mmd_indirect(tp
, dev
, reg
);
2578 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
2579 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2582 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
2584 u16 config1
, config2
, config3
;
2587 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2588 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
2589 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
2590 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
2593 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2594 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
2595 config1
|= sd_rise_time(1);
2596 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
2597 config3
|= fast_snr(42);
2599 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
2600 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
2602 config1
|= sd_rise_time(7);
2603 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
2604 config3
|= fast_snr(511);
2607 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2608 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
2609 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
2610 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
2613 static void r8152b_enable_eee(struct r8152
*tp
)
2615 r8152_eee_en(tp
, true);
2616 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
2619 static void r8152b_enable_fc(struct r8152
*tp
)
2623 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2624 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
2625 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2628 static void rtl8152_disable(struct r8152
*tp
)
2630 r8152_aldps_en(tp
, false);
2632 r8152_aldps_en(tp
, true);
2635 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2637 r8152b_enable_eee(tp
);
2638 r8152_aldps_en(tp
, true);
2639 r8152b_enable_fc(tp
);
2641 set_bit(PHY_RESET
, &tp
->flags
);
2644 static void r8152b_exit_oob(struct r8152
*tp
)
2649 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2650 ocp_data
&= ~RCR_ACPT_ALL
;
2651 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2653 rxdy_gated_en(tp
, true);
2654 r8153_teredo_off(tp
);
2655 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2656 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2658 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2659 ocp_data
&= ~NOW_IS_OOB
;
2660 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2662 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2663 ocp_data
&= ~MCU_BORW_EN
;
2664 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2666 for (i
= 0; i
< 1000; i
++) {
2667 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2668 if (ocp_data
& LINK_LIST_READY
)
2670 usleep_range(1000, 2000);
2673 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2674 ocp_data
|= RE_INIT_LL
;
2675 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2677 for (i
= 0; i
< 1000; i
++) {
2678 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2679 if (ocp_data
& LINK_LIST_READY
)
2681 usleep_range(1000, 2000);
2684 rtl8152_nic_reset(tp
);
2686 /* rx share fifo credit full threshold */
2687 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2689 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2690 tp
->udev
->speed
== USB_SPEED_LOW
) {
2691 /* rx share fifo credit near full threshold */
2692 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2694 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2697 /* rx share fifo credit near full threshold */
2698 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2700 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2704 /* TX share fifo free credit full threshold */
2705 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2707 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2708 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2709 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2710 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2712 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2714 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2716 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2717 ocp_data
|= TCR0_AUTO_FIFO
;
2718 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2721 static void r8152b_enter_oob(struct r8152
*tp
)
2726 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2727 ocp_data
&= ~NOW_IS_OOB
;
2728 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2730 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2731 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2732 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2736 for (i
= 0; i
< 1000; i
++) {
2737 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2738 if (ocp_data
& LINK_LIST_READY
)
2740 usleep_range(1000, 2000);
2743 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2744 ocp_data
|= RE_INIT_LL
;
2745 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2747 for (i
= 0; i
< 1000; i
++) {
2748 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2749 if (ocp_data
& LINK_LIST_READY
)
2751 usleep_range(1000, 2000);
2754 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2756 rtl_rx_vlan_en(tp
, true);
2758 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2759 ocp_data
|= ALDPS_PROXY_MODE
;
2760 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2762 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2763 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2764 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2766 rxdy_gated_en(tp
, false);
2768 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2769 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2770 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2773 static void r8153_aldps_en(struct r8152
*tp
, bool enable
)
2777 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2780 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2783 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2788 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
2793 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
2794 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2797 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
2800 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
2801 config
&= ~EEE10_EN
;
2804 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
2805 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
2808 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2813 /* disable ALDPS before updating the PHY parameters */
2814 r8153_aldps_en(tp
, false);
2816 /* disable EEE before updating the PHY parameters */
2817 r8153_eee_en(tp
, false);
2818 ocp_reg_write(tp
, OCP_EEE_ADV
, 0);
2820 if (tp
->version
== RTL_VER_03
) {
2821 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2822 data
&= ~CTAP_SHORT_EN
;
2823 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2826 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2827 data
|= EEE_CLKDIV_EN
;
2828 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2830 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2831 data
|= EN_10M_BGOFF
;
2832 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2833 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2834 data
|= EN_10M_PLLOFF
;
2835 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2836 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
2838 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2839 ocp_data
|= PFM_PWM_SWITCH
;
2840 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2842 /* Enable LPF corner auto tune */
2843 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
2845 /* Adjust 10M Amplitude */
2846 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
2847 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
2849 r8153_eee_en(tp
, true);
2850 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
2852 r8153_aldps_en(tp
, true);
2853 r8152b_enable_fc(tp
);
2855 set_bit(PHY_RESET
, &tp
->flags
);
2858 static void r8153_first_init(struct r8152
*tp
)
2863 rxdy_gated_en(tp
, true);
2864 r8153_teredo_off(tp
);
2866 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2867 ocp_data
&= ~RCR_ACPT_ALL
;
2868 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2870 rtl8152_nic_reset(tp
);
2873 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2874 ocp_data
&= ~NOW_IS_OOB
;
2875 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2877 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2878 ocp_data
&= ~MCU_BORW_EN
;
2879 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2881 for (i
= 0; i
< 1000; i
++) {
2882 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2883 if (ocp_data
& LINK_LIST_READY
)
2885 usleep_range(1000, 2000);
2888 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2889 ocp_data
|= RE_INIT_LL
;
2890 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2892 for (i
= 0; i
< 1000; i
++) {
2893 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2894 if (ocp_data
& LINK_LIST_READY
)
2896 usleep_range(1000, 2000);
2899 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2901 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2902 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2904 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2905 ocp_data
|= TCR0_AUTO_FIFO
;
2906 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2908 rtl8152_nic_reset(tp
);
2910 /* rx share fifo credit full threshold */
2911 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2912 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2913 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2914 /* TX share fifo free credit full threshold */
2915 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2917 /* rx aggregation */
2918 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2919 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
2920 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2923 static void r8153_enter_oob(struct r8152
*tp
)
2928 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2929 ocp_data
&= ~NOW_IS_OOB
;
2930 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2935 for (i
= 0; i
< 1000; i
++) {
2936 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2937 if (ocp_data
& LINK_LIST_READY
)
2939 usleep_range(1000, 2000);
2942 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2943 ocp_data
|= RE_INIT_LL
;
2944 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2946 for (i
= 0; i
< 1000; i
++) {
2947 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2948 if (ocp_data
& LINK_LIST_READY
)
2950 usleep_range(1000, 2000);
2953 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2955 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2956 ocp_data
&= ~TEREDO_WAKE_MASK
;
2957 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2959 rtl_rx_vlan_en(tp
, true);
2961 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2962 ocp_data
|= ALDPS_PROXY_MODE
;
2963 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2965 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2966 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2967 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2969 rxdy_gated_en(tp
, false);
2971 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2972 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2973 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2976 static void rtl8153_disable(struct r8152
*tp
)
2978 r8153_aldps_en(tp
, false);
2981 r8153_aldps_en(tp
, true);
2982 usb_enable_lpm(tp
->udev
);
2985 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2987 u16 bmcr
, anar
, gbcr
;
2990 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2991 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2992 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2993 if (tp
->mii
.supports_gmii
) {
2994 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2995 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
3000 if (autoneg
== AUTONEG_DISABLE
) {
3001 if (speed
== SPEED_10
) {
3003 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3004 } else if (speed
== SPEED_100
) {
3005 bmcr
= BMCR_SPEED100
;
3006 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3007 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
3008 bmcr
= BMCR_SPEED1000
;
3009 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
3015 if (duplex
== DUPLEX_FULL
)
3016 bmcr
|= BMCR_FULLDPLX
;
3018 if (speed
== SPEED_10
) {
3019 if (duplex
== DUPLEX_FULL
)
3020 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3022 anar
|= ADVERTISE_10HALF
;
3023 } else if (speed
== SPEED_100
) {
3024 if (duplex
== DUPLEX_FULL
) {
3025 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3026 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3028 anar
|= ADVERTISE_10HALF
;
3029 anar
|= ADVERTISE_100HALF
;
3031 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
3032 if (duplex
== DUPLEX_FULL
) {
3033 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
3034 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
3035 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
3037 anar
|= ADVERTISE_10HALF
;
3038 anar
|= ADVERTISE_100HALF
;
3039 gbcr
|= ADVERTISE_1000HALF
;
3046 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
3049 if (test_and_clear_bit(PHY_RESET
, &tp
->flags
))
3052 if (tp
->mii
.supports_gmii
)
3053 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
3055 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3056 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
3058 if (bmcr
& BMCR_RESET
) {
3061 for (i
= 0; i
< 50; i
++) {
3063 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
3072 static void rtl8152_up(struct r8152
*tp
)
3074 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3077 r8152_aldps_en(tp
, false);
3078 r8152b_exit_oob(tp
);
3079 r8152_aldps_en(tp
, true);
3082 static void rtl8152_down(struct r8152
*tp
)
3084 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3085 rtl_drop_queued_tx(tp
);
3089 r8152_power_cut_en(tp
, false);
3090 r8152_aldps_en(tp
, false);
3091 r8152b_enter_oob(tp
);
3092 r8152_aldps_en(tp
, true);
3095 static void rtl8153_up(struct r8152
*tp
)
3097 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3100 r8153_u1u2en(tp
, false);
3101 r8153_aldps_en(tp
, false);
3102 r8153_first_init(tp
);
3103 r8153_aldps_en(tp
, true);
3104 r8153_u2p3en(tp
, true);
3105 r8153_u1u2en(tp
, true);
3106 usb_enable_lpm(tp
->udev
);
3109 static void rtl8153_down(struct r8152
*tp
)
3111 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3112 rtl_drop_queued_tx(tp
);
3116 r8153_u1u2en(tp
, false);
3117 r8153_u2p3en(tp
, false);
3118 r8153_power_cut_en(tp
, false);
3119 r8153_aldps_en(tp
, false);
3120 r8153_enter_oob(tp
);
3121 r8153_aldps_en(tp
, true);
3124 static bool rtl8152_in_nway(struct r8152
*tp
)
3128 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, 0x2000);
3129 tp
->ocp_base
= 0x2000;
3130 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xb014, 0x4c); /* phy state */
3131 nway_state
= ocp_read_word(tp
, MCU_TYPE_PLA
, 0xb01a);
3133 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3134 if (nway_state
& 0xc000)
3140 static bool rtl8153_in_nway(struct r8152
*tp
)
3142 u16 phy_state
= ocp_reg_read(tp
, OCP_PHY_STATE
) & 0xff;
3144 if (phy_state
== TXDIS_STATE
|| phy_state
== ABD_STATE
)
3150 static void set_carrier(struct r8152
*tp
)
3152 struct net_device
*netdev
= tp
->netdev
;
3155 speed
= rtl8152_get_speed(tp
);
3157 if (speed
& LINK_STATUS
) {
3158 if (!netif_carrier_ok(netdev
)) {
3159 tp
->rtl_ops
.enable(tp
);
3160 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
3161 netif_stop_queue(netdev
);
3162 napi_disable(&tp
->napi
);
3163 netif_carrier_on(netdev
);
3165 napi_enable(&tp
->napi
);
3166 netif_wake_queue(netdev
);
3167 netif_info(tp
, link
, netdev
, "carrier on\n");
3170 if (netif_carrier_ok(netdev
)) {
3171 netif_carrier_off(netdev
);
3172 napi_disable(&tp
->napi
);
3173 tp
->rtl_ops
.disable(tp
);
3174 napi_enable(&tp
->napi
);
3175 netif_info(tp
, link
, netdev
, "carrier off\n");
3180 static void rtl_work_func_t(struct work_struct
*work
)
3182 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
3184 /* If the device is unplugged or !netif_running(), the workqueue
3185 * doesn't need to wake the device, and could return directly.
3187 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
3190 if (usb_autopm_get_interface(tp
->intf
) < 0)
3193 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
3196 if (!mutex_trylock(&tp
->control
)) {
3197 schedule_delayed_work(&tp
->schedule
, 0);
3201 if (test_and_clear_bit(RTL8152_LINK_CHG
, &tp
->flags
))
3204 if (test_and_clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
3205 _rtl8152_set_rx_mode(tp
->netdev
);
3207 /* don't schedule napi before linking */
3208 if (test_and_clear_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
3209 netif_carrier_ok(tp
->netdev
))
3210 napi_schedule(&tp
->napi
);
3212 mutex_unlock(&tp
->control
);
3215 usb_autopm_put_interface(tp
->intf
);
3218 static void rtl_hw_phy_work_func_t(struct work_struct
*work
)
3220 struct r8152
*tp
= container_of(work
, struct r8152
, hw_phy_work
.work
);
3222 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3225 if (usb_autopm_get_interface(tp
->intf
) < 0)
3228 mutex_lock(&tp
->control
);
3230 tp
->rtl_ops
.hw_phy_cfg(tp
);
3232 rtl8152_set_speed(tp
, tp
->autoneg
, tp
->speed
, tp
->duplex
);
3234 mutex_unlock(&tp
->control
);
3236 usb_autopm_put_interface(tp
->intf
);
3239 #ifdef CONFIG_PM_SLEEP
3240 static int rtl_notifier(struct notifier_block
*nb
, unsigned long action
,
3243 struct r8152
*tp
= container_of(nb
, struct r8152
, pm_notifier
);
3246 case PM_HIBERNATION_PREPARE
:
3247 case PM_SUSPEND_PREPARE
:
3248 usb_autopm_get_interface(tp
->intf
);
3251 case PM_POST_HIBERNATION
:
3252 case PM_POST_SUSPEND
:
3253 usb_autopm_put_interface(tp
->intf
);
3256 case PM_POST_RESTORE
:
3257 case PM_RESTORE_PREPARE
:
3266 static int rtl8152_open(struct net_device
*netdev
)
3268 struct r8152
*tp
= netdev_priv(netdev
);
3271 res
= alloc_all_mem(tp
);
3275 res
= usb_autopm_get_interface(tp
->intf
);
3279 mutex_lock(&tp
->control
);
3283 netif_carrier_off(netdev
);
3284 netif_start_queue(netdev
);
3285 set_bit(WORK_ENABLE
, &tp
->flags
);
3287 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3290 netif_device_detach(tp
->netdev
);
3291 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3295 napi_enable(&tp
->napi
);
3297 mutex_unlock(&tp
->control
);
3299 usb_autopm_put_interface(tp
->intf
);
3300 #ifdef CONFIG_PM_SLEEP
3301 tp
->pm_notifier
.notifier_call
= rtl_notifier
;
3302 register_pm_notifier(&tp
->pm_notifier
);
3307 mutex_unlock(&tp
->control
);
3308 usb_autopm_put_interface(tp
->intf
);
3315 static int rtl8152_close(struct net_device
*netdev
)
3317 struct r8152
*tp
= netdev_priv(netdev
);
3320 #ifdef CONFIG_PM_SLEEP
3321 unregister_pm_notifier(&tp
->pm_notifier
);
3323 napi_disable(&tp
->napi
);
3324 clear_bit(WORK_ENABLE
, &tp
->flags
);
3325 usb_kill_urb(tp
->intr_urb
);
3326 cancel_delayed_work_sync(&tp
->schedule
);
3327 netif_stop_queue(netdev
);
3329 res
= usb_autopm_get_interface(tp
->intf
);
3330 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3331 rtl_drop_queued_tx(tp
);
3334 mutex_lock(&tp
->control
);
3336 tp
->rtl_ops
.down(tp
);
3338 mutex_unlock(&tp
->control
);
3340 usb_autopm_put_interface(tp
->intf
);
3348 static void rtl_tally_reset(struct r8152
*tp
)
3352 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3353 ocp_data
|= TALLY_RESET
;
3354 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3357 static void r8152b_init(struct r8152
*tp
)
3362 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3365 data
= r8152_mdio_read(tp
, MII_BMCR
);
3366 if (data
& BMCR_PDOWN
) {
3367 data
&= ~BMCR_PDOWN
;
3368 r8152_mdio_write(tp
, MII_BMCR
, data
);
3371 r8152_aldps_en(tp
, false);
3373 if (tp
->version
== RTL_VER_01
) {
3374 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3375 ocp_data
&= ~LED_MODE_MASK
;
3376 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3379 r8152_power_cut_en(tp
, false);
3381 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3382 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3383 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3384 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3385 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3386 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3387 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3388 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3389 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3390 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3392 rtl_tally_reset(tp
);
3394 /* enable rx aggregation */
3395 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3396 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
3397 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3400 static void r8153_init(struct r8152
*tp
)
3406 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3409 r8153_u1u2en(tp
, false);
3411 for (i
= 0; i
< 500; i
++) {
3412 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3418 for (i
= 0; i
< 500; i
++) {
3419 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3420 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3425 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
3426 tp
->version
== RTL_VER_05
)
3427 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
3429 data
= r8152_mdio_read(tp
, MII_BMCR
);
3430 if (data
& BMCR_PDOWN
) {
3431 data
&= ~BMCR_PDOWN
;
3432 r8152_mdio_write(tp
, MII_BMCR
, data
);
3435 for (i
= 0; i
< 500; i
++) {
3436 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3437 if (ocp_data
== PHY_STAT_LAN_ON
)
3442 usb_disable_lpm(tp
->udev
);
3443 r8153_u2p3en(tp
, false);
3445 if (tp
->version
== RTL_VER_04
) {
3446 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
3447 ocp_data
&= ~pwd_dn_scale_mask
;
3448 ocp_data
|= pwd_dn_scale(96);
3449 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
3451 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
3452 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
3453 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
3454 } else if (tp
->version
== RTL_VER_05
) {
3455 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
3456 ocp_data
&= ~ECM_ALDPS
;
3457 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
3459 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3460 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3461 ocp_data
&= ~DYNAMIC_BURST
;
3463 ocp_data
|= DYNAMIC_BURST
;
3464 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3465 } else if (tp
->version
== RTL_VER_06
) {
3466 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3467 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3468 ocp_data
&= ~DYNAMIC_BURST
;
3470 ocp_data
|= DYNAMIC_BURST
;
3471 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3474 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
3475 ocp_data
|= EP4_FULL_FC
;
3476 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
3478 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3479 ocp_data
&= ~TIMER11_EN
;
3480 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3482 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3483 ocp_data
&= ~LED_MODE_MASK
;
3484 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3486 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
3487 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
< USB_SPEED_SUPER
)
3488 ocp_data
|= LPM_TIMER_500MS
;
3490 ocp_data
|= LPM_TIMER_500US
;
3491 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3493 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3494 ocp_data
&= ~SEN_VAL_MASK
;
3495 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3496 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3498 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
3500 r8153_power_cut_en(tp
, false);
3501 r8153_u1u2en(tp
, true);
3503 /* MAC clock speed down */
3504 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, 0);
3505 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, 0);
3506 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, 0);
3507 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
, 0);
3509 rtl_tally_reset(tp
);
3510 r8153_u2p3en(tp
, true);
3513 static int rtl8152_pre_reset(struct usb_interface
*intf
)
3515 struct r8152
*tp
= usb_get_intfdata(intf
);
3516 struct net_device
*netdev
;
3521 netdev
= tp
->netdev
;
3522 if (!netif_running(netdev
))
3525 netif_stop_queue(netdev
);
3526 napi_disable(&tp
->napi
);
3527 clear_bit(WORK_ENABLE
, &tp
->flags
);
3528 usb_kill_urb(tp
->intr_urb
);
3529 cancel_delayed_work_sync(&tp
->schedule
);
3530 if (netif_carrier_ok(netdev
)) {
3531 mutex_lock(&tp
->control
);
3532 tp
->rtl_ops
.disable(tp
);
3533 mutex_unlock(&tp
->control
);
3539 static int rtl8152_post_reset(struct usb_interface
*intf
)
3541 struct r8152
*tp
= usb_get_intfdata(intf
);
3542 struct net_device
*netdev
;
3547 netdev
= tp
->netdev
;
3548 if (!netif_running(netdev
))
3551 set_bit(WORK_ENABLE
, &tp
->flags
);
3552 if (netif_carrier_ok(netdev
)) {
3553 mutex_lock(&tp
->control
);
3554 tp
->rtl_ops
.enable(tp
);
3556 rtl8152_set_rx_mode(netdev
);
3557 mutex_unlock(&tp
->control
);
3560 napi_enable(&tp
->napi
);
3561 netif_wake_queue(netdev
);
3562 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3564 if (!list_empty(&tp
->rx_done
))
3565 napi_schedule(&tp
->napi
);
3570 static bool delay_autosuspend(struct r8152
*tp
)
3572 bool sw_linking
= !!netif_carrier_ok(tp
->netdev
);
3573 bool hw_linking
= !!(rtl8152_get_speed(tp
) & LINK_STATUS
);
3575 /* This means a linking change occurs and the driver doesn't detect it,
3576 * yet. If the driver has disabled tx/rx and hw is linking on, the
3577 * device wouldn't wake up by receiving any packet.
3579 if (work_busy(&tp
->schedule
.work
) || sw_linking
!= hw_linking
)
3582 /* If the linking down is occurred by nway, the device may miss the
3583 * linking change event. And it wouldn't wake when linking on.
3585 if (!sw_linking
&& tp
->rtl_ops
.in_nway(tp
))
3587 else if (!skb_queue_empty(&tp
->tx_queue
))
3593 static int rtl8152_runtime_suspend(struct r8152
*tp
)
3595 struct net_device
*netdev
= tp
->netdev
;
3598 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3599 smp_mb__after_atomic();
3601 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3604 if (delay_autosuspend(tp
)) {
3605 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3606 smp_mb__after_atomic();
3611 if (netif_carrier_ok(netdev
)) {
3614 rcr
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
3615 ocp_data
= rcr
& ~RCR_ACPT_ALL
;
3616 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
3617 rxdy_gated_en(tp
, true);
3618 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
,
3620 if (!(ocp_data
& RXFIFO_EMPTY
)) {
3621 rxdy_gated_en(tp
, false);
3622 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
3623 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3624 smp_mb__after_atomic();
3630 clear_bit(WORK_ENABLE
, &tp
->flags
);
3631 usb_kill_urb(tp
->intr_urb
);
3633 tp
->rtl_ops
.autosuspend_en(tp
, true);
3635 if (netif_carrier_ok(netdev
)) {
3636 napi_disable(&tp
->napi
);
3638 rxdy_gated_en(tp
, false);
3639 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, rcr
);
3640 napi_enable(&tp
->napi
);
3648 static int rtl8152_system_suspend(struct r8152
*tp
)
3650 struct net_device
*netdev
= tp
->netdev
;
3653 netif_device_detach(netdev
);
3655 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3656 clear_bit(WORK_ENABLE
, &tp
->flags
);
3657 usb_kill_urb(tp
->intr_urb
);
3658 napi_disable(&tp
->napi
);
3659 cancel_delayed_work_sync(&tp
->schedule
);
3660 tp
->rtl_ops
.down(tp
);
3661 napi_enable(&tp
->napi
);
3667 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3669 struct r8152
*tp
= usb_get_intfdata(intf
);
3672 mutex_lock(&tp
->control
);
3674 if (PMSG_IS_AUTO(message
))
3675 ret
= rtl8152_runtime_suspend(tp
);
3677 ret
= rtl8152_system_suspend(tp
);
3679 mutex_unlock(&tp
->control
);
3684 static int rtl8152_resume(struct usb_interface
*intf
)
3686 struct r8152
*tp
= usb_get_intfdata(intf
);
3688 mutex_lock(&tp
->control
);
3690 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3691 tp
->rtl_ops
.init(tp
);
3692 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
3693 netif_device_attach(tp
->netdev
);
3696 if (netif_running(tp
->netdev
) && tp
->netdev
->flags
& IFF_UP
) {
3697 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3698 tp
->rtl_ops
.autosuspend_en(tp
, false);
3699 napi_disable(&tp
->napi
);
3700 set_bit(WORK_ENABLE
, &tp
->flags
);
3701 if (netif_carrier_ok(tp
->netdev
))
3703 napi_enable(&tp
->napi
);
3704 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3705 smp_mb__after_atomic();
3706 if (!list_empty(&tp
->rx_done
))
3707 napi_schedule(&tp
->napi
);
3710 netif_carrier_off(tp
->netdev
);
3711 set_bit(WORK_ENABLE
, &tp
->flags
);
3713 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3714 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3715 if (tp
->netdev
->flags
& IFF_UP
)
3716 tp
->rtl_ops
.autosuspend_en(tp
, false);
3717 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3720 mutex_unlock(&tp
->control
);
3725 static int rtl8152_reset_resume(struct usb_interface
*intf
)
3727 struct r8152
*tp
= usb_get_intfdata(intf
);
3729 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3730 return rtl8152_resume(intf
);
3733 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3735 struct r8152
*tp
= netdev_priv(dev
);
3737 if (usb_autopm_get_interface(tp
->intf
) < 0)
3740 if (!rtl_can_wakeup(tp
)) {
3744 mutex_lock(&tp
->control
);
3745 wol
->supported
= WAKE_ANY
;
3746 wol
->wolopts
= __rtl_get_wol(tp
);
3747 mutex_unlock(&tp
->control
);
3750 usb_autopm_put_interface(tp
->intf
);
3753 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3755 struct r8152
*tp
= netdev_priv(dev
);
3758 if (!rtl_can_wakeup(tp
))
3761 ret
= usb_autopm_get_interface(tp
->intf
);
3765 mutex_lock(&tp
->control
);
3767 __rtl_set_wol(tp
, wol
->wolopts
);
3768 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3770 mutex_unlock(&tp
->control
);
3772 usb_autopm_put_interface(tp
->intf
);
3778 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3780 struct r8152
*tp
= netdev_priv(dev
);
3782 return tp
->msg_enable
;
3785 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3787 struct r8152
*tp
= netdev_priv(dev
);
3789 tp
->msg_enable
= value
;
3792 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3793 struct ethtool_drvinfo
*info
)
3795 struct r8152
*tp
= netdev_priv(netdev
);
3797 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3798 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3799 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3803 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3805 struct r8152
*tp
= netdev_priv(netdev
);
3808 if (!tp
->mii
.mdio_read
)
3811 ret
= usb_autopm_get_interface(tp
->intf
);
3815 mutex_lock(&tp
->control
);
3817 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3819 mutex_unlock(&tp
->control
);
3821 usb_autopm_put_interface(tp
->intf
);
3827 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3829 struct r8152
*tp
= netdev_priv(dev
);
3832 ret
= usb_autopm_get_interface(tp
->intf
);
3836 mutex_lock(&tp
->control
);
3838 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3840 tp
->autoneg
= cmd
->autoneg
;
3841 tp
->speed
= cmd
->speed
;
3842 tp
->duplex
= cmd
->duplex
;
3845 mutex_unlock(&tp
->control
);
3847 usb_autopm_put_interface(tp
->intf
);
3853 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3860 "tx_single_collisions",
3861 "tx_multi_collisions",
3869 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3873 return ARRAY_SIZE(rtl8152_gstrings
);
3879 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3880 struct ethtool_stats
*stats
, u64
*data
)
3882 struct r8152
*tp
= netdev_priv(dev
);
3883 struct tally_counter tally
;
3885 if (usb_autopm_get_interface(tp
->intf
) < 0)
3888 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3890 usb_autopm_put_interface(tp
->intf
);
3892 data
[0] = le64_to_cpu(tally
.tx_packets
);
3893 data
[1] = le64_to_cpu(tally
.rx_packets
);
3894 data
[2] = le64_to_cpu(tally
.tx_errors
);
3895 data
[3] = le32_to_cpu(tally
.rx_errors
);
3896 data
[4] = le16_to_cpu(tally
.rx_missed
);
3897 data
[5] = le16_to_cpu(tally
.align_errors
);
3898 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3899 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3900 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3901 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3902 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3903 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3904 data
[12] = le16_to_cpu(tally
.tx_underrun
);
3907 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3909 switch (stringset
) {
3911 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3916 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3918 u32 ocp_data
, lp
, adv
, supported
= 0;
3921 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3922 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3924 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3925 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3927 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3928 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3930 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3931 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3933 eee
->eee_enabled
= !!ocp_data
;
3934 eee
->eee_active
= !!(supported
& adv
& lp
);
3935 eee
->supported
= supported
;
3936 eee
->advertised
= adv
;
3937 eee
->lp_advertised
= lp
;
3942 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3944 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3946 r8152_eee_en(tp
, eee
->eee_enabled
);
3948 if (!eee
->eee_enabled
)
3951 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3956 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3958 u32 ocp_data
, lp
, adv
, supported
= 0;
3961 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3962 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3964 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3965 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3967 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3968 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3970 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3971 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3973 eee
->eee_enabled
= !!ocp_data
;
3974 eee
->eee_active
= !!(supported
& adv
& lp
);
3975 eee
->supported
= supported
;
3976 eee
->advertised
= adv
;
3977 eee
->lp_advertised
= lp
;
3982 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3984 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3986 r8153_eee_en(tp
, eee
->eee_enabled
);
3988 if (!eee
->eee_enabled
)
3991 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3997 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3999 struct r8152
*tp
= netdev_priv(net
);
4002 ret
= usb_autopm_get_interface(tp
->intf
);
4006 mutex_lock(&tp
->control
);
4008 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
4010 mutex_unlock(&tp
->control
);
4012 usb_autopm_put_interface(tp
->intf
);
4019 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
4021 struct r8152
*tp
= netdev_priv(net
);
4024 ret
= usb_autopm_get_interface(tp
->intf
);
4028 mutex_lock(&tp
->control
);
4030 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
4032 ret
= mii_nway_restart(&tp
->mii
);
4034 mutex_unlock(&tp
->control
);
4036 usb_autopm_put_interface(tp
->intf
);
4042 static int rtl8152_nway_reset(struct net_device
*dev
)
4044 struct r8152
*tp
= netdev_priv(dev
);
4047 ret
= usb_autopm_get_interface(tp
->intf
);
4051 mutex_lock(&tp
->control
);
4053 ret
= mii_nway_restart(&tp
->mii
);
4055 mutex_unlock(&tp
->control
);
4057 usb_autopm_put_interface(tp
->intf
);
4063 static int rtl8152_get_coalesce(struct net_device
*netdev
,
4064 struct ethtool_coalesce
*coalesce
)
4066 struct r8152
*tp
= netdev_priv(netdev
);
4068 switch (tp
->version
) {
4076 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
4081 static int rtl8152_set_coalesce(struct net_device
*netdev
,
4082 struct ethtool_coalesce
*coalesce
)
4084 struct r8152
*tp
= netdev_priv(netdev
);
4087 switch (tp
->version
) {
4095 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
4098 ret
= usb_autopm_get_interface(tp
->intf
);
4102 mutex_lock(&tp
->control
);
4104 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
4105 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
4107 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
4108 r8153_set_rx_early_timeout(tp
);
4111 mutex_unlock(&tp
->control
);
4113 usb_autopm_put_interface(tp
->intf
);
4118 static const struct ethtool_ops ops
= {
4119 .get_drvinfo
= rtl8152_get_drvinfo
,
4120 .get_settings
= rtl8152_get_settings
,
4121 .set_settings
= rtl8152_set_settings
,
4122 .get_link
= ethtool_op_get_link
,
4123 .nway_reset
= rtl8152_nway_reset
,
4124 .get_msglevel
= rtl8152_get_msglevel
,
4125 .set_msglevel
= rtl8152_set_msglevel
,
4126 .get_wol
= rtl8152_get_wol
,
4127 .set_wol
= rtl8152_set_wol
,
4128 .get_strings
= rtl8152_get_strings
,
4129 .get_sset_count
= rtl8152_get_sset_count
,
4130 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
4131 .get_coalesce
= rtl8152_get_coalesce
,
4132 .set_coalesce
= rtl8152_set_coalesce
,
4133 .get_eee
= rtl_ethtool_get_eee
,
4134 .set_eee
= rtl_ethtool_set_eee
,
4137 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
4139 struct r8152
*tp
= netdev_priv(netdev
);
4140 struct mii_ioctl_data
*data
= if_mii(rq
);
4143 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4146 res
= usb_autopm_get_interface(tp
->intf
);
4152 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
4156 mutex_lock(&tp
->control
);
4157 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
4158 mutex_unlock(&tp
->control
);
4162 if (!capable(CAP_NET_ADMIN
)) {
4166 mutex_lock(&tp
->control
);
4167 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
4168 mutex_unlock(&tp
->control
);
4175 usb_autopm_put_interface(tp
->intf
);
4181 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
4183 struct r8152
*tp
= netdev_priv(dev
);
4186 switch (tp
->version
) {
4195 ret
= usb_autopm_get_interface(tp
->intf
);
4199 mutex_lock(&tp
->control
);
4203 if (netif_running(dev
) && netif_carrier_ok(dev
))
4204 r8153_set_rx_early_size(tp
);
4206 mutex_unlock(&tp
->control
);
4208 usb_autopm_put_interface(tp
->intf
);
4213 static const struct net_device_ops rtl8152_netdev_ops
= {
4214 .ndo_open
= rtl8152_open
,
4215 .ndo_stop
= rtl8152_close
,
4216 .ndo_do_ioctl
= rtl8152_ioctl
,
4217 .ndo_start_xmit
= rtl8152_start_xmit
,
4218 .ndo_tx_timeout
= rtl8152_tx_timeout
,
4219 .ndo_set_features
= rtl8152_set_features
,
4220 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
4221 .ndo_set_mac_address
= rtl8152_set_mac_address
,
4222 .ndo_change_mtu
= rtl8152_change_mtu
,
4223 .ndo_validate_addr
= eth_validate_addr
,
4224 .ndo_features_check
= rtl8152_features_check
,
4227 static void r8152b_get_version(struct r8152
*tp
)
4232 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
4233 version
= (u16
)(ocp_data
& VERSION_MASK
);
4237 tp
->version
= RTL_VER_01
;
4240 tp
->version
= RTL_VER_02
;
4243 tp
->version
= RTL_VER_03
;
4244 tp
->mii
.supports_gmii
= 1;
4247 tp
->version
= RTL_VER_04
;
4248 tp
->mii
.supports_gmii
= 1;
4251 tp
->version
= RTL_VER_05
;
4252 tp
->mii
.supports_gmii
= 1;
4255 tp
->version
= RTL_VER_06
;
4256 tp
->mii
.supports_gmii
= 1;
4259 netif_info(tp
, probe
, tp
->netdev
,
4260 "Unknown version 0x%04x\n", version
);
4265 static void rtl8152_unload(struct r8152
*tp
)
4267 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4270 if (tp
->version
!= RTL_VER_01
)
4271 r8152_power_cut_en(tp
, true);
4274 static void rtl8153_unload(struct r8152
*tp
)
4276 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4279 r8153_power_cut_en(tp
, false);
4282 static int rtl_ops_init(struct r8152
*tp
)
4284 struct rtl_ops
*ops
= &tp
->rtl_ops
;
4287 switch (tp
->version
) {
4290 ops
->init
= r8152b_init
;
4291 ops
->enable
= rtl8152_enable
;
4292 ops
->disable
= rtl8152_disable
;
4293 ops
->up
= rtl8152_up
;
4294 ops
->down
= rtl8152_down
;
4295 ops
->unload
= rtl8152_unload
;
4296 ops
->eee_get
= r8152_get_eee
;
4297 ops
->eee_set
= r8152_set_eee
;
4298 ops
->in_nway
= rtl8152_in_nway
;
4299 ops
->hw_phy_cfg
= r8152b_hw_phy_cfg
;
4300 ops
->autosuspend_en
= rtl_runtime_suspend_enable
;
4307 ops
->init
= r8153_init
;
4308 ops
->enable
= rtl8153_enable
;
4309 ops
->disable
= rtl8153_disable
;
4310 ops
->up
= rtl8153_up
;
4311 ops
->down
= rtl8153_down
;
4312 ops
->unload
= rtl8153_unload
;
4313 ops
->eee_get
= r8153_get_eee
;
4314 ops
->eee_set
= r8153_set_eee
;
4315 ops
->in_nway
= rtl8153_in_nway
;
4316 ops
->hw_phy_cfg
= r8153_hw_phy_cfg
;
4317 ops
->autosuspend_en
= rtl8153_runtime_enable
;
4322 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
4329 static int rtl8152_probe(struct usb_interface
*intf
,
4330 const struct usb_device_id
*id
)
4332 struct usb_device
*udev
= interface_to_usbdev(intf
);
4334 struct net_device
*netdev
;
4337 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
4338 usb_driver_set_configuration(udev
, 1);
4342 usb_reset_device(udev
);
4343 netdev
= alloc_etherdev(sizeof(struct r8152
));
4345 dev_err(&intf
->dev
, "Out of memory\n");
4349 SET_NETDEV_DEV(netdev
, &intf
->dev
);
4350 tp
= netdev_priv(netdev
);
4351 tp
->msg_enable
= 0x7FFF;
4354 tp
->netdev
= netdev
;
4357 r8152b_get_version(tp
);
4358 ret
= rtl_ops_init(tp
);
4362 mutex_init(&tp
->control
);
4363 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
4364 INIT_DELAYED_WORK(&tp
->hw_phy_work
, rtl_hw_phy_work_func_t
);
4366 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
4367 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
4369 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4370 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
4371 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
4372 NETIF_F_HW_VLAN_CTAG_TX
;
4373 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4374 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
4375 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
4376 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
4377 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
4378 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
4379 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
4381 if (tp
->version
== RTL_VER_01
) {
4382 netdev
->features
&= ~NETIF_F_RXCSUM
;
4383 netdev
->hw_features
&= ~NETIF_F_RXCSUM
;
4386 netdev
->ethtool_ops
= &ops
;
4387 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
4389 /* MTU range: 68 - 1500 or 9194 */
4390 netdev
->min_mtu
= ETH_MIN_MTU
;
4391 switch (tp
->version
) {
4394 netdev
->max_mtu
= ETH_DATA_LEN
;
4397 netdev
->max_mtu
= RTL8153_MAX_MTU
;
4401 tp
->mii
.dev
= netdev
;
4402 tp
->mii
.mdio_read
= read_mii_word
;
4403 tp
->mii
.mdio_write
= write_mii_word
;
4404 tp
->mii
.phy_id_mask
= 0x3f;
4405 tp
->mii
.reg_num_mask
= 0x1f;
4406 tp
->mii
.phy_id
= R8152_PHY_ID
;
4408 switch (udev
->speed
) {
4409 case USB_SPEED_SUPER
:
4410 case USB_SPEED_SUPER_PLUS
:
4411 tp
->coalesce
= COALESCE_SUPER
;
4413 case USB_SPEED_HIGH
:
4414 tp
->coalesce
= COALESCE_HIGH
;
4417 tp
->coalesce
= COALESCE_SLOW
;
4421 tp
->autoneg
= AUTONEG_ENABLE
;
4422 tp
->speed
= tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
;
4423 tp
->duplex
= DUPLEX_FULL
;
4425 intf
->needs_remote_wakeup
= 1;
4427 tp
->rtl_ops
.init(tp
);
4428 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
4429 set_ethernet_addr(tp
);
4431 usb_set_intfdata(intf
, tp
);
4432 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
4434 ret
= register_netdev(netdev
);
4436 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
4440 if (!rtl_can_wakeup(tp
))
4441 __rtl_set_wol(tp
, 0);
4443 tp
->saved_wolopts
= __rtl_get_wol(tp
);
4444 if (tp
->saved_wolopts
)
4445 device_set_wakeup_enable(&udev
->dev
, true);
4447 device_set_wakeup_enable(&udev
->dev
, false);
4449 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
4454 netif_napi_del(&tp
->napi
);
4455 usb_set_intfdata(intf
, NULL
);
4457 free_netdev(netdev
);
4461 static void rtl8152_disconnect(struct usb_interface
*intf
)
4463 struct r8152
*tp
= usb_get_intfdata(intf
);
4465 usb_set_intfdata(intf
, NULL
);
4467 struct usb_device
*udev
= tp
->udev
;
4469 if (udev
->state
== USB_STATE_NOTATTACHED
)
4470 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
4472 netif_napi_del(&tp
->napi
);
4473 unregister_netdev(tp
->netdev
);
4474 cancel_delayed_work_sync(&tp
->hw_phy_work
);
4475 tp
->rtl_ops
.unload(tp
);
4476 free_netdev(tp
->netdev
);
4480 #define REALTEK_USB_DEVICE(vend, prod) \
4481 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4482 USB_DEVICE_ID_MATCH_INT_CLASS, \
4483 .idVendor = (vend), \
4484 .idProduct = (prod), \
4485 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4488 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4489 USB_DEVICE_ID_MATCH_DEVICE, \
4490 .idVendor = (vend), \
4491 .idProduct = (prod), \
4492 .bInterfaceClass = USB_CLASS_COMM, \
4493 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4494 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4496 /* table of devices that work with this driver */
4497 static struct usb_device_id rtl8152_table
[] = {
4498 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
4499 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
4500 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
4501 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
4502 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3062)},
4503 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x3069)},
4504 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
4505 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x720c)},
4506 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7214)},
4507 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
4511 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
4513 static struct usb_driver rtl8152_driver
= {
4515 .id_table
= rtl8152_table
,
4516 .probe
= rtl8152_probe
,
4517 .disconnect
= rtl8152_disconnect
,
4518 .suspend
= rtl8152_suspend
,
4519 .resume
= rtl8152_resume
,
4520 .reset_resume
= rtl8152_reset_resume
,
4521 .pre_reset
= rtl8152_pre_reset
,
4522 .post_reset
= rtl8152_post_reset
,
4523 .supports_autosuspend
= 1,
4524 .disable_hub_initiated_lpm
= 1,
4527 module_usb_driver(rtl8152_driver
);
4529 MODULE_AUTHOR(DRIVER_AUTHOR
);
4530 MODULE_DESCRIPTION(DRIVER_DESC
);
4531 MODULE_LICENSE("GPL");
4532 MODULE_VERSION(DRIVER_VERSION
);