drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2017 Intel Deutschland GmbH
   9  * Copyright(c) 2018 Intel Corporation
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of version 2 of the GNU General Public License as
  13  * published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * BSD LICENSE
  21  *
  22  * Copyright(c) 2017 Intel Deutschland GmbH
  23  * Copyright(c) 2018 Intel Corporation
  24  * All rights reserved.
  25  *
  26  * Redistribution and use in source and binary forms, with or without
  27  * modification, are permitted provided that the following conditions
  28  * are met:
  29  *
  30  *  * Redistributions of source code must retain the above copyright
  31  *    notice, this list of conditions and the following disclaimer.
  32  *  * Redistributions in binary form must reproduce the above copyright
  33  *    notice, this list of conditions and the following disclaimer in
  34  *    the documentation and/or other materials provided with the
  35  *    distribution.
  36  *  * Neither the name Intel Corporation nor the names of its
  37  *    contributors may be used to endorse or promote products derived
  38  *    from this software without specific prior written permission.
  39  *
  40  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  41  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  42  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  43  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  44  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  45  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  46  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  47  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  48  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  49  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  50  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  51  *
  52  *****************************************************************************/
  53 #include "iwl-trans.h"
  54 #include "iwl-prph.h"
  55 #include "iwl-context-info.h"
  56 #include "iwl-context-info-gen3.h"
  57 #include "internal.h"
  58 #include "fw/dbg.h"
  59
  60 /*
  61  * Start up NIC's basic functionality after it has been reset
  62  * (e.g. after platform boot, or shutdown via iwl_pcie_apm_stop())
  63  * NOTE:  This does not load uCode nor start the embedded processor
  64  */
  65 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
  66 {
  67         int ret = 0;
  68
  69         IWL_DEBUG_INFO(trans, "Init card's basic functions\n");
  70
  71         /*
  72          * Use "set_bit" below rather than "write", to preserve any hardware
  73          * bits already set by default after reset.
  74          */
  75
  76         /*
  77          * Disable L0s without affecting L1;
  78          * don't wait for ICH L0s (ICH bug W/A)
  79          */
  80         iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS,
  81                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  82
  83         /* Set FH wait threshold to maximum (HW error during stress W/A) */
  84         iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  85
  86         /*
  87          * Enable HAP INTA (interrupt from management bus) to
  88          * wake device's PCI Express link L1a -> L0s
  89          */
  90         iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
  91                     CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  92
  93         iwl_pcie_apm_config(trans);
  94
  95         ret = iwl_finish_nic_init(trans);
  96         if (ret)
  97                 return ret;
  98
  99         set_bit(STATUS_DEVICE_ENABLED, &trans->status);
 100
 101         return 0;
 102 }
 103
 104 static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
 105 {
 106         IWL_DEBUG_INFO(trans, "Stop card, put in low power state\n");
 107
 108         if (op_mode_leave) {
 109                 if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status))
 110                         iwl_pcie_gen2_apm_init(trans);
 111
 112                 /* inform ME that we are leaving */
 113                 iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
 114                             CSR_RESET_LINK_PWR_MGMT_DISABLED);
 115                 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
 116                             CSR_HW_IF_CONFIG_REG_PREPARE |
 117                             CSR_HW_IF_CONFIG_REG_ENABLE_PME);
 118                 mdelay(1);
 119                 iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
 120                               CSR_RESET_LINK_PWR_MGMT_DISABLED);
 121                 mdelay(5);
 122         }
 123
 124         clear_bit(STATUS_DEVICE_ENABLED, &trans->status);
 125
 126         /* Stop device's DMA activity */
 127         iwl_pcie_apm_stop_master(trans);
 128
 129         iwl_trans_sw_reset(trans);
 130
 131         /*
 132          * Clear "initialization complete" bit to move adapter from
 133          * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
 134          */
 135         iwl_clear_bit(trans, CSR_GP_CNTRL,
 136                       BIT(trans->cfg->csr->flag_init_done));
 137 }
 138
 139 void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power)
 140 {
 141         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 142
 143         lockdep_assert_held(&trans_pcie->mutex);
 144
 145         if (trans_pcie->is_down)
 146                 return;
 147
 148         trans_pcie->is_down = true;
 149
 150         /* Stop dbgc before stopping device */
 151         _iwl_fw_dbg_stop_recording(trans, NULL);
 152
 153         /* tell the device to stop sending interrupts */
 154         iwl_disable_interrupts(trans);
 155
 156         /* device going down, Stop using ICT table */
 157         iwl_pcie_disable_ict(trans);
 158
 159         /*
 160          * If a HW restart happens during firmware loading,
 161          * then the firmware loading might call this function
 162          * and later it might be called again due to the
 163          * restart. So don't process again if the device is
 164          * already dead.
 165          */
 166         if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) {
 167                 IWL_DEBUG_INFO(trans,
 168                                "DEVICE_ENABLED bit was set and is now cleared\n");
 169                 iwl_pcie_gen2_tx_stop(trans);
 170                 iwl_pcie_rx_stop(trans);
 171         }
 172
 173         iwl_pcie_ctxt_info_free_paging(trans);
 174         if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560)
 175                 iwl_pcie_ctxt_info_gen3_free(trans);
 176         else
 177                 iwl_pcie_ctxt_info_free(trans);
 178
 179         /* Make sure (redundant) we've released our request to stay awake */
 180         iwl_clear_bit(trans, CSR_GP_CNTRL,
 181                       BIT(trans->cfg->csr->flag_mac_access_req));
 182
 183         /* Stop the device, and put it in low power state */
 184         iwl_pcie_gen2_apm_stop(trans, false);
 185
 186         iwl_trans_sw_reset(trans);
 187
 188         /*
 189          * Upon stop, the IVAR table gets erased, so msi-x won't
 190          * work. This causes a bug in RF-KILL flows, since the interrupt
 191          * that enables radio won't fire on the correct irq, and the
 192          * driver won't be able to handle the interrupt.
 193          * Configure the IVAR table again after reset.
 194          */
 195         iwl_pcie_conf_msix_hw(trans_pcie);
 196
 197         /*
 198          * Upon stop, the APM issues an interrupt if HW RF kill is set.
 199          * This is a bug in certain verions of the hardware.
 200          * Certain devices also keep sending HW RF kill interrupt all
 201          * the time, unless the interrupt is ACKed even if the interrupt
 202          * should be masked. Re-ACK all the interrupts here.
 203          */
 204         iwl_disable_interrupts(trans);
 205
 206         /* clear all status bits */
 207         clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);
 208         clear_bit(STATUS_INT_ENABLED, &trans->status);
 209         clear_bit(STATUS_TPOWER_PMI, &trans->status);
 210
 211         /*
 212          * Even if we stop the HW, we still want the RF kill
 213          * interrupt
 214          */
 215         iwl_enable_rfkill_int(trans);
 216
 217         /* re-take ownership to prevent other users from stealing the device */
 218         iwl_pcie_prepare_card_hw(trans);
 219 }
 220
 221 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power)
 222 {
 223         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 224         bool was_in_rfkill;
 225
 226         mutex_lock(&trans_pcie->mutex);
 227         trans_pcie->opmode_down = true;
 228         was_in_rfkill = test_bit(STATUS_RFKILL_OPMODE, &trans->status);
 229         _iwl_trans_pcie_gen2_stop_device(trans, low_power);
 230         iwl_trans_pcie_handle_stop_rfkill(trans, was_in_rfkill);
 231         mutex_unlock(&trans_pcie->mutex);
 232 }
 233
 234 static int iwl_pcie_gen2_nic_init(struct iwl_trans *trans)
 235 {
 236         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 237         int queue_size = max_t(u32, TFD_CMD_SLOTS, trans->cfg->min_txq_size);
 238
 239         /* TODO: most of the logic can be removed in A0 - but not in Z0 */
 240         spin_lock(&trans_pcie->irq_lock);
 241         iwl_pcie_gen2_apm_init(trans);
 242         spin_unlock(&trans_pcie->irq_lock);
 243
 244         iwl_op_mode_nic_config(trans->op_mode);
 245
 246         /* Allocate the RX queue, or reset if it is already allocated */
 247         if (iwl_pcie_gen2_rx_init(trans))
 248                 return -ENOMEM;
 249
 250         /* Allocate or reset and init all Tx and Command queues */
 251         if (iwl_pcie_gen2_tx_init(trans, trans_pcie->cmd_queue, queue_size))
 252                 return -ENOMEM;
 253
 254         /* enable shadow regs in HW */
 255         iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF);
 256         IWL_DEBUG_INFO(trans, "Enabling shadow registers in device\n");
 257
 258         return 0;
 259 }
 260
 261 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans, u32 scd_addr)
 262 {
 263         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 264
 265         iwl_pcie_reset_ict(trans);
 266
 267         /* make sure all queue are not stopped/used */
 268         memset(trans_pcie->queue_stopped, 0, sizeof(trans_pcie->queue_stopped));
 269         memset(trans_pcie->queue_used, 0, sizeof(trans_pcie->queue_used));
 270
 271         /* now that we got alive we can free the fw image & the context info.
 272          * paging memory cannot be freed included since FW will still use it
 273          */
 274         iwl_pcie_ctxt_info_free(trans);
 275
 276         /*
 277          * Re-enable all the interrupts, including the RF-Kill one, now that
 278          * the firmware is alive.
 279          */
 280         iwl_enable_interrupts(trans);
 281         mutex_lock(&trans_pcie->mutex);
 282         iwl_pcie_check_hw_rf_kill(trans);
 283         mutex_unlock(&trans_pcie->mutex);
 284 }
 285
 286 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
 287                                  const struct fw_img *fw, bool run_in_rfkill)
 288 {
 289         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 290         bool hw_rfkill;
 291         int ret;
 292
 293         /* This may fail if AMT took ownership of the device */
 294         if (iwl_pcie_prepare_card_hw(trans)) {
 295                 IWL_WARN(trans, "Exit HW not ready\n");
 296                 ret = -EIO;
 297                 goto out;
 298         }
 299
 300         iwl_enable_rfkill_int(trans);
 301
 302         iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
 303
 304         /*
 305          * We enabled the RF-Kill interrupt and the handler may very
 306          * well be running. Disable the interrupts to make sure no other
 307          * interrupt can be fired.
 308          */
 309         iwl_disable_interrupts(trans);
 310
 311         /* Make sure it finished running */
 312         iwl_pcie_synchronize_irqs(trans);
 313
 314         mutex_lock(&trans_pcie->mutex);
 315
 316         /* If platform's RF_KILL switch is NOT set to KILL */
 317         hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);
 318         if (hw_rfkill && !run_in_rfkill) {
 319                 ret = -ERFKILL;
 320                 goto out;
 321         }
 322
 323         /* Someone called stop_device, don't try to start_fw */
 324         if (trans_pcie->is_down) {
 325                 IWL_WARN(trans,
 326                          "Can't start_fw since the HW hasn't been started\n");
 327                 ret = -EIO;
 328                 goto out;
 329         }
 330
 331         /* make sure rfkill handshake bits are cleared */
 332         iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
 333         iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,
 334                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 335
 336         /* clear (again), then enable host interrupts */
 337         iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
 338
 339         ret = iwl_pcie_gen2_nic_init(trans);
 340         if (ret) {
 341                 IWL_ERR(trans, "Unable to init nic\n");
 342                 goto out;
 343         }
 344
 345         if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560)
 346                 ret = iwl_pcie_ctxt_info_gen3_init(trans, fw);
 347         else
 348                 ret = iwl_pcie_ctxt_info_init(trans, fw);
 349         if (ret)
 350                 goto out;
 351
 352         /* re-check RF-Kill state since we may have missed the interrupt */
 353         hw_rfkill = iwl_pcie_check_hw_rf_kill(trans);
 354         if (hw_rfkill && !run_in_rfkill)
 355                 ret = -ERFKILL;
 356
 357 out:
 358         mutex_unlock(&trans_pcie->mutex);
 359         return ret;
 360 }