drivers/net/wireless/mediatek/mt76/mt76.h

   1 /*
   2  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef __MT76_H
  18 #define __MT76_H
  19
  20 #include <linux/kernel.h>
  21 #include <linux/io.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/skbuff.h>
  24 #include <linux/leds.h>
  25 #include <linux/usb.h>
  26 #include <net/mac80211.h>
  27 #include "util.h"
  28
  29 #define MT_TX_RING_SIZE     256
  30 #define MT_MCU_RING_SIZE    32
  31 #define MT_RX_BUF_SIZE      2048
  32
  33 struct mt76_dev;
  34 struct mt76_wcid;
  35
  36 struct mt76_reg_pair {
  37         u32 reg;
  38         u32 value;
  39 };
  40
  41 enum mt76_bus_type {
  42         MT76_BUS_MMIO,
  43         MT76_BUS_USB,
  44 };
  45
  46 struct mt76_bus_ops {
  47         u32 (*rr)(struct mt76_dev *dev, u32 offset);
  48         void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
  49         u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
  50         void (*copy)(struct mt76_dev *dev, u32 offset, const void *data,
  51                      int len);
  52         int (*wr_rp)(struct mt76_dev *dev, u32 base,
  53                      const struct mt76_reg_pair *rp, int len);
  54         int (*rd_rp)(struct mt76_dev *dev, u32 base,
  55                      struct mt76_reg_pair *rp, int len);
  56         enum mt76_bus_type type;
  57 };
  58
  59 #define mt76_is_usb(dev) ((dev)->mt76.bus->type == MT76_BUS_USB)
  60 #define mt76_is_mmio(dev) ((dev)->mt76.bus->type == MT76_BUS_MMIO)
  61
  62 enum mt76_txq_id {
  63         MT_TXQ_VO = IEEE80211_AC_VO,
  64         MT_TXQ_VI = IEEE80211_AC_VI,
  65         MT_TXQ_BE = IEEE80211_AC_BE,
  66         MT_TXQ_BK = IEEE80211_AC_BK,
  67         MT_TXQ_PSD,
  68         MT_TXQ_MCU,
  69         MT_TXQ_BEACON,
  70         MT_TXQ_CAB,
  71         __MT_TXQ_MAX
  72 };
  73
  74 enum mt76_rxq_id {
  75         MT_RXQ_MAIN,
  76         MT_RXQ_MCU,
  77         __MT_RXQ_MAX
  78 };
  79
  80 struct mt76_queue_buf {
  81         dma_addr_t addr;
  82         int len;
  83 };
  84
  85 struct mt76u_buf {
  86         struct mt76_dev *dev;
  87         struct urb *urb;
  88         size_t len;
  89         bool done;
  90 };
  91
  92 struct mt76_queue_entry {
  93         union {
  94                 void *buf;
  95                 struct sk_buff *skb;
  96         };
  97         union {
  98                 struct mt76_txwi_cache *txwi;
  99                 struct mt76u_buf ubuf;
 100         };
 101         bool schedule;
 102 };
 103
 104 struct mt76_queue_regs {
 105         u32 desc_base;
 106         u32 ring_size;
 107         u32 cpu_idx;
 108         u32 dma_idx;
 109 } __packed __aligned(4);
 110
 111 struct mt76_queue {
 112         struct mt76_queue_regs __iomem *regs;
 113
 114         spinlock_t lock;
 115         struct mt76_queue_entry *entry;
 116         struct mt76_desc *desc;
 117
 118         struct list_head swq;
 119         int swq_queued;
 120
 121         u16 first;
 122         u16 head;
 123         u16 tail;
 124         int ndesc;
 125         int queued;
 126         int buf_size;
 127
 128         u8 buf_offset;
 129         u8 hw_idx;
 130
 131         dma_addr_t desc_dma;
 132         struct sk_buff *rx_head;
 133         struct page_frag_cache rx_page;
 134         spinlock_t rx_page_lock;
 135 };
 136
 137 struct mt76_mcu_ops {
 138         int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data,
 139                             int len, bool wait_resp);
 140         int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base,
 141                          const struct mt76_reg_pair *rp, int len);
 142         int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base,
 143                          struct mt76_reg_pair *rp, int len);
 144 };
 145
 146 struct mt76_queue_ops {
 147         int (*init)(struct mt76_dev *dev);
 148
 149         int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q);
 150
 151         int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q,
 152                        struct mt76_queue_buf *buf, int nbufs, u32 info,
 153                        struct sk_buff *skb, void *txwi);
 154
 155         int (*tx_queue_skb)(struct mt76_dev *dev, struct mt76_queue *q,
 156                             struct sk_buff *skb, struct mt76_wcid *wcid,
 157                             struct ieee80211_sta *sta);
 158
 159         void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush,
 160                          int *len, u32 *info, bool *more);
 161
 162         void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
 163
 164         void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
 165                            bool flush);
 166
 167         void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
 168 };
 169
 170 enum mt76_wcid_flags {
 171         MT_WCID_FLAG_CHECK_PS,
 172         MT_WCID_FLAG_PS,
 173 };
 174
 175 #define MT76_N_WCIDS 128
 176
 177 struct mt76_wcid {
 178         struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
 179
 180         struct work_struct aggr_work;
 181
 182         unsigned long flags;
 183
 184         u8 idx;
 185         u8 hw_key_idx;
 186
 187         u8 sta:1;
 188
 189         u8 rx_check_pn;
 190         u8 rx_key_pn[IEEE80211_NUM_TIDS][6];
 191
 192         __le16 tx_rate;
 193         bool tx_rate_set;
 194         u8 tx_rate_nss;
 195         s8 max_txpwr_adj;
 196         bool sw_iv;
 197
 198         u8 packet_id;
 199 };
 200
 201 struct mt76_txq {
 202         struct list_head list;
 203         struct mt76_queue *hwq;
 204         struct mt76_wcid *wcid;
 205
 206         struct sk_buff_head retry_q;
 207
 208         u16 agg_ssn;
 209         bool send_bar;
 210         bool aggr;
 211 };
 212
 213 struct mt76_txwi_cache {
 214         u32 txwi[8];
 215         dma_addr_t dma_addr;
 216         struct list_head list;
 217 };
 218
 219
 220 struct mt76_rx_tid {
 221         struct rcu_head rcu_head;
 222
 223         struct mt76_dev *dev;
 224
 225         spinlock_t lock;
 226         struct delayed_work reorder_work;
 227
 228         u16 head;
 229         u8 size;
 230         u8 nframes;
 231
 232         u8 started:1, stopped:1, timer_pending:1;
 233
 234         struct sk_buff *reorder_buf[];
 235 };
 236
 237 #define MT_TX_CB_DMA_DONE               BIT(0)
 238 #define MT_TX_CB_TXS_DONE               BIT(1)
 239 #define MT_TX_CB_TXS_FAILED             BIT(2)
 240
 241 #define MT_PACKET_ID_MASK               GENMASK(7, 0)
 242 #define MT_PACKET_ID_NO_ACK             MT_PACKET_ID_MASK
 243
 244 #define MT_TX_STATUS_SKB_TIMEOUT        HZ
 245
 246 struct mt76_tx_cb {
 247         unsigned long jiffies;
 248         u8 wcid;
 249         u8 pktid;
 250         u8 flags;
 251 };
 252
 253 enum {
 254         MT76_STATE_INITIALIZED,
 255         MT76_STATE_RUNNING,
 256         MT76_STATE_MCU_RUNNING,
 257         MT76_SCANNING,
 258         MT76_RESET,
 259         MT76_OFFCHANNEL,
 260         MT76_REMOVED,
 261         MT76_READING_STATS,
 262 };
 263
 264 struct mt76_hw_cap {
 265         bool has_2ghz;
 266         bool has_5ghz;
 267 };
 268
 269 struct mt76_driver_ops {
 270         u16 txwi_size;
 271
 272         void (*update_survey)(struct mt76_dev *dev);
 273
 274         int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr,
 275                               struct sk_buff *skb, struct mt76_queue *q,
 276                               struct mt76_wcid *wcid,
 277                               struct ieee80211_sta *sta, u32 *tx_info);
 278
 279         void (*tx_complete_skb)(struct mt76_dev *dev, struct mt76_queue *q,
 280                                 struct mt76_queue_entry *e, bool flush);
 281
 282         bool (*tx_status_data)(struct mt76_dev *dev, u8 *update);
 283
 284         void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q,
 285                        struct sk_buff *skb);
 286
 287         void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
 288
 289         void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
 290                        bool ps);
 291 };
 292
 293 struct mt76_channel_state {
 294         u64 cc_active;
 295         u64 cc_busy;
 296 };
 297
 298 struct mt76_sband {
 299         struct ieee80211_supported_band sband;
 300         struct mt76_channel_state *chan;
 301 };
 302
 303 struct mt76_rate_power {
 304         union {
 305                 struct {
 306                         s8 cck[4];
 307                         s8 ofdm[8];
 308                         s8 stbc[10];
 309                         s8 ht[16];
 310                         s8 vht[10];
 311                 };
 312                 s8 all[48];
 313         };
 314 };
 315
 316 /* addr req mask */
 317 #define MT_VEND_TYPE_EEPROM     BIT(31)
 318 #define MT_VEND_TYPE_CFG        BIT(30)
 319 #define MT_VEND_TYPE_MASK       (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG)
 320
 321 #define MT_VEND_ADDR(type, n)   (MT_VEND_TYPE_##type | (n))
 322 enum mt_vendor_req {
 323         MT_VEND_DEV_MODE =      0x1,
 324         MT_VEND_WRITE =         0x2,
 325         MT_VEND_MULTI_WRITE =   0x6,
 326         MT_VEND_MULTI_READ =    0x7,
 327         MT_VEND_READ_EEPROM =   0x9,
 328         MT_VEND_WRITE_FCE =     0x42,
 329         MT_VEND_WRITE_CFG =     0x46,
 330         MT_VEND_READ_CFG =      0x47,
 331 };
 332
 333 enum mt76u_in_ep {
 334         MT_EP_IN_PKT_RX,
 335         MT_EP_IN_CMD_RESP,
 336         __MT_EP_IN_MAX,
 337 };
 338
 339 enum mt76u_out_ep {
 340         MT_EP_OUT_INBAND_CMD,
 341         MT_EP_OUT_AC_BK,
 342         MT_EP_OUT_AC_BE,
 343         MT_EP_OUT_AC_VI,
 344         MT_EP_OUT_AC_VO,
 345         MT_EP_OUT_HCCA,
 346         __MT_EP_OUT_MAX,
 347 };
 348
 349 #define MT_SG_MAX_SIZE          8
 350 #define MT_NUM_TX_ENTRIES       256
 351 #define MT_NUM_RX_ENTRIES       128
 352 #define MCU_RESP_URB_SIZE       1024
 353 struct mt76_usb {
 354         struct mutex usb_ctrl_mtx;
 355         u8 data[32];
 356
 357         struct tasklet_struct rx_tasklet;
 358         struct tasklet_struct tx_tasklet;
 359         struct delayed_work stat_work;
 360
 361         u8 out_ep[__MT_EP_OUT_MAX];
 362         u16 out_max_packet;
 363         u8 in_ep[__MT_EP_IN_MAX];
 364         u16 in_max_packet;
 365
 366         struct mt76u_mcu {
 367                 struct mutex mutex;
 368                 struct completion cmpl;
 369                 struct mt76u_buf res;
 370                 u32 msg_seq;
 371
 372                 /* multiple reads */
 373                 struct mt76_reg_pair *rp;
 374                 int rp_len;
 375                 u32 base;
 376                 bool burst;
 377         } mcu;
 378 };
 379
 380 struct mt76_mmio {
 381         struct mt76e_mcu {
 382                 struct mutex mutex;
 383
 384                 wait_queue_head_t wait;
 385                 struct sk_buff_head res_q;
 386
 387                 u32 msg_seq;
 388         } mcu;
 389         void __iomem *regs;
 390         spinlock_t irq_lock;
 391         u32 irqmask;
 392 };
 393
 394 struct mt76_dev {
 395         struct ieee80211_hw *hw;
 396         struct cfg80211_chan_def chandef;
 397         struct ieee80211_channel *main_chan;
 398
 399         spinlock_t lock;
 400         spinlock_t cc_lock;
 401
 402         struct mutex mutex;
 403
 404         const struct mt76_bus_ops *bus;
 405         const struct mt76_driver_ops *drv;
 406         const struct mt76_mcu_ops *mcu_ops;
 407         struct device *dev;
 408
 409         struct net_device napi_dev;
 410         spinlock_t rx_lock;
 411         struct napi_struct napi[__MT_RXQ_MAX];
 412         struct sk_buff_head rx_skb[__MT_RXQ_MAX];
 413
 414         struct list_head txwi_cache;
 415         struct mt76_queue q_tx[__MT_TXQ_MAX];
 416         struct mt76_queue q_rx[__MT_RXQ_MAX];
 417         const struct mt76_queue_ops *queue_ops;
 418
 419         wait_queue_head_t tx_wait;
 420         struct sk_buff_head status_list;
 421
 422         unsigned long wcid_mask[MT76_N_WCIDS / BITS_PER_LONG];
 423
 424         struct mt76_wcid global_wcid;
 425         struct mt76_wcid __rcu *wcid[MT76_N_WCIDS];
 426
 427         u8 macaddr[ETH_ALEN];
 428         u32 rev;
 429         unsigned long state;
 430
 431         u8 antenna_mask;
 432         u16 chainmask;
 433
 434         struct mt76_sband sband_2g;
 435         struct mt76_sband sband_5g;
 436         struct debugfs_blob_wrapper eeprom;
 437         struct debugfs_blob_wrapper otp;
 438         struct mt76_hw_cap cap;
 439
 440         struct mt76_rate_power rate_power;
 441         int txpower_conf;
 442         int txpower_cur;
 443
 444         u32 debugfs_reg;
 445
 446         struct led_classdev led_cdev;
 447         char led_name[32];
 448         bool led_al;
 449         u8 led_pin;
 450
 451         u32 rxfilter;
 452
 453         union {
 454                 struct mt76_mmio mmio;
 455                 struct mt76_usb usb;
 456         };
 457 };
 458
 459 enum mt76_phy_type {
 460         MT_PHY_TYPE_CCK,
 461         MT_PHY_TYPE_OFDM,
 462         MT_PHY_TYPE_HT,
 463         MT_PHY_TYPE_HT_GF,
 464         MT_PHY_TYPE_VHT,
 465 };
 466
 467 struct mt76_rx_status {
 468         struct mt76_wcid *wcid;
 469
 470         unsigned long reorder_time;
 471
 472         u8 iv[6];
 473
 474         u8 aggr:1;
 475         u8 tid;
 476         u16 seqno;
 477
 478         u16 freq;
 479         u32 flag;
 480         u8 enc_flags;
 481         u8 encoding:2, bw:3;
 482         u8 rate_idx;
 483         u8 nss;
 484         u8 band;
 485         u8 signal;
 486         u8 chains;
 487         s8 chain_signal[IEEE80211_MAX_CHAINS];
 488 };
 489
 490 #define __mt76_rr(dev, ...)     (dev)->bus->rr((dev), __VA_ARGS__)
 491 #define __mt76_wr(dev, ...)     (dev)->bus->wr((dev), __VA_ARGS__)
 492 #define __mt76_rmw(dev, ...)    (dev)->bus->rmw((dev), __VA_ARGS__)
 493 #define __mt76_wr_copy(dev, ...)        (dev)->bus->copy((dev), __VA_ARGS__)
 494
 495 #define __mt76_set(dev, offset, val)    __mt76_rmw(dev, offset, 0, val)
 496 #define __mt76_clear(dev, offset, val)  __mt76_rmw(dev, offset, val, 0)
 497
 498 #define mt76_rr(dev, ...)       (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__)
 499 #define mt76_wr(dev, ...)       (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__)
 500 #define mt76_rmw(dev, ...)      (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__)
 501 #define mt76_wr_copy(dev, ...)  (dev)->mt76.bus->copy(&((dev)->mt76), __VA_ARGS__)
 502 #define mt76_wr_rp(dev, ...)    (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__)
 503 #define mt76_rd_rp(dev, ...)    (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__)
 504
 505 #define mt76_mcu_send_msg(dev, ...)     (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__)
 506
 507 #define mt76_set(dev, offset, val)      mt76_rmw(dev, offset, 0, val)
 508 #define mt76_clear(dev, offset, val)    mt76_rmw(dev, offset, val, 0)
 509
 510 #define mt76_get_field(_dev, _reg, _field)              \
 511         FIELD_GET(_field, mt76_rr(dev, _reg))
 512
 513 #define mt76_rmw_field(_dev, _reg, _field, _val)        \
 514         mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
 515
 516 #define __mt76_rmw_field(_dev, _reg, _field, _val)      \
 517         __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
 518
 519 #define mt76_hw(dev) (dev)->mt76.hw
 520
 521 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
 522                  int timeout);
 523
 524 #define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__)
 525
 526 bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
 527                       int timeout);
 528
 529 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__)
 530
 531 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs);
 532
 533 static inline u16 mt76_chip(struct mt76_dev *dev)
 534 {
 535         return dev->rev >> 16;
 536 }
 537
 538 static inline u16 mt76_rev(struct mt76_dev *dev)
 539 {
 540         return dev->rev & 0xffff;
 541 }
 542
 543 #define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
 544 #define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
 545
 546 #define mt76_init_queues(dev)           (dev)->mt76.queue_ops->init(&((dev)->mt76))
 547 #define mt76_queue_alloc(dev, ...)      (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
 548 #define mt76_queue_add_buf(dev, ...)    (dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
 549 #define mt76_queue_rx_reset(dev, ...)   (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
 550 #define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
 551 #define mt76_queue_kick(dev, ...)       (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
 552
 553 static inline struct mt76_channel_state *
 554 mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c)
 555 {
 556         struct mt76_sband *msband;
 557         int idx;
 558
 559         if (c->band == NL80211_BAND_2GHZ)
 560                 msband = &dev->sband_2g;
 561         else
 562                 msband = &dev->sband_5g;
 563
 564         idx = c - &msband->sband.channels[0];
 565         return &msband->chan[idx];
 566 }
 567
 568 struct mt76_dev *mt76_alloc_device(unsigned int size,
 569                                    const struct ieee80211_ops *ops);
 570 int mt76_register_device(struct mt76_dev *dev, bool vht,
 571                          struct ieee80211_rate *rates, int n_rates);
 572 void mt76_unregister_device(struct mt76_dev *dev);
 573
 574 struct dentry *mt76_register_debugfs(struct mt76_dev *dev);
 575 void mt76_seq_puts_array(struct seq_file *file, const char *str,
 576                          s8 *val, int len);
 577
 578 int mt76_eeprom_init(struct mt76_dev *dev, int len);
 579 void mt76_eeprom_override(struct mt76_dev *dev);
 580
 581 /* increment with wrap-around */
 582 static inline int mt76_incr(int val, int size)
 583 {
 584         return (val + 1) & (size - 1);
 585 }
 586
 587 /* decrement with wrap-around */
 588 static inline int mt76_decr(int val, int size)
 589 {
 590         return (val - 1) & (size - 1);
 591 }
 592
 593 u8 mt76_ac_to_hwq(u8 ac);
 594
 595 static inline struct ieee80211_txq *
 596 mtxq_to_txq(struct mt76_txq *mtxq)
 597 {
 598         void *ptr = mtxq;
 599
 600         return container_of(ptr, struct ieee80211_txq, drv_priv);
 601 }
 602
 603 static inline struct ieee80211_sta *
 604 wcid_to_sta(struct mt76_wcid *wcid)
 605 {
 606         void *ptr = wcid;
 607
 608         if (!wcid || !wcid->sta)
 609                 return NULL;
 610
 611         return container_of(ptr, struct ieee80211_sta, drv_priv);
 612 }
 613
 614 static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb)
 615 {
 616         BUILD_BUG_ON(sizeof(struct mt76_tx_cb) >
 617                      sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data));
 618         return ((void *) IEEE80211_SKB_CB(skb)->status.status_driver_data);
 619 }
 620
 621 int mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
 622                           struct sk_buff *skb, struct mt76_wcid *wcid,
 623                           struct ieee80211_sta *sta);
 624
 625 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb);
 626 void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
 627              struct mt76_wcid *wcid, struct sk_buff *skb);
 628 void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq);
 629 void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq);
 630 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
 631 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
 632                          bool send_bar);
 633 void mt76_txq_schedule(struct mt76_dev *dev, struct mt76_queue *hwq);
 634 void mt76_txq_schedule_all(struct mt76_dev *dev);
 635 void mt76_release_buffered_frames(struct ieee80211_hw *hw,
 636                                   struct ieee80211_sta *sta,
 637                                   u16 tids, int nframes,
 638                                   enum ieee80211_frame_release_type reason,
 639                                   bool more_data);
 640 void mt76_set_channel(struct mt76_dev *dev);
 641 int mt76_get_survey(struct ieee80211_hw *hw, int idx,
 642                     struct survey_info *survey);
 643 void mt76_set_stream_caps(struct mt76_dev *dev, bool vht);
 644
 645 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid,
 646                        u16 ssn, u8 size);
 647 void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid);
 648
 649 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid,
 650                          struct ieee80211_key_conf *key);
 651
 652 void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
 653                          __acquires(&dev->status_list.lock);
 654 void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
 655                            __releases(&dev->status_list.lock);
 656
 657 int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
 658                            struct sk_buff *skb);
 659 struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev,
 660                                        struct mt76_wcid *wcid, int pktid,
 661                                        struct sk_buff_head *list);
 662 void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
 663                              struct sk_buff_head *list);
 664 void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb);
 665 void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid,
 666                           bool flush);
 667 void mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif,
 668                      struct ieee80211_sta *sta);
 669
 670 struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb);
 671
 672 /* internal */
 673 void mt76_tx_free(struct mt76_dev *dev);
 674 struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev);
 675 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
 676 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
 677                       struct napi_struct *napi);
 678 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
 679                            struct napi_struct *napi);
 680 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames);
 681
 682 /* usb */
 683 static inline bool mt76u_urb_error(struct urb *urb)
 684 {
 685         return urb->status &&
 686                urb->status != -ECONNRESET &&
 687                urb->status != -ESHUTDOWN &&
 688                urb->status != -ENOENT;
 689 }
 690
 691 /* Map hardware queues to usb endpoints */
 692 static inline u8 q2ep(u8 qid)
 693 {
 694         /* TODO: take management packets to queue 5 */
 695         return qid + 1;
 696 }
 697
 698 static inline bool mt76u_check_sg(struct mt76_dev *dev)
 699 {
 700         struct usb_interface *intf = to_usb_interface(dev->dev);
 701         struct usb_device *udev = interface_to_usbdev(intf);
 702
 703         return (udev->bus->sg_tablesize > 0 &&
 704                 (udev->bus->no_sg_constraint ||
 705                  udev->speed == USB_SPEED_WIRELESS));
 706 }
 707
 708 int mt76u_vendor_request(struct mt76_dev *dev, u8 req,
 709                          u8 req_type, u16 val, u16 offset,
 710                          void *buf, size_t len);
 711 void mt76u_single_wr(struct mt76_dev *dev, const u8 req,
 712                      const u16 offset, const u32 val);
 713 int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf);
 714 void mt76u_deinit(struct mt76_dev *dev);
 715 int mt76u_buf_alloc(struct mt76_dev *dev, struct mt76u_buf *buf,
 716                     int nsgs, int len, int sglen, gfp_t gfp);
 717 void mt76u_buf_free(struct mt76u_buf *buf);
 718 int mt76u_submit_buf(struct mt76_dev *dev, int dir, int index,
 719                      struct mt76u_buf *buf, gfp_t gfp,
 720                      usb_complete_t complete_fn, void *context);
 721 int mt76u_submit_rx_buffers(struct mt76_dev *dev);
 722 int mt76u_alloc_queues(struct mt76_dev *dev);
 723 void mt76u_stop_queues(struct mt76_dev *dev);
 724 void mt76u_stop_stat_wk(struct mt76_dev *dev);
 725 void mt76u_queues_deinit(struct mt76_dev *dev);
 726
 727 void mt76u_mcu_complete_urb(struct urb *urb);
 728 int mt76u_mcu_init_rx(struct mt76_dev *dev);
 729 void mt76u_mcu_deinit(struct mt76_dev *dev);
 730
 731 #endif