drivers/pci/pci-uclass.c

   1 /*
   2  * Copyright (c) 2014 Google, Inc
   3  * Written by Simon Glass <sjg@chromium.org>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <errno.h>
  11 #include <fdtdec.h>
  12 #include <inttypes.h>
  13 #include <pci.h>
  14 #include <dm/lists.h>
  15 #include <dm/root.h>
  16 #include <dm/device-internal.h>
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 struct pci_controller *pci_bus_to_hose(int busnum)
  21 {
  22         struct udevice *bus;
  23         int ret;
  24
  25         ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, &bus);
  26         if (ret) {
  27                 debug("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret);
  28                 return NULL;
  29         }
  30         return dev_get_uclass_priv(bus);
  31 }
  32
  33 pci_dev_t pci_get_bdf(struct udevice *dev)
  34 {
  35         struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
  36         struct udevice *bus = dev->parent;
  37
  38         return PCI_ADD_BUS(bus->seq, pplat->devfn);
  39 }
  40
  41 /**
  42  * pci_get_bus_max() - returns the bus number of the last active bus
  43  *
  44  * @return last bus number, or -1 if no active buses
  45  */
  46 static int pci_get_bus_max(void)
  47 {
  48         struct udevice *bus;
  49         struct uclass *uc;
  50         int ret = -1;
  51
  52         ret = uclass_get(UCLASS_PCI, &uc);
  53         uclass_foreach_dev(bus, uc) {
  54                 if (bus->seq > ret)
  55                         ret = bus->seq;
  56         }
  57
  58         debug("%s: ret=%d\n", __func__, ret);
  59
  60         return ret;
  61 }
  62
  63 int pci_last_busno(void)
  64 {
  65         struct pci_controller *hose;
  66         struct udevice *bus;
  67         struct uclass *uc;
  68         int ret;
  69
  70         debug("pci_last_busno\n");
  71         ret = uclass_get(UCLASS_PCI, &uc);
  72         if (ret || list_empty(&uc->dev_head))
  73                 return -1;
  74
  75         /* Probe the last bus */
  76         bus = list_entry(uc->dev_head.prev, struct udevice, uclass_node);
  77         debug("bus = %p, %s\n", bus, bus->name);
  78         assert(bus);
  79         ret = device_probe(bus);
  80         if (ret)
  81                 return ret;
  82
  83         /* If that bus has bridges, we may have new buses now. Get the last */
  84         bus = list_entry(uc->dev_head.prev, struct udevice, uclass_node);
  85         hose = dev_get_uclass_priv(bus);
  86         debug("bus = %s, hose = %p\n", bus->name, hose);
  87
  88         return hose->last_busno;
  89 }
  90
  91 int pci_get_ff(enum pci_size_t size)
  92 {
  93         switch (size) {
  94         case PCI_SIZE_8:
  95                 return 0xff;
  96         case PCI_SIZE_16:
  97                 return 0xffff;
  98         default:
  99                 return 0xffffffff;
 100         }
 101 }
 102
 103 int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn,
 104                        struct udevice **devp)
 105 {
 106         struct udevice *dev;
 107
 108         for (device_find_first_child(bus, &dev);
 109              dev;
 110              device_find_next_child(&dev)) {
 111                 struct pci_child_platdata *pplat;
 112
 113                 pplat = dev_get_parent_platdata(dev);
 114                 if (pplat && pplat->devfn == find_devfn) {
 115                         *devp = dev;
 116                         return 0;
 117                 }
 118         }
 119
 120         return -ENODEV;
 121 }
 122
 123 int pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp)
 124 {
 125         struct udevice *bus;
 126         int ret;
 127
 128         ret = uclass_get_device_by_seq(UCLASS_PCI, PCI_BUS(bdf), &bus);
 129         if (ret)
 130                 return ret;
 131         return pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), devp);
 132 }
 133
 134 static int pci_device_matches_ids(struct udevice *dev,
 135                                   struct pci_device_id *ids)
 136 {
 137         struct pci_child_platdata *pplat;
 138         int i;
 139
 140         pplat = dev_get_parent_platdata(dev);
 141         if (!pplat)
 142                 return -EINVAL;
 143         for (i = 0; ids[i].vendor != 0; i++) {
 144                 if (pplat->vendor == ids[i].vendor &&
 145                     pplat->device == ids[i].device)
 146                         return i;
 147         }
 148
 149         return -EINVAL;
 150 }
 151
 152 int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids,
 153                          int *indexp, struct udevice **devp)
 154 {
 155         struct udevice *dev;
 156
 157         /* Scan all devices on this bus */
 158         for (device_find_first_child(bus, &dev);
 159              dev;
 160              device_find_next_child(&dev)) {
 161                 if (pci_device_matches_ids(dev, ids) >= 0) {
 162                         if ((*indexp)-- <= 0) {
 163                                 *devp = dev;
 164                                 return 0;
 165                         }
 166                 }
 167         }
 168
 169         return -ENODEV;
 170 }
 171
 172 int pci_find_device_id(struct pci_device_id *ids, int index,
 173                        struct udevice **devp)
 174 {
 175         struct udevice *bus;
 176
 177         /* Scan all known buses */
 178         for (uclass_first_device(UCLASS_PCI, &bus);
 179              bus;
 180              uclass_next_device(&bus)) {
 181                 if (!pci_bus_find_devices(bus, ids, &index, devp))
 182                         return 0;
 183         }
 184         *devp = NULL;
 185
 186         return -ENODEV;
 187 }
 188
 189 int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset,
 190                          unsigned long value, enum pci_size_t size)
 191 {
 192         struct dm_pci_ops *ops;
 193
 194         ops = pci_get_ops(bus);
 195         if (!ops->write_config)
 196                 return -ENOSYS;
 197         return ops->write_config(bus, bdf, offset, value, size);
 198 }
 199
 200 int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
 201                      enum pci_size_t size)
 202 {
 203         struct udevice *bus;
 204         int ret;
 205
 206         ret = uclass_get_device_by_seq(UCLASS_PCI, PCI_BUS(bdf), &bus);
 207         if (ret)
 208                 return ret;
 209
 210         return pci_bus_write_config(bus, PCI_MASK_BUS(bdf), offset, value,
 211                                     size);
 212 }
 213
 214 int pci_write_config32(pci_dev_t bdf, int offset, u32 value)
 215 {
 216         return pci_write_config(bdf, offset, value, PCI_SIZE_32);
 217 }
 218
 219 int pci_write_config16(pci_dev_t bdf, int offset, u16 value)
 220 {
 221         return pci_write_config(bdf, offset, value, PCI_SIZE_16);
 222 }
 223
 224 int pci_write_config8(pci_dev_t bdf, int offset, u8 value)
 225 {
 226         return pci_write_config(bdf, offset, value, PCI_SIZE_8);
 227 }
 228
 229 int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset,
 230                         unsigned long *valuep, enum pci_size_t size)
 231 {
 232         struct dm_pci_ops *ops;
 233
 234         ops = pci_get_ops(bus);
 235         if (!ops->read_config)
 236                 return -ENOSYS;
 237         return ops->read_config(bus, bdf, offset, valuep, size);
 238 }
 239
 240 int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,
 241                     enum pci_size_t size)
 242 {
 243         struct udevice *bus;
 244         int ret;
 245
 246         ret = uclass_get_device_by_seq(UCLASS_PCI, PCI_BUS(bdf), &bus);
 247         if (ret)
 248                 return ret;
 249
 250         return pci_bus_read_config(bus, PCI_MASK_BUS(bdf), offset, valuep,
 251                                    size);
 252 }
 253
 254 int pci_read_config32(pci_dev_t bdf, int offset, u32 *valuep)
 255 {
 256         unsigned long value;
 257         int ret;
 258
 259         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_32);
 260         if (ret)
 261                 return ret;
 262         *valuep = value;
 263
 264         return 0;
 265 }
 266
 267 int pci_read_config16(pci_dev_t bdf, int offset, u16 *valuep)
 268 {
 269         unsigned long value;
 270         int ret;
 271
 272         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_16);
 273         if (ret)
 274                 return ret;
 275         *valuep = value;
 276
 277         return 0;
 278 }
 279
 280 int pci_read_config8(pci_dev_t bdf, int offset, u8 *valuep)
 281 {
 282         unsigned long value;
 283         int ret;
 284
 285         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_8);
 286         if (ret)
 287                 return ret;
 288         *valuep = value;
 289
 290         return 0;
 291 }
 292
 293 int pci_auto_config_devices(struct udevice *bus)
 294 {
 295         struct pci_controller *hose = bus->uclass_priv;
 296         unsigned int sub_bus;
 297         struct udevice *dev;
 298         int ret;
 299
 300         sub_bus = bus->seq;
 301         debug("%s: start\n", __func__);
 302         pciauto_config_init(hose);
 303         for (ret = device_find_first_child(bus, &dev);
 304              !ret && dev;
 305              ret = device_find_next_child(&dev)) {
 306                 struct pci_controller *ctlr_hose;
 307                 unsigned int max_bus;
 308
 309                 debug("%s: device %s\n", __func__, dev->name);
 310
 311                 /* The root controller has the region information */
 312                 ctlr_hose = hose->ctlr->uclass_priv;
 313                 max_bus = pciauto_config_device(ctlr_hose, pci_get_bdf(dev));
 314                 sub_bus = max(sub_bus, max_bus);
 315         }
 316         debug("%s: done\n", __func__);
 317
 318         return sub_bus;
 319 }
 320
 321 int dm_pci_hose_probe_bus(struct pci_controller *hose, pci_dev_t bdf)
 322 {
 323         struct udevice *parent, *bus;
 324         int sub_bus;
 325         int ret;
 326
 327         debug("%s\n", __func__);
 328         parent = hose->bus;
 329
 330         /* Find the bus within the parent */
 331         ret = pci_bus_find_devfn(parent, bdf, &bus);
 332         if (ret) {
 333                 debug("%s: Cannot find device %x on bus %s: %d\n", __func__,
 334                       bdf, parent->name, ret);
 335                 return ret;
 336         }
 337
 338         sub_bus = pci_get_bus_max() + 1;
 339         debug("%s: bus = %d/%s\n", __func__, sub_bus, bus->name);
 340         pciauto_prescan_setup_bridge(hose, bdf, sub_bus);
 341
 342         ret = device_probe(bus);
 343         if (ret) {
 344                 debug("%s: Cannot probe bus bus %s: %d\n", __func__, bus->name,
 345                       ret);
 346                 return ret;
 347         }
 348         if (sub_bus != bus->seq) {
 349                 printf("%s: Internal error, bus '%s' got seq %d, expected %d\n",
 350                        __func__, bus->name, bus->seq, sub_bus);
 351                 return -EPIPE;
 352         }
 353         sub_bus = pci_get_bus_max();
 354         pciauto_postscan_setup_bridge(hose, bdf, sub_bus);
 355
 356         return sub_bus;
 357 }
 358
 359 /**
 360  * pci_match_one_device - Tell if a PCI device structure has a matching
 361  *                        PCI device id structure
 362  * @id: single PCI device id structure to match
 363  * @dev: the PCI device structure to match against
 364  *
 365  * Returns the matching pci_device_id structure or %NULL if there is no match.
 366  */
 367 static bool pci_match_one_id(const struct pci_device_id *id,
 368                              const struct pci_device_id *find)
 369 {
 370         if ((id->vendor == PCI_ANY_ID || id->vendor == find->vendor) &&
 371             (id->device == PCI_ANY_ID || id->device == find->device) &&
 372             (id->subvendor == PCI_ANY_ID || id->subvendor == find->subvendor) &&
 373             (id->subdevice == PCI_ANY_ID || id->subdevice == find->subdevice) &&
 374             !((id->class ^ find->class) & id->class_mask))
 375                 return true;
 376
 377         return false;
 378 }
 379
 380 /**
 381  * pci_find_and_bind_driver() - Find and bind the right PCI driver
 382  *
 383  * This only looks at certain fields in the descriptor.
 384  */
 385 static int pci_find_and_bind_driver(struct udevice *parent,
 386                                     struct pci_device_id *find_id, int devfn,
 387                                     struct udevice **devp)
 388 {
 389         struct pci_driver_entry *start, *entry;
 390         const char *drv;
 391         int n_ents;
 392         int ret;
 393         char name[30], *str;
 394
 395         *devp = NULL;
 396
 397         debug("%s: Searching for driver: vendor=%x, device=%x\n", __func__,
 398               find_id->vendor, find_id->device);
 399         start = ll_entry_start(struct pci_driver_entry, pci_driver_entry);
 400         n_ents = ll_entry_count(struct pci_driver_entry, pci_driver_entry);
 401         for (entry = start; entry != start + n_ents; entry++) {
 402                 const struct pci_device_id *id;
 403                 struct udevice *dev;
 404                 const struct driver *drv;
 405
 406                 for (id = entry->match;
 407                      id->vendor || id->subvendor || id->class_mask;
 408                      id++) {
 409                         if (!pci_match_one_id(id, find_id))
 410                                 continue;
 411
 412                         drv = entry->driver;
 413                         /*
 414                          * We could pass the descriptor to the driver as
 415                          * platdata (instead of NULL) and allow its bind()
 416                          * method to return -ENOENT if it doesn't support this
 417                          * device. That way we could continue the search to
 418                          * find another driver. For now this doesn't seem
 419                          * necesssary, so just bind the first match.
 420                          */
 421                         ret = device_bind(parent, drv, drv->name, NULL, -1,
 422                                           &dev);
 423                         if (ret)
 424                                 goto error;
 425                         debug("%s: Match found: %s\n", __func__, drv->name);
 426                         dev->driver_data = find_id->driver_data;
 427                         *devp = dev;
 428                         return 0;
 429                 }
 430         }
 431
 432         /* Bind a generic driver so that the device can be used */
 433         sprintf(name, "pci_%x:%x.%x", parent->seq, PCI_DEV(devfn),
 434                 PCI_FUNC(devfn));
 435         str = strdup(name);
 436         if (!str)
 437                 return -ENOMEM;
 438         drv = (find_id->class >> 8) == PCI_CLASS_BRIDGE_PCI ? "pci_bridge_drv" :
 439                         "pci_generic_drv";
 440         ret = device_bind_driver(parent, drv, str, devp);
 441         if (ret) {
 442                 debug("%s: Failed to bind generic driver: %d", __func__, ret);
 443                 return ret;
 444         }
 445         debug("%s: No match found: bound generic driver instead\n", __func__);
 446
 447         return 0;
 448
 449 error:
 450         debug("%s: No match found: error %d\n", __func__, ret);
 451         return ret;
 452 }
 453
 454 int pci_bind_bus_devices(struct udevice *bus)
 455 {
 456         ulong vendor, device;
 457         ulong header_type;
 458         pci_dev_t devfn, end;
 459         bool found_multi;
 460         int ret;
 461
 462         found_multi = false;
 463         end = PCI_DEVFN(PCI_MAX_PCI_DEVICES - 1, PCI_MAX_PCI_FUNCTIONS - 1);
 464         for (devfn = PCI_DEVFN(0, 0); devfn < end; devfn += PCI_DEVFN(0, 1)) {
 465                 struct pci_child_platdata *pplat;
 466                 struct udevice *dev;
 467                 ulong class;
 468
 469                 if (PCI_FUNC(devfn) && !found_multi)
 470                         continue;
 471                 /* Check only the first access, we don't expect problems */
 472                 ret = pci_bus_read_config(bus, devfn, PCI_HEADER_TYPE,
 473                                           &header_type, PCI_SIZE_8);
 474                 if (ret)
 475                         goto error;
 476                 pci_bus_read_config(bus, devfn, PCI_VENDOR_ID, &vendor,
 477                                     PCI_SIZE_16);
 478                 if (vendor == 0xffff || vendor == 0x0000)
 479                         continue;
 480
 481                 if (!PCI_FUNC(devfn))
 482                         found_multi = header_type & 0x80;
 483
 484                 debug("%s: bus %d/%s: found device %x, function %d\n", __func__,
 485                       bus->seq, bus->name, PCI_DEV(devfn), PCI_FUNC(devfn));
 486                 pci_bus_read_config(bus, devfn, PCI_DEVICE_ID, &device,
 487                                     PCI_SIZE_16);
 488                 pci_bus_read_config(bus, devfn, PCI_CLASS_REVISION, &class,
 489                                     PCI_SIZE_32);
 490                 class >>= 8;
 491
 492                 /* Find this device in the device tree */
 493                 ret = pci_bus_find_devfn(bus, devfn, &dev);
 494
 495                 /* Search for a driver */
 496
 497                 /* If nothing in the device tree, bind a generic device */
 498                 if (ret == -ENODEV) {
 499                         struct pci_device_id find_id;
 500                         ulong val;
 501
 502                         memset(&find_id, '\0', sizeof(find_id));
 503                         find_id.vendor = vendor;
 504                         find_id.device = device;
 505                         find_id.class = class;
 506                         if ((header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL) {
 507                                 pci_bus_read_config(bus, devfn,
 508                                                     PCI_SUBSYSTEM_VENDOR_ID,
 509                                                     &val, PCI_SIZE_32);
 510                                 find_id.subvendor = val & 0xffff;
 511                                 find_id.subdevice = val >> 16;
 512                         }
 513                         ret = pci_find_and_bind_driver(bus, &find_id, devfn,
 514                                                        &dev);
 515                 }
 516                 if (ret)
 517                         return ret;
 518
 519                 /* Update the platform data */
 520                 pplat = dev_get_parent_platdata(dev);
 521                 pplat->devfn = devfn;
 522                 pplat->vendor = vendor;
 523                 pplat->device = device;
 524                 pplat->class = class;
 525         }
 526
 527         return 0;
 528 error:
 529         printf("Cannot read bus configuration: %d\n", ret);
 530
 531         return ret;
 532 }
 533
 534 static int pci_uclass_post_bind(struct udevice *bus)
 535 {
 536         /*
 537          * Scan the device tree for devices. This does not probe the PCI bus,
 538          * as this is not permitted while binding. It just finds devices
 539          * mentioned in the device tree.
 540          *
 541          * Before relocation, only bind devices marked for pre-relocation
 542          * use.
 543          */
 544         return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset,
 545                                 gd->flags & GD_FLG_RELOC ? false : true);
 546 }
 547
 548 static int decode_regions(struct pci_controller *hose, const void *blob,
 549                           int parent_node, int node)
 550 {
 551         int pci_addr_cells, addr_cells, size_cells;
 552         int cells_per_record;
 553         phys_addr_t addr;
 554         const u32 *prop;
 555         int len;
 556         int i;
 557
 558         prop = fdt_getprop(blob, node, "ranges", &len);
 559         if (!prop)
 560                 return -EINVAL;
 561         pci_addr_cells = fdt_address_cells(blob, node);
 562         addr_cells = fdt_address_cells(blob, parent_node);
 563         size_cells = fdt_size_cells(blob, node);
 564
 565         /* PCI addresses are always 3-cells */
 566         len /= sizeof(u32);
 567         cells_per_record = pci_addr_cells + addr_cells + size_cells;
 568         hose->region_count = 0;
 569         debug("%s: len=%d, cells_per_record=%d\n", __func__, len,
 570               cells_per_record);
 571         for (i = 0; i < MAX_PCI_REGIONS; i++, len -= cells_per_record) {
 572                 u64 pci_addr, addr, size;
 573                 int space_code;
 574                 u32 flags;
 575                 int type;
 576
 577                 if (len < cells_per_record)
 578                         break;
 579                 flags = fdt32_to_cpu(prop[0]);
 580                 space_code = (flags >> 24) & 3;
 581                 pci_addr = fdtdec_get_number(prop + 1, 2);
 582                 prop += pci_addr_cells;
 583                 addr = fdtdec_get_number(prop, addr_cells);
 584                 prop += addr_cells;
 585                 size = fdtdec_get_number(prop, size_cells);
 586                 prop += size_cells;
 587                 debug("%s: region %d, pci_addr=%" PRIx64 ", addr=%" PRIx64
 588                       ", size=%" PRIx64 ", space_code=%d\n", __func__,
 589                       hose->region_count, pci_addr, addr, size, space_code);
 590                 if (space_code & 2) {
 591                         type = flags & (1U << 30) ? PCI_REGION_PREFETCH :
 592                                         PCI_REGION_MEM;
 593                 } else if (space_code & 1) {
 594                         type = PCI_REGION_IO;
 595                 } else {
 596                         continue;
 597                 }
 598                 debug(" - type=%d\n", type);
 599                 pci_set_region(hose->regions + hose->region_count++, pci_addr,
 600                                addr, size, type);
 601         }
 602
 603         /* Add a region for our local memory */
 604         addr = gd->ram_size;
 605         if (gd->pci_ram_top && gd->pci_ram_top < addr)
 606                 addr = gd->pci_ram_top;
 607         pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
 608                        PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 609
 610         return 0;
 611 }
 612
 613 static int pci_uclass_pre_probe(struct udevice *bus)
 614 {
 615         struct pci_controller *hose;
 616         int ret;
 617
 618         debug("%s, bus=%d/%s, parent=%s\n", __func__, bus->seq, bus->name,
 619               bus->parent->name);
 620         hose = bus->uclass_priv;
 621
 622         /* For bridges, use the top-level PCI controller */
 623         if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) {
 624                 hose->ctlr = bus;
 625                 ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset,
 626                                 bus->of_offset);
 627                 if (ret) {
 628                         debug("%s: Cannot decode regions\n", __func__);
 629                         return ret;
 630                 }
 631         } else {
 632                 struct pci_controller *parent_hose;
 633
 634                 parent_hose = dev_get_uclass_priv(bus->parent);
 635                 hose->ctlr = parent_hose->bus;
 636         }
 637         hose->bus = bus;
 638         hose->first_busno = bus->seq;
 639         hose->last_busno = bus->seq;
 640
 641         return 0;
 642 }
 643
 644 static int pci_uclass_post_probe(struct udevice *bus)
 645 {
 646         int ret;
 647
 648         /* Don't scan buses before relocation */
 649         if (!(gd->flags & GD_FLG_RELOC))
 650                 return 0;
 651
 652         debug("%s: probing bus %d\n", __func__, bus->seq);
 653         ret = pci_bind_bus_devices(bus);
 654         if (ret)
 655                 return ret;
 656
 657 #ifdef CONFIG_PCI_PNP
 658         ret = pci_auto_config_devices(bus);
 659 #endif
 660
 661         return ret < 0 ? ret : 0;
 662 }
 663
 664 static int pci_uclass_child_post_bind(struct udevice *dev)
 665 {
 666         struct pci_child_platdata *pplat;
 667         struct fdt_pci_addr addr;
 668         int ret;
 669
 670         if (dev->of_offset == -1)
 671                 return 0;
 672
 673         /*
 674          * We could read vendor, device, class if available. But for now we
 675          * just check the address.
 676          */
 677         pplat = dev_get_parent_platdata(dev);
 678         ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
 679                                   FDT_PCI_SPACE_CONFIG, "reg", &addr);
 680
 681         if (ret) {
 682                 if (ret != -ENOENT)
 683                         return -EINVAL;
 684         } else {
 685                 /* extract the bdf from fdt_pci_addr */
 686                 pplat->devfn = addr.phys_hi & 0xffff00;
 687         }
 688
 689         return 0;
 690 }
 691
 692 int pci_bridge_read_config(struct udevice *bus, pci_dev_t devfn, uint offset,
 693                            ulong *valuep, enum pci_size_t size)
 694 {
 695         struct pci_controller *hose = bus->uclass_priv;
 696         pci_dev_t bdf = PCI_ADD_BUS(bus->seq, devfn);
 697
 698         return pci_bus_read_config(hose->ctlr, bdf, offset, valuep, size);
 699 }
 700
 701 int pci_bridge_write_config(struct udevice *bus, pci_dev_t devfn, uint offset,
 702                             ulong value, enum pci_size_t size)
 703 {
 704         struct pci_controller *hose = bus->uclass_priv;
 705         pci_dev_t bdf = PCI_ADD_BUS(bus->seq, devfn);
 706
 707         return pci_bus_write_config(hose->ctlr, bdf, offset, value, size);
 708 }
 709
 710 UCLASS_DRIVER(pci) = {
 711         .id             = UCLASS_PCI,
 712         .name           = "pci",
 713         .flags          = DM_UC_FLAG_SEQ_ALIAS,
 714         .post_bind      = pci_uclass_post_bind,
 715         .pre_probe      = pci_uclass_pre_probe,
 716         .post_probe     = pci_uclass_post_probe,
 717         .child_post_bind = pci_uclass_child_post_bind,
 718         .per_device_auto_alloc_size = sizeof(struct pci_controller),
 719         .per_child_platdata_auto_alloc_size =
 720                         sizeof(struct pci_child_platdata),
 721 };
 722
 723 static const struct dm_pci_ops pci_bridge_ops = {
 724         .read_config    = pci_bridge_read_config,
 725         .write_config   = pci_bridge_write_config,
 726 };
 727
 728 static const struct udevice_id pci_bridge_ids[] = {
 729         { .compatible = "pci-bridge" },
 730         { }
 731 };
 732
 733 U_BOOT_DRIVER(pci_bridge_drv) = {
 734         .name           = "pci_bridge_drv",
 735         .id             = UCLASS_PCI,
 736         .of_match       = pci_bridge_ids,
 737         .ops            = &pci_bridge_ops,
 738 };
 739
 740 UCLASS_DRIVER(pci_generic) = {
 741         .id             = UCLASS_PCI_GENERIC,
 742         .name           = "pci_generic",
 743 };
 744
 745 static const struct udevice_id pci_generic_ids[] = {
 746         { .compatible = "pci-generic" },
 747         { }
 748 };
 749
 750 U_BOOT_DRIVER(pci_generic_drv) = {
 751         .name           = "pci_generic_drv",
 752         .id             = UCLASS_PCI_GENERIC,
 753         .of_match       = pci_generic_ids,
 754 };