drivers/pci/pci-uclass.c

   1 /*
   2  * Copyright (c) 2014 Google, Inc
   3  * Written by Simon Glass <sjg@chromium.org>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <errno.h>
  11 #include <fdtdec.h>
  12 #include <inttypes.h>
  13 #include <pci.h>
  14 #include <dm/lists.h>
  15 #include <dm/root.h>
  16 #include <dm/device-internal.h>
  17 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
  18 #include <asm/fsp/fsp_support.h>
  19 #endif
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 static int pci_get_bus(int busnum, struct udevice **busp)
  24 {
  25         int ret;
  26
  27         ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp);
  28
  29         /* Since buses may not be numbered yet try a little harder with bus 0 */
  30         if (ret == -ENODEV) {
  31                 ret = uclass_first_device(UCLASS_PCI, busp);
  32                 if (ret)
  33                         return ret;
  34                 else if (!*busp)
  35                         return -ENODEV;
  36                 ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp);
  37         }
  38
  39         return ret;
  40 }
  41
  42 struct pci_controller *pci_bus_to_hose(int busnum)
  43 {
  44         struct udevice *bus;
  45         int ret;
  46
  47         ret = pci_get_bus(busnum, &bus);
  48         if (ret) {
  49                 debug("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret);
  50                 return NULL;
  51         }
  52
  53         return dev_get_uclass_priv(bus);
  54 }
  55
  56 pci_dev_t pci_get_bdf(struct udevice *dev)
  57 {
  58         struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
  59         struct udevice *bus = dev->parent;
  60
  61         return PCI_ADD_BUS(bus->seq, pplat->devfn);
  62 }
  63
  64 /**
  65  * pci_get_bus_max() - returns the bus number of the last active bus
  66  *
  67  * @return last bus number, or -1 if no active buses
  68  */
  69 static int pci_get_bus_max(void)
  70 {
  71         struct udevice *bus;
  72         struct uclass *uc;
  73         int ret = -1;
  74
  75         ret = uclass_get(UCLASS_PCI, &uc);
  76         uclass_foreach_dev(bus, uc) {
  77                 if (bus->seq > ret)
  78                         ret = bus->seq;
  79         }
  80
  81         debug("%s: ret=%d\n", __func__, ret);
  82
  83         return ret;
  84 }
  85
  86 int pci_last_busno(void)
  87 {
  88         return pci_get_bus_max();
  89 }
  90
  91 int pci_get_ff(enum pci_size_t size)
  92 {
  93         switch (size) {
  94         case PCI_SIZE_8:
  95                 return 0xff;
  96         case PCI_SIZE_16:
  97                 return 0xffff;
  98         default:
  99                 return 0xffffffff;
 100         }
 101 }
 102
 103 int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn,
 104                        struct udevice **devp)
 105 {
 106         struct udevice *dev;
 107
 108         for (device_find_first_child(bus, &dev);
 109              dev;
 110              device_find_next_child(&dev)) {
 111                 struct pci_child_platdata *pplat;
 112
 113                 pplat = dev_get_parent_platdata(dev);
 114                 if (pplat && pplat->devfn == find_devfn) {
 115                         *devp = dev;
 116                         return 0;
 117                 }
 118         }
 119
 120         return -ENODEV;
 121 }
 122
 123 int pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp)
 124 {
 125         struct udevice *bus;
 126         int ret;
 127
 128         ret = pci_get_bus(PCI_BUS(bdf), &bus);
 129         if (ret)
 130                 return ret;
 131         return pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), devp);
 132 }
 133
 134 static int pci_device_matches_ids(struct udevice *dev,
 135                                   struct pci_device_id *ids)
 136 {
 137         struct pci_child_platdata *pplat;
 138         int i;
 139
 140         pplat = dev_get_parent_platdata(dev);
 141         if (!pplat)
 142                 return -EINVAL;
 143         for (i = 0; ids[i].vendor != 0; i++) {
 144                 if (pplat->vendor == ids[i].vendor &&
 145                     pplat->device == ids[i].device)
 146                         return i;
 147         }
 148
 149         return -EINVAL;
 150 }
 151
 152 int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids,
 153                          int *indexp, struct udevice **devp)
 154 {
 155         struct udevice *dev;
 156
 157         /* Scan all devices on this bus */
 158         for (device_find_first_child(bus, &dev);
 159              dev;
 160              device_find_next_child(&dev)) {
 161                 if (pci_device_matches_ids(dev, ids) >= 0) {
 162                         if ((*indexp)-- <= 0) {
 163                                 *devp = dev;
 164                                 return 0;
 165                         }
 166                 }
 167         }
 168
 169         return -ENODEV;
 170 }
 171
 172 int pci_find_device_id(struct pci_device_id *ids, int index,
 173                        struct udevice **devp)
 174 {
 175         struct udevice *bus;
 176
 177         /* Scan all known buses */
 178         for (uclass_first_device(UCLASS_PCI, &bus);
 179              bus;
 180              uclass_next_device(&bus)) {
 181                 if (!pci_bus_find_devices(bus, ids, &index, devp))
 182                         return 0;
 183         }
 184         *devp = NULL;
 185
 186         return -ENODEV;
 187 }
 188
 189 int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset,
 190                          unsigned long value, enum pci_size_t size)
 191 {
 192         struct dm_pci_ops *ops;
 193
 194         ops = pci_get_ops(bus);
 195         if (!ops->write_config)
 196                 return -ENOSYS;
 197         return ops->write_config(bus, bdf, offset, value, size);
 198 }
 199
 200 int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
 201                      enum pci_size_t size)
 202 {
 203         struct udevice *bus;
 204         int ret;
 205
 206         ret = pci_get_bus(PCI_BUS(bdf), &bus);
 207         if (ret)
 208                 return ret;
 209
 210         return pci_bus_write_config(bus, bdf, offset, value, size);
 211 }
 212
 213 int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value,
 214                         enum pci_size_t size)
 215 {
 216         struct udevice *bus;
 217
 218         for (bus = dev; device_is_on_pci_bus(bus);)
 219                 bus = bus->parent;
 220         return pci_bus_write_config(bus, pci_get_bdf(dev), offset, value, size);
 221 }
 222
 223
 224 int pci_write_config32(pci_dev_t bdf, int offset, u32 value)
 225 {
 226         return pci_write_config(bdf, offset, value, PCI_SIZE_32);
 227 }
 228
 229 int pci_write_config16(pci_dev_t bdf, int offset, u16 value)
 230 {
 231         return pci_write_config(bdf, offset, value, PCI_SIZE_16);
 232 }
 233
 234 int pci_write_config8(pci_dev_t bdf, int offset, u8 value)
 235 {
 236         return pci_write_config(bdf, offset, value, PCI_SIZE_8);
 237 }
 238
 239 int dm_pci_write_config8(struct udevice *dev, int offset, u8 value)
 240 {
 241         return dm_pci_write_config(dev, offset, value, PCI_SIZE_8);
 242 }
 243
 244 int dm_pci_write_config16(struct udevice *dev, int offset, u16 value)
 245 {
 246         return dm_pci_write_config(dev, offset, value, PCI_SIZE_16);
 247 }
 248
 249 int dm_pci_write_config32(struct udevice *dev, int offset, u32 value)
 250 {
 251         return dm_pci_write_config(dev, offset, value, PCI_SIZE_32);
 252 }
 253
 254 int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset,
 255                         unsigned long *valuep, enum pci_size_t size)
 256 {
 257         struct dm_pci_ops *ops;
 258
 259         ops = pci_get_ops(bus);
 260         if (!ops->read_config)
 261                 return -ENOSYS;
 262         return ops->read_config(bus, bdf, offset, valuep, size);
 263 }
 264
 265 int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,
 266                     enum pci_size_t size)
 267 {
 268         struct udevice *bus;
 269         int ret;
 270
 271         ret = pci_get_bus(PCI_BUS(bdf), &bus);
 272         if (ret)
 273                 return ret;
 274
 275         return pci_bus_read_config(bus, bdf, offset, valuep, size);
 276 }
 277
 278 int dm_pci_read_config(struct udevice *dev, int offset, unsigned long *valuep,
 279                        enum pci_size_t size)
 280 {
 281         struct udevice *bus;
 282
 283         for (bus = dev; device_is_on_pci_bus(bus);)
 284                 bus = bus->parent;
 285         return pci_bus_read_config(bus, pci_get_bdf(dev), offset, valuep,
 286                                    size);
 287 }
 288
 289 int pci_read_config32(pci_dev_t bdf, int offset, u32 *valuep)
 290 {
 291         unsigned long value;
 292         int ret;
 293
 294         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_32);
 295         if (ret)
 296                 return ret;
 297         *valuep = value;
 298
 299         return 0;
 300 }
 301
 302 int pci_read_config16(pci_dev_t bdf, int offset, u16 *valuep)
 303 {
 304         unsigned long value;
 305         int ret;
 306
 307         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_16);
 308         if (ret)
 309                 return ret;
 310         *valuep = value;
 311
 312         return 0;
 313 }
 314
 315 int pci_read_config8(pci_dev_t bdf, int offset, u8 *valuep)
 316 {
 317         unsigned long value;
 318         int ret;
 319
 320         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_8);
 321         if (ret)
 322                 return ret;
 323         *valuep = value;
 324
 325         return 0;
 326 }
 327
 328 int dm_pci_read_config8(struct udevice *dev, int offset, u8 *valuep)
 329 {
 330         unsigned long value;
 331         int ret;
 332
 333         ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_8);
 334         if (ret)
 335                 return ret;
 336         *valuep = value;
 337
 338         return 0;
 339 }
 340
 341 int dm_pci_read_config16(struct udevice *dev, int offset, u16 *valuep)
 342 {
 343         unsigned long value;
 344         int ret;
 345
 346         ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_16);
 347         if (ret)
 348                 return ret;
 349         *valuep = value;
 350
 351         return 0;
 352 }
 353
 354 int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)
 355 {
 356         unsigned long value;
 357         int ret;
 358
 359         ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_32);
 360         if (ret)
 361                 return ret;
 362         *valuep = value;
 363
 364         return 0;
 365 }
 366
 367 static void set_vga_bridge_bits(struct udevice *dev)
 368 {
 369         struct udevice *parent = dev->parent;
 370         u16 bc;
 371
 372         while (parent->seq != 0) {
 373                 dm_pci_read_config16(parent, PCI_BRIDGE_CONTROL, &bc);
 374                 bc |= PCI_BRIDGE_CTL_VGA;
 375                 dm_pci_write_config16(parent, PCI_BRIDGE_CONTROL, bc);
 376                 parent = parent->parent;
 377         }
 378 }
 379
 380 int pci_auto_config_devices(struct udevice *bus)
 381 {
 382         struct pci_controller *hose = bus->uclass_priv;
 383         struct pci_child_platdata *pplat;
 384         unsigned int sub_bus;
 385         struct udevice *dev;
 386         int ret;
 387
 388         sub_bus = bus->seq;
 389         debug("%s: start\n", __func__);
 390         pciauto_config_init(hose);
 391         for (ret = device_find_first_child(bus, &dev);
 392              !ret && dev;
 393              ret = device_find_next_child(&dev)) {
 394                 unsigned int max_bus;
 395                 int ret;
 396
 397                 debug("%s: device %s\n", __func__, dev->name);
 398                 ret = pciauto_config_device(hose, pci_get_bdf(dev));
 399                 if (ret < 0)
 400                         return ret;
 401                 max_bus = ret;
 402                 sub_bus = max(sub_bus, max_bus);
 403
 404                 pplat = dev_get_parent_platdata(dev);
 405                 if (pplat->class == (PCI_CLASS_DISPLAY_VGA << 8))
 406                         set_vga_bridge_bits(dev);
 407         }
 408         debug("%s: done\n", __func__);
 409
 410         return sub_bus;
 411 }
 412
 413 int dm_pci_hose_probe_bus(struct pci_controller *hose, pci_dev_t bdf)
 414 {
 415         struct udevice *parent, *bus;
 416         int sub_bus;
 417         int ret;
 418
 419         debug("%s\n", __func__);
 420         parent = hose->bus;
 421
 422         /* Find the bus within the parent */
 423         ret = pci_bus_find_devfn(parent, PCI_MASK_BUS(bdf), &bus);
 424         if (ret) {
 425                 debug("%s: Cannot find device %x on bus %s: %d\n", __func__,
 426                       bdf, parent->name, ret);
 427                 return ret;
 428         }
 429
 430         sub_bus = pci_get_bus_max() + 1;
 431         debug("%s: bus = %d/%s\n", __func__, sub_bus, bus->name);
 432         pciauto_prescan_setup_bridge(hose, bdf, sub_bus);
 433
 434         ret = device_probe(bus);
 435         if (ret) {
 436                 debug("%s: Cannot probe bus %s: %d\n", __func__, bus->name,
 437                       ret);
 438                 return ret;
 439         }
 440         if (sub_bus != bus->seq) {
 441                 printf("%s: Internal error, bus '%s' got seq %d, expected %d\n",
 442                        __func__, bus->name, bus->seq, sub_bus);
 443                 return -EPIPE;
 444         }
 445         sub_bus = pci_get_bus_max();
 446         pciauto_postscan_setup_bridge(hose, bdf, sub_bus);
 447
 448         return sub_bus;
 449 }
 450
 451 /**
 452  * pci_match_one_device - Tell if a PCI device structure has a matching
 453  *                        PCI device id structure
 454  * @id: single PCI device id structure to match
 455  * @dev: the PCI device structure to match against
 456  *
 457  * Returns the matching pci_device_id structure or %NULL if there is no match.
 458  */
 459 static bool pci_match_one_id(const struct pci_device_id *id,
 460                              const struct pci_device_id *find)
 461 {
 462         if ((id->vendor == PCI_ANY_ID || id->vendor == find->vendor) &&
 463             (id->device == PCI_ANY_ID || id->device == find->device) &&
 464             (id->subvendor == PCI_ANY_ID || id->subvendor == find->subvendor) &&
 465             (id->subdevice == PCI_ANY_ID || id->subdevice == find->subdevice) &&
 466             !((id->class ^ find->class) & id->class_mask))
 467                 return true;
 468
 469         return false;
 470 }
 471
 472 /**
 473  * pci_find_and_bind_driver() - Find and bind the right PCI driver
 474  *
 475  * This only looks at certain fields in the descriptor.
 476  *
 477  * @parent:     Parent bus
 478  * @find_id:    Specification of the driver to find
 479  * @bdf:        Bus/device/function addreess - see PCI_BDF()
 480  * @devp:       Returns a pointer to the device created
 481  * @return 0 if OK, -EPERM if the device is not needed before relocation and
 482  *         therefore was not created, other -ve value on error
 483  */
 484 static int pci_find_and_bind_driver(struct udevice *parent,
 485                                     struct pci_device_id *find_id,
 486                                     pci_dev_t bdf, struct udevice **devp)
 487 {
 488         struct pci_driver_entry *start, *entry;
 489         const char *drv;
 490         int n_ents;
 491         int ret;
 492         char name[30], *str;
 493         bool bridge;
 494
 495         *devp = NULL;
 496
 497         debug("%s: Searching for driver: vendor=%x, device=%x\n", __func__,
 498               find_id->vendor, find_id->device);
 499         start = ll_entry_start(struct pci_driver_entry, pci_driver_entry);
 500         n_ents = ll_entry_count(struct pci_driver_entry, pci_driver_entry);
 501         for (entry = start; entry != start + n_ents; entry++) {
 502                 const struct pci_device_id *id;
 503                 struct udevice *dev;
 504                 const struct driver *drv;
 505
 506                 for (id = entry->match;
 507                      id->vendor || id->subvendor || id->class_mask;
 508                      id++) {
 509                         if (!pci_match_one_id(id, find_id))
 510                                 continue;
 511
 512                         drv = entry->driver;
 513
 514                         /*
 515                          * In the pre-relocation phase, we only bind devices
 516                          * whose driver has the DM_FLAG_PRE_RELOC set, to save
 517                          * precious memory space as on some platforms as that
 518                          * space is pretty limited (ie: using Cache As RAM).
 519                          */
 520                         if (!(gd->flags & GD_FLG_RELOC) &&
 521                             !(drv->flags & DM_FLAG_PRE_RELOC))
 522                                 return -EPERM;
 523
 524                         /*
 525                          * We could pass the descriptor to the driver as
 526                          * platdata (instead of NULL) and allow its bind()
 527                          * method to return -ENOENT if it doesn't support this
 528                          * device. That way we could continue the search to
 529                          * find another driver. For now this doesn't seem
 530                          * necesssary, so just bind the first match.
 531                          */
 532                         ret = device_bind(parent, drv, drv->name, NULL, -1,
 533                                           &dev);
 534                         if (ret)
 535                                 goto error;
 536                         debug("%s: Match found: %s\n", __func__, drv->name);
 537                         dev->driver_data = find_id->driver_data;
 538                         *devp = dev;
 539                         return 0;
 540                 }
 541         }
 542
 543         bridge = (find_id->class >> 8) == PCI_CLASS_BRIDGE_PCI;
 544         /*
 545          * In the pre-relocation phase, we only bind bridge devices to save
 546          * precious memory space as on some platforms as that space is pretty
 547          * limited (ie: using Cache As RAM).
 548          */
 549         if (!(gd->flags & GD_FLG_RELOC) && !bridge)
 550                 return -EPERM;
 551
 552         /* Bind a generic driver so that the device can be used */
 553         sprintf(name, "pci_%x:%x.%x", parent->seq, PCI_DEV(bdf),
 554                 PCI_FUNC(bdf));
 555         str = strdup(name);
 556         if (!str)
 557                 return -ENOMEM;
 558         drv = bridge ? "pci_bridge_drv" : "pci_generic_drv";
 559
 560         ret = device_bind_driver(parent, drv, str, devp);
 561         if (ret) {
 562                 debug("%s: Failed to bind generic driver: %d\n", __func__, ret);
 563                 return ret;
 564         }
 565         debug("%s: No match found: bound generic driver instead\n", __func__);
 566
 567         return 0;
 568
 569 error:
 570         debug("%s: No match found: error %d\n", __func__, ret);
 571         return ret;
 572 }
 573
 574 int pci_bind_bus_devices(struct udevice *bus)
 575 {
 576         ulong vendor, device;
 577         ulong header_type;
 578         pci_dev_t bdf, end;
 579         bool found_multi;
 580         int ret;
 581
 582         found_multi = false;
 583         end = PCI_BDF(bus->seq, PCI_MAX_PCI_DEVICES - 1,
 584                       PCI_MAX_PCI_FUNCTIONS - 1);
 585         for (bdf = PCI_BDF(bus->seq, 0, 0); bdf < end;
 586              bdf += PCI_BDF(0, 0, 1)) {
 587                 struct pci_child_platdata *pplat;
 588                 struct udevice *dev;
 589                 ulong class;
 590
 591                 if (PCI_FUNC(bdf) && !found_multi)
 592                         continue;
 593                 /* Check only the first access, we don't expect problems */
 594                 ret = pci_bus_read_config(bus, bdf, PCI_HEADER_TYPE,
 595                                           &header_type, PCI_SIZE_8);
 596                 if (ret)
 597                         goto error;
 598                 pci_bus_read_config(bus, bdf, PCI_VENDOR_ID, &vendor,
 599                                     PCI_SIZE_16);
 600                 if (vendor == 0xffff || vendor == 0x0000)
 601                         continue;
 602
 603                 if (!PCI_FUNC(bdf))
 604                         found_multi = header_type & 0x80;
 605
 606                 debug("%s: bus %d/%s: found device %x, function %d\n", __func__,
 607                       bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf));
 608                 pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device,
 609                                     PCI_SIZE_16);
 610                 pci_bus_read_config(bus, bdf, PCI_CLASS_REVISION, &class,
 611                                     PCI_SIZE_32);
 612                 class >>= 8;
 613
 614                 /* Find this device in the device tree */
 615                 ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev);
 616
 617                 /* Search for a driver */
 618
 619                 /* If nothing in the device tree, bind a generic device */
 620                 if (ret == -ENODEV) {
 621                         struct pci_device_id find_id;
 622                         ulong val;
 623
 624                         memset(&find_id, '\0', sizeof(find_id));
 625                         find_id.vendor = vendor;
 626                         find_id.device = device;
 627                         find_id.class = class;
 628                         if ((header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL) {
 629                                 pci_bus_read_config(bus, bdf,
 630                                                     PCI_SUBSYSTEM_VENDOR_ID,
 631                                                     &val, PCI_SIZE_32);
 632                                 find_id.subvendor = val & 0xffff;
 633                                 find_id.subdevice = val >> 16;
 634                         }
 635                         ret = pci_find_and_bind_driver(bus, &find_id, bdf,
 636                                                        &dev);
 637                 }
 638                 if (ret == -EPERM)
 639                         continue;
 640                 else if (ret)
 641                         return ret;
 642
 643                 /* Update the platform data */
 644                 pplat = dev_get_parent_platdata(dev);
 645                 pplat->devfn = PCI_MASK_BUS(bdf);
 646                 pplat->vendor = vendor;
 647                 pplat->device = device;
 648                 pplat->class = class;
 649         }
 650
 651         return 0;
 652 error:
 653         printf("Cannot read bus configuration: %d\n", ret);
 654
 655         return ret;
 656 }
 657
 658 static int pci_uclass_post_bind(struct udevice *bus)
 659 {
 660         /*
 661          * If there is no pci device listed in the device tree,
 662          * don't bother scanning the device tree.
 663          */
 664         if (bus->of_offset == -1)
 665                 return 0;
 666
 667         /*
 668          * Scan the device tree for devices. This does not probe the PCI bus,
 669          * as this is not permitted while binding. It just finds devices
 670          * mentioned in the device tree.
 671          *
 672          * Before relocation, only bind devices marked for pre-relocation
 673          * use.
 674          */
 675         return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset,
 676                                 gd->flags & GD_FLG_RELOC ? false : true);
 677 }
 678
 679 static int decode_regions(struct pci_controller *hose, const void *blob,
 680                           int parent_node, int node)
 681 {
 682         int pci_addr_cells, addr_cells, size_cells;
 683         int cells_per_record;
 684         phys_addr_t addr;
 685         const u32 *prop;
 686         int len;
 687         int i;
 688
 689         prop = fdt_getprop(blob, node, "ranges", &len);
 690         if (!prop)
 691                 return -EINVAL;
 692         pci_addr_cells = fdt_address_cells(blob, node);
 693         addr_cells = fdt_address_cells(blob, parent_node);
 694         size_cells = fdt_size_cells(blob, node);
 695
 696         /* PCI addresses are always 3-cells */
 697         len /= sizeof(u32);
 698         cells_per_record = pci_addr_cells + addr_cells + size_cells;
 699         hose->region_count = 0;
 700         debug("%s: len=%d, cells_per_record=%d\n", __func__, len,
 701               cells_per_record);
 702         for (i = 0; i < MAX_PCI_REGIONS; i++, len -= cells_per_record) {
 703                 u64 pci_addr, addr, size;
 704                 int space_code;
 705                 u32 flags;
 706                 int type;
 707
 708                 if (len < cells_per_record)
 709                         break;
 710                 flags = fdt32_to_cpu(prop[0]);
 711                 space_code = (flags >> 24) & 3;
 712                 pci_addr = fdtdec_get_number(prop + 1, 2);
 713                 prop += pci_addr_cells;
 714                 addr = fdtdec_get_number(prop, addr_cells);
 715                 prop += addr_cells;
 716                 size = fdtdec_get_number(prop, size_cells);
 717                 prop += size_cells;
 718                 debug("%s: region %d, pci_addr=%" PRIx64 ", addr=%" PRIx64
 719                       ", size=%" PRIx64 ", space_code=%d\n", __func__,
 720                       hose->region_count, pci_addr, addr, size, space_code);
 721                 if (space_code & 2) {
 722                         type = flags & (1U << 30) ? PCI_REGION_PREFETCH :
 723                                         PCI_REGION_MEM;
 724                 } else if (space_code & 1) {
 725                         type = PCI_REGION_IO;
 726                 } else {
 727                         continue;
 728                 }
 729                 debug(" - type=%d\n", type);
 730                 pci_set_region(hose->regions + hose->region_count++, pci_addr,
 731                                addr, size, type);
 732         }
 733
 734         /* Add a region for our local memory */
 735         addr = gd->ram_size;
 736         if (gd->pci_ram_top && gd->pci_ram_top < addr)
 737                 addr = gd->pci_ram_top;
 738         pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
 739                        PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 740
 741         return 0;
 742 }
 743
 744 static int pci_uclass_pre_probe(struct udevice *bus)
 745 {
 746         struct pci_controller *hose;
 747         int ret;
 748
 749         debug("%s, bus=%d/%s, parent=%s\n", __func__, bus->seq, bus->name,
 750               bus->parent->name);
 751         hose = bus->uclass_priv;
 752
 753         /* For bridges, use the top-level PCI controller */
 754         if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) {
 755                 hose->ctlr = bus;
 756                 ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset,
 757                                 bus->of_offset);
 758                 if (ret) {
 759                         debug("%s: Cannot decode regions\n", __func__);
 760                         return ret;
 761                 }
 762         } else {
 763                 struct pci_controller *parent_hose;
 764
 765                 parent_hose = dev_get_uclass_priv(bus->parent);
 766                 hose->ctlr = parent_hose->bus;
 767         }
 768         hose->bus = bus;
 769         hose->first_busno = bus->seq;
 770         hose->last_busno = bus->seq;
 771
 772         return 0;
 773 }
 774
 775 static int pci_uclass_post_probe(struct udevice *bus)
 776 {
 777         int ret;
 778
 779         debug("%s: probing bus %d\n", __func__, bus->seq);
 780         ret = pci_bind_bus_devices(bus);
 781         if (ret)
 782                 return ret;
 783
 784 #ifdef CONFIG_PCI_PNP
 785         ret = pci_auto_config_devices(bus);
 786         if (ret < 0)
 787                 return ret;
 788 #endif
 789
 790 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 791         /*
 792          * Per Intel FSP specification, we should call FSP notify API to
 793          * inform FSP that PCI enumeration has been done so that FSP will
 794          * do any necessary initialization as required by the chipset's
 795          * BIOS Writer's Guide (BWG).
 796          *
 797          * Unfortunately we have to put this call here as with driver model,
 798          * the enumeration is all done on a lazy basis as needed, so until
 799          * something is touched on PCI it won't happen.
 800          *
 801          * Note we only call this 1) after U-Boot is relocated, and 2)
 802          * root bus has finished probing.
 803          */
 804         if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0)) {
 805                 ret = fsp_init_phase_pci();
 806                 if (ret)
 807                         return ret;
 808         }
 809 #endif
 810
 811         return 0;
 812 }
 813
 814 static int pci_uclass_child_post_bind(struct udevice *dev)
 815 {
 816         struct pci_child_platdata *pplat;
 817         struct fdt_pci_addr addr;
 818         int ret;
 819
 820         if (dev->of_offset == -1)
 821                 return 0;
 822
 823         /*
 824          * We could read vendor, device, class if available. But for now we
 825          * just check the address.
 826          */
 827         pplat = dev_get_parent_platdata(dev);
 828         ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
 829                                   FDT_PCI_SPACE_CONFIG, "reg", &addr);
 830
 831         if (ret) {
 832                 if (ret != -ENOENT)
 833                         return -EINVAL;
 834         } else {
 835                 /* extract the devfn from fdt_pci_addr */
 836                 pplat->devfn = addr.phys_hi & 0xff00;
 837         }
 838
 839         return 0;
 840 }
 841
 842 static int pci_bridge_read_config(struct udevice *bus, pci_dev_t bdf,
 843                                   uint offset, ulong *valuep,
 844                                   enum pci_size_t size)
 845 {
 846         struct pci_controller *hose = bus->uclass_priv;
 847
 848         return pci_bus_read_config(hose->ctlr, bdf, offset, valuep, size);
 849 }
 850
 851 static int pci_bridge_write_config(struct udevice *bus, pci_dev_t bdf,
 852                                    uint offset, ulong value,
 853                                    enum pci_size_t size)
 854 {
 855         struct pci_controller *hose = bus->uclass_priv;
 856
 857         return pci_bus_write_config(hose->ctlr, bdf, offset, value, size);
 858 }
 859
 860 static int skip_to_next_device(struct udevice *bus, struct udevice **devp)
 861 {
 862         struct udevice *dev;
 863         int ret = 0;
 864
 865         /*
 866          * Scan through all the PCI controllers. On x86 there will only be one
 867          * but that is not necessarily true on other hardware.
 868          */
 869         do {
 870                 device_find_first_child(bus, &dev);
 871                 if (dev) {
 872                         *devp = dev;
 873                         return 0;
 874                 }
 875                 ret = uclass_next_device(&bus);
 876                 if (ret)
 877                         return ret;
 878         } while (bus);
 879
 880         return 0;
 881 }
 882
 883 int pci_find_next_device(struct udevice **devp)
 884 {
 885         struct udevice *child = *devp;
 886         struct udevice *bus = child->parent;
 887         int ret;
 888
 889         /* First try all the siblings */
 890         *devp = NULL;
 891         while (child) {
 892                 device_find_next_child(&child);
 893                 if (child) {
 894                         *devp = child;
 895                         return 0;
 896                 }
 897         }
 898
 899         /* We ran out of siblings. Try the next bus */
 900         ret = uclass_next_device(&bus);
 901         if (ret)
 902                 return ret;
 903
 904         return bus ? skip_to_next_device(bus, devp) : 0;
 905 }
 906
 907 int pci_find_first_device(struct udevice **devp)
 908 {
 909         struct udevice *bus;
 910         int ret;
 911
 912         *devp = NULL;
 913         ret = uclass_first_device(UCLASS_PCI, &bus);
 914         if (ret)
 915                 return ret;
 916
 917         return skip_to_next_device(bus, devp);
 918 }
 919
 920 UCLASS_DRIVER(pci) = {
 921         .id             = UCLASS_PCI,
 922         .name           = "pci",
 923         .flags          = DM_UC_FLAG_SEQ_ALIAS,
 924         .post_bind      = pci_uclass_post_bind,
 925         .pre_probe      = pci_uclass_pre_probe,
 926         .post_probe     = pci_uclass_post_probe,
 927         .child_post_bind = pci_uclass_child_post_bind,
 928         .per_device_auto_alloc_size = sizeof(struct pci_controller),
 929         .per_child_platdata_auto_alloc_size =
 930                         sizeof(struct pci_child_platdata),
 931 };
 932
 933 static const struct dm_pci_ops pci_bridge_ops = {
 934         .read_config    = pci_bridge_read_config,
 935         .write_config   = pci_bridge_write_config,
 936 };
 937
 938 static const struct udevice_id pci_bridge_ids[] = {
 939         { .compatible = "pci-bridge" },
 940         { }
 941 };
 942
 943 U_BOOT_DRIVER(pci_bridge_drv) = {
 944         .name           = "pci_bridge_drv",
 945         .id             = UCLASS_PCI,
 946         .of_match       = pci_bridge_ids,
 947         .ops            = &pci_bridge_ops,
 948 };
 949
 950 UCLASS_DRIVER(pci_generic) = {
 951         .id             = UCLASS_PCI_GENERIC,
 952         .name           = "pci_generic",
 953 };
 954
 955 static const struct udevice_id pci_generic_ids[] = {
 956         { .compatible = "pci-generic" },
 957         { }
 958 };
 959
 960 U_BOOT_DRIVER(pci_generic_drv) = {
 961         .name           = "pci_generic_drv",
 962         .id             = UCLASS_PCI_GENERIC,
 963         .of_match       = pci_generic_ids,
 964 };