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[people/ms/u-boot.git] / drivers / pcmcia / mpc8xx_pcmcia.c
1 #include <common.h>
2 #include <mpc8xx.h>
3 #include <pcmcia.h>
4
5 #undef CONFIG_PCMCIA
6
7 #if defined(CONFIG_CMD_PCMCIA)
8 #define CONFIG_PCMCIA
9 #endif
10
11 #if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
12 #define CONFIG_PCMCIA
13 #endif
14
15 #if defined(CONFIG_PCMCIA)
16
17 #if defined(CONFIG_IDE_8xx_PCCARD)
18 extern int check_ide_device (int slot);
19 #endif
20
21 extern int pcmcia_hardware_enable (int slot);
22 extern int pcmcia_voltage_set(int slot, int vcc, int vpp);
23
24 #if defined(CONFIG_CMD_PCMCIA)
25 extern int pcmcia_hardware_disable(int slot);
26 #endif
27
28 static u_int m8xx_get_graycode(u_int size);
29 #if 0 /* Disabled */
30 static u_int m8xx_get_speed(u_int ns, u_int is_io);
31 #endif
32
33 /* look up table for pgcrx registers */
34 u_int *pcmcia_pgcrx[2] = {
35 &((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcra,
36 &((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcrb,
37 };
38
39 /*
40 * Search this table to see if the windowsize is
41 * supported...
42 */
43
44 #define M8XX_SIZES_NO 32
45
46 static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
47 { 0x00000001, 0x00000002, 0x00000008, 0x00000004,
48 0x00000080, 0x00000040, 0x00000010, 0x00000020,
49 0x00008000, 0x00004000, 0x00001000, 0x00002000,
50 0x00000100, 0x00000200, 0x00000800, 0x00000400,
51
52 0x0fffffff, 0xffffffff, 0xffffffff, 0xffffffff,
53 0x01000000, 0x02000000, 0xffffffff, 0x04000000,
54 0x00010000, 0x00020000, 0x00080000, 0x00040000,
55 0x00800000, 0x00400000, 0x00100000, 0x00200000 };
56
57
58 /* -------------------------------------------------------------------- */
59
60 #ifdef CONFIG_HMI10
61 #define HMI10_FRAM_TIMING ( PCMCIA_SHT(2) \
62 | PCMCIA_SST(2) \
63 | PCMCIA_SL(4))
64 #endif
65
66 #if defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
67 #define CONFIG_SYS_PCMCIA_TIMING ( PCMCIA_SHT(9) \
68 | PCMCIA_SST(3) \
69 | PCMCIA_SL(12))
70 #else
71 #define CONFIG_SYS_PCMCIA_TIMING ( PCMCIA_SHT(2) \
72 | PCMCIA_SST(4) \
73 | PCMCIA_SL(9))
74 #endif
75
76 /* -------------------------------------------------------------------- */
77
78 int pcmcia_on (void)
79 {
80 u_long reg, base;
81 pcmcia_win_t *win;
82 u_int slotbit;
83 u_int rc, slot;
84 int i;
85
86 debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
87
88 /* intialize the fixed memory windows */
89 win = (pcmcia_win_t *)(&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pbr0);
90 base = CONFIG_SYS_PCMCIA_MEM_ADDR;
91
92 if((reg = m8xx_get_graycode(CONFIG_SYS_PCMCIA_MEM_SIZE)) == -1) {
93 printf ("Cannot set window size to 0x%08x\n",
94 CONFIG_SYS_PCMCIA_MEM_SIZE);
95 return (1);
96 }
97
98 slotbit = PCMCIA_SLOT_x;
99 for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
100 win->br = base;
101
102 #if (PCMCIA_SOCKETS_NO == 2)
103 if (i == 4) /* Another slot starting from win 4 */
104 slotbit = (slotbit ? PCMCIA_PSLOT_A : PCMCIA_PSLOT_B);
105 #endif
106 switch (i) {
107 #ifdef CONFIG_IDE_8xx_PCCARD
108 case 4:
109 #ifdef CONFIG_HMI10
110 { /* map FRAM area */
111 win->or = ( PCMCIA_BSIZE_256K
112 | PCMCIA_PPS_8
113 | PCMCIA_PRS_ATTR
114 | slotbit
115 | PCMCIA_PV
116 | HMI10_FRAM_TIMING );
117 break;
118 }
119 #endif
120 case 0: { /* map attribute memory */
121 win->or = ( PCMCIA_BSIZE_64M
122 | PCMCIA_PPS_8
123 | PCMCIA_PRS_ATTR
124 | slotbit
125 | PCMCIA_PV
126 | CONFIG_SYS_PCMCIA_TIMING );
127 break;
128 }
129 case 5:
130 case 1: { /* map I/O window for data reg */
131 win->or = ( PCMCIA_BSIZE_1K
132 | PCMCIA_PPS_16
133 | PCMCIA_PRS_IO
134 | slotbit
135 | PCMCIA_PV
136 | CONFIG_SYS_PCMCIA_TIMING );
137 break;
138 }
139 case 6:
140 case 2: { /* map I/O window for cmd/ctrl reg block */
141 win->or = ( PCMCIA_BSIZE_1K
142 | PCMCIA_PPS_8
143 | PCMCIA_PRS_IO
144 | slotbit
145 | PCMCIA_PV
146 | CONFIG_SYS_PCMCIA_TIMING );
147 break;
148 }
149 #endif /* CONFIG_IDE_8xx_PCCARD */
150 #ifdef CONFIG_HMI10
151 case 3: { /* map I/O window for 4xUART data/ctrl */
152 win->br += 0x40000;
153 win->or = ( PCMCIA_BSIZE_256K
154 | PCMCIA_PPS_8
155 | PCMCIA_PRS_IO
156 | slotbit
157 | PCMCIA_PV
158 | CONFIG_SYS_PCMCIA_TIMING );
159 break;
160 }
161 #endif /* CONFIG_HMI10 */
162 default: /* set to not valid */
163 win->or = 0;
164 break;
165 }
166
167 debug ("MemWin %d: PBR 0x%08lX POR %08lX\n",
168 i, win->br, win->or);
169 base += CONFIG_SYS_PCMCIA_MEM_SIZE;
170 ++win;
171 }
172
173 for (i=0, rc=0, slot=_slot_; i<PCMCIA_SOCKETS_NO; i++, slot = !slot) {
174 /* turn off voltage */
175 if ((rc = pcmcia_voltage_set(slot, 0, 0)))
176 continue;
177
178 /* Enable external hardware */
179 if ((rc = pcmcia_hardware_enable(slot)))
180 continue;
181
182 #ifdef CONFIG_IDE_8xx_PCCARD
183 if ((rc = check_ide_device(i)))
184 continue;
185 #endif
186 }
187 return rc;
188 }
189
190 #if defined(CONFIG_CMD_PCMCIA)
191 int pcmcia_off (void)
192 {
193 int i;
194 pcmcia_win_t *win;
195
196 printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
197
198 /* clear interrupt state, and disable interrupts */
199 ((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_);
200 ((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
201
202 /* turn off interrupt and disable CxOE */
203 PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE;
204
205 /* turn off memory windows */
206 win = (pcmcia_win_t *)(&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pbr0);
207
208 for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
209 /* disable memory window */
210 win->or = 0;
211 ++win;
212 }
213
214 /* turn off voltage */
215 pcmcia_voltage_set(_slot_, 0, 0);
216
217 /* disable external hardware */
218 printf ("Shutdown and Poweroff " PCMCIA_SLOT_MSG "\n");
219 pcmcia_hardware_disable(_slot_);
220 return 0;
221 }
222 #endif
223
224
225 static u_int m8xx_get_graycode(u_int size)
226 {
227 u_int k;
228
229 for (k = 0; k < M8XX_SIZES_NO; k++) {
230 if(m8xx_size_to_gray[k] == size)
231 break;
232 }
233
234 if((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
235 k = -1;
236
237 return k;
238 }
239
240 #if 0
241
242 #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
243
244 /* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
245 * SYPCR is write once only, therefore must the slowest memory be faster
246 * than the bus monitor or we will get a machine check due to the bus timeout.
247 */
248 #undef PCMCIA_BMT_LIMIT
249 #define PCMCIA_BMT_LIMIT (6*8)
250 #endif
251
252 static u_int m8xx_get_speed(u_int ns, u_int is_io)
253 {
254 u_int reg, clocks, psst, psl, psht;
255
256 if(!ns) {
257
258 /*
259 * We get called with IO maps setup to 0ns
260 * if not specified by the user.
261 * They should be 255ns.
262 */
263
264 if(is_io)
265 ns = 255;
266 else
267 ns = 100; /* fast memory if 0 */
268 }
269
270 /*
271 * In PSST, PSL, PSHT fields we tell the controller
272 * timing parameters in CLKOUT clock cycles.
273 * CLKOUT is the same as GCLK2_50.
274 */
275
276 /* how we want to adjust the timing - in percent */
277
278 #define ADJ 180 /* 80 % longer accesstime - to be sure */
279
280 clocks = ((M8XX_BUSFREQ / 1000) * ns) / 1000;
281 clocks = (clocks * ADJ) / (100*1000);
282
283 if(clocks >= PCMCIA_BMT_LIMIT) {
284 DEBUG(0, "Max access time limit reached\n");
285 clocks = PCMCIA_BMT_LIMIT-1;
286 }
287
288 psst = clocks / 7; /* setup time */
289 psht = clocks / 7; /* hold time */
290 psl = (clocks * 5) / 7; /* strobe length */
291
292 psst += clocks - (psst + psht + psl);
293
294 reg = psst << 12;
295 reg |= psl << 7;
296 reg |= psht << 16;
297
298 return reg;
299 }
300 #endif /* 0 */
301
302 #endif /* CONFIG_PCMCIA */