2 * Copyright (C) 2016 Marvell International Ltd.
4 * SPDX-License-Identifier: GPL-2.0
5 * https://spdx.org/licenses
13 #include <dm/pinctrl.h>
15 #include <asm/system.h>
17 #include <asm/arch-armada8k/soc-info.h>
18 #include "pinctrl-mvebu.h"
20 DECLARE_GLOBAL_DATA_PTR
;
23 * mvebu_pinctrl_set_state: configure pin functions.
24 * @dev: the pinctrl device to be configured.
25 * @config: the state to be configured.
26 * @return: 0 in success
28 int mvebu_pinctrl_set_state(struct udevice
*dev
, struct udevice
*config
)
30 const void *blob
= gd
->fdt_blob
;
31 int node
= dev_of_offset(config
);
32 struct mvebu_pinctrl_priv
*priv
;
33 u32 pin_arr
[MVEBU_MAX_PINS_PER_BANK
];
37 priv
= dev_get_priv(dev
);
39 pin_count
= fdtdec_get_int_array_count(blob
, node
,
42 MVEBU_MAX_PINS_PER_BANK
);
44 debug("Failed reading pins array for pinconfig %s (%d)\n",
45 config
->name
, pin_count
);
49 function
= fdtdec_get_int(blob
, node
, "marvell,function", 0xff);
51 for (i
= 0; i
< pin_count
; i
++) {
56 if (function
> priv
->max_func
) {
57 debug("Illegal function %d for pinconfig %s\n",
58 function
, config
->name
);
62 /* Calculate register address and bit in register */
63 reg_offset
= priv
->reg_direction
* 4 *
64 (pin
>> (PIN_REG_SHIFT
));
65 field_offset
= (BITS_PER_PIN
) * (pin
& PIN_FIELD_MASK
);
67 clrsetbits_le32(priv
->base_reg
+ reg_offset
,
68 PIN_FUNC_MASK
<< field_offset
,
69 (function
& PIN_FUNC_MASK
) << field_offset
);
76 * mvebu_pinctrl_set_state_all: configure the entire bank pin functions.
77 * @dev: the pinctrl device to be configured.
78 * @config: the state to be configured.
79 * @return: 0 in success
81 static int mvebu_pinctrl_set_state_all(struct udevice
*dev
,
82 struct udevice
*config
)
84 const void *blob
= gd
->fdt_blob
;
85 int node
= dev_of_offset(config
);
86 struct mvebu_pinctrl_priv
*priv
;
87 u32 func_arr
[MVEBU_MAX_PINS_PER_BANK
];
90 priv
= dev_get_priv(dev
);
92 err
= fdtdec_get_int_array(blob
, node
, "pin-func",
93 func_arr
, priv
->pin_cnt
);
95 debug("Failed reading pin functions for bank %s\n",
100 for (pin
= 0; pin
< priv
->pin_cnt
; pin
++) {
103 u32 func
= func_arr
[pin
];
105 /* Bypass pins with function 0xFF */
107 debug("Warning: pin %d value is not modified ", pin
);
108 debug("(kept as default)\n");
110 } else if (func
> priv
->max_func
) {
111 debug("Illegal function %d for pin %d\n", func
, pin
);
115 /* Calculate register address and bit in register */
116 reg_offset
= priv
->reg_direction
* 4 *
117 (pin
>> (PIN_REG_SHIFT
));
118 field_offset
= (BITS_PER_PIN
) * (pin
& PIN_FIELD_MASK
);
120 clrsetbits_le32(priv
->base_reg
+ reg_offset
,
121 PIN_FUNC_MASK
<< field_offset
,
122 (func
& PIN_FUNC_MASK
) << field_offset
);
128 int mvebu_pinctl_probe(struct udevice
*dev
)
130 const void *blob
= gd
->fdt_blob
;
131 int node
= dev_of_offset(dev
);
132 struct mvebu_pinctrl_priv
*priv
;
134 priv
= dev_get_priv(dev
);
136 debug("%s: Failed to get private\n", __func__
);
140 priv
->base_reg
= devfdt_get_addr_ptr(dev
);
141 if (priv
->base_reg
== (void *)FDT_ADDR_T_NONE
) {
142 debug("%s: Failed to get base address\n", __func__
);
146 priv
->pin_cnt
= fdtdec_get_int(blob
, node
, "pin-count",
147 MVEBU_MAX_PINS_PER_BANK
);
148 priv
->max_func
= fdtdec_get_int(blob
, node
, "max-func",
150 priv
->bank_name
= fdt_getprop(blob
, node
, "bank-name", NULL
);
152 priv
->reg_direction
= 1;
153 if (fdtdec_get_bool(blob
, node
, "reverse-reg"))
154 priv
->reg_direction
= -1;
156 return mvebu_pinctrl_set_state_all(dev
, dev
);
159 static struct pinctrl_ops mvebu_pinctrl_ops
= {
160 .set_state
= mvebu_pinctrl_set_state
163 static const struct udevice_id mvebu_pinctrl_ids
[] = {
164 { .compatible
= "marvell,mvebu-pinctrl" },
165 { .compatible
= "marvell,armada-ap806-pinctrl" },
166 { .compatible
= "marvell,a70x0-pinctrl" },
167 { .compatible
= "marvell,a80x0-cp0-pinctrl" },
168 { .compatible
= "marvell,a80x0-cp1-pinctrl" },
172 U_BOOT_DRIVER(pinctrl_mvebu
) = {
173 .name
= "mvebu_pinctrl",
174 .id
= UCLASS_PINCTRL
,
175 .of_match
= mvebu_pinctrl_ids
,
176 .priv_auto_alloc_size
= sizeof(struct mvebu_pinctrl_priv
),
177 .ops
= &mvebu_pinctrl_ops
,
178 .probe
= mvebu_pinctl_probe