drivers/power/domain/imx8mp-hsiomix.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2022 Marek Vasut <marex@denx.de>
   4  */
   5
   6 #include <common.h>
   7 #include <asm/io.h>
   8 #include <clk.h>
   9 #include <dm.h>
  10 #include <dm/device.h>
  11 #include <dm/device_compat.h>
  12 #include <power-domain-uclass.h>
  13
  14 #include <dt-bindings/power/imx8mp-power.h>
  15
  16 #define GPR_REG0                0x0
  17 #define  PCIE_CLOCK_MODULE_EN   BIT(0)
  18 #define  USB_CLOCK_MODULE_EN    BIT(1)
  19 #define  PCIE_PHY_APB_RST       BIT(4)
  20 #define  PCIE_PHY_INIT_RST      BIT(5)
  21
  22 struct imx8mp_hsiomix_priv {
  23         void __iomem *base;
  24         struct clk clk_usb;
  25         struct clk clk_pcie;
  26         struct power_domain pd_bus;
  27         struct power_domain pd_usb;
  28         struct power_domain pd_pcie;
  29         struct power_domain pd_usb_phy1;
  30         struct power_domain pd_usb_phy2;
  31         struct power_domain pd_pcie_phy;
  32 };
  33
  34 static int imx8mp_hsiomix_set(struct power_domain *power_domain, bool power_on)
  35 {
  36         struct udevice *dev = power_domain->dev;
  37         struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
  38         struct power_domain *domain = NULL;
  39         struct clk *clk = NULL;
  40         u32 gpr_reg0_bits = 0;
  41         int ret;
  42
  43         switch (power_domain->id) {
  44         case IMX8MP_HSIOBLK_PD_USB:
  45                 domain = &priv->pd_usb;
  46                 clk = &priv->clk_usb;
  47                 gpr_reg0_bits |= USB_CLOCK_MODULE_EN;
  48                 break;
  49         case IMX8MP_HSIOBLK_PD_USB_PHY1:
  50                 domain = &priv->pd_usb_phy1;
  51                 break;
  52         case IMX8MP_HSIOBLK_PD_USB_PHY2:
  53                 domain = &priv->pd_usb_phy2;
  54                 break;
  55         case IMX8MP_HSIOBLK_PD_PCIE:
  56                 domain = &priv->pd_pcie;
  57                 clk = &priv->clk_pcie;
  58                 gpr_reg0_bits |= PCIE_CLOCK_MODULE_EN;
  59                 break;
  60         case IMX8MP_HSIOBLK_PD_PCIE_PHY:
  61                 domain = &priv->pd_pcie_phy;
  62                 /* Bits to deassert PCIe PHY reset */
  63                 gpr_reg0_bits |= PCIE_PHY_APB_RST | PCIE_PHY_INIT_RST;
  64                 break;
  65         default:
  66                 dev_err(dev, "unknown power domain id: %ld\n",
  67                         power_domain->id);
  68                 return -EINVAL;
  69         }
  70
  71         if (power_on) {
  72                 ret = power_domain_on(&priv->pd_bus);
  73                 if (ret)
  74                         return ret;
  75
  76                 ret = power_domain_on(domain);
  77                 if (ret)
  78                         goto err_pd;
  79
  80                 if (clk) {
  81                         ret = clk_enable(clk);
  82                         if (ret)
  83                                 goto err_clk;
  84                 }
  85
  86                 if (gpr_reg0_bits)
  87                         setbits_le32(priv->base + GPR_REG0, gpr_reg0_bits);
  88         } else {
  89                 if (gpr_reg0_bits)
  90                         clrbits_le32(priv->base + GPR_REG0, gpr_reg0_bits);
  91
  92                 if (clk)
  93                         clk_disable(clk);
  94
  95                 power_domain_off(domain);
  96                 power_domain_off(&priv->pd_bus);
  97         }
  98
  99         return 0;
 100
 101 err_clk:
 102         power_domain_off(domain);
 103 err_pd:
 104         power_domain_off(&priv->pd_bus);
 105         return ret;
 106 }
 107
 108 static int imx8mp_hsiomix_on(struct power_domain *power_domain)
 109 {
 110         return imx8mp_hsiomix_set(power_domain, true);
 111 }
 112
 113 static int imx8mp_hsiomix_off(struct power_domain *power_domain)
 114 {
 115         return imx8mp_hsiomix_set(power_domain, false);
 116 }
 117
 118 static int imx8mp_hsiomix_of_xlate(struct power_domain *power_domain,
 119                                    struct ofnode_phandle_args *args)
 120 {
 121         power_domain->id = args->args[0];
 122
 123         return 0;
 124 }
 125
 126 static int imx8mp_hsiomix_probe(struct udevice *dev)
 127 {
 128         struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
 129         int ret;
 130
 131         priv->base = dev_read_addr_ptr(dev);
 132
 133         ret = clk_get_by_name(dev, "usb", &priv->clk_usb);
 134         if (ret < 0)
 135                 return ret;
 136
 137         ret = clk_get_by_name(dev, "pcie", &priv->clk_pcie);
 138         if (ret < 0)
 139                 return ret;
 140
 141         ret = power_domain_get_by_name(dev, &priv->pd_bus, "bus");
 142         if (ret < 0)
 143                 return ret;
 144
 145         ret = power_domain_get_by_name(dev, &priv->pd_usb, "usb");
 146         if (ret < 0)
 147                 goto err_pd_usb;
 148
 149         ret = power_domain_get_by_name(dev, &priv->pd_usb_phy1, "usb-phy1");
 150         if (ret < 0)
 151                 goto err_pd_usb_phy1;
 152
 153         ret = power_domain_get_by_name(dev, &priv->pd_usb_phy2, "usb-phy2");
 154         if (ret < 0)
 155                 goto err_pd_usb_phy2;
 156
 157         ret = power_domain_get_by_name(dev, &priv->pd_pcie, "pcie");
 158         if (ret < 0)
 159                 goto err_pd_pcie;
 160
 161         ret = power_domain_get_by_name(dev, &priv->pd_pcie_phy, "pcie-phy");
 162         if (ret < 0)
 163                 goto err_pd_pcie_phy;
 164
 165         return 0;
 166
 167 err_pd_pcie_phy:
 168         power_domain_free(&priv->pd_pcie);
 169 err_pd_pcie:
 170         power_domain_free(&priv->pd_usb_phy2);
 171 err_pd_usb_phy2:
 172         power_domain_free(&priv->pd_usb_phy1);
 173 err_pd_usb_phy1:
 174         power_domain_free(&priv->pd_usb);
 175 err_pd_usb:
 176         power_domain_free(&priv->pd_bus);
 177         return ret;
 178 }
 179
 180 static const struct udevice_id imx8mp_hsiomix_ids[] = {
 181         { .compatible = "fsl,imx8mp-hsio-blk-ctrl" },
 182         { }
 183 };
 184
 185 struct power_domain_ops imx8mp_hsiomix_ops = {
 186         .on = imx8mp_hsiomix_on,
 187         .off = imx8mp_hsiomix_off,
 188         .of_xlate = imx8mp_hsiomix_of_xlate,
 189 };
 190
 191 U_BOOT_DRIVER(imx8mp_hsiomix) = {
 192         .name           = "imx8mp_hsiomix",
 193         .id             = UCLASS_POWER_DOMAIN,
 194         .of_match       = imx8mp_hsiomix_ids,
 195         .probe          = imx8mp_hsiomix_probe,
 196         .priv_auto      = sizeof(struct imx8mp_hsiomix_priv),
 197         .ops            = &imx8mp_hsiomix_ops,
 198 };