3 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
5 * SPDX-License-Identifier: GPL-2.0+
9 * Date & Time support for ST Electronics M48T35Ax RTC
20 #if defined(CONFIG_CMD_DATE)
22 static uchar
rtc_read (uchar reg
);
23 static void rtc_write (uchar reg
, uchar val
);
25 /* ------------------------------------------------------------------------- */
27 int rtc_get (struct rtc_time
*tmp
)
29 uchar sec
, min
, hour
, cent_day
, date
, month
, year
;
30 uchar ccr
; /* Clock control register */
32 /* Lock RTC for read using clock control register */
39 hour
= rtc_read (0x3);
40 cent_day
= rtc_read (0x4);
41 date
= rtc_read (0x5);
42 month
= rtc_read (0x6);
43 year
= rtc_read (0x7);
50 debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
51 "hr: %02x min: %02x sec: %02x\n",
52 year
, month
, date
, cent_day
,
55 tmp
->tm_sec
= bcd2bin (sec
& 0x7F);
56 tmp
->tm_min
= bcd2bin (min
& 0x7F);
57 tmp
->tm_hour
= bcd2bin (hour
& 0x3F);
58 tmp
->tm_mday
= bcd2bin (date
& 0x3F);
59 tmp
->tm_mon
= bcd2bin (month
& 0x1F);
60 tmp
->tm_year
= bcd2bin (year
) + ((cent_day
& 0x10) ? 2000 : 1900);
61 tmp
->tm_wday
= bcd2bin (cent_day
& 0x07);
65 debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
66 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
67 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
72 int rtc_set (struct rtc_time
*tmp
)
74 uchar ccr
; /* Clock control register */
77 debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
78 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
79 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
81 /* Lock RTC for write using clock control register */
86 rtc_write (0x07, bin2bcd(tmp
->tm_year
% 100));
87 rtc_write (0x06, bin2bcd(tmp
->tm_mon
));
88 rtc_write (0x05, bin2bcd(tmp
->tm_mday
));
90 century
= ((tmp
->tm_year
>= 2000) ? 0x10 : 0) | 0x20;
91 rtc_write (0x04, bin2bcd(tmp
->tm_wday
) | century
);
93 rtc_write (0x03, bin2bcd(tmp
->tm_hour
));
94 rtc_write (0x02, bin2bcd(tmp
->tm_min
));
95 rtc_write (0x01, bin2bcd(tmp
->tm_sec
));
105 void rtc_reset (void)
109 /* Clear all clock control registers */
110 rtc_write (0x0, 0x80); /* No Read Lock or calibration */
113 val
= rtc_read (0x1);
117 /* Enable century / disable frequency test */
118 val
= rtc_read (0x4);
119 val
= (val
& 0xBF) | 0x20;
122 /* Clear write lock */
126 /* ------------------------------------------------------------------------- */
128 static uchar
rtc_read (uchar reg
)
130 return *(unsigned char *)
131 ((CONFIG_SYS_NVRAM_BASE_ADDR
+ CONFIG_SYS_NVRAM_SIZE
- 8) + reg
);
134 static void rtc_write (uchar reg
, uchar val
)
137 ((CONFIG_SYS_NVRAM_BASE_ADDR
+ CONFIG_SYS_NVRAM_SIZE
- 8) + reg
) = val
;