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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/rtc/rx8025.c
3 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Epson RX8025 RTC driver.
33 #if defined(CONFIG_CMD_DATE)
35 /*---------------------------------------------------------------------*/
39 #define DEBUGR(fmt,args...) printf(fmt ,##args)
41 #define DEBUGR(fmt,args...)
43 /*---------------------------------------------------------------------*/
45 #ifndef CONFIG_SYS_I2C_RTC_ADDR
46 # define CONFIG_SYS_I2C_RTC_ADDR 0x32
50 * RTC register addresses
52 #define RTC_SEC_REG_ADDR 0x00
53 #define RTC_MIN_REG_ADDR 0x01
54 #define RTC_HR_REG_ADDR 0x02
55 #define RTC_DAY_REG_ADDR 0x03
56 #define RTC_DATE_REG_ADDR 0x04
57 #define RTC_MON_REG_ADDR 0x05
58 #define RTC_YR_REG_ADDR 0x06
60 #define RTC_CTL1_REG_ADDR 0x0e
61 #define RTC_CTL2_REG_ADDR 0x0f
64 * Control register 1 bits
66 #define RTC_CTL1_BIT_2412 0x20
69 * Control register 2 bits
71 #define RTC_CTL2_BIT_PON 0x10
72 #define RTC_CTL2_BIT_VDET 0x40
73 #define RTC_CTL2_BIT_XST 0x20
74 #define RTC_CTL2_BIT_VDSL 0x80
77 * Note: the RX8025 I2C RTC requires register
78 * reads and write to consist of a single bus
79 * cycle. It is not allowed to write the register
80 * address in a first cycle that is terminated by
81 * a STOP condition. The chips needs a 'restart'
82 * sequence (start sequence without a prior stop).
83 * This driver has been written for a 4xx board.
84 * U-Boot's 4xx i2c driver is currently not capable
85 * to generate such cycles to some work arounds
89 /* static uchar rtc_read (uchar reg); */
90 #define rtc_read(reg) buf[((reg) + 1) & 0xf]
92 static void rtc_write (uchar reg
, uchar val
);
93 static uchar
bin2bcd (unsigned int n
);
94 static unsigned bcd2bin (uchar c
);
97 * Get the current time from the RTC
99 int rtc_get (struct rtc_time
*tmp
)
102 uchar sec
, min
, hour
, mday
, wday
, mon
, year
, ctl2
;
105 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR
, 0, 0, buf
, 16))
106 printf("Error reading from RTC\n");
108 sec
= rtc_read(RTC_SEC_REG_ADDR
);
109 min
= rtc_read(RTC_MIN_REG_ADDR
);
110 hour
= rtc_read(RTC_HR_REG_ADDR
);
111 wday
= rtc_read(RTC_DAY_REG_ADDR
);
112 mday
= rtc_read(RTC_DATE_REG_ADDR
);
113 mon
= rtc_read(RTC_MON_REG_ADDR
);
114 year
= rtc_read(RTC_YR_REG_ADDR
);
116 DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
117 "hr: %02x min: %02x sec: %02x\n",
118 year
, mon
, mday
, wday
, hour
, min
, sec
);
121 ctl2
= rtc_read(RTC_CTL2_REG_ADDR
);
122 if (ctl2
& RTC_CTL2_BIT_PON
) {
123 printf("RTC: power-on detected\n");
127 if (ctl2
& RTC_CTL2_BIT_VDET
) {
128 printf("RTC: voltage drop detected\n");
132 if (!(ctl2
& RTC_CTL2_BIT_XST
)) {
133 printf("RTC: oscillator stop detected\n");
137 tmp
->tm_sec
= bcd2bin (sec
& 0x7F);
138 tmp
->tm_min
= bcd2bin (min
& 0x7F);
139 if (rtc_read(RTC_CTL1_REG_ADDR
) & RTC_CTL1_BIT_2412
)
140 tmp
->tm_hour
= bcd2bin (hour
& 0x3F);
142 tmp
->tm_hour
= bcd2bin (hour
& 0x1F) % 12 +
143 ((hour
& 0x20) ? 12 : 0);
144 tmp
->tm_mday
= bcd2bin (mday
& 0x3F);
145 tmp
->tm_mon
= bcd2bin (mon
& 0x1F);
146 tmp
->tm_year
= bcd2bin (year
) + ( bcd2bin (year
) >= 70 ? 1900 : 2000);
147 tmp
->tm_wday
= bcd2bin (wday
& 0x07);
151 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
152 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
153 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
161 int rtc_set (struct rtc_time
*tmp
)
163 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
164 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
165 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
167 if (tmp
->tm_year
< 1970 || tmp
->tm_year
> 2069)
168 printf("WARNING: year should be between 1970 and 2069!\n");
170 rtc_write (RTC_YR_REG_ADDR
, bin2bcd (tmp
->tm_year
% 100));
171 rtc_write (RTC_MON_REG_ADDR
, bin2bcd (tmp
->tm_mon
));
172 rtc_write (RTC_DAY_REG_ADDR
, bin2bcd (tmp
->tm_wday
));
173 rtc_write (RTC_DATE_REG_ADDR
, bin2bcd (tmp
->tm_mday
));
174 rtc_write (RTC_HR_REG_ADDR
, bin2bcd (tmp
->tm_hour
));
175 rtc_write (RTC_MIN_REG_ADDR
, bin2bcd (tmp
->tm_min
));
176 rtc_write (RTC_SEC_REG_ADDR
, bin2bcd (tmp
->tm_sec
));
178 rtc_write (RTC_CTL1_REG_ADDR
, RTC_CTL1_BIT_2412
);
184 * Reset the RTC. We setting the date back to 1970-01-01.
186 void rtc_reset (void)
192 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR
, 0, 0, buf
, 16))
193 printf("Error reading from RTC\n");
195 ctl2
= rtc_read(RTC_CTL2_REG_ADDR
);
196 ctl2
&= ~(RTC_CTL2_BIT_PON
| RTC_CTL2_BIT_VDET
);
197 ctl2
|= RTC_CTL2_BIT_XST
| RTC_CTL2_BIT_VDSL
;
198 rtc_write (RTC_CTL2_REG_ADDR
, ctl2
);
209 printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
210 tmp
.tm_year
, tmp
.tm_mon
, tmp
.tm_mday
,
211 tmp
.tm_hour
, tmp
.tm_min
, tmp
.tm_sec
);
219 static void rtc_write (uchar reg
, uchar val
)
224 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR
, 0, 0, buf
, 2) != 0)
225 printf("Error writing to RTC\n");
229 static unsigned bcd2bin (uchar n
)
231 return ((((n
>> 4) & 0x0F) * 10) + (n
& 0x0F));
234 static unsigned char bin2bcd (unsigned int n
)
236 return (((n
/ 10) << 4) | (n
% 10));
239 #endif /* CONFIG_RTC_RX8025 && CONFIG_CMD_DATE */