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hpsa: enhance device messages
[people/ms/linux.git] / drivers / scsi / hpsa.c
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2014-2015 PMC-Sierra, Inc.
4 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
14 *
15 * Questions/Comments/Bugfixes to storagedev@pmcs.com
16 *
17 */
18
19 #include <linux/module.h>
20 #include <linux/interrupt.h>
21 #include <linux/types.h>
22 #include <linux/pci.h>
23 #include <linux/pci-aspm.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/delay.h>
27 #include <linux/fs.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/spinlock.h>
31 #include <linux/compat.h>
32 #include <linux/blktrace_api.h>
33 #include <linux/uaccess.h>
34 #include <linux/io.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/completion.h>
37 #include <linux/moduleparam.h>
38 #include <scsi/scsi.h>
39 #include <scsi/scsi_cmnd.h>
40 #include <scsi/scsi_device.h>
41 #include <scsi/scsi_host.h>
42 #include <scsi/scsi_tcq.h>
43 #include <scsi/scsi_eh.h>
44 #include <scsi/scsi_dbg.h>
45 #include <linux/cciss_ioctl.h>
46 #include <linux/string.h>
47 #include <linux/bitmap.h>
48 #include <linux/atomic.h>
49 #include <linux/jiffies.h>
50 #include <linux/percpu-defs.h>
51 #include <linux/percpu.h>
52 #include <asm/unaligned.h>
53 #include <asm/div64.h>
54 #include "hpsa_cmd.h"
55 #include "hpsa.h"
56
57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
58 #define HPSA_DRIVER_VERSION "3.4.10-0"
59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
60 #define HPSA "hpsa"
61
62 /* How long to wait for CISS doorbell communication */
63 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
64 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
65 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
66 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
67 #define MAX_IOCTL_CONFIG_WAIT 1000
68
69 /*define how many times we will try a command because of bus resets */
70 #define MAX_CMD_RETRIES 3
71
72 /* Embedded module documentation macros - see modules.h */
73 MODULE_AUTHOR("Hewlett-Packard Company");
74 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
75 HPSA_DRIVER_VERSION);
76 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
77 MODULE_VERSION(HPSA_DRIVER_VERSION);
78 MODULE_LICENSE("GPL");
79
80 static int hpsa_allow_any;
81 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
82 MODULE_PARM_DESC(hpsa_allow_any,
83 "Allow hpsa driver to access unknown HP Smart Array hardware");
84 static int hpsa_simple_mode;
85 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
86 MODULE_PARM_DESC(hpsa_simple_mode,
87 "Use 'simple mode' rather than 'performant mode'");
88
89 /* define the PCI info for the cards we can control */
90 static const struct pci_device_id hpsa_pci_device_id[] = {
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
131 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
132 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
133 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
134 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
137 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
138 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
139 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
140 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
141 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
142 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
143 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
144 {0,}
145 };
146
147 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
148
149 /* board_id = Subsystem Device ID & Vendor ID
150 * product = Marketing Name for the board
151 * access = Address of the struct of function pointers
152 */
153 static struct board_type products[] = {
154 {0x3241103C, "Smart Array P212", &SA5_access},
155 {0x3243103C, "Smart Array P410", &SA5_access},
156 {0x3245103C, "Smart Array P410i", &SA5_access},
157 {0x3247103C, "Smart Array P411", &SA5_access},
158 {0x3249103C, "Smart Array P812", &SA5_access},
159 {0x324A103C, "Smart Array P712m", &SA5_access},
160 {0x324B103C, "Smart Array P711m", &SA5_access},
161 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
162 {0x3350103C, "Smart Array P222", &SA5_access},
163 {0x3351103C, "Smart Array P420", &SA5_access},
164 {0x3352103C, "Smart Array P421", &SA5_access},
165 {0x3353103C, "Smart Array P822", &SA5_access},
166 {0x3354103C, "Smart Array P420i", &SA5_access},
167 {0x3355103C, "Smart Array P220i", &SA5_access},
168 {0x3356103C, "Smart Array P721m", &SA5_access},
169 {0x1921103C, "Smart Array P830i", &SA5_access},
170 {0x1922103C, "Smart Array P430", &SA5_access},
171 {0x1923103C, "Smart Array P431", &SA5_access},
172 {0x1924103C, "Smart Array P830", &SA5_access},
173 {0x1926103C, "Smart Array P731m", &SA5_access},
174 {0x1928103C, "Smart Array P230i", &SA5_access},
175 {0x1929103C, "Smart Array P530", &SA5_access},
176 {0x21BD103C, "Smart Array P244br", &SA5_access},
177 {0x21BE103C, "Smart Array P741m", &SA5_access},
178 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
179 {0x21C0103C, "Smart Array P440ar", &SA5_access},
180 {0x21C1103C, "Smart Array P840ar", &SA5_access},
181 {0x21C2103C, "Smart Array P440", &SA5_access},
182 {0x21C3103C, "Smart Array P441", &SA5_access},
183 {0x21C4103C, "Smart Array", &SA5_access},
184 {0x21C5103C, "Smart Array P841", &SA5_access},
185 {0x21C6103C, "Smart HBA H244br", &SA5_access},
186 {0x21C7103C, "Smart HBA H240", &SA5_access},
187 {0x21C8103C, "Smart HBA H241", &SA5_access},
188 {0x21C9103C, "Smart Array", &SA5_access},
189 {0x21CA103C, "Smart Array P246br", &SA5_access},
190 {0x21CB103C, "Smart Array P840", &SA5_access},
191 {0x21CC103C, "Smart Array", &SA5_access},
192 {0x21CD103C, "Smart Array", &SA5_access},
193 {0x21CE103C, "Smart HBA", &SA5_access},
194 {0x05809005, "SmartHBA-SA", &SA5_access},
195 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
196 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
197 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
198 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
199 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
200 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
201 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
202 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
203 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
204 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
205 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
206 };
207
208 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
209 static const struct scsi_cmnd hpsa_cmd_busy;
210 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
211 static const struct scsi_cmnd hpsa_cmd_idle;
212 static int number_of_controllers;
213
214 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
215 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
216 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
217
218 #ifdef CONFIG_COMPAT
219 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
220 void __user *arg);
221 #endif
222
223 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
224 static struct CommandList *cmd_alloc(struct ctlr_info *h);
225 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
226 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
227 struct scsi_cmnd *scmd);
228 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
229 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
230 int cmd_type);
231 static void hpsa_free_cmd_pool(struct ctlr_info *h);
232 #define VPD_PAGE (1 << 8)
233 #define HPSA_SIMPLE_ERROR_BITS 0x03
234
235 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
236 static void hpsa_scan_start(struct Scsi_Host *);
237 static int hpsa_scan_finished(struct Scsi_Host *sh,
238 unsigned long elapsed_time);
239 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
240
241 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
242 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
243 static int hpsa_slave_alloc(struct scsi_device *sdev);
244 static int hpsa_slave_configure(struct scsi_device *sdev);
245 static void hpsa_slave_destroy(struct scsi_device *sdev);
246
247 static void hpsa_update_scsi_devices(struct ctlr_info *h);
248 static int check_for_unit_attention(struct ctlr_info *h,
249 struct CommandList *c);
250 static void check_ioctl_unit_attention(struct ctlr_info *h,
251 struct CommandList *c);
252 /* performant mode helper functions */
253 static void calc_bucket_map(int *bucket, int num_buckets,
254 int nsgs, int min_blocks, u32 *bucket_map);
255 static void hpsa_free_performant_mode(struct ctlr_info *h);
256 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
257 static inline u32 next_command(struct ctlr_info *h, u8 q);
258 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
259 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
260 u64 *cfg_offset);
261 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
262 unsigned long *memory_bar);
263 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
264 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
265 int wait_for_ready);
266 static inline void finish_cmd(struct CommandList *c);
267 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
268 #define BOARD_NOT_READY 0
269 #define BOARD_READY 1
270 static void hpsa_drain_accel_commands(struct ctlr_info *h);
271 static void hpsa_flush_cache(struct ctlr_info *h);
272 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
273 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
274 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
275 static void hpsa_command_resubmit_worker(struct work_struct *work);
276 static u32 lockup_detected(struct ctlr_info *h);
277 static int detect_controller_lockup(struct ctlr_info *h);
278 static void hpsa_disable_rld_caching(struct ctlr_info *h);
279 static int hpsa_luns_changed(struct ctlr_info *h);
280
281 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
282 {
283 unsigned long *priv = shost_priv(sdev->host);
284 return (struct ctlr_info *) *priv;
285 }
286
287 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
288 {
289 unsigned long *priv = shost_priv(sh);
290 return (struct ctlr_info *) *priv;
291 }
292
293 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
294 {
295 return c->scsi_cmd == SCSI_CMD_IDLE;
296 }
297
298 static inline bool hpsa_is_pending_event(struct CommandList *c)
299 {
300 return c->abort_pending || c->reset_pending;
301 }
302
303 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
304 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
305 u8 *sense_key, u8 *asc, u8 *ascq)
306 {
307 struct scsi_sense_hdr sshdr;
308 bool rc;
309
310 *sense_key = -1;
311 *asc = -1;
312 *ascq = -1;
313
314 if (sense_data_len < 1)
315 return;
316
317 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
318 if (rc) {
319 *sense_key = sshdr.sense_key;
320 *asc = sshdr.asc;
321 *ascq = sshdr.ascq;
322 }
323 }
324
325 static int check_for_unit_attention(struct ctlr_info *h,
326 struct CommandList *c)
327 {
328 u8 sense_key, asc, ascq;
329 int sense_len;
330
331 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
332 sense_len = sizeof(c->err_info->SenseInfo);
333 else
334 sense_len = c->err_info->SenseLen;
335
336 decode_sense_data(c->err_info->SenseInfo, sense_len,
337 &sense_key, &asc, &ascq);
338 if (sense_key != UNIT_ATTENTION || asc == 0xff)
339 return 0;
340
341 switch (asc) {
342 case STATE_CHANGED:
343 dev_warn(&h->pdev->dev,
344 "%s: a state change detected, command retried\n",
345 h->devname);
346 break;
347 case LUN_FAILED:
348 dev_warn(&h->pdev->dev,
349 "%s: LUN failure detected\n", h->devname);
350 break;
351 case REPORT_LUNS_CHANGED:
352 dev_warn(&h->pdev->dev,
353 "%s: report LUN data changed\n", h->devname);
354 /*
355 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
356 * target (array) devices.
357 */
358 break;
359 case POWER_OR_RESET:
360 dev_warn(&h->pdev->dev,
361 "%s: a power on or device reset detected\n",
362 h->devname);
363 break;
364 case UNIT_ATTENTION_CLEARED:
365 dev_warn(&h->pdev->dev,
366 "%s: unit attention cleared by another initiator\n",
367 h->devname);
368 break;
369 default:
370 dev_warn(&h->pdev->dev,
371 "%s: unknown unit attention detected\n",
372 h->devname);
373 break;
374 }
375 return 1;
376 }
377
378 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
379 {
380 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
381 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
382 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
383 return 0;
384 dev_warn(&h->pdev->dev, HPSA "device busy");
385 return 1;
386 }
387
388 static u32 lockup_detected(struct ctlr_info *h);
389 static ssize_t host_show_lockup_detected(struct device *dev,
390 struct device_attribute *attr, char *buf)
391 {
392 int ld;
393 struct ctlr_info *h;
394 struct Scsi_Host *shost = class_to_shost(dev);
395
396 h = shost_to_hba(shost);
397 ld = lockup_detected(h);
398
399 return sprintf(buf, "ld=%d\n", ld);
400 }
401
402 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
403 struct device_attribute *attr,
404 const char *buf, size_t count)
405 {
406 int status, len;
407 struct ctlr_info *h;
408 struct Scsi_Host *shost = class_to_shost(dev);
409 char tmpbuf[10];
410
411 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
412 return -EACCES;
413 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
414 strncpy(tmpbuf, buf, len);
415 tmpbuf[len] = '\0';
416 if (sscanf(tmpbuf, "%d", &status) != 1)
417 return -EINVAL;
418 h = shost_to_hba(shost);
419 h->acciopath_status = !!status;
420 dev_warn(&h->pdev->dev,
421 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
422 h->acciopath_status ? "enabled" : "disabled");
423 return count;
424 }
425
426 static ssize_t host_store_raid_offload_debug(struct device *dev,
427 struct device_attribute *attr,
428 const char *buf, size_t count)
429 {
430 int debug_level, len;
431 struct ctlr_info *h;
432 struct Scsi_Host *shost = class_to_shost(dev);
433 char tmpbuf[10];
434
435 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
436 return -EACCES;
437 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
438 strncpy(tmpbuf, buf, len);
439 tmpbuf[len] = '\0';
440 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
441 return -EINVAL;
442 if (debug_level < 0)
443 debug_level = 0;
444 h = shost_to_hba(shost);
445 h->raid_offload_debug = debug_level;
446 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
447 h->raid_offload_debug);
448 return count;
449 }
450
451 static ssize_t host_store_rescan(struct device *dev,
452 struct device_attribute *attr,
453 const char *buf, size_t count)
454 {
455 struct ctlr_info *h;
456 struct Scsi_Host *shost = class_to_shost(dev);
457 h = shost_to_hba(shost);
458 hpsa_scan_start(h->scsi_host);
459 return count;
460 }
461
462 static ssize_t host_show_firmware_revision(struct device *dev,
463 struct device_attribute *attr, char *buf)
464 {
465 struct ctlr_info *h;
466 struct Scsi_Host *shost = class_to_shost(dev);
467 unsigned char *fwrev;
468
469 h = shost_to_hba(shost);
470 if (!h->hba_inquiry_data)
471 return 0;
472 fwrev = &h->hba_inquiry_data[32];
473 return snprintf(buf, 20, "%c%c%c%c\n",
474 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
475 }
476
477 static ssize_t host_show_commands_outstanding(struct device *dev,
478 struct device_attribute *attr, char *buf)
479 {
480 struct Scsi_Host *shost = class_to_shost(dev);
481 struct ctlr_info *h = shost_to_hba(shost);
482
483 return snprintf(buf, 20, "%d\n",
484 atomic_read(&h->commands_outstanding));
485 }
486
487 static ssize_t host_show_transport_mode(struct device *dev,
488 struct device_attribute *attr, char *buf)
489 {
490 struct ctlr_info *h;
491 struct Scsi_Host *shost = class_to_shost(dev);
492
493 h = shost_to_hba(shost);
494 return snprintf(buf, 20, "%s\n",
495 h->transMethod & CFGTBL_Trans_Performant ?
496 "performant" : "simple");
497 }
498
499 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
500 struct device_attribute *attr, char *buf)
501 {
502 struct ctlr_info *h;
503 struct Scsi_Host *shost = class_to_shost(dev);
504
505 h = shost_to_hba(shost);
506 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
507 (h->acciopath_status == 1) ? "enabled" : "disabled");
508 }
509
510 /* List of controllers which cannot be hard reset on kexec with reset_devices */
511 static u32 unresettable_controller[] = {
512 0x324a103C, /* Smart Array P712m */
513 0x324b103C, /* Smart Array P711m */
514 0x3223103C, /* Smart Array P800 */
515 0x3234103C, /* Smart Array P400 */
516 0x3235103C, /* Smart Array P400i */
517 0x3211103C, /* Smart Array E200i */
518 0x3212103C, /* Smart Array E200 */
519 0x3213103C, /* Smart Array E200i */
520 0x3214103C, /* Smart Array E200i */
521 0x3215103C, /* Smart Array E200i */
522 0x3237103C, /* Smart Array E500 */
523 0x323D103C, /* Smart Array P700m */
524 0x40800E11, /* Smart Array 5i */
525 0x409C0E11, /* Smart Array 6400 */
526 0x409D0E11, /* Smart Array 6400 EM */
527 0x40700E11, /* Smart Array 5300 */
528 0x40820E11, /* Smart Array 532 */
529 0x40830E11, /* Smart Array 5312 */
530 0x409A0E11, /* Smart Array 641 */
531 0x409B0E11, /* Smart Array 642 */
532 0x40910E11, /* Smart Array 6i */
533 };
534
535 /* List of controllers which cannot even be soft reset */
536 static u32 soft_unresettable_controller[] = {
537 0x40800E11, /* Smart Array 5i */
538 0x40700E11, /* Smart Array 5300 */
539 0x40820E11, /* Smart Array 532 */
540 0x40830E11, /* Smart Array 5312 */
541 0x409A0E11, /* Smart Array 641 */
542 0x409B0E11, /* Smart Array 642 */
543 0x40910E11, /* Smart Array 6i */
544 /* Exclude 640x boards. These are two pci devices in one slot
545 * which share a battery backed cache module. One controls the
546 * cache, the other accesses the cache through the one that controls
547 * it. If we reset the one controlling the cache, the other will
548 * likely not be happy. Just forbid resetting this conjoined mess.
549 * The 640x isn't really supported by hpsa anyway.
550 */
551 0x409C0E11, /* Smart Array 6400 */
552 0x409D0E11, /* Smart Array 6400 EM */
553 };
554
555 static u32 needs_abort_tags_swizzled[] = {
556 0x323D103C, /* Smart Array P700m */
557 0x324a103C, /* Smart Array P712m */
558 0x324b103C, /* SmartArray P711m */
559 };
560
561 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
562 {
563 int i;
564
565 for (i = 0; i < nelems; i++)
566 if (a[i] == board_id)
567 return 1;
568 return 0;
569 }
570
571 static int ctlr_is_hard_resettable(u32 board_id)
572 {
573 return !board_id_in_array(unresettable_controller,
574 ARRAY_SIZE(unresettable_controller), board_id);
575 }
576
577 static int ctlr_is_soft_resettable(u32 board_id)
578 {
579 return !board_id_in_array(soft_unresettable_controller,
580 ARRAY_SIZE(soft_unresettable_controller), board_id);
581 }
582
583 static int ctlr_is_resettable(u32 board_id)
584 {
585 return ctlr_is_hard_resettable(board_id) ||
586 ctlr_is_soft_resettable(board_id);
587 }
588
589 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
590 {
591 return board_id_in_array(needs_abort_tags_swizzled,
592 ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
593 }
594
595 static ssize_t host_show_resettable(struct device *dev,
596 struct device_attribute *attr, char *buf)
597 {
598 struct ctlr_info *h;
599 struct Scsi_Host *shost = class_to_shost(dev);
600
601 h = shost_to_hba(shost);
602 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
603 }
604
605 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
606 {
607 return (scsi3addr[3] & 0xC0) == 0x40;
608 }
609
610 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
611 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
612 };
613 #define HPSA_RAID_0 0
614 #define HPSA_RAID_4 1
615 #define HPSA_RAID_1 2 /* also used for RAID 10 */
616 #define HPSA_RAID_5 3 /* also used for RAID 50 */
617 #define HPSA_RAID_51 4
618 #define HPSA_RAID_6 5 /* also used for RAID 60 */
619 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
620 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
621 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
622
623 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
624 {
625 return !device->physical_device;
626 }
627
628 static ssize_t raid_level_show(struct device *dev,
629 struct device_attribute *attr, char *buf)
630 {
631 ssize_t l = 0;
632 unsigned char rlevel;
633 struct ctlr_info *h;
634 struct scsi_device *sdev;
635 struct hpsa_scsi_dev_t *hdev;
636 unsigned long flags;
637
638 sdev = to_scsi_device(dev);
639 h = sdev_to_hba(sdev);
640 spin_lock_irqsave(&h->lock, flags);
641 hdev = sdev->hostdata;
642 if (!hdev) {
643 spin_unlock_irqrestore(&h->lock, flags);
644 return -ENODEV;
645 }
646
647 /* Is this even a logical drive? */
648 if (!is_logical_device(hdev)) {
649 spin_unlock_irqrestore(&h->lock, flags);
650 l = snprintf(buf, PAGE_SIZE, "N/A\n");
651 return l;
652 }
653
654 rlevel = hdev->raid_level;
655 spin_unlock_irqrestore(&h->lock, flags);
656 if (rlevel > RAID_UNKNOWN)
657 rlevel = RAID_UNKNOWN;
658 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
659 return l;
660 }
661
662 static ssize_t lunid_show(struct device *dev,
663 struct device_attribute *attr, char *buf)
664 {
665 struct ctlr_info *h;
666 struct scsi_device *sdev;
667 struct hpsa_scsi_dev_t *hdev;
668 unsigned long flags;
669 unsigned char lunid[8];
670
671 sdev = to_scsi_device(dev);
672 h = sdev_to_hba(sdev);
673 spin_lock_irqsave(&h->lock, flags);
674 hdev = sdev->hostdata;
675 if (!hdev) {
676 spin_unlock_irqrestore(&h->lock, flags);
677 return -ENODEV;
678 }
679 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
680 spin_unlock_irqrestore(&h->lock, flags);
681 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
682 lunid[0], lunid[1], lunid[2], lunid[3],
683 lunid[4], lunid[5], lunid[6], lunid[7]);
684 }
685
686 static ssize_t unique_id_show(struct device *dev,
687 struct device_attribute *attr, char *buf)
688 {
689 struct ctlr_info *h;
690 struct scsi_device *sdev;
691 struct hpsa_scsi_dev_t *hdev;
692 unsigned long flags;
693 unsigned char sn[16];
694
695 sdev = to_scsi_device(dev);
696 h = sdev_to_hba(sdev);
697 spin_lock_irqsave(&h->lock, flags);
698 hdev = sdev->hostdata;
699 if (!hdev) {
700 spin_unlock_irqrestore(&h->lock, flags);
701 return -ENODEV;
702 }
703 memcpy(sn, hdev->device_id, sizeof(sn));
704 spin_unlock_irqrestore(&h->lock, flags);
705 return snprintf(buf, 16 * 2 + 2,
706 "%02X%02X%02X%02X%02X%02X%02X%02X"
707 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
708 sn[0], sn[1], sn[2], sn[3],
709 sn[4], sn[5], sn[6], sn[7],
710 sn[8], sn[9], sn[10], sn[11],
711 sn[12], sn[13], sn[14], sn[15]);
712 }
713
714 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
715 struct device_attribute *attr, char *buf)
716 {
717 struct ctlr_info *h;
718 struct scsi_device *sdev;
719 struct hpsa_scsi_dev_t *hdev;
720 unsigned long flags;
721 int offload_enabled;
722
723 sdev = to_scsi_device(dev);
724 h = sdev_to_hba(sdev);
725 spin_lock_irqsave(&h->lock, flags);
726 hdev = sdev->hostdata;
727 if (!hdev) {
728 spin_unlock_irqrestore(&h->lock, flags);
729 return -ENODEV;
730 }
731 offload_enabled = hdev->offload_enabled;
732 spin_unlock_irqrestore(&h->lock, flags);
733 return snprintf(buf, 20, "%d\n", offload_enabled);
734 }
735
736 #define MAX_PATHS 8
737 #define PATH_STRING_LEN 50
738
739 static ssize_t path_info_show(struct device *dev,
740 struct device_attribute *attr, char *buf)
741 {
742 struct ctlr_info *h;
743 struct scsi_device *sdev;
744 struct hpsa_scsi_dev_t *hdev;
745 unsigned long flags;
746 int i;
747 int output_len = 0;
748 u8 box;
749 u8 bay;
750 u8 path_map_index = 0;
751 char *active;
752 unsigned char phys_connector[2];
753 unsigned char path[MAX_PATHS][PATH_STRING_LEN];
754
755 memset(path, 0, MAX_PATHS * PATH_STRING_LEN);
756 sdev = to_scsi_device(dev);
757 h = sdev_to_hba(sdev);
758 spin_lock_irqsave(&h->devlock, flags);
759 hdev = sdev->hostdata;
760 if (!hdev) {
761 spin_unlock_irqrestore(&h->devlock, flags);
762 return -ENODEV;
763 }
764
765 bay = hdev->bay;
766 for (i = 0; i < MAX_PATHS; i++) {
767 path_map_index = 1<<i;
768 if (i == hdev->active_path_index)
769 active = "Active";
770 else if (hdev->path_map & path_map_index)
771 active = "Inactive";
772 else
773 continue;
774
775 output_len = snprintf(path[i],
776 PATH_STRING_LEN, "[%d:%d:%d:%d] %20.20s ",
777 h->scsi_host->host_no,
778 hdev->bus, hdev->target, hdev->lun,
779 scsi_device_type(hdev->devtype));
780
781 if (hdev->external ||
782 hdev->devtype == TYPE_RAID ||
783 is_logical_device(hdev)) {
784 output_len += snprintf(path[i] + output_len,
785 PATH_STRING_LEN, "%s\n",
786 active);
787 continue;
788 }
789
790 box = hdev->box[i];
791 memcpy(&phys_connector, &hdev->phys_connector[i],
792 sizeof(phys_connector));
793 if (phys_connector[0] < '0')
794 phys_connector[0] = '0';
795 if (phys_connector[1] < '0')
796 phys_connector[1] = '0';
797 if (hdev->phys_connector[i] > 0)
798 output_len += snprintf(path[i] + output_len,
799 PATH_STRING_LEN,
800 "PORT: %.2s ",
801 phys_connector);
802 if (hdev->devtype == TYPE_DISK && hdev->expose_device) {
803 if (box == 0 || box == 0xFF) {
804 output_len += snprintf(path[i] + output_len,
805 PATH_STRING_LEN,
806 "BAY: %hhu %s\n",
807 bay, active);
808 } else {
809 output_len += snprintf(path[i] + output_len,
810 PATH_STRING_LEN,
811 "BOX: %hhu BAY: %hhu %s\n",
812 box, bay, active);
813 }
814 } else if (box != 0 && box != 0xFF) {
815 output_len += snprintf(path[i] + output_len,
816 PATH_STRING_LEN, "BOX: %hhu %s\n",
817 box, active);
818 } else
819 output_len += snprintf(path[i] + output_len,
820 PATH_STRING_LEN, "%s\n", active);
821 }
822
823 spin_unlock_irqrestore(&h->devlock, flags);
824 return snprintf(buf, output_len+1, "%s%s%s%s%s%s%s%s",
825 path[0], path[1], path[2], path[3],
826 path[4], path[5], path[6], path[7]);
827 }
828
829 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
830 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
831 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
832 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
833 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
834 host_show_hp_ssd_smart_path_enabled, NULL);
835 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
836 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
837 host_show_hp_ssd_smart_path_status,
838 host_store_hp_ssd_smart_path_status);
839 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
840 host_store_raid_offload_debug);
841 static DEVICE_ATTR(firmware_revision, S_IRUGO,
842 host_show_firmware_revision, NULL);
843 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
844 host_show_commands_outstanding, NULL);
845 static DEVICE_ATTR(transport_mode, S_IRUGO,
846 host_show_transport_mode, NULL);
847 static DEVICE_ATTR(resettable, S_IRUGO,
848 host_show_resettable, NULL);
849 static DEVICE_ATTR(lockup_detected, S_IRUGO,
850 host_show_lockup_detected, NULL);
851
852 static struct device_attribute *hpsa_sdev_attrs[] = {
853 &dev_attr_raid_level,
854 &dev_attr_lunid,
855 &dev_attr_unique_id,
856 &dev_attr_hp_ssd_smart_path_enabled,
857 &dev_attr_path_info,
858 &dev_attr_lockup_detected,
859 NULL,
860 };
861
862 static struct device_attribute *hpsa_shost_attrs[] = {
863 &dev_attr_rescan,
864 &dev_attr_firmware_revision,
865 &dev_attr_commands_outstanding,
866 &dev_attr_transport_mode,
867 &dev_attr_resettable,
868 &dev_attr_hp_ssd_smart_path_status,
869 &dev_attr_raid_offload_debug,
870 NULL,
871 };
872
873 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \
874 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
875
876 static struct scsi_host_template hpsa_driver_template = {
877 .module = THIS_MODULE,
878 .name = HPSA,
879 .proc_name = HPSA,
880 .queuecommand = hpsa_scsi_queue_command,
881 .scan_start = hpsa_scan_start,
882 .scan_finished = hpsa_scan_finished,
883 .change_queue_depth = hpsa_change_queue_depth,
884 .this_id = -1,
885 .use_clustering = ENABLE_CLUSTERING,
886 .eh_abort_handler = hpsa_eh_abort_handler,
887 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
888 .ioctl = hpsa_ioctl,
889 .slave_alloc = hpsa_slave_alloc,
890 .slave_configure = hpsa_slave_configure,
891 .slave_destroy = hpsa_slave_destroy,
892 #ifdef CONFIG_COMPAT
893 .compat_ioctl = hpsa_compat_ioctl,
894 #endif
895 .sdev_attrs = hpsa_sdev_attrs,
896 .shost_attrs = hpsa_shost_attrs,
897 .max_sectors = 8192,
898 .no_write_same = 1,
899 };
900
901 static inline u32 next_command(struct ctlr_info *h, u8 q)
902 {
903 u32 a;
904 struct reply_queue_buffer *rq = &h->reply_queue[q];
905
906 if (h->transMethod & CFGTBL_Trans_io_accel1)
907 return h->access.command_completed(h, q);
908
909 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
910 return h->access.command_completed(h, q);
911
912 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
913 a = rq->head[rq->current_entry];
914 rq->current_entry++;
915 atomic_dec(&h->commands_outstanding);
916 } else {
917 a = FIFO_EMPTY;
918 }
919 /* Check for wraparound */
920 if (rq->current_entry == h->max_commands) {
921 rq->current_entry = 0;
922 rq->wraparound ^= 1;
923 }
924 return a;
925 }
926
927 /*
928 * There are some special bits in the bus address of the
929 * command that we have to set for the controller to know
930 * how to process the command:
931 *
932 * Normal performant mode:
933 * bit 0: 1 means performant mode, 0 means simple mode.
934 * bits 1-3 = block fetch table entry
935 * bits 4-6 = command type (== 0)
936 *
937 * ioaccel1 mode:
938 * bit 0 = "performant mode" bit.
939 * bits 1-3 = block fetch table entry
940 * bits 4-6 = command type (== 110)
941 * (command type is needed because ioaccel1 mode
942 * commands are submitted through the same register as normal
943 * mode commands, so this is how the controller knows whether
944 * the command is normal mode or ioaccel1 mode.)
945 *
946 * ioaccel2 mode:
947 * bit 0 = "performant mode" bit.
948 * bits 1-4 = block fetch table entry (note extra bit)
949 * bits 4-6 = not needed, because ioaccel2 mode has
950 * a separate special register for submitting commands.
951 */
952
953 /*
954 * set_performant_mode: Modify the tag for cciss performant
955 * set bit 0 for pull model, bits 3-1 for block fetch
956 * register number
957 */
958 #define DEFAULT_REPLY_QUEUE (-1)
959 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
960 int reply_queue)
961 {
962 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
963 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
964 if (unlikely(!h->msix_vector))
965 return;
966 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
967 c->Header.ReplyQueue =
968 raw_smp_processor_id() % h->nreply_queues;
969 else
970 c->Header.ReplyQueue = reply_queue % h->nreply_queues;
971 }
972 }
973
974 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
975 struct CommandList *c,
976 int reply_queue)
977 {
978 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
979
980 /*
981 * Tell the controller to post the reply to the queue for this
982 * processor. This seems to give the best I/O throughput.
983 */
984 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
985 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
986 else
987 cp->ReplyQueue = reply_queue % h->nreply_queues;
988 /*
989 * Set the bits in the address sent down to include:
990 * - performant mode bit (bit 0)
991 * - pull count (bits 1-3)
992 * - command type (bits 4-6)
993 */
994 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
995 IOACCEL1_BUSADDR_CMDTYPE;
996 }
997
998 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
999 struct CommandList *c,
1000 int reply_queue)
1001 {
1002 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1003 &h->ioaccel2_cmd_pool[c->cmdindex];
1004
1005 /* Tell the controller to post the reply to the queue for this
1006 * processor. This seems to give the best I/O throughput.
1007 */
1008 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1009 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1010 else
1011 cp->reply_queue = reply_queue % h->nreply_queues;
1012 /* Set the bits in the address sent down to include:
1013 * - performant mode bit not used in ioaccel mode 2
1014 * - pull count (bits 0-3)
1015 * - command type isn't needed for ioaccel2
1016 */
1017 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1018 }
1019
1020 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1021 struct CommandList *c,
1022 int reply_queue)
1023 {
1024 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1025
1026 /*
1027 * Tell the controller to post the reply to the queue for this
1028 * processor. This seems to give the best I/O throughput.
1029 */
1030 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1031 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1032 else
1033 cp->reply_queue = reply_queue % h->nreply_queues;
1034 /*
1035 * Set the bits in the address sent down to include:
1036 * - performant mode bit not used in ioaccel mode 2
1037 * - pull count (bits 0-3)
1038 * - command type isn't needed for ioaccel2
1039 */
1040 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1041 }
1042
1043 static int is_firmware_flash_cmd(u8 *cdb)
1044 {
1045 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1046 }
1047
1048 /*
1049 * During firmware flash, the heartbeat register may not update as frequently
1050 * as it should. So we dial down lockup detection during firmware flash. and
1051 * dial it back up when firmware flash completes.
1052 */
1053 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1054 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1055 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1056 struct CommandList *c)
1057 {
1058 if (!is_firmware_flash_cmd(c->Request.CDB))
1059 return;
1060 atomic_inc(&h->firmware_flash_in_progress);
1061 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1062 }
1063
1064 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1065 struct CommandList *c)
1066 {
1067 if (is_firmware_flash_cmd(c->Request.CDB) &&
1068 atomic_dec_and_test(&h->firmware_flash_in_progress))
1069 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1070 }
1071
1072 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1073 struct CommandList *c, int reply_queue)
1074 {
1075 dial_down_lockup_detection_during_fw_flash(h, c);
1076 atomic_inc(&h->commands_outstanding);
1077 switch (c->cmd_type) {
1078 case CMD_IOACCEL1:
1079 set_ioaccel1_performant_mode(h, c, reply_queue);
1080 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1081 break;
1082 case CMD_IOACCEL2:
1083 set_ioaccel2_performant_mode(h, c, reply_queue);
1084 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1085 break;
1086 case IOACCEL2_TMF:
1087 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1088 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1089 break;
1090 default:
1091 set_performant_mode(h, c, reply_queue);
1092 h->access.submit_command(h, c);
1093 }
1094 }
1095
1096 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1097 {
1098 if (unlikely(hpsa_is_pending_event(c)))
1099 return finish_cmd(c);
1100
1101 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1102 }
1103
1104 static inline int is_hba_lunid(unsigned char scsi3addr[])
1105 {
1106 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1107 }
1108
1109 static inline int is_scsi_rev_5(struct ctlr_info *h)
1110 {
1111 if (!h->hba_inquiry_data)
1112 return 0;
1113 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1114 return 1;
1115 return 0;
1116 }
1117
1118 static int hpsa_find_target_lun(struct ctlr_info *h,
1119 unsigned char scsi3addr[], int bus, int *target, int *lun)
1120 {
1121 /* finds an unused bus, target, lun for a new physical device
1122 * assumes h->devlock is held
1123 */
1124 int i, found = 0;
1125 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1126
1127 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1128
1129 for (i = 0; i < h->ndevices; i++) {
1130 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1131 __set_bit(h->dev[i]->target, lun_taken);
1132 }
1133
1134 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1135 if (i < HPSA_MAX_DEVICES) {
1136 /* *bus = 1; */
1137 *target = i;
1138 *lun = 0;
1139 found = 1;
1140 }
1141 return !found;
1142 }
1143
1144 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1145 struct hpsa_scsi_dev_t *dev, char *description)
1146 {
1147 #define LABEL_SIZE 25
1148 char label[LABEL_SIZE];
1149
1150 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1151 return;
1152
1153 switch (dev->devtype) {
1154 case TYPE_RAID:
1155 snprintf(label, LABEL_SIZE, "controller");
1156 break;
1157 case TYPE_ENCLOSURE:
1158 snprintf(label, LABEL_SIZE, "enclosure");
1159 break;
1160 case TYPE_DISK:
1161 if (dev->external)
1162 snprintf(label, LABEL_SIZE, "external");
1163 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1164 snprintf(label, LABEL_SIZE, "%s",
1165 raid_label[PHYSICAL_DRIVE]);
1166 else
1167 snprintf(label, LABEL_SIZE, "RAID-%s",
1168 dev->raid_level > RAID_UNKNOWN ? "?" :
1169 raid_label[dev->raid_level]);
1170 break;
1171 case TYPE_ROM:
1172 snprintf(label, LABEL_SIZE, "rom");
1173 break;
1174 case TYPE_TAPE:
1175 snprintf(label, LABEL_SIZE, "tape");
1176 break;
1177 case TYPE_MEDIUM_CHANGER:
1178 snprintf(label, LABEL_SIZE, "changer");
1179 break;
1180 default:
1181 snprintf(label, LABEL_SIZE, "UNKNOWN");
1182 break;
1183 }
1184
1185 dev_printk(level, &h->pdev->dev,
1186 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1187 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1188 description,
1189 scsi_device_type(dev->devtype),
1190 dev->vendor,
1191 dev->model,
1192 label,
1193 dev->offload_config ? '+' : '-',
1194 dev->offload_enabled ? '+' : '-',
1195 dev->expose_device);
1196 }
1197
1198 /* Add an entry into h->dev[] array. */
1199 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1200 struct hpsa_scsi_dev_t *device,
1201 struct hpsa_scsi_dev_t *added[], int *nadded)
1202 {
1203 /* assumes h->devlock is held */
1204 int n = h->ndevices;
1205 int i;
1206 unsigned char addr1[8], addr2[8];
1207 struct hpsa_scsi_dev_t *sd;
1208
1209 if (n >= HPSA_MAX_DEVICES) {
1210 dev_err(&h->pdev->dev, "too many devices, some will be "
1211 "inaccessible.\n");
1212 return -1;
1213 }
1214
1215 /* physical devices do not have lun or target assigned until now. */
1216 if (device->lun != -1)
1217 /* Logical device, lun is already assigned. */
1218 goto lun_assigned;
1219
1220 /* If this device a non-zero lun of a multi-lun device
1221 * byte 4 of the 8-byte LUN addr will contain the logical
1222 * unit no, zero otherwise.
1223 */
1224 if (device->scsi3addr[4] == 0) {
1225 /* This is not a non-zero lun of a multi-lun device */
1226 if (hpsa_find_target_lun(h, device->scsi3addr,
1227 device->bus, &device->target, &device->lun) != 0)
1228 return -1;
1229 goto lun_assigned;
1230 }
1231
1232 /* This is a non-zero lun of a multi-lun device.
1233 * Search through our list and find the device which
1234 * has the same 8 byte LUN address, excepting byte 4 and 5.
1235 * Assign the same bus and target for this new LUN.
1236 * Use the logical unit number from the firmware.
1237 */
1238 memcpy(addr1, device->scsi3addr, 8);
1239 addr1[4] = 0;
1240 addr1[5] = 0;
1241 for (i = 0; i < n; i++) {
1242 sd = h->dev[i];
1243 memcpy(addr2, sd->scsi3addr, 8);
1244 addr2[4] = 0;
1245 addr2[5] = 0;
1246 /* differ only in byte 4 and 5? */
1247 if (memcmp(addr1, addr2, 8) == 0) {
1248 device->bus = sd->bus;
1249 device->target = sd->target;
1250 device->lun = device->scsi3addr[4];
1251 break;
1252 }
1253 }
1254 if (device->lun == -1) {
1255 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1256 " suspect firmware bug or unsupported hardware "
1257 "configuration.\n");
1258 return -1;
1259 }
1260
1261 lun_assigned:
1262
1263 h->dev[n] = device;
1264 h->ndevices++;
1265 added[*nadded] = device;
1266 (*nadded)++;
1267 hpsa_show_dev_msg(KERN_INFO, h, device,
1268 device->expose_device ? "added" : "masked");
1269 device->offload_to_be_enabled = device->offload_enabled;
1270 device->offload_enabled = 0;
1271 return 0;
1272 }
1273
1274 /* Update an entry in h->dev[] array. */
1275 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1276 int entry, struct hpsa_scsi_dev_t *new_entry)
1277 {
1278 int offload_enabled;
1279 /* assumes h->devlock is held */
1280 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1281
1282 /* Raid level changed. */
1283 h->dev[entry]->raid_level = new_entry->raid_level;
1284
1285 /* Raid offload parameters changed. Careful about the ordering. */
1286 if (new_entry->offload_config && new_entry->offload_enabled) {
1287 /*
1288 * if drive is newly offload_enabled, we want to copy the
1289 * raid map data first. If previously offload_enabled and
1290 * offload_config were set, raid map data had better be
1291 * the same as it was before. if raid map data is changed
1292 * then it had better be the case that
1293 * h->dev[entry]->offload_enabled is currently 0.
1294 */
1295 h->dev[entry]->raid_map = new_entry->raid_map;
1296 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1297 }
1298 if (new_entry->hba_ioaccel_enabled) {
1299 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1300 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1301 }
1302 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1303 h->dev[entry]->offload_config = new_entry->offload_config;
1304 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1305 h->dev[entry]->queue_depth = new_entry->queue_depth;
1306
1307 /*
1308 * We can turn off ioaccel offload now, but need to delay turning
1309 * it on until we can update h->dev[entry]->phys_disk[], but we
1310 * can't do that until all the devices are updated.
1311 */
1312 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1313 if (!new_entry->offload_enabled)
1314 h->dev[entry]->offload_enabled = 0;
1315
1316 offload_enabled = h->dev[entry]->offload_enabled;
1317 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1318 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1319 h->dev[entry]->offload_enabled = offload_enabled;
1320 }
1321
1322 /* Replace an entry from h->dev[] array. */
1323 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1324 int entry, struct hpsa_scsi_dev_t *new_entry,
1325 struct hpsa_scsi_dev_t *added[], int *nadded,
1326 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1327 {
1328 /* assumes h->devlock is held */
1329 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1330 removed[*nremoved] = h->dev[entry];
1331 (*nremoved)++;
1332
1333 /*
1334 * New physical devices won't have target/lun assigned yet
1335 * so we need to preserve the values in the slot we are replacing.
1336 */
1337 if (new_entry->target == -1) {
1338 new_entry->target = h->dev[entry]->target;
1339 new_entry->lun = h->dev[entry]->lun;
1340 }
1341
1342 h->dev[entry] = new_entry;
1343 added[*nadded] = new_entry;
1344 (*nadded)++;
1345 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1346 new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1347 new_entry->offload_enabled = 0;
1348 }
1349
1350 /* Remove an entry from h->dev[] array. */
1351 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1352 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1353 {
1354 /* assumes h->devlock is held */
1355 int i;
1356 struct hpsa_scsi_dev_t *sd;
1357
1358 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1359
1360 sd = h->dev[entry];
1361 removed[*nremoved] = h->dev[entry];
1362 (*nremoved)++;
1363
1364 for (i = entry; i < h->ndevices-1; i++)
1365 h->dev[i] = h->dev[i+1];
1366 h->ndevices--;
1367 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1368 }
1369
1370 #define SCSI3ADDR_EQ(a, b) ( \
1371 (a)[7] == (b)[7] && \
1372 (a)[6] == (b)[6] && \
1373 (a)[5] == (b)[5] && \
1374 (a)[4] == (b)[4] && \
1375 (a)[3] == (b)[3] && \
1376 (a)[2] == (b)[2] && \
1377 (a)[1] == (b)[1] && \
1378 (a)[0] == (b)[0])
1379
1380 static void fixup_botched_add(struct ctlr_info *h,
1381 struct hpsa_scsi_dev_t *added)
1382 {
1383 /* called when scsi_add_device fails in order to re-adjust
1384 * h->dev[] to match the mid layer's view.
1385 */
1386 unsigned long flags;
1387 int i, j;
1388
1389 spin_lock_irqsave(&h->lock, flags);
1390 for (i = 0; i < h->ndevices; i++) {
1391 if (h->dev[i] == added) {
1392 for (j = i; j < h->ndevices-1; j++)
1393 h->dev[j] = h->dev[j+1];
1394 h->ndevices--;
1395 break;
1396 }
1397 }
1398 spin_unlock_irqrestore(&h->lock, flags);
1399 kfree(added);
1400 }
1401
1402 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1403 struct hpsa_scsi_dev_t *dev2)
1404 {
1405 /* we compare everything except lun and target as these
1406 * are not yet assigned. Compare parts likely
1407 * to differ first
1408 */
1409 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1410 sizeof(dev1->scsi3addr)) != 0)
1411 return 0;
1412 if (memcmp(dev1->device_id, dev2->device_id,
1413 sizeof(dev1->device_id)) != 0)
1414 return 0;
1415 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1416 return 0;
1417 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1418 return 0;
1419 if (dev1->devtype != dev2->devtype)
1420 return 0;
1421 if (dev1->bus != dev2->bus)
1422 return 0;
1423 return 1;
1424 }
1425
1426 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1427 struct hpsa_scsi_dev_t *dev2)
1428 {
1429 /* Device attributes that can change, but don't mean
1430 * that the device is a different device, nor that the OS
1431 * needs to be told anything about the change.
1432 */
1433 if (dev1->raid_level != dev2->raid_level)
1434 return 1;
1435 if (dev1->offload_config != dev2->offload_config)
1436 return 1;
1437 if (dev1->offload_enabled != dev2->offload_enabled)
1438 return 1;
1439 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1440 if (dev1->queue_depth != dev2->queue_depth)
1441 return 1;
1442 return 0;
1443 }
1444
1445 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1446 * and return needle location in *index. If scsi3addr matches, but not
1447 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1448 * location in *index.
1449 * In the case of a minor device attribute change, such as RAID level, just
1450 * return DEVICE_UPDATED, along with the updated device's location in index.
1451 * If needle not found, return DEVICE_NOT_FOUND.
1452 */
1453 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1454 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1455 int *index)
1456 {
1457 int i;
1458 #define DEVICE_NOT_FOUND 0
1459 #define DEVICE_CHANGED 1
1460 #define DEVICE_SAME 2
1461 #define DEVICE_UPDATED 3
1462 if (needle == NULL)
1463 return DEVICE_NOT_FOUND;
1464
1465 for (i = 0; i < haystack_size; i++) {
1466 if (haystack[i] == NULL) /* previously removed. */
1467 continue;
1468 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1469 *index = i;
1470 if (device_is_the_same(needle, haystack[i])) {
1471 if (device_updated(needle, haystack[i]))
1472 return DEVICE_UPDATED;
1473 return DEVICE_SAME;
1474 } else {
1475 /* Keep offline devices offline */
1476 if (needle->volume_offline)
1477 return DEVICE_NOT_FOUND;
1478 return DEVICE_CHANGED;
1479 }
1480 }
1481 }
1482 *index = -1;
1483 return DEVICE_NOT_FOUND;
1484 }
1485
1486 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1487 unsigned char scsi3addr[])
1488 {
1489 struct offline_device_entry *device;
1490 unsigned long flags;
1491
1492 /* Check to see if device is already on the list */
1493 spin_lock_irqsave(&h->offline_device_lock, flags);
1494 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1495 if (memcmp(device->scsi3addr, scsi3addr,
1496 sizeof(device->scsi3addr)) == 0) {
1497 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1498 return;
1499 }
1500 }
1501 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1502
1503 /* Device is not on the list, add it. */
1504 device = kmalloc(sizeof(*device), GFP_KERNEL);
1505 if (!device) {
1506 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1507 return;
1508 }
1509 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1510 spin_lock_irqsave(&h->offline_device_lock, flags);
1511 list_add_tail(&device->offline_list, &h->offline_device_list);
1512 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1513 }
1514
1515 /* Print a message explaining various offline volume states */
1516 static void hpsa_show_volume_status(struct ctlr_info *h,
1517 struct hpsa_scsi_dev_t *sd)
1518 {
1519 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1520 dev_info(&h->pdev->dev,
1521 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1522 h->scsi_host->host_no,
1523 sd->bus, sd->target, sd->lun);
1524 switch (sd->volume_offline) {
1525 case HPSA_LV_OK:
1526 break;
1527 case HPSA_LV_UNDERGOING_ERASE:
1528 dev_info(&h->pdev->dev,
1529 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1530 h->scsi_host->host_no,
1531 sd->bus, sd->target, sd->lun);
1532 break;
1533 case HPSA_LV_NOT_AVAILABLE:
1534 dev_info(&h->pdev->dev,
1535 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1536 h->scsi_host->host_no,
1537 sd->bus, sd->target, sd->lun);
1538 break;
1539 case HPSA_LV_UNDERGOING_RPI:
1540 dev_info(&h->pdev->dev,
1541 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1542 h->scsi_host->host_no,
1543 sd->bus, sd->target, sd->lun);
1544 break;
1545 case HPSA_LV_PENDING_RPI:
1546 dev_info(&h->pdev->dev,
1547 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1548 h->scsi_host->host_no,
1549 sd->bus, sd->target, sd->lun);
1550 break;
1551 case HPSA_LV_ENCRYPTED_NO_KEY:
1552 dev_info(&h->pdev->dev,
1553 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1554 h->scsi_host->host_no,
1555 sd->bus, sd->target, sd->lun);
1556 break;
1557 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1558 dev_info(&h->pdev->dev,
1559 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1560 h->scsi_host->host_no,
1561 sd->bus, sd->target, sd->lun);
1562 break;
1563 case HPSA_LV_UNDERGOING_ENCRYPTION:
1564 dev_info(&h->pdev->dev,
1565 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1566 h->scsi_host->host_no,
1567 sd->bus, sd->target, sd->lun);
1568 break;
1569 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1570 dev_info(&h->pdev->dev,
1571 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1572 h->scsi_host->host_no,
1573 sd->bus, sd->target, sd->lun);
1574 break;
1575 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1576 dev_info(&h->pdev->dev,
1577 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1578 h->scsi_host->host_no,
1579 sd->bus, sd->target, sd->lun);
1580 break;
1581 case HPSA_LV_PENDING_ENCRYPTION:
1582 dev_info(&h->pdev->dev,
1583 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1584 h->scsi_host->host_no,
1585 sd->bus, sd->target, sd->lun);
1586 break;
1587 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1588 dev_info(&h->pdev->dev,
1589 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1590 h->scsi_host->host_no,
1591 sd->bus, sd->target, sd->lun);
1592 break;
1593 }
1594 }
1595
1596 /*
1597 * Figure the list of physical drive pointers for a logical drive with
1598 * raid offload configured.
1599 */
1600 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1601 struct hpsa_scsi_dev_t *dev[], int ndevices,
1602 struct hpsa_scsi_dev_t *logical_drive)
1603 {
1604 struct raid_map_data *map = &logical_drive->raid_map;
1605 struct raid_map_disk_data *dd = &map->data[0];
1606 int i, j;
1607 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1608 le16_to_cpu(map->metadata_disks_per_row);
1609 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1610 le16_to_cpu(map->layout_map_count) *
1611 total_disks_per_row;
1612 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1613 total_disks_per_row;
1614 int qdepth;
1615
1616 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1617 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1618
1619 logical_drive->nphysical_disks = nraid_map_entries;
1620
1621 qdepth = 0;
1622 for (i = 0; i < nraid_map_entries; i++) {
1623 logical_drive->phys_disk[i] = NULL;
1624 if (!logical_drive->offload_config)
1625 continue;
1626 for (j = 0; j < ndevices; j++) {
1627 if (dev[j] == NULL)
1628 continue;
1629 if (dev[j]->devtype != TYPE_DISK)
1630 continue;
1631 if (is_logical_device(dev[j]))
1632 continue;
1633 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1634 continue;
1635
1636 logical_drive->phys_disk[i] = dev[j];
1637 if (i < nphys_disk)
1638 qdepth = min(h->nr_cmds, qdepth +
1639 logical_drive->phys_disk[i]->queue_depth);
1640 break;
1641 }
1642
1643 /*
1644 * This can happen if a physical drive is removed and
1645 * the logical drive is degraded. In that case, the RAID
1646 * map data will refer to a physical disk which isn't actually
1647 * present. And in that case offload_enabled should already
1648 * be 0, but we'll turn it off here just in case
1649 */
1650 if (!logical_drive->phys_disk[i]) {
1651 logical_drive->offload_enabled = 0;
1652 logical_drive->offload_to_be_enabled = 0;
1653 logical_drive->queue_depth = 8;
1654 }
1655 }
1656 if (nraid_map_entries)
1657 /*
1658 * This is correct for reads, too high for full stripe writes,
1659 * way too high for partial stripe writes
1660 */
1661 logical_drive->queue_depth = qdepth;
1662 else
1663 logical_drive->queue_depth = h->nr_cmds;
1664 }
1665
1666 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1667 struct hpsa_scsi_dev_t *dev[], int ndevices)
1668 {
1669 int i;
1670
1671 for (i = 0; i < ndevices; i++) {
1672 if (dev[i] == NULL)
1673 continue;
1674 if (dev[i]->devtype != TYPE_DISK)
1675 continue;
1676 if (!is_logical_device(dev[i]))
1677 continue;
1678
1679 /*
1680 * If offload is currently enabled, the RAID map and
1681 * phys_disk[] assignment *better* not be changing
1682 * and since it isn't changing, we do not need to
1683 * update it.
1684 */
1685 if (dev[i]->offload_enabled)
1686 continue;
1687
1688 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1689 }
1690 }
1691
1692 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1693 {
1694 int rc = 0;
1695
1696 if (!h->scsi_host)
1697 return 1;
1698
1699 rc = scsi_add_device(h->scsi_host, device->bus,
1700 device->target, device->lun);
1701 return rc;
1702 }
1703
1704 static void hpsa_remove_device(struct ctlr_info *h,
1705 struct hpsa_scsi_dev_t *device)
1706 {
1707 struct scsi_device *sdev = NULL;
1708
1709 if (!h->scsi_host)
1710 return;
1711
1712 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1713 device->target, device->lun);
1714
1715 if (sdev) {
1716 scsi_remove_device(sdev);
1717 scsi_device_put(sdev);
1718 } else {
1719 /*
1720 * We don't expect to get here. Future commands
1721 * to this device will get a selection timeout as
1722 * if the device were gone.
1723 */
1724 hpsa_show_dev_msg(KERN_WARNING, h, device,
1725 "didn't find device for removal.");
1726 }
1727 }
1728
1729 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1730 struct hpsa_scsi_dev_t *sd[], int nsds)
1731 {
1732 /* sd contains scsi3 addresses and devtypes, and inquiry
1733 * data. This function takes what's in sd to be the current
1734 * reality and updates h->dev[] to reflect that reality.
1735 */
1736 int i, entry, device_change, changes = 0;
1737 struct hpsa_scsi_dev_t *csd;
1738 unsigned long flags;
1739 struct hpsa_scsi_dev_t **added, **removed;
1740 int nadded, nremoved;
1741
1742 /*
1743 * A reset can cause a device status to change
1744 * re-schedule the scan to see what happened.
1745 */
1746 if (h->reset_in_progress) {
1747 h->drv_req_rescan = 1;
1748 return;
1749 }
1750
1751 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1752 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1753
1754 if (!added || !removed) {
1755 dev_warn(&h->pdev->dev, "out of memory in "
1756 "adjust_hpsa_scsi_table\n");
1757 goto free_and_out;
1758 }
1759
1760 spin_lock_irqsave(&h->devlock, flags);
1761
1762 /* find any devices in h->dev[] that are not in
1763 * sd[] and remove them from h->dev[], and for any
1764 * devices which have changed, remove the old device
1765 * info and add the new device info.
1766 * If minor device attributes change, just update
1767 * the existing device structure.
1768 */
1769 i = 0;
1770 nremoved = 0;
1771 nadded = 0;
1772 while (i < h->ndevices) {
1773 csd = h->dev[i];
1774 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1775 if (device_change == DEVICE_NOT_FOUND) {
1776 changes++;
1777 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1778 continue; /* remove ^^^, hence i not incremented */
1779 } else if (device_change == DEVICE_CHANGED) {
1780 changes++;
1781 hpsa_scsi_replace_entry(h, i, sd[entry],
1782 added, &nadded, removed, &nremoved);
1783 /* Set it to NULL to prevent it from being freed
1784 * at the bottom of hpsa_update_scsi_devices()
1785 */
1786 sd[entry] = NULL;
1787 } else if (device_change == DEVICE_UPDATED) {
1788 hpsa_scsi_update_entry(h, i, sd[entry]);
1789 }
1790 i++;
1791 }
1792
1793 /* Now, make sure every device listed in sd[] is also
1794 * listed in h->dev[], adding them if they aren't found
1795 */
1796
1797 for (i = 0; i < nsds; i++) {
1798 if (!sd[i]) /* if already added above. */
1799 continue;
1800
1801 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1802 * as the SCSI mid-layer does not handle such devices well.
1803 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1804 * at 160Hz, and prevents the system from coming up.
1805 */
1806 if (sd[i]->volume_offline) {
1807 hpsa_show_volume_status(h, sd[i]);
1808 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1809 continue;
1810 }
1811
1812 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1813 h->ndevices, &entry);
1814 if (device_change == DEVICE_NOT_FOUND) {
1815 changes++;
1816 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1817 break;
1818 sd[i] = NULL; /* prevent from being freed later. */
1819 } else if (device_change == DEVICE_CHANGED) {
1820 /* should never happen... */
1821 changes++;
1822 dev_warn(&h->pdev->dev,
1823 "device unexpectedly changed.\n");
1824 /* but if it does happen, we just ignore that device */
1825 }
1826 }
1827 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1828
1829 /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1830 * any logical drives that need it enabled.
1831 */
1832 for (i = 0; i < h->ndevices; i++) {
1833 if (h->dev[i] == NULL)
1834 continue;
1835 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1836 }
1837
1838 spin_unlock_irqrestore(&h->devlock, flags);
1839
1840 /* Monitor devices which are in one of several NOT READY states to be
1841 * brought online later. This must be done without holding h->devlock,
1842 * so don't touch h->dev[]
1843 */
1844 for (i = 0; i < nsds; i++) {
1845 if (!sd[i]) /* if already added above. */
1846 continue;
1847 if (sd[i]->volume_offline)
1848 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1849 }
1850
1851 /* Don't notify scsi mid layer of any changes the first time through
1852 * (or if there are no changes) scsi_scan_host will do it later the
1853 * first time through.
1854 */
1855 if (!changes)
1856 goto free_and_out;
1857
1858 /* Notify scsi mid layer of any removed devices */
1859 for (i = 0; i < nremoved; i++) {
1860 if (removed[i] == NULL)
1861 continue;
1862 if (removed[i]->expose_device)
1863 hpsa_remove_device(h, removed[i]);
1864 kfree(removed[i]);
1865 removed[i] = NULL;
1866 }
1867
1868 /* Notify scsi mid layer of any added devices */
1869 for (i = 0; i < nadded; i++) {
1870 int rc = 0;
1871
1872 if (added[i] == NULL)
1873 continue;
1874 if (!(added[i]->expose_device))
1875 continue;
1876 rc = hpsa_add_device(h, added[i]);
1877 if (!rc)
1878 continue;
1879 dev_warn(&h->pdev->dev,
1880 "addition failed %d, device not added.", rc);
1881 /* now we have to remove it from h->dev,
1882 * since it didn't get added to scsi mid layer
1883 */
1884 fixup_botched_add(h, added[i]);
1885 h->drv_req_rescan = 1;
1886 }
1887
1888 free_and_out:
1889 kfree(added);
1890 kfree(removed);
1891 }
1892
1893 /*
1894 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1895 * Assume's h->devlock is held.
1896 */
1897 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1898 int bus, int target, int lun)
1899 {
1900 int i;
1901 struct hpsa_scsi_dev_t *sd;
1902
1903 for (i = 0; i < h->ndevices; i++) {
1904 sd = h->dev[i];
1905 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1906 return sd;
1907 }
1908 return NULL;
1909 }
1910
1911 static int hpsa_slave_alloc(struct scsi_device *sdev)
1912 {
1913 struct hpsa_scsi_dev_t *sd;
1914 unsigned long flags;
1915 struct ctlr_info *h;
1916
1917 h = sdev_to_hba(sdev);
1918 spin_lock_irqsave(&h->devlock, flags);
1919 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1920 sdev_id(sdev), sdev->lun);
1921 if (likely(sd)) {
1922 atomic_set(&sd->ioaccel_cmds_out, 0);
1923 sdev->hostdata = sd->expose_device ? sd : NULL;
1924 } else
1925 sdev->hostdata = NULL;
1926 spin_unlock_irqrestore(&h->devlock, flags);
1927 return 0;
1928 }
1929
1930 /* configure scsi device based on internal per-device structure */
1931 static int hpsa_slave_configure(struct scsi_device *sdev)
1932 {
1933 struct hpsa_scsi_dev_t *sd;
1934 int queue_depth;
1935
1936 sd = sdev->hostdata;
1937 sdev->no_uld_attach = !sd || !sd->expose_device;
1938
1939 if (sd)
1940 queue_depth = sd->queue_depth != 0 ?
1941 sd->queue_depth : sdev->host->can_queue;
1942 else
1943 queue_depth = sdev->host->can_queue;
1944
1945 scsi_change_queue_depth(sdev, queue_depth);
1946
1947 return 0;
1948 }
1949
1950 static void hpsa_slave_destroy(struct scsi_device *sdev)
1951 {
1952 /* nothing to do. */
1953 }
1954
1955 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1956 {
1957 int i;
1958
1959 if (!h->ioaccel2_cmd_sg_list)
1960 return;
1961 for (i = 0; i < h->nr_cmds; i++) {
1962 kfree(h->ioaccel2_cmd_sg_list[i]);
1963 h->ioaccel2_cmd_sg_list[i] = NULL;
1964 }
1965 kfree(h->ioaccel2_cmd_sg_list);
1966 h->ioaccel2_cmd_sg_list = NULL;
1967 }
1968
1969 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1970 {
1971 int i;
1972
1973 if (h->chainsize <= 0)
1974 return 0;
1975
1976 h->ioaccel2_cmd_sg_list =
1977 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
1978 GFP_KERNEL);
1979 if (!h->ioaccel2_cmd_sg_list)
1980 return -ENOMEM;
1981 for (i = 0; i < h->nr_cmds; i++) {
1982 h->ioaccel2_cmd_sg_list[i] =
1983 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
1984 h->maxsgentries, GFP_KERNEL);
1985 if (!h->ioaccel2_cmd_sg_list[i])
1986 goto clean;
1987 }
1988 return 0;
1989
1990 clean:
1991 hpsa_free_ioaccel2_sg_chain_blocks(h);
1992 return -ENOMEM;
1993 }
1994
1995 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1996 {
1997 int i;
1998
1999 if (!h->cmd_sg_list)
2000 return;
2001 for (i = 0; i < h->nr_cmds; i++) {
2002 kfree(h->cmd_sg_list[i]);
2003 h->cmd_sg_list[i] = NULL;
2004 }
2005 kfree(h->cmd_sg_list);
2006 h->cmd_sg_list = NULL;
2007 }
2008
2009 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2010 {
2011 int i;
2012
2013 if (h->chainsize <= 0)
2014 return 0;
2015
2016 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2017 GFP_KERNEL);
2018 if (!h->cmd_sg_list) {
2019 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
2020 return -ENOMEM;
2021 }
2022 for (i = 0; i < h->nr_cmds; i++) {
2023 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2024 h->chainsize, GFP_KERNEL);
2025 if (!h->cmd_sg_list[i]) {
2026 dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
2027 goto clean;
2028 }
2029 }
2030 return 0;
2031
2032 clean:
2033 hpsa_free_sg_chain_blocks(h);
2034 return -ENOMEM;
2035 }
2036
2037 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2038 struct io_accel2_cmd *cp, struct CommandList *c)
2039 {
2040 struct ioaccel2_sg_element *chain_block;
2041 u64 temp64;
2042 u32 chain_size;
2043
2044 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2045 chain_size = le32_to_cpu(cp->sg[0].length);
2046 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2047 PCI_DMA_TODEVICE);
2048 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2049 /* prevent subsequent unmapping */
2050 cp->sg->address = 0;
2051 return -1;
2052 }
2053 cp->sg->address = cpu_to_le64(temp64);
2054 return 0;
2055 }
2056
2057 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2058 struct io_accel2_cmd *cp)
2059 {
2060 struct ioaccel2_sg_element *chain_sg;
2061 u64 temp64;
2062 u32 chain_size;
2063
2064 chain_sg = cp->sg;
2065 temp64 = le64_to_cpu(chain_sg->address);
2066 chain_size = le32_to_cpu(cp->sg[0].length);
2067 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2068 }
2069
2070 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2071 struct CommandList *c)
2072 {
2073 struct SGDescriptor *chain_sg, *chain_block;
2074 u64 temp64;
2075 u32 chain_len;
2076
2077 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2078 chain_block = h->cmd_sg_list[c->cmdindex];
2079 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2080 chain_len = sizeof(*chain_sg) *
2081 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2082 chain_sg->Len = cpu_to_le32(chain_len);
2083 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2084 PCI_DMA_TODEVICE);
2085 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2086 /* prevent subsequent unmapping */
2087 chain_sg->Addr = cpu_to_le64(0);
2088 return -1;
2089 }
2090 chain_sg->Addr = cpu_to_le64(temp64);
2091 return 0;
2092 }
2093
2094 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2095 struct CommandList *c)
2096 {
2097 struct SGDescriptor *chain_sg;
2098
2099 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2100 return;
2101
2102 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2103 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2104 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2105 }
2106
2107
2108 /* Decode the various types of errors on ioaccel2 path.
2109 * Return 1 for any error that should generate a RAID path retry.
2110 * Return 0 for errors that don't require a RAID path retry.
2111 */
2112 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2113 struct CommandList *c,
2114 struct scsi_cmnd *cmd,
2115 struct io_accel2_cmd *c2)
2116 {
2117 int data_len;
2118 int retry = 0;
2119 u32 ioaccel2_resid = 0;
2120
2121 switch (c2->error_data.serv_response) {
2122 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2123 switch (c2->error_data.status) {
2124 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2125 break;
2126 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2127 cmd->result |= SAM_STAT_CHECK_CONDITION;
2128 if (c2->error_data.data_present !=
2129 IOACCEL2_SENSE_DATA_PRESENT) {
2130 memset(cmd->sense_buffer, 0,
2131 SCSI_SENSE_BUFFERSIZE);
2132 break;
2133 }
2134 /* copy the sense data */
2135 data_len = c2->error_data.sense_data_len;
2136 if (data_len > SCSI_SENSE_BUFFERSIZE)
2137 data_len = SCSI_SENSE_BUFFERSIZE;
2138 if (data_len > sizeof(c2->error_data.sense_data_buff))
2139 data_len =
2140 sizeof(c2->error_data.sense_data_buff);
2141 memcpy(cmd->sense_buffer,
2142 c2->error_data.sense_data_buff, data_len);
2143 retry = 1;
2144 break;
2145 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2146 retry = 1;
2147 break;
2148 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2149 retry = 1;
2150 break;
2151 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2152 retry = 1;
2153 break;
2154 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2155 retry = 1;
2156 break;
2157 default:
2158 retry = 1;
2159 break;
2160 }
2161 break;
2162 case IOACCEL2_SERV_RESPONSE_FAILURE:
2163 switch (c2->error_data.status) {
2164 case IOACCEL2_STATUS_SR_IO_ERROR:
2165 case IOACCEL2_STATUS_SR_IO_ABORTED:
2166 case IOACCEL2_STATUS_SR_OVERRUN:
2167 retry = 1;
2168 break;
2169 case IOACCEL2_STATUS_SR_UNDERRUN:
2170 cmd->result = (DID_OK << 16); /* host byte */
2171 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2172 ioaccel2_resid = get_unaligned_le32(
2173 &c2->error_data.resid_cnt[0]);
2174 scsi_set_resid(cmd, ioaccel2_resid);
2175 break;
2176 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2177 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2178 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2179 /* We will get an event from ctlr to trigger rescan */
2180 retry = 1;
2181 break;
2182 default:
2183 retry = 1;
2184 }
2185 break;
2186 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2187 break;
2188 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2189 break;
2190 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2191 retry = 1;
2192 break;
2193 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2194 break;
2195 default:
2196 retry = 1;
2197 break;
2198 }
2199
2200 return retry; /* retry on raid path? */
2201 }
2202
2203 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2204 struct CommandList *c)
2205 {
2206 bool do_wake = false;
2207
2208 /*
2209 * Prevent the following race in the abort handler:
2210 *
2211 * 1. LLD is requested to abort a SCSI command
2212 * 2. The SCSI command completes
2213 * 3. The struct CommandList associated with step 2 is made available
2214 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2215 * 5. Abort handler follows scsi_cmnd->host_scribble and
2216 * finds struct CommandList and tries to aborts it
2217 * Now we have aborted the wrong command.
2218 *
2219 * Reset c->scsi_cmd here so that the abort or reset handler will know
2220 * this command has completed. Then, check to see if the handler is
2221 * waiting for this command, and, if so, wake it.
2222 */
2223 c->scsi_cmd = SCSI_CMD_IDLE;
2224 mb(); /* Declare command idle before checking for pending events. */
2225 if (c->abort_pending) {
2226 do_wake = true;
2227 c->abort_pending = false;
2228 }
2229 if (c->reset_pending) {
2230 unsigned long flags;
2231 struct hpsa_scsi_dev_t *dev;
2232
2233 /*
2234 * There appears to be a reset pending; lock the lock and
2235 * reconfirm. If so, then decrement the count of outstanding
2236 * commands and wake the reset command if this is the last one.
2237 */
2238 spin_lock_irqsave(&h->lock, flags);
2239 dev = c->reset_pending; /* Re-fetch under the lock. */
2240 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2241 do_wake = true;
2242 c->reset_pending = NULL;
2243 spin_unlock_irqrestore(&h->lock, flags);
2244 }
2245
2246 if (do_wake)
2247 wake_up_all(&h->event_sync_wait_queue);
2248 }
2249
2250 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2251 struct CommandList *c)
2252 {
2253 hpsa_cmd_resolve_events(h, c);
2254 cmd_tagged_free(h, c);
2255 }
2256
2257 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2258 struct CommandList *c, struct scsi_cmnd *cmd)
2259 {
2260 hpsa_cmd_resolve_and_free(h, c);
2261 cmd->scsi_done(cmd);
2262 }
2263
2264 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2265 {
2266 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2267 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2268 }
2269
2270 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2271 {
2272 cmd->result = DID_ABORT << 16;
2273 }
2274
2275 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2276 struct scsi_cmnd *cmd)
2277 {
2278 hpsa_set_scsi_cmd_aborted(cmd);
2279 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2280 c->Request.CDB, c->err_info->ScsiStatus);
2281 hpsa_cmd_resolve_and_free(h, c);
2282 }
2283
2284 static void process_ioaccel2_completion(struct ctlr_info *h,
2285 struct CommandList *c, struct scsi_cmnd *cmd,
2286 struct hpsa_scsi_dev_t *dev)
2287 {
2288 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2289
2290 /* check for good status */
2291 if (likely(c2->error_data.serv_response == 0 &&
2292 c2->error_data.status == 0))
2293 return hpsa_cmd_free_and_done(h, c, cmd);
2294
2295 /*
2296 * Any RAID offload error results in retry which will use
2297 * the normal I/O path so the controller can handle whatever's
2298 * wrong.
2299 */
2300 if (is_logical_device(dev) &&
2301 c2->error_data.serv_response ==
2302 IOACCEL2_SERV_RESPONSE_FAILURE) {
2303 if (c2->error_data.status ==
2304 IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2305 dev->offload_enabled = 0;
2306
2307 return hpsa_retry_cmd(h, c);
2308 }
2309
2310 if (handle_ioaccel_mode2_error(h, c, cmd, c2))
2311 return hpsa_retry_cmd(h, c);
2312
2313 return hpsa_cmd_free_and_done(h, c, cmd);
2314 }
2315
2316 /* Returns 0 on success, < 0 otherwise. */
2317 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2318 struct CommandList *cp)
2319 {
2320 u8 tmf_status = cp->err_info->ScsiStatus;
2321
2322 switch (tmf_status) {
2323 case CISS_TMF_COMPLETE:
2324 /*
2325 * CISS_TMF_COMPLETE never happens, instead,
2326 * ei->CommandStatus == 0 for this case.
2327 */
2328 case CISS_TMF_SUCCESS:
2329 return 0;
2330 case CISS_TMF_INVALID_FRAME:
2331 case CISS_TMF_NOT_SUPPORTED:
2332 case CISS_TMF_FAILED:
2333 case CISS_TMF_WRONG_LUN:
2334 case CISS_TMF_OVERLAPPED_TAG:
2335 break;
2336 default:
2337 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2338 tmf_status);
2339 break;
2340 }
2341 return -tmf_status;
2342 }
2343
2344 static void complete_scsi_command(struct CommandList *cp)
2345 {
2346 struct scsi_cmnd *cmd;
2347 struct ctlr_info *h;
2348 struct ErrorInfo *ei;
2349 struct hpsa_scsi_dev_t *dev;
2350 struct io_accel2_cmd *c2;
2351
2352 u8 sense_key;
2353 u8 asc; /* additional sense code */
2354 u8 ascq; /* additional sense code qualifier */
2355 unsigned long sense_data_size;
2356
2357 ei = cp->err_info;
2358 cmd = cp->scsi_cmd;
2359 h = cp->h;
2360 dev = cmd->device->hostdata;
2361 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2362
2363 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2364 if ((cp->cmd_type == CMD_SCSI) &&
2365 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2366 hpsa_unmap_sg_chain_block(h, cp);
2367
2368 if ((cp->cmd_type == CMD_IOACCEL2) &&
2369 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2370 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2371
2372 cmd->result = (DID_OK << 16); /* host byte */
2373 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2374
2375 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
2376 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2377
2378 /*
2379 * We check for lockup status here as it may be set for
2380 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2381 * fail_all_oustanding_cmds()
2382 */
2383 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2384 /* DID_NO_CONNECT will prevent a retry */
2385 cmd->result = DID_NO_CONNECT << 16;
2386 return hpsa_cmd_free_and_done(h, cp, cmd);
2387 }
2388
2389 if ((unlikely(hpsa_is_pending_event(cp)))) {
2390 if (cp->reset_pending)
2391 return hpsa_cmd_resolve_and_free(h, cp);
2392 if (cp->abort_pending)
2393 return hpsa_cmd_abort_and_free(h, cp, cmd);
2394 }
2395
2396 if (cp->cmd_type == CMD_IOACCEL2)
2397 return process_ioaccel2_completion(h, cp, cmd, dev);
2398
2399 scsi_set_resid(cmd, ei->ResidualCnt);
2400 if (ei->CommandStatus == 0)
2401 return hpsa_cmd_free_and_done(h, cp, cmd);
2402
2403 /* For I/O accelerator commands, copy over some fields to the normal
2404 * CISS header used below for error handling.
2405 */
2406 if (cp->cmd_type == CMD_IOACCEL1) {
2407 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2408 cp->Header.SGList = scsi_sg_count(cmd);
2409 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2410 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2411 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2412 cp->Header.tag = c->tag;
2413 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2414 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2415
2416 /* Any RAID offload error results in retry which will use
2417 * the normal I/O path so the controller can handle whatever's
2418 * wrong.
2419 */
2420 if (is_logical_device(dev)) {
2421 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2422 dev->offload_enabled = 0;
2423 return hpsa_retry_cmd(h, cp);
2424 }
2425 }
2426
2427 /* an error has occurred */
2428 switch (ei->CommandStatus) {
2429
2430 case CMD_TARGET_STATUS:
2431 cmd->result |= ei->ScsiStatus;
2432 /* copy the sense data */
2433 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2434 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2435 else
2436 sense_data_size = sizeof(ei->SenseInfo);
2437 if (ei->SenseLen < sense_data_size)
2438 sense_data_size = ei->SenseLen;
2439 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2440 if (ei->ScsiStatus)
2441 decode_sense_data(ei->SenseInfo, sense_data_size,
2442 &sense_key, &asc, &ascq);
2443 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2444 if (sense_key == ABORTED_COMMAND) {
2445 cmd->result |= DID_SOFT_ERROR << 16;
2446 break;
2447 }
2448 break;
2449 }
2450 /* Problem was not a check condition
2451 * Pass it up to the upper layers...
2452 */
2453 if (ei->ScsiStatus) {
2454 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2455 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2456 "Returning result: 0x%x\n",
2457 cp, ei->ScsiStatus,
2458 sense_key, asc, ascq,
2459 cmd->result);
2460 } else { /* scsi status is zero??? How??? */
2461 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2462 "Returning no connection.\n", cp),
2463
2464 /* Ordinarily, this case should never happen,
2465 * but there is a bug in some released firmware
2466 * revisions that allows it to happen if, for
2467 * example, a 4100 backplane loses power and
2468 * the tape drive is in it. We assume that
2469 * it's a fatal error of some kind because we
2470 * can't show that it wasn't. We will make it
2471 * look like selection timeout since that is
2472 * the most common reason for this to occur,
2473 * and it's severe enough.
2474 */
2475
2476 cmd->result = DID_NO_CONNECT << 16;
2477 }
2478 break;
2479
2480 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2481 break;
2482 case CMD_DATA_OVERRUN:
2483 dev_warn(&h->pdev->dev,
2484 "CDB %16phN data overrun\n", cp->Request.CDB);
2485 break;
2486 case CMD_INVALID: {
2487 /* print_bytes(cp, sizeof(*cp), 1, 0);
2488 print_cmd(cp); */
2489 /* We get CMD_INVALID if you address a non-existent device
2490 * instead of a selection timeout (no response). You will
2491 * see this if you yank out a drive, then try to access it.
2492 * This is kind of a shame because it means that any other
2493 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2494 * missing target. */
2495 cmd->result = DID_NO_CONNECT << 16;
2496 }
2497 break;
2498 case CMD_PROTOCOL_ERR:
2499 cmd->result = DID_ERROR << 16;
2500 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2501 cp->Request.CDB);
2502 break;
2503 case CMD_HARDWARE_ERR:
2504 cmd->result = DID_ERROR << 16;
2505 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2506 cp->Request.CDB);
2507 break;
2508 case CMD_CONNECTION_LOST:
2509 cmd->result = DID_ERROR << 16;
2510 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2511 cp->Request.CDB);
2512 break;
2513 case CMD_ABORTED:
2514 /* Return now to avoid calling scsi_done(). */
2515 return hpsa_cmd_abort_and_free(h, cp, cmd);
2516 case CMD_ABORT_FAILED:
2517 cmd->result = DID_ERROR << 16;
2518 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2519 cp->Request.CDB);
2520 break;
2521 case CMD_UNSOLICITED_ABORT:
2522 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2523 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2524 cp->Request.CDB);
2525 break;
2526 case CMD_TIMEOUT:
2527 cmd->result = DID_TIME_OUT << 16;
2528 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2529 cp->Request.CDB);
2530 break;
2531 case CMD_UNABORTABLE:
2532 cmd->result = DID_ERROR << 16;
2533 dev_warn(&h->pdev->dev, "Command unabortable\n");
2534 break;
2535 case CMD_TMF_STATUS:
2536 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2537 cmd->result = DID_ERROR << 16;
2538 break;
2539 case CMD_IOACCEL_DISABLED:
2540 /* This only handles the direct pass-through case since RAID
2541 * offload is handled above. Just attempt a retry.
2542 */
2543 cmd->result = DID_SOFT_ERROR << 16;
2544 dev_warn(&h->pdev->dev,
2545 "cp %p had HP SSD Smart Path error\n", cp);
2546 break;
2547 default:
2548 cmd->result = DID_ERROR << 16;
2549 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2550 cp, ei->CommandStatus);
2551 }
2552
2553 return hpsa_cmd_free_and_done(h, cp, cmd);
2554 }
2555
2556 static void hpsa_pci_unmap(struct pci_dev *pdev,
2557 struct CommandList *c, int sg_used, int data_direction)
2558 {
2559 int i;
2560
2561 for (i = 0; i < sg_used; i++)
2562 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2563 le32_to_cpu(c->SG[i].Len),
2564 data_direction);
2565 }
2566
2567 static int hpsa_map_one(struct pci_dev *pdev,
2568 struct CommandList *cp,
2569 unsigned char *buf,
2570 size_t buflen,
2571 int data_direction)
2572 {
2573 u64 addr64;
2574
2575 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2576 cp->Header.SGList = 0;
2577 cp->Header.SGTotal = cpu_to_le16(0);
2578 return 0;
2579 }
2580
2581 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2582 if (dma_mapping_error(&pdev->dev, addr64)) {
2583 /* Prevent subsequent unmap of something never mapped */
2584 cp->Header.SGList = 0;
2585 cp->Header.SGTotal = cpu_to_le16(0);
2586 return -1;
2587 }
2588 cp->SG[0].Addr = cpu_to_le64(addr64);
2589 cp->SG[0].Len = cpu_to_le32(buflen);
2590 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2591 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2592 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2593 return 0;
2594 }
2595
2596 #define NO_TIMEOUT ((unsigned long) -1)
2597 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2598 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2599 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2600 {
2601 DECLARE_COMPLETION_ONSTACK(wait);
2602
2603 c->waiting = &wait;
2604 __enqueue_cmd_and_start_io(h, c, reply_queue);
2605 if (timeout_msecs == NO_TIMEOUT) {
2606 /* TODO: get rid of this no-timeout thing */
2607 wait_for_completion_io(&wait);
2608 return IO_OK;
2609 }
2610 if (!wait_for_completion_io_timeout(&wait,
2611 msecs_to_jiffies(timeout_msecs))) {
2612 dev_warn(&h->pdev->dev, "Command timed out.\n");
2613 return -ETIMEDOUT;
2614 }
2615 return IO_OK;
2616 }
2617
2618 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2619 int reply_queue, unsigned long timeout_msecs)
2620 {
2621 if (unlikely(lockup_detected(h))) {
2622 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2623 return IO_OK;
2624 }
2625 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2626 }
2627
2628 static u32 lockup_detected(struct ctlr_info *h)
2629 {
2630 int cpu;
2631 u32 rc, *lockup_detected;
2632
2633 cpu = get_cpu();
2634 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2635 rc = *lockup_detected;
2636 put_cpu();
2637 return rc;
2638 }
2639
2640 #define MAX_DRIVER_CMD_RETRIES 25
2641 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2642 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2643 {
2644 int backoff_time = 10, retry_count = 0;
2645 int rc;
2646
2647 do {
2648 memset(c->err_info, 0, sizeof(*c->err_info));
2649 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2650 timeout_msecs);
2651 if (rc)
2652 break;
2653 retry_count++;
2654 if (retry_count > 3) {
2655 msleep(backoff_time);
2656 if (backoff_time < 1000)
2657 backoff_time *= 2;
2658 }
2659 } while ((check_for_unit_attention(h, c) ||
2660 check_for_busy(h, c)) &&
2661 retry_count <= MAX_DRIVER_CMD_RETRIES);
2662 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2663 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2664 rc = -EIO;
2665 return rc;
2666 }
2667
2668 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2669 struct CommandList *c)
2670 {
2671 const u8 *cdb = c->Request.CDB;
2672 const u8 *lun = c->Header.LUN.LunAddrBytes;
2673
2674 dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2675 " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2676 txt, lun[0], lun[1], lun[2], lun[3],
2677 lun[4], lun[5], lun[6], lun[7],
2678 cdb[0], cdb[1], cdb[2], cdb[3],
2679 cdb[4], cdb[5], cdb[6], cdb[7],
2680 cdb[8], cdb[9], cdb[10], cdb[11],
2681 cdb[12], cdb[13], cdb[14], cdb[15]);
2682 }
2683
2684 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2685 struct CommandList *cp)
2686 {
2687 const struct ErrorInfo *ei = cp->err_info;
2688 struct device *d = &cp->h->pdev->dev;
2689 u8 sense_key, asc, ascq;
2690 int sense_len;
2691
2692 switch (ei->CommandStatus) {
2693 case CMD_TARGET_STATUS:
2694 if (ei->SenseLen > sizeof(ei->SenseInfo))
2695 sense_len = sizeof(ei->SenseInfo);
2696 else
2697 sense_len = ei->SenseLen;
2698 decode_sense_data(ei->SenseInfo, sense_len,
2699 &sense_key, &asc, &ascq);
2700 hpsa_print_cmd(h, "SCSI status", cp);
2701 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2702 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2703 sense_key, asc, ascq);
2704 else
2705 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2706 if (ei->ScsiStatus == 0)
2707 dev_warn(d, "SCSI status is abnormally zero. "
2708 "(probably indicates selection timeout "
2709 "reported incorrectly due to a known "
2710 "firmware bug, circa July, 2001.)\n");
2711 break;
2712 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2713 break;
2714 case CMD_DATA_OVERRUN:
2715 hpsa_print_cmd(h, "overrun condition", cp);
2716 break;
2717 case CMD_INVALID: {
2718 /* controller unfortunately reports SCSI passthru's
2719 * to non-existent targets as invalid commands.
2720 */
2721 hpsa_print_cmd(h, "invalid command", cp);
2722 dev_warn(d, "probably means device no longer present\n");
2723 }
2724 break;
2725 case CMD_PROTOCOL_ERR:
2726 hpsa_print_cmd(h, "protocol error", cp);
2727 break;
2728 case CMD_HARDWARE_ERR:
2729 hpsa_print_cmd(h, "hardware error", cp);
2730 break;
2731 case CMD_CONNECTION_LOST:
2732 hpsa_print_cmd(h, "connection lost", cp);
2733 break;
2734 case CMD_ABORTED:
2735 hpsa_print_cmd(h, "aborted", cp);
2736 break;
2737 case CMD_ABORT_FAILED:
2738 hpsa_print_cmd(h, "abort failed", cp);
2739 break;
2740 case CMD_UNSOLICITED_ABORT:
2741 hpsa_print_cmd(h, "unsolicited abort", cp);
2742 break;
2743 case CMD_TIMEOUT:
2744 hpsa_print_cmd(h, "timed out", cp);
2745 break;
2746 case CMD_UNABORTABLE:
2747 hpsa_print_cmd(h, "unabortable", cp);
2748 break;
2749 case CMD_CTLR_LOCKUP:
2750 hpsa_print_cmd(h, "controller lockup detected", cp);
2751 break;
2752 default:
2753 hpsa_print_cmd(h, "unknown status", cp);
2754 dev_warn(d, "Unknown command status %x\n",
2755 ei->CommandStatus);
2756 }
2757 }
2758
2759 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2760 u16 page, unsigned char *buf,
2761 unsigned char bufsize)
2762 {
2763 int rc = IO_OK;
2764 struct CommandList *c;
2765 struct ErrorInfo *ei;
2766
2767 c = cmd_alloc(h);
2768
2769 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2770 page, scsi3addr, TYPE_CMD)) {
2771 rc = -1;
2772 goto out;
2773 }
2774 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2775 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2776 if (rc)
2777 goto out;
2778 ei = c->err_info;
2779 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2780 hpsa_scsi_interpret_error(h, c);
2781 rc = -1;
2782 }
2783 out:
2784 cmd_free(h, c);
2785 return rc;
2786 }
2787
2788 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2789 u8 reset_type, int reply_queue)
2790 {
2791 int rc = IO_OK;
2792 struct CommandList *c;
2793 struct ErrorInfo *ei;
2794
2795 c = cmd_alloc(h);
2796
2797
2798 /* fill_cmd can't fail here, no data buffer to map. */
2799 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2800 scsi3addr, TYPE_MSG);
2801 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2802 if (rc) {
2803 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2804 goto out;
2805 }
2806 /* no unmap needed here because no data xfer. */
2807
2808 ei = c->err_info;
2809 if (ei->CommandStatus != 0) {
2810 hpsa_scsi_interpret_error(h, c);
2811 rc = -1;
2812 }
2813 out:
2814 cmd_free(h, c);
2815 return rc;
2816 }
2817
2818 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2819 struct hpsa_scsi_dev_t *dev,
2820 unsigned char *scsi3addr)
2821 {
2822 int i;
2823 bool match = false;
2824 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2825 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2826
2827 if (hpsa_is_cmd_idle(c))
2828 return false;
2829
2830 switch (c->cmd_type) {
2831 case CMD_SCSI:
2832 case CMD_IOCTL_PEND:
2833 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2834 sizeof(c->Header.LUN.LunAddrBytes));
2835 break;
2836
2837 case CMD_IOACCEL1:
2838 case CMD_IOACCEL2:
2839 if (c->phys_disk == dev) {
2840 /* HBA mode match */
2841 match = true;
2842 } else {
2843 /* Possible RAID mode -- check each phys dev. */
2844 /* FIXME: Do we need to take out a lock here? If
2845 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2846 * instead. */
2847 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2848 /* FIXME: an alternate test might be
2849 *
2850 * match = dev->phys_disk[i]->ioaccel_handle
2851 * == c2->scsi_nexus; */
2852 match = dev->phys_disk[i] == c->phys_disk;
2853 }
2854 }
2855 break;
2856
2857 case IOACCEL2_TMF:
2858 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2859 match = dev->phys_disk[i]->ioaccel_handle ==
2860 le32_to_cpu(ac->it_nexus);
2861 }
2862 break;
2863
2864 case 0: /* The command is in the middle of being initialized. */
2865 match = false;
2866 break;
2867
2868 default:
2869 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
2870 c->cmd_type);
2871 BUG();
2872 }
2873
2874 return match;
2875 }
2876
2877 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
2878 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
2879 {
2880 int i;
2881 int rc = 0;
2882
2883 /* We can really only handle one reset at a time */
2884 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
2885 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
2886 return -EINTR;
2887 }
2888
2889 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
2890
2891 for (i = 0; i < h->nr_cmds; i++) {
2892 struct CommandList *c = h->cmd_pool + i;
2893 int refcount = atomic_inc_return(&c->refcount);
2894
2895 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
2896 unsigned long flags;
2897
2898 /*
2899 * Mark the target command as having a reset pending,
2900 * then lock a lock so that the command cannot complete
2901 * while we're considering it. If the command is not
2902 * idle then count it; otherwise revoke the event.
2903 */
2904 c->reset_pending = dev;
2905 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
2906 if (!hpsa_is_cmd_idle(c))
2907 atomic_inc(&dev->reset_cmds_out);
2908 else
2909 c->reset_pending = NULL;
2910 spin_unlock_irqrestore(&h->lock, flags);
2911 }
2912
2913 cmd_free(h, c);
2914 }
2915
2916 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
2917 if (!rc)
2918 wait_event(h->event_sync_wait_queue,
2919 atomic_read(&dev->reset_cmds_out) == 0 ||
2920 lockup_detected(h));
2921
2922 if (unlikely(lockup_detected(h))) {
2923 dev_warn(&h->pdev->dev,
2924 "Controller lockup detected during reset wait\n");
2925 rc = -ENODEV;
2926 }
2927
2928 if (unlikely(rc))
2929 atomic_set(&dev->reset_cmds_out, 0);
2930
2931 mutex_unlock(&h->reset_mutex);
2932 return rc;
2933 }
2934
2935 static void hpsa_get_raid_level(struct ctlr_info *h,
2936 unsigned char *scsi3addr, unsigned char *raid_level)
2937 {
2938 int rc;
2939 unsigned char *buf;
2940
2941 *raid_level = RAID_UNKNOWN;
2942 buf = kzalloc(64, GFP_KERNEL);
2943 if (!buf)
2944 return;
2945 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2946 if (rc == 0)
2947 *raid_level = buf[8];
2948 if (*raid_level > RAID_UNKNOWN)
2949 *raid_level = RAID_UNKNOWN;
2950 kfree(buf);
2951 return;
2952 }
2953
2954 #define HPSA_MAP_DEBUG
2955 #ifdef HPSA_MAP_DEBUG
2956 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2957 struct raid_map_data *map_buff)
2958 {
2959 struct raid_map_disk_data *dd = &map_buff->data[0];
2960 int map, row, col;
2961 u16 map_cnt, row_cnt, disks_per_row;
2962
2963 if (rc != 0)
2964 return;
2965
2966 /* Show details only if debugging has been activated. */
2967 if (h->raid_offload_debug < 2)
2968 return;
2969
2970 dev_info(&h->pdev->dev, "structure_size = %u\n",
2971 le32_to_cpu(map_buff->structure_size));
2972 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2973 le32_to_cpu(map_buff->volume_blk_size));
2974 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2975 le64_to_cpu(map_buff->volume_blk_cnt));
2976 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2977 map_buff->phys_blk_shift);
2978 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2979 map_buff->parity_rotation_shift);
2980 dev_info(&h->pdev->dev, "strip_size = %u\n",
2981 le16_to_cpu(map_buff->strip_size));
2982 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2983 le64_to_cpu(map_buff->disk_starting_blk));
2984 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2985 le64_to_cpu(map_buff->disk_blk_cnt));
2986 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2987 le16_to_cpu(map_buff->data_disks_per_row));
2988 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2989 le16_to_cpu(map_buff->metadata_disks_per_row));
2990 dev_info(&h->pdev->dev, "row_cnt = %u\n",
2991 le16_to_cpu(map_buff->row_cnt));
2992 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2993 le16_to_cpu(map_buff->layout_map_count));
2994 dev_info(&h->pdev->dev, "flags = 0x%x\n",
2995 le16_to_cpu(map_buff->flags));
2996 dev_info(&h->pdev->dev, "encrypytion = %s\n",
2997 le16_to_cpu(map_buff->flags) &
2998 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
2999 dev_info(&h->pdev->dev, "dekindex = %u\n",
3000 le16_to_cpu(map_buff->dekindex));
3001 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3002 for (map = 0; map < map_cnt; map++) {
3003 dev_info(&h->pdev->dev, "Map%u:\n", map);
3004 row_cnt = le16_to_cpu(map_buff->row_cnt);
3005 for (row = 0; row < row_cnt; row++) {
3006 dev_info(&h->pdev->dev, " Row%u:\n", row);
3007 disks_per_row =
3008 le16_to_cpu(map_buff->data_disks_per_row);
3009 for (col = 0; col < disks_per_row; col++, dd++)
3010 dev_info(&h->pdev->dev,
3011 " D%02u: h=0x%04x xor=%u,%u\n",
3012 col, dd->ioaccel_handle,
3013 dd->xor_mult[0], dd->xor_mult[1]);
3014 disks_per_row =
3015 le16_to_cpu(map_buff->metadata_disks_per_row);
3016 for (col = 0; col < disks_per_row; col++, dd++)
3017 dev_info(&h->pdev->dev,
3018 " M%02u: h=0x%04x xor=%u,%u\n",
3019 col, dd->ioaccel_handle,
3020 dd->xor_mult[0], dd->xor_mult[1]);
3021 }
3022 }
3023 }
3024 #else
3025 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3026 __attribute__((unused)) int rc,
3027 __attribute__((unused)) struct raid_map_data *map_buff)
3028 {
3029 }
3030 #endif
3031
3032 static int hpsa_get_raid_map(struct ctlr_info *h,
3033 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3034 {
3035 int rc = 0;
3036 struct CommandList *c;
3037 struct ErrorInfo *ei;
3038
3039 c = cmd_alloc(h);
3040
3041 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3042 sizeof(this_device->raid_map), 0,
3043 scsi3addr, TYPE_CMD)) {
3044 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3045 cmd_free(h, c);
3046 return -1;
3047 }
3048 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3049 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3050 if (rc)
3051 goto out;
3052 ei = c->err_info;
3053 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3054 hpsa_scsi_interpret_error(h, c);
3055 rc = -1;
3056 goto out;
3057 }
3058 cmd_free(h, c);
3059
3060 /* @todo in the future, dynamically allocate RAID map memory */
3061 if (le32_to_cpu(this_device->raid_map.structure_size) >
3062 sizeof(this_device->raid_map)) {
3063 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3064 rc = -1;
3065 }
3066 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3067 return rc;
3068 out:
3069 cmd_free(h, c);
3070 return rc;
3071 }
3072
3073 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3074 struct bmic_identify_controller *buf, size_t bufsize)
3075 {
3076 int rc = IO_OK;
3077 struct CommandList *c;
3078 struct ErrorInfo *ei;
3079
3080 c = cmd_alloc(h);
3081
3082 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3083 0, RAID_CTLR_LUNID, TYPE_CMD);
3084 if (rc)
3085 goto out;
3086
3087 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3088 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3089 if (rc)
3090 goto out;
3091 ei = c->err_info;
3092 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3093 hpsa_scsi_interpret_error(h, c);
3094 rc = -1;
3095 }
3096 out:
3097 cmd_free(h, c);
3098 return rc;
3099 }
3100
3101
3102 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3103 unsigned char scsi3addr[], u16 bmic_device_index,
3104 struct bmic_identify_physical_device *buf, size_t bufsize)
3105 {
3106 int rc = IO_OK;
3107 struct CommandList *c;
3108 struct ErrorInfo *ei;
3109
3110 c = cmd_alloc(h);
3111 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3112 0, RAID_CTLR_LUNID, TYPE_CMD);
3113 if (rc)
3114 goto out;
3115
3116 c->Request.CDB[2] = bmic_device_index & 0xff;
3117 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3118
3119 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3120 NO_TIMEOUT);
3121 ei = c->err_info;
3122 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3123 hpsa_scsi_interpret_error(h, c);
3124 rc = -1;
3125 }
3126 out:
3127 cmd_free(h, c);
3128 return rc;
3129 }
3130
3131 static int hpsa_vpd_page_supported(struct ctlr_info *h,
3132 unsigned char scsi3addr[], u8 page)
3133 {
3134 int rc;
3135 int i;
3136 int pages;
3137 unsigned char *buf, bufsize;
3138
3139 buf = kzalloc(256, GFP_KERNEL);
3140 if (!buf)
3141 return 0;
3142
3143 /* Get the size of the page list first */
3144 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3145 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3146 buf, HPSA_VPD_HEADER_SZ);
3147 if (rc != 0)
3148 goto exit_unsupported;
3149 pages = buf[3];
3150 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3151 bufsize = pages + HPSA_VPD_HEADER_SZ;
3152 else
3153 bufsize = 255;
3154
3155 /* Get the whole VPD page list */
3156 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3157 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3158 buf, bufsize);
3159 if (rc != 0)
3160 goto exit_unsupported;
3161
3162 pages = buf[3];
3163 for (i = 1; i <= pages; i++)
3164 if (buf[3 + i] == page)
3165 goto exit_supported;
3166 exit_unsupported:
3167 kfree(buf);
3168 return 0;
3169 exit_supported:
3170 kfree(buf);
3171 return 1;
3172 }
3173
3174 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3175 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3176 {
3177 int rc;
3178 unsigned char *buf;
3179 u8 ioaccel_status;
3180
3181 this_device->offload_config = 0;
3182 this_device->offload_enabled = 0;
3183 this_device->offload_to_be_enabled = 0;
3184
3185 buf = kzalloc(64, GFP_KERNEL);
3186 if (!buf)
3187 return;
3188 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3189 goto out;
3190 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3191 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3192 if (rc != 0)
3193 goto out;
3194
3195 #define IOACCEL_STATUS_BYTE 4
3196 #define OFFLOAD_CONFIGURED_BIT 0x01
3197 #define OFFLOAD_ENABLED_BIT 0x02
3198 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3199 this_device->offload_config =
3200 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3201 if (this_device->offload_config) {
3202 this_device->offload_enabled =
3203 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3204 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3205 this_device->offload_enabled = 0;
3206 }
3207 this_device->offload_to_be_enabled = this_device->offload_enabled;
3208 out:
3209 kfree(buf);
3210 return;
3211 }
3212
3213 /* Get the device id from inquiry page 0x83 */
3214 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3215 unsigned char *device_id, int index, int buflen)
3216 {
3217 int rc;
3218 unsigned char *buf;
3219
3220 if (buflen > 16)
3221 buflen = 16;
3222 buf = kzalloc(64, GFP_KERNEL);
3223 if (!buf)
3224 return -ENOMEM;
3225 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3226 if (rc == 0)
3227 memcpy(device_id, &buf[index], buflen);
3228
3229 kfree(buf);
3230
3231 return rc != 0;
3232 }
3233
3234 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3235 void *buf, int bufsize,
3236 int extended_response)
3237 {
3238 int rc = IO_OK;
3239 struct CommandList *c;
3240 unsigned char scsi3addr[8];
3241 struct ErrorInfo *ei;
3242
3243 c = cmd_alloc(h);
3244
3245 /* address the controller */
3246 memset(scsi3addr, 0, sizeof(scsi3addr));
3247 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3248 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3249 rc = -1;
3250 goto out;
3251 }
3252 if (extended_response)
3253 c->Request.CDB[1] = extended_response;
3254 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3255 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3256 if (rc)
3257 goto out;
3258 ei = c->err_info;
3259 if (ei->CommandStatus != 0 &&
3260 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3261 hpsa_scsi_interpret_error(h, c);
3262 rc = -1;
3263 } else {
3264 struct ReportLUNdata *rld = buf;
3265
3266 if (rld->extended_response_flag != extended_response) {
3267 dev_err(&h->pdev->dev,
3268 "report luns requested format %u, got %u\n",
3269 extended_response,
3270 rld->extended_response_flag);
3271 rc = -1;
3272 }
3273 }
3274 out:
3275 cmd_free(h, c);
3276 return rc;
3277 }
3278
3279 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3280 struct ReportExtendedLUNdata *buf, int bufsize)
3281 {
3282 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3283 HPSA_REPORT_PHYS_EXTENDED);
3284 }
3285
3286 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3287 struct ReportLUNdata *buf, int bufsize)
3288 {
3289 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3290 }
3291
3292 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3293 int bus, int target, int lun)
3294 {
3295 device->bus = bus;
3296 device->target = target;
3297 device->lun = lun;
3298 }
3299
3300 /* Use VPD inquiry to get details of volume status */
3301 static int hpsa_get_volume_status(struct ctlr_info *h,
3302 unsigned char scsi3addr[])
3303 {
3304 int rc;
3305 int status;
3306 int size;
3307 unsigned char *buf;
3308
3309 buf = kzalloc(64, GFP_KERNEL);
3310 if (!buf)
3311 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3312
3313 /* Does controller have VPD for logical volume status? */
3314 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3315 goto exit_failed;
3316
3317 /* Get the size of the VPD return buffer */
3318 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3319 buf, HPSA_VPD_HEADER_SZ);
3320 if (rc != 0)
3321 goto exit_failed;
3322 size = buf[3];
3323
3324 /* Now get the whole VPD buffer */
3325 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3326 buf, size + HPSA_VPD_HEADER_SZ);
3327 if (rc != 0)
3328 goto exit_failed;
3329 status = buf[4]; /* status byte */
3330
3331 kfree(buf);
3332 return status;
3333 exit_failed:
3334 kfree(buf);
3335 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3336 }
3337
3338 /* Determine offline status of a volume.
3339 * Return either:
3340 * 0 (not offline)
3341 * 0xff (offline for unknown reasons)
3342 * # (integer code indicating one of several NOT READY states
3343 * describing why a volume is to be kept offline)
3344 */
3345 static int hpsa_volume_offline(struct ctlr_info *h,
3346 unsigned char scsi3addr[])
3347 {
3348 struct CommandList *c;
3349 unsigned char *sense;
3350 u8 sense_key, asc, ascq;
3351 int sense_len;
3352 int rc, ldstat = 0;
3353 u16 cmd_status;
3354 u8 scsi_status;
3355 #define ASC_LUN_NOT_READY 0x04
3356 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3357 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3358
3359 c = cmd_alloc(h);
3360
3361 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3362 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3363 if (rc) {
3364 cmd_free(h, c);
3365 return 0;
3366 }
3367 sense = c->err_info->SenseInfo;
3368 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3369 sense_len = sizeof(c->err_info->SenseInfo);
3370 else
3371 sense_len = c->err_info->SenseLen;
3372 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3373 cmd_status = c->err_info->CommandStatus;
3374 scsi_status = c->err_info->ScsiStatus;
3375 cmd_free(h, c);
3376 /* Is the volume 'not ready'? */
3377 if (cmd_status != CMD_TARGET_STATUS ||
3378 scsi_status != SAM_STAT_CHECK_CONDITION ||
3379 sense_key != NOT_READY ||
3380 asc != ASC_LUN_NOT_READY) {
3381 return 0;
3382 }
3383
3384 /* Determine the reason for not ready state */
3385 ldstat = hpsa_get_volume_status(h, scsi3addr);
3386
3387 /* Keep volume offline in certain cases: */
3388 switch (ldstat) {
3389 case HPSA_LV_UNDERGOING_ERASE:
3390 case HPSA_LV_NOT_AVAILABLE:
3391 case HPSA_LV_UNDERGOING_RPI:
3392 case HPSA_LV_PENDING_RPI:
3393 case HPSA_LV_ENCRYPTED_NO_KEY:
3394 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3395 case HPSA_LV_UNDERGOING_ENCRYPTION:
3396 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3397 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3398 return ldstat;
3399 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3400 /* If VPD status page isn't available,
3401 * use ASC/ASCQ to determine state
3402 */
3403 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3404 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3405 return ldstat;
3406 break;
3407 default:
3408 break;
3409 }
3410 return 0;
3411 }
3412
3413 /*
3414 * Find out if a logical device supports aborts by simply trying one.
3415 * Smart Array may claim not to support aborts on logical drives, but
3416 * if a MSA2000 * is connected, the drives on that will be presented
3417 * by the Smart Array as logical drives, and aborts may be sent to
3418 * those devices successfully. So the simplest way to find out is
3419 * to simply try an abort and see how the device responds.
3420 */
3421 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3422 unsigned char *scsi3addr)
3423 {
3424 struct CommandList *c;
3425 struct ErrorInfo *ei;
3426 int rc = 0;
3427
3428 u64 tag = (u64) -1; /* bogus tag */
3429
3430 /* Assume that physical devices support aborts */
3431 if (!is_logical_dev_addr_mode(scsi3addr))
3432 return 1;
3433
3434 c = cmd_alloc(h);
3435
3436 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3437 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3438 /* no unmap needed here because no data xfer. */
3439 ei = c->err_info;
3440 switch (ei->CommandStatus) {
3441 case CMD_INVALID:
3442 rc = 0;
3443 break;
3444 case CMD_UNABORTABLE:
3445 case CMD_ABORT_FAILED:
3446 rc = 1;
3447 break;
3448 case CMD_TMF_STATUS:
3449 rc = hpsa_evaluate_tmf_status(h, c);
3450 break;
3451 default:
3452 rc = 0;
3453 break;
3454 }
3455 cmd_free(h, c);
3456 return rc;
3457 }
3458
3459 static void sanitize_inquiry_string(unsigned char *s, int len)
3460 {
3461 bool terminated = false;
3462
3463 for (; len > 0; (--len, ++s)) {
3464 if (*s == 0)
3465 terminated = true;
3466 if (terminated || *s < 0x20 || *s > 0x7e)
3467 *s = ' ';
3468 }
3469 }
3470
3471 static int hpsa_update_device_info(struct ctlr_info *h,
3472 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3473 unsigned char *is_OBDR_device)
3474 {
3475
3476 #define OBDR_SIG_OFFSET 43
3477 #define OBDR_TAPE_SIG "$DR-10"
3478 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3479 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3480
3481 unsigned char *inq_buff;
3482 unsigned char *obdr_sig;
3483 int rc = 0;
3484
3485 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3486 if (!inq_buff) {
3487 rc = -ENOMEM;
3488 goto bail_out;
3489 }
3490
3491 /* Do an inquiry to the device to see what it is. */
3492 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3493 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3494 /* Inquiry failed (msg printed already) */
3495 dev_err(&h->pdev->dev,
3496 "hpsa_update_device_info: inquiry failed\n");
3497 rc = -EIO;
3498 goto bail_out;
3499 }
3500
3501 sanitize_inquiry_string(&inq_buff[8], 8);
3502 sanitize_inquiry_string(&inq_buff[16], 16);
3503
3504 this_device->devtype = (inq_buff[0] & 0x1f);
3505 memcpy(this_device->scsi3addr, scsi3addr, 8);
3506 memcpy(this_device->vendor, &inq_buff[8],
3507 sizeof(this_device->vendor));
3508 memcpy(this_device->model, &inq_buff[16],
3509 sizeof(this_device->model));
3510 memset(this_device->device_id, 0,
3511 sizeof(this_device->device_id));
3512 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3513 sizeof(this_device->device_id));
3514
3515 if (this_device->devtype == TYPE_DISK &&
3516 is_logical_dev_addr_mode(scsi3addr)) {
3517 int volume_offline;
3518
3519 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3520 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3521 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3522 volume_offline = hpsa_volume_offline(h, scsi3addr);
3523 if (volume_offline < 0 || volume_offline > 0xff)
3524 volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3525 this_device->volume_offline = volume_offline & 0xff;
3526 } else {
3527 this_device->raid_level = RAID_UNKNOWN;
3528 this_device->offload_config = 0;
3529 this_device->offload_enabled = 0;
3530 this_device->offload_to_be_enabled = 0;
3531 this_device->hba_ioaccel_enabled = 0;
3532 this_device->volume_offline = 0;
3533 this_device->queue_depth = h->nr_cmds;
3534 }
3535
3536 if (is_OBDR_device) {
3537 /* See if this is a One-Button-Disaster-Recovery device
3538 * by looking for "$DR-10" at offset 43 in inquiry data.
3539 */
3540 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3541 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3542 strncmp(obdr_sig, OBDR_TAPE_SIG,
3543 OBDR_SIG_LEN) == 0);
3544 }
3545 kfree(inq_buff);
3546 return 0;
3547
3548 bail_out:
3549 kfree(inq_buff);
3550 return rc;
3551 }
3552
3553 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3554 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3555 {
3556 unsigned long flags;
3557 int rc, entry;
3558 /*
3559 * See if this device supports aborts. If we already know
3560 * the device, we already know if it supports aborts, otherwise
3561 * we have to find out if it supports aborts by trying one.
3562 */
3563 spin_lock_irqsave(&h->devlock, flags);
3564 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3565 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3566 entry >= 0 && entry < h->ndevices) {
3567 dev->supports_aborts = h->dev[entry]->supports_aborts;
3568 spin_unlock_irqrestore(&h->devlock, flags);
3569 } else {
3570 spin_unlock_irqrestore(&h->devlock, flags);
3571 dev->supports_aborts =
3572 hpsa_device_supports_aborts(h, scsi3addr);
3573 if (dev->supports_aborts < 0)
3574 dev->supports_aborts = 0;
3575 }
3576 }
3577
3578 /*
3579 * Helper function to assign bus, target, lun mapping of devices.
3580 * Logical drive target and lun are assigned at this time, but
3581 * physical device lun and target assignment are deferred (assigned
3582 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3583 */
3584 static void figure_bus_target_lun(struct ctlr_info *h,
3585 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3586 {
3587 u32 lunid = get_unaligned_le32(lunaddrbytes);
3588
3589 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3590 /* physical device, target and lun filled in later */
3591 if (is_hba_lunid(lunaddrbytes))
3592 hpsa_set_bus_target_lun(device,
3593 HPSA_HBA_BUS, 0, lunid & 0x3fff);
3594 else
3595 /* defer target, lun assignment for physical devices */
3596 hpsa_set_bus_target_lun(device,
3597 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
3598 return;
3599 }
3600 /* It's a logical device */
3601 if (device->external) {
3602 hpsa_set_bus_target_lun(device,
3603 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3604 lunid & 0x00ff);
3605 return;
3606 }
3607 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3608 0, lunid & 0x3fff);
3609 }
3610
3611
3612 /*
3613 * Get address of physical disk used for an ioaccel2 mode command:
3614 * 1. Extract ioaccel2 handle from the command.
3615 * 2. Find a matching ioaccel2 handle from list of physical disks.
3616 * 3. Return:
3617 * 1 and set scsi3addr to address of matching physical
3618 * 0 if no matching physical disk was found.
3619 */
3620 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3621 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3622 {
3623 struct io_accel2_cmd *c2 =
3624 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3625 unsigned long flags;
3626 int i;
3627
3628 spin_lock_irqsave(&h->devlock, flags);
3629 for (i = 0; i < h->ndevices; i++)
3630 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3631 memcpy(scsi3addr, h->dev[i]->scsi3addr,
3632 sizeof(h->dev[i]->scsi3addr));
3633 spin_unlock_irqrestore(&h->devlock, flags);
3634 return 1;
3635 }
3636 spin_unlock_irqrestore(&h->devlock, flags);
3637 return 0;
3638 }
3639
3640 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
3641 int i, int nphysicals, int nlocal_logicals)
3642 {
3643 /* In report logicals, local logicals are listed first,
3644 * then any externals.
3645 */
3646 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3647
3648 if (i == raid_ctlr_position)
3649 return 0;
3650
3651 if (i < logicals_start)
3652 return 0;
3653
3654 /* i is in logicals range, but still within local logicals */
3655 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
3656 return 0;
3657
3658 return 1; /* it's an external lun */
3659 }
3660
3661 /*
3662 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
3663 * logdev. The number of luns in physdev and logdev are returned in
3664 * *nphysicals and *nlogicals, respectively.
3665 * Returns 0 on success, -1 otherwise.
3666 */
3667 static int hpsa_gather_lun_info(struct ctlr_info *h,
3668 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3669 struct ReportLUNdata *logdev, u32 *nlogicals)
3670 {
3671 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3672 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3673 return -1;
3674 }
3675 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3676 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3677 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3678 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3679 *nphysicals = HPSA_MAX_PHYS_LUN;
3680 }
3681 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3682 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3683 return -1;
3684 }
3685 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3686 /* Reject Logicals in excess of our max capability. */
3687 if (*nlogicals > HPSA_MAX_LUN) {
3688 dev_warn(&h->pdev->dev,
3689 "maximum logical LUNs (%d) exceeded. "
3690 "%d LUNs ignored.\n", HPSA_MAX_LUN,
3691 *nlogicals - HPSA_MAX_LUN);
3692 *nlogicals = HPSA_MAX_LUN;
3693 }
3694 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3695 dev_warn(&h->pdev->dev,
3696 "maximum logical + physical LUNs (%d) exceeded. "
3697 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3698 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3699 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3700 }
3701 return 0;
3702 }
3703
3704 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3705 int i, int nphysicals, int nlogicals,
3706 struct ReportExtendedLUNdata *physdev_list,
3707 struct ReportLUNdata *logdev_list)
3708 {
3709 /* Helper function, figure out where the LUN ID info is coming from
3710 * given index i, lists of physical and logical devices, where in
3711 * the list the raid controller is supposed to appear (first or last)
3712 */
3713
3714 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3715 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3716
3717 if (i == raid_ctlr_position)
3718 return RAID_CTLR_LUNID;
3719
3720 if (i < logicals_start)
3721 return &physdev_list->LUN[i -
3722 (raid_ctlr_position == 0)].lunid[0];
3723
3724 if (i < last_device)
3725 return &logdev_list->LUN[i - nphysicals -
3726 (raid_ctlr_position == 0)][0];
3727 BUG();
3728 return NULL;
3729 }
3730
3731 /* get physical drive ioaccel handle and queue depth */
3732 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3733 struct hpsa_scsi_dev_t *dev,
3734 struct ReportExtendedLUNdata *rlep, int rle_index,
3735 struct bmic_identify_physical_device *id_phys)
3736 {
3737 int rc;
3738 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3739
3740 dev->ioaccel_handle = rle->ioaccel_handle;
3741 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
3742 dev->hba_ioaccel_enabled = 1;
3743 memset(id_phys, 0, sizeof(*id_phys));
3744 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
3745 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
3746 sizeof(*id_phys));
3747 if (!rc)
3748 /* Reserve space for FW operations */
3749 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3750 #define DRIVE_QUEUE_DEPTH 7
3751 dev->queue_depth =
3752 le16_to_cpu(id_phys->current_queue_depth_limit) -
3753 DRIVE_CMDS_RESERVED_FOR_FW;
3754 else
3755 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3756 }
3757
3758 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
3759 struct ReportExtendedLUNdata *rlep, int rle_index,
3760 struct bmic_identify_physical_device *id_phys)
3761 {
3762 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3763
3764 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
3765 this_device->hba_ioaccel_enabled = 1;
3766
3767 memcpy(&this_device->active_path_index,
3768 &id_phys->active_path_number,
3769 sizeof(this_device->active_path_index));
3770 memcpy(&this_device->path_map,
3771 &id_phys->redundant_path_present_map,
3772 sizeof(this_device->path_map));
3773 memcpy(&this_device->box,
3774 &id_phys->alternate_paths_phys_box_on_port,
3775 sizeof(this_device->box));
3776 memcpy(&this_device->phys_connector,
3777 &id_phys->alternate_paths_phys_connector,
3778 sizeof(this_device->phys_connector));
3779 memcpy(&this_device->bay,
3780 &id_phys->phys_bay_in_box,
3781 sizeof(this_device->bay));
3782 }
3783
3784 /* get number of local logical disks. */
3785 static int hpsa_set_local_logical_count(struct ctlr_info *h,
3786 struct bmic_identify_controller *id_ctlr,
3787 u32 *nlocals)
3788 {
3789 int rc;
3790
3791 if (!id_ctlr) {
3792 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
3793 __func__);
3794 return -ENOMEM;
3795 }
3796 memset(id_ctlr, 0, sizeof(*id_ctlr));
3797 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
3798 if (!rc)
3799 if (id_ctlr->configured_logical_drive_count < 256)
3800 *nlocals = id_ctlr->configured_logical_drive_count;
3801 else
3802 *nlocals = le16_to_cpu(
3803 id_ctlr->extended_logical_unit_count);
3804 else
3805 *nlocals = -1;
3806 return rc;
3807 }
3808
3809
3810 static void hpsa_update_scsi_devices(struct ctlr_info *h)
3811 {
3812 /* the idea here is we could get notified
3813 * that some devices have changed, so we do a report
3814 * physical luns and report logical luns cmd, and adjust
3815 * our list of devices accordingly.
3816 *
3817 * The scsi3addr's of devices won't change so long as the
3818 * adapter is not reset. That means we can rescan and
3819 * tell which devices we already know about, vs. new
3820 * devices, vs. disappearing devices.
3821 */
3822 struct ReportExtendedLUNdata *physdev_list = NULL;
3823 struct ReportLUNdata *logdev_list = NULL;
3824 struct bmic_identify_physical_device *id_phys = NULL;
3825 struct bmic_identify_controller *id_ctlr = NULL;
3826 u32 nphysicals = 0;
3827 u32 nlogicals = 0;
3828 u32 nlocal_logicals = 0;
3829 u32 ndev_allocated = 0;
3830 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3831 int ncurrent = 0;
3832 int i, n_ext_target_devs, ndevs_to_allocate;
3833 int raid_ctlr_position;
3834 bool physical_device;
3835 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3836
3837 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3838 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3839 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3840 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3841 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3842 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
3843
3844 if (!currentsd || !physdev_list || !logdev_list ||
3845 !tmpdevice || !id_phys || !id_ctlr) {
3846 dev_err(&h->pdev->dev, "out of memory\n");
3847 goto out;
3848 }
3849 memset(lunzerobits, 0, sizeof(lunzerobits));
3850
3851 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
3852
3853 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3854 logdev_list, &nlogicals)) {
3855 h->drv_req_rescan = 1;
3856 goto out;
3857 }
3858
3859 /* Set number of local logicals (non PTRAID) */
3860 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
3861 dev_warn(&h->pdev->dev,
3862 "%s: Can't determine number of local logical devices.\n",
3863 __func__);
3864 }
3865
3866 /* We might see up to the maximum number of logical and physical disks
3867 * plus external target devices, and a device for the local RAID
3868 * controller.
3869 */
3870 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3871
3872 /* Allocate the per device structures */
3873 for (i = 0; i < ndevs_to_allocate; i++) {
3874 if (i >= HPSA_MAX_DEVICES) {
3875 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3876 " %d devices ignored.\n", HPSA_MAX_DEVICES,
3877 ndevs_to_allocate - HPSA_MAX_DEVICES);
3878 break;
3879 }
3880
3881 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3882 if (!currentsd[i]) {
3883 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3884 __FILE__, __LINE__);
3885 h->drv_req_rescan = 1;
3886 goto out;
3887 }
3888 ndev_allocated++;
3889 }
3890
3891 if (is_scsi_rev_5(h))
3892 raid_ctlr_position = 0;
3893 else
3894 raid_ctlr_position = nphysicals + nlogicals;
3895
3896 /* adjust our table of devices */
3897 n_ext_target_devs = 0;
3898 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3899 u8 *lunaddrbytes, is_OBDR = 0;
3900 int rc = 0;
3901 int phys_dev_index = i - (raid_ctlr_position == 0);
3902
3903 physical_device = i < nphysicals + (raid_ctlr_position == 0);
3904
3905 /* Figure out where the LUN ID info is coming from */
3906 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3907 i, nphysicals, nlogicals, physdev_list, logdev_list);
3908
3909 /* skip masked non-disk devices */
3910 if (MASKED_DEVICE(lunaddrbytes) && physical_device &&
3911 (physdev_list->LUN[phys_dev_index].device_flags & 0x01))
3912 continue;
3913
3914 /* Get device type, vendor, model, device id */
3915 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3916 &is_OBDR);
3917 if (rc == -ENOMEM) {
3918 dev_warn(&h->pdev->dev,
3919 "Out of memory, rescan deferred.\n");
3920 h->drv_req_rescan = 1;
3921 goto out;
3922 }
3923 if (rc) {
3924 dev_warn(&h->pdev->dev,
3925 "Inquiry failed, skipping device.\n");
3926 continue;
3927 }
3928
3929 /* Determine if this is a lun from an external target array */
3930 tmpdevice->external =
3931 figure_external_status(h, raid_ctlr_position, i,
3932 nphysicals, nlocal_logicals);
3933
3934 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3935 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3936 this_device = currentsd[ncurrent];
3937
3938 /* Turn on discovery_polling if there are ext target devices.
3939 * Event-based change notification is unreliable for those.
3940 */
3941 if (!h->discovery_polling) {
3942 if (tmpdevice->external) {
3943 h->discovery_polling = 1;
3944 dev_info(&h->pdev->dev,
3945 "External target, activate discovery polling.\n");
3946 }
3947 }
3948
3949
3950 *this_device = *tmpdevice;
3951 this_device->physical_device = physical_device;
3952
3953 /*
3954 * Expose all devices except for physical devices that
3955 * are masked.
3956 */
3957 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
3958 this_device->expose_device = 0;
3959 else
3960 this_device->expose_device = 1;
3961
3962 switch (this_device->devtype) {
3963 case TYPE_ROM:
3964 /* We don't *really* support actual CD-ROM devices,
3965 * just "One Button Disaster Recovery" tape drive
3966 * which temporarily pretends to be a CD-ROM drive.
3967 * So we check that the device is really an OBDR tape
3968 * device by checking for "$DR-10" in bytes 43-48 of
3969 * the inquiry data.
3970 */
3971 if (is_OBDR)
3972 ncurrent++;
3973 break;
3974 case TYPE_DISK:
3975 if (this_device->physical_device) {
3976 /* The disk is in HBA mode. */
3977 /* Never use RAID mapper in HBA mode. */
3978 this_device->offload_enabled = 0;
3979 hpsa_get_ioaccel_drive_info(h, this_device,
3980 physdev_list, phys_dev_index, id_phys);
3981 hpsa_get_path_info(this_device,
3982 physdev_list, phys_dev_index, id_phys);
3983 }
3984 ncurrent++;
3985 break;
3986 case TYPE_TAPE:
3987 case TYPE_MEDIUM_CHANGER:
3988 case TYPE_ENCLOSURE:
3989 ncurrent++;
3990 break;
3991 case TYPE_RAID:
3992 /* Only present the Smartarray HBA as a RAID controller.
3993 * If it's a RAID controller other than the HBA itself
3994 * (an external RAID controller, MSA500 or similar)
3995 * don't present it.
3996 */
3997 if (!is_hba_lunid(lunaddrbytes))
3998 break;
3999 ncurrent++;
4000 break;
4001 default:
4002 break;
4003 }
4004 if (ncurrent >= HPSA_MAX_DEVICES)
4005 break;
4006 }
4007 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4008 out:
4009 kfree(tmpdevice);
4010 for (i = 0; i < ndev_allocated; i++)
4011 kfree(currentsd[i]);
4012 kfree(currentsd);
4013 kfree(physdev_list);
4014 kfree(logdev_list);
4015 kfree(id_ctlr);
4016 kfree(id_phys);
4017 }
4018
4019 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4020 struct scatterlist *sg)
4021 {
4022 u64 addr64 = (u64) sg_dma_address(sg);
4023 unsigned int len = sg_dma_len(sg);
4024
4025 desc->Addr = cpu_to_le64(addr64);
4026 desc->Len = cpu_to_le32(len);
4027 desc->Ext = 0;
4028 }
4029
4030 /*
4031 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4032 * dma mapping and fills in the scatter gather entries of the
4033 * hpsa command, cp.
4034 */
4035 static int hpsa_scatter_gather(struct ctlr_info *h,
4036 struct CommandList *cp,
4037 struct scsi_cmnd *cmd)
4038 {
4039 struct scatterlist *sg;
4040 int use_sg, i, sg_limit, chained, last_sg;
4041 struct SGDescriptor *curr_sg;
4042
4043 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4044
4045 use_sg = scsi_dma_map(cmd);
4046 if (use_sg < 0)
4047 return use_sg;
4048
4049 if (!use_sg)
4050 goto sglist_finished;
4051
4052 /*
4053 * If the number of entries is greater than the max for a single list,
4054 * then we have a chained list; we will set up all but one entry in the
4055 * first list (the last entry is saved for link information);
4056 * otherwise, we don't have a chained list and we'll set up at each of
4057 * the entries in the one list.
4058 */
4059 curr_sg = cp->SG;
4060 chained = use_sg > h->max_cmd_sg_entries;
4061 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4062 last_sg = scsi_sg_count(cmd) - 1;
4063 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4064 hpsa_set_sg_descriptor(curr_sg, sg);
4065 curr_sg++;
4066 }
4067
4068 if (chained) {
4069 /*
4070 * Continue with the chained list. Set curr_sg to the chained
4071 * list. Modify the limit to the total count less the entries
4072 * we've already set up. Resume the scan at the list entry
4073 * where the previous loop left off.
4074 */
4075 curr_sg = h->cmd_sg_list[cp->cmdindex];
4076 sg_limit = use_sg - sg_limit;
4077 for_each_sg(sg, sg, sg_limit, i) {
4078 hpsa_set_sg_descriptor(curr_sg, sg);
4079 curr_sg++;
4080 }
4081 }
4082
4083 /* Back the pointer up to the last entry and mark it as "last". */
4084 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4085
4086 if (use_sg + chained > h->maxSG)
4087 h->maxSG = use_sg + chained;
4088
4089 if (chained) {
4090 cp->Header.SGList = h->max_cmd_sg_entries;
4091 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4092 if (hpsa_map_sg_chain_block(h, cp)) {
4093 scsi_dma_unmap(cmd);
4094 return -1;
4095 }
4096 return 0;
4097 }
4098
4099 sglist_finished:
4100
4101 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4102 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4103 return 0;
4104 }
4105
4106 #define IO_ACCEL_INELIGIBLE (1)
4107 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4108 {
4109 int is_write = 0;
4110 u32 block;
4111 u32 block_cnt;
4112
4113 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4114 switch (cdb[0]) {
4115 case WRITE_6:
4116 case WRITE_12:
4117 is_write = 1;
4118 case READ_6:
4119 case READ_12:
4120 if (*cdb_len == 6) {
4121 block = get_unaligned_be16(&cdb[2]);
4122 block_cnt = cdb[4];
4123 if (block_cnt == 0)
4124 block_cnt = 256;
4125 } else {
4126 BUG_ON(*cdb_len != 12);
4127 block = get_unaligned_be32(&cdb[2]);
4128 block_cnt = get_unaligned_be32(&cdb[6]);
4129 }
4130 if (block_cnt > 0xffff)
4131 return IO_ACCEL_INELIGIBLE;
4132
4133 cdb[0] = is_write ? WRITE_10 : READ_10;
4134 cdb[1] = 0;
4135 cdb[2] = (u8) (block >> 24);
4136 cdb[3] = (u8) (block >> 16);
4137 cdb[4] = (u8) (block >> 8);
4138 cdb[5] = (u8) (block);
4139 cdb[6] = 0;
4140 cdb[7] = (u8) (block_cnt >> 8);
4141 cdb[8] = (u8) (block_cnt);
4142 cdb[9] = 0;
4143 *cdb_len = 10;
4144 break;
4145 }
4146 return 0;
4147 }
4148
4149 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4150 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4151 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4152 {
4153 struct scsi_cmnd *cmd = c->scsi_cmd;
4154 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4155 unsigned int len;
4156 unsigned int total_len = 0;
4157 struct scatterlist *sg;
4158 u64 addr64;
4159 int use_sg, i;
4160 struct SGDescriptor *curr_sg;
4161 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4162
4163 /* TODO: implement chaining support */
4164 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4165 atomic_dec(&phys_disk->ioaccel_cmds_out);
4166 return IO_ACCEL_INELIGIBLE;
4167 }
4168
4169 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4170
4171 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4172 atomic_dec(&phys_disk->ioaccel_cmds_out);
4173 return IO_ACCEL_INELIGIBLE;
4174 }
4175
4176 c->cmd_type = CMD_IOACCEL1;
4177
4178 /* Adjust the DMA address to point to the accelerated command buffer */
4179 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4180 (c->cmdindex * sizeof(*cp));
4181 BUG_ON(c->busaddr & 0x0000007F);
4182
4183 use_sg = scsi_dma_map(cmd);
4184 if (use_sg < 0) {
4185 atomic_dec(&phys_disk->ioaccel_cmds_out);
4186 return use_sg;
4187 }
4188
4189 if (use_sg) {
4190 curr_sg = cp->SG;
4191 scsi_for_each_sg(cmd, sg, use_sg, i) {
4192 addr64 = (u64) sg_dma_address(sg);
4193 len = sg_dma_len(sg);
4194 total_len += len;
4195 curr_sg->Addr = cpu_to_le64(addr64);
4196 curr_sg->Len = cpu_to_le32(len);
4197 curr_sg->Ext = cpu_to_le32(0);
4198 curr_sg++;
4199 }
4200 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4201
4202 switch (cmd->sc_data_direction) {
4203 case DMA_TO_DEVICE:
4204 control |= IOACCEL1_CONTROL_DATA_OUT;
4205 break;
4206 case DMA_FROM_DEVICE:
4207 control |= IOACCEL1_CONTROL_DATA_IN;
4208 break;
4209 case DMA_NONE:
4210 control |= IOACCEL1_CONTROL_NODATAXFER;
4211 break;
4212 default:
4213 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4214 cmd->sc_data_direction);
4215 BUG();
4216 break;
4217 }
4218 } else {
4219 control |= IOACCEL1_CONTROL_NODATAXFER;
4220 }
4221
4222 c->Header.SGList = use_sg;
4223 /* Fill out the command structure to submit */
4224 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4225 cp->transfer_len = cpu_to_le32(total_len);
4226 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4227 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4228 cp->control = cpu_to_le32(control);
4229 memcpy(cp->CDB, cdb, cdb_len);
4230 memcpy(cp->CISS_LUN, scsi3addr, 8);
4231 /* Tag was already set at init time. */
4232 enqueue_cmd_and_start_io(h, c);
4233 return 0;
4234 }
4235
4236 /*
4237 * Queue a command directly to a device behind the controller using the
4238 * I/O accelerator path.
4239 */
4240 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4241 struct CommandList *c)
4242 {
4243 struct scsi_cmnd *cmd = c->scsi_cmd;
4244 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4245
4246 c->phys_disk = dev;
4247
4248 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4249 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4250 }
4251
4252 /*
4253 * Set encryption parameters for the ioaccel2 request
4254 */
4255 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4256 struct CommandList *c, struct io_accel2_cmd *cp)
4257 {
4258 struct scsi_cmnd *cmd = c->scsi_cmd;
4259 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4260 struct raid_map_data *map = &dev->raid_map;
4261 u64 first_block;
4262
4263 /* Are we doing encryption on this device */
4264 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4265 return;
4266 /* Set the data encryption key index. */
4267 cp->dekindex = map->dekindex;
4268
4269 /* Set the encryption enable flag, encoded into direction field. */
4270 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4271
4272 /* Set encryption tweak values based on logical block address
4273 * If block size is 512, tweak value is LBA.
4274 * For other block sizes, tweak is (LBA * block size)/ 512)
4275 */
4276 switch (cmd->cmnd[0]) {
4277 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4278 case WRITE_6:
4279 case READ_6:
4280 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4281 break;
4282 case WRITE_10:
4283 case READ_10:
4284 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4285 case WRITE_12:
4286 case READ_12:
4287 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4288 break;
4289 case WRITE_16:
4290 case READ_16:
4291 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4292 break;
4293 default:
4294 dev_err(&h->pdev->dev,
4295 "ERROR: %s: size (0x%x) not supported for encryption\n",
4296 __func__, cmd->cmnd[0]);
4297 BUG();
4298 break;
4299 }
4300
4301 if (le32_to_cpu(map->volume_blk_size) != 512)
4302 first_block = first_block *
4303 le32_to_cpu(map->volume_blk_size)/512;
4304
4305 cp->tweak_lower = cpu_to_le32(first_block);
4306 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4307 }
4308
4309 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4310 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4311 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4312 {
4313 struct scsi_cmnd *cmd = c->scsi_cmd;
4314 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4315 struct ioaccel2_sg_element *curr_sg;
4316 int use_sg, i;
4317 struct scatterlist *sg;
4318 u64 addr64;
4319 u32 len;
4320 u32 total_len = 0;
4321
4322 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4323
4324 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4325 atomic_dec(&phys_disk->ioaccel_cmds_out);
4326 return IO_ACCEL_INELIGIBLE;
4327 }
4328
4329 c->cmd_type = CMD_IOACCEL2;
4330 /* Adjust the DMA address to point to the accelerated command buffer */
4331 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4332 (c->cmdindex * sizeof(*cp));
4333 BUG_ON(c->busaddr & 0x0000007F);
4334
4335 memset(cp, 0, sizeof(*cp));
4336 cp->IU_type = IOACCEL2_IU_TYPE;
4337
4338 use_sg = scsi_dma_map(cmd);
4339 if (use_sg < 0) {
4340 atomic_dec(&phys_disk->ioaccel_cmds_out);
4341 return use_sg;
4342 }
4343
4344 if (use_sg) {
4345 curr_sg = cp->sg;
4346 if (use_sg > h->ioaccel_maxsg) {
4347 addr64 = le64_to_cpu(
4348 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4349 curr_sg->address = cpu_to_le64(addr64);
4350 curr_sg->length = 0;
4351 curr_sg->reserved[0] = 0;
4352 curr_sg->reserved[1] = 0;
4353 curr_sg->reserved[2] = 0;
4354 curr_sg->chain_indicator = 0x80;
4355
4356 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4357 }
4358 scsi_for_each_sg(cmd, sg, use_sg, i) {
4359 addr64 = (u64) sg_dma_address(sg);
4360 len = sg_dma_len(sg);
4361 total_len += len;
4362 curr_sg->address = cpu_to_le64(addr64);
4363 curr_sg->length = cpu_to_le32(len);
4364 curr_sg->reserved[0] = 0;
4365 curr_sg->reserved[1] = 0;
4366 curr_sg->reserved[2] = 0;
4367 curr_sg->chain_indicator = 0;
4368 curr_sg++;
4369 }
4370
4371 switch (cmd->sc_data_direction) {
4372 case DMA_TO_DEVICE:
4373 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4374 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4375 break;
4376 case DMA_FROM_DEVICE:
4377 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4378 cp->direction |= IOACCEL2_DIR_DATA_IN;
4379 break;
4380 case DMA_NONE:
4381 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4382 cp->direction |= IOACCEL2_DIR_NO_DATA;
4383 break;
4384 default:
4385 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4386 cmd->sc_data_direction);
4387 BUG();
4388 break;
4389 }
4390 } else {
4391 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4392 cp->direction |= IOACCEL2_DIR_NO_DATA;
4393 }
4394
4395 /* Set encryption parameters, if necessary */
4396 set_encrypt_ioaccel2(h, c, cp);
4397
4398 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4399 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4400 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4401
4402 cp->data_len = cpu_to_le32(total_len);
4403 cp->err_ptr = cpu_to_le64(c->busaddr +
4404 offsetof(struct io_accel2_cmd, error_data));
4405 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4406
4407 /* fill in sg elements */
4408 if (use_sg > h->ioaccel_maxsg) {
4409 cp->sg_count = 1;
4410 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4411 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4412 atomic_dec(&phys_disk->ioaccel_cmds_out);
4413 scsi_dma_unmap(cmd);
4414 return -1;
4415 }
4416 } else
4417 cp->sg_count = (u8) use_sg;
4418
4419 enqueue_cmd_and_start_io(h, c);
4420 return 0;
4421 }
4422
4423 /*
4424 * Queue a command to the correct I/O accelerator path.
4425 */
4426 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4427 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4428 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4429 {
4430 /* Try to honor the device's queue depth */
4431 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4432 phys_disk->queue_depth) {
4433 atomic_dec(&phys_disk->ioaccel_cmds_out);
4434 return IO_ACCEL_INELIGIBLE;
4435 }
4436 if (h->transMethod & CFGTBL_Trans_io_accel1)
4437 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4438 cdb, cdb_len, scsi3addr,
4439 phys_disk);
4440 else
4441 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4442 cdb, cdb_len, scsi3addr,
4443 phys_disk);
4444 }
4445
4446 static void raid_map_helper(struct raid_map_data *map,
4447 int offload_to_mirror, u32 *map_index, u32 *current_group)
4448 {
4449 if (offload_to_mirror == 0) {
4450 /* use physical disk in the first mirrored group. */
4451 *map_index %= le16_to_cpu(map->data_disks_per_row);
4452 return;
4453 }
4454 do {
4455 /* determine mirror group that *map_index indicates */
4456 *current_group = *map_index /
4457 le16_to_cpu(map->data_disks_per_row);
4458 if (offload_to_mirror == *current_group)
4459 continue;
4460 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4461 /* select map index from next group */
4462 *map_index += le16_to_cpu(map->data_disks_per_row);
4463 (*current_group)++;
4464 } else {
4465 /* select map index from first group */
4466 *map_index %= le16_to_cpu(map->data_disks_per_row);
4467 *current_group = 0;
4468 }
4469 } while (offload_to_mirror != *current_group);
4470 }
4471
4472 /*
4473 * Attempt to perform offload RAID mapping for a logical volume I/O.
4474 */
4475 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4476 struct CommandList *c)
4477 {
4478 struct scsi_cmnd *cmd = c->scsi_cmd;
4479 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4480 struct raid_map_data *map = &dev->raid_map;
4481 struct raid_map_disk_data *dd = &map->data[0];
4482 int is_write = 0;
4483 u32 map_index;
4484 u64 first_block, last_block;
4485 u32 block_cnt;
4486 u32 blocks_per_row;
4487 u64 first_row, last_row;
4488 u32 first_row_offset, last_row_offset;
4489 u32 first_column, last_column;
4490 u64 r0_first_row, r0_last_row;
4491 u32 r5or6_blocks_per_row;
4492 u64 r5or6_first_row, r5or6_last_row;
4493 u32 r5or6_first_row_offset, r5or6_last_row_offset;
4494 u32 r5or6_first_column, r5or6_last_column;
4495 u32 total_disks_per_row;
4496 u32 stripesize;
4497 u32 first_group, last_group, current_group;
4498 u32 map_row;
4499 u32 disk_handle;
4500 u64 disk_block;
4501 u32 disk_block_cnt;
4502 u8 cdb[16];
4503 u8 cdb_len;
4504 u16 strip_size;
4505 #if BITS_PER_LONG == 32
4506 u64 tmpdiv;
4507 #endif
4508 int offload_to_mirror;
4509
4510 /* check for valid opcode, get LBA and block count */
4511 switch (cmd->cmnd[0]) {
4512 case WRITE_6:
4513 is_write = 1;
4514 case READ_6:
4515 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4516 block_cnt = cmd->cmnd[4];
4517 if (block_cnt == 0)
4518 block_cnt = 256;
4519 break;
4520 case WRITE_10:
4521 is_write = 1;
4522 case READ_10:
4523 first_block =
4524 (((u64) cmd->cmnd[2]) << 24) |
4525 (((u64) cmd->cmnd[3]) << 16) |
4526 (((u64) cmd->cmnd[4]) << 8) |
4527 cmd->cmnd[5];
4528 block_cnt =
4529 (((u32) cmd->cmnd[7]) << 8) |
4530 cmd->cmnd[8];
4531 break;
4532 case WRITE_12:
4533 is_write = 1;
4534 case READ_12:
4535 first_block =
4536 (((u64) cmd->cmnd[2]) << 24) |
4537 (((u64) cmd->cmnd[3]) << 16) |
4538 (((u64) cmd->cmnd[4]) << 8) |
4539 cmd->cmnd[5];
4540 block_cnt =
4541 (((u32) cmd->cmnd[6]) << 24) |
4542 (((u32) cmd->cmnd[7]) << 16) |
4543 (((u32) cmd->cmnd[8]) << 8) |
4544 cmd->cmnd[9];
4545 break;
4546 case WRITE_16:
4547 is_write = 1;
4548 case READ_16:
4549 first_block =
4550 (((u64) cmd->cmnd[2]) << 56) |
4551 (((u64) cmd->cmnd[3]) << 48) |
4552 (((u64) cmd->cmnd[4]) << 40) |
4553 (((u64) cmd->cmnd[5]) << 32) |
4554 (((u64) cmd->cmnd[6]) << 24) |
4555 (((u64) cmd->cmnd[7]) << 16) |
4556 (((u64) cmd->cmnd[8]) << 8) |
4557 cmd->cmnd[9];
4558 block_cnt =
4559 (((u32) cmd->cmnd[10]) << 24) |
4560 (((u32) cmd->cmnd[11]) << 16) |
4561 (((u32) cmd->cmnd[12]) << 8) |
4562 cmd->cmnd[13];
4563 break;
4564 default:
4565 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4566 }
4567 last_block = first_block + block_cnt - 1;
4568
4569 /* check for write to non-RAID-0 */
4570 if (is_write && dev->raid_level != 0)
4571 return IO_ACCEL_INELIGIBLE;
4572
4573 /* check for invalid block or wraparound */
4574 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4575 last_block < first_block)
4576 return IO_ACCEL_INELIGIBLE;
4577
4578 /* calculate stripe information for the request */
4579 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4580 le16_to_cpu(map->strip_size);
4581 strip_size = le16_to_cpu(map->strip_size);
4582 #if BITS_PER_LONG == 32
4583 tmpdiv = first_block;
4584 (void) do_div(tmpdiv, blocks_per_row);
4585 first_row = tmpdiv;
4586 tmpdiv = last_block;
4587 (void) do_div(tmpdiv, blocks_per_row);
4588 last_row = tmpdiv;
4589 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4590 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4591 tmpdiv = first_row_offset;
4592 (void) do_div(tmpdiv, strip_size);
4593 first_column = tmpdiv;
4594 tmpdiv = last_row_offset;
4595 (void) do_div(tmpdiv, strip_size);
4596 last_column = tmpdiv;
4597 #else
4598 first_row = first_block / blocks_per_row;
4599 last_row = last_block / blocks_per_row;
4600 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4601 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4602 first_column = first_row_offset / strip_size;
4603 last_column = last_row_offset / strip_size;
4604 #endif
4605
4606 /* if this isn't a single row/column then give to the controller */
4607 if ((first_row != last_row) || (first_column != last_column))
4608 return IO_ACCEL_INELIGIBLE;
4609
4610 /* proceeding with driver mapping */
4611 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4612 le16_to_cpu(map->metadata_disks_per_row);
4613 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4614 le16_to_cpu(map->row_cnt);
4615 map_index = (map_row * total_disks_per_row) + first_column;
4616
4617 switch (dev->raid_level) {
4618 case HPSA_RAID_0:
4619 break; /* nothing special to do */
4620 case HPSA_RAID_1:
4621 /* Handles load balance across RAID 1 members.
4622 * (2-drive R1 and R10 with even # of drives.)
4623 * Appropriate for SSDs, not optimal for HDDs
4624 */
4625 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4626 if (dev->offload_to_mirror)
4627 map_index += le16_to_cpu(map->data_disks_per_row);
4628 dev->offload_to_mirror = !dev->offload_to_mirror;
4629 break;
4630 case HPSA_RAID_ADM:
4631 /* Handles N-way mirrors (R1-ADM)
4632 * and R10 with # of drives divisible by 3.)
4633 */
4634 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4635
4636 offload_to_mirror = dev->offload_to_mirror;
4637 raid_map_helper(map, offload_to_mirror,
4638 &map_index, &current_group);
4639 /* set mirror group to use next time */
4640 offload_to_mirror =
4641 (offload_to_mirror >=
4642 le16_to_cpu(map->layout_map_count) - 1)
4643 ? 0 : offload_to_mirror + 1;
4644 dev->offload_to_mirror = offload_to_mirror;
4645 /* Avoid direct use of dev->offload_to_mirror within this
4646 * function since multiple threads might simultaneously
4647 * increment it beyond the range of dev->layout_map_count -1.
4648 */
4649 break;
4650 case HPSA_RAID_5:
4651 case HPSA_RAID_6:
4652 if (le16_to_cpu(map->layout_map_count) <= 1)
4653 break;
4654
4655 /* Verify first and last block are in same RAID group */
4656 r5or6_blocks_per_row =
4657 le16_to_cpu(map->strip_size) *
4658 le16_to_cpu(map->data_disks_per_row);
4659 BUG_ON(r5or6_blocks_per_row == 0);
4660 stripesize = r5or6_blocks_per_row *
4661 le16_to_cpu(map->layout_map_count);
4662 #if BITS_PER_LONG == 32
4663 tmpdiv = first_block;
4664 first_group = do_div(tmpdiv, stripesize);
4665 tmpdiv = first_group;
4666 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4667 first_group = tmpdiv;
4668 tmpdiv = last_block;
4669 last_group = do_div(tmpdiv, stripesize);
4670 tmpdiv = last_group;
4671 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4672 last_group = tmpdiv;
4673 #else
4674 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4675 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4676 #endif
4677 if (first_group != last_group)
4678 return IO_ACCEL_INELIGIBLE;
4679
4680 /* Verify request is in a single row of RAID 5/6 */
4681 #if BITS_PER_LONG == 32
4682 tmpdiv = first_block;
4683 (void) do_div(tmpdiv, stripesize);
4684 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4685 tmpdiv = last_block;
4686 (void) do_div(tmpdiv, stripesize);
4687 r5or6_last_row = r0_last_row = tmpdiv;
4688 #else
4689 first_row = r5or6_first_row = r0_first_row =
4690 first_block / stripesize;
4691 r5or6_last_row = r0_last_row = last_block / stripesize;
4692 #endif
4693 if (r5or6_first_row != r5or6_last_row)
4694 return IO_ACCEL_INELIGIBLE;
4695
4696
4697 /* Verify request is in a single column */
4698 #if BITS_PER_LONG == 32
4699 tmpdiv = first_block;
4700 first_row_offset = do_div(tmpdiv, stripesize);
4701 tmpdiv = first_row_offset;
4702 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4703 r5or6_first_row_offset = first_row_offset;
4704 tmpdiv = last_block;
4705 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4706 tmpdiv = r5or6_last_row_offset;
4707 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4708 tmpdiv = r5or6_first_row_offset;
4709 (void) do_div(tmpdiv, map->strip_size);
4710 first_column = r5or6_first_column = tmpdiv;
4711 tmpdiv = r5or6_last_row_offset;
4712 (void) do_div(tmpdiv, map->strip_size);
4713 r5or6_last_column = tmpdiv;
4714 #else
4715 first_row_offset = r5or6_first_row_offset =
4716 (u32)((first_block % stripesize) %
4717 r5or6_blocks_per_row);
4718
4719 r5or6_last_row_offset =
4720 (u32)((last_block % stripesize) %
4721 r5or6_blocks_per_row);
4722
4723 first_column = r5or6_first_column =
4724 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4725 r5or6_last_column =
4726 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4727 #endif
4728 if (r5or6_first_column != r5or6_last_column)
4729 return IO_ACCEL_INELIGIBLE;
4730
4731 /* Request is eligible */
4732 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4733 le16_to_cpu(map->row_cnt);
4734
4735 map_index = (first_group *
4736 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4737 (map_row * total_disks_per_row) + first_column;
4738 break;
4739 default:
4740 return IO_ACCEL_INELIGIBLE;
4741 }
4742
4743 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4744 return IO_ACCEL_INELIGIBLE;
4745
4746 c->phys_disk = dev->phys_disk[map_index];
4747
4748 disk_handle = dd[map_index].ioaccel_handle;
4749 disk_block = le64_to_cpu(map->disk_starting_blk) +
4750 first_row * le16_to_cpu(map->strip_size) +
4751 (first_row_offset - first_column *
4752 le16_to_cpu(map->strip_size));
4753 disk_block_cnt = block_cnt;
4754
4755 /* handle differing logical/physical block sizes */
4756 if (map->phys_blk_shift) {
4757 disk_block <<= map->phys_blk_shift;
4758 disk_block_cnt <<= map->phys_blk_shift;
4759 }
4760 BUG_ON(disk_block_cnt > 0xffff);
4761
4762 /* build the new CDB for the physical disk I/O */
4763 if (disk_block > 0xffffffff) {
4764 cdb[0] = is_write ? WRITE_16 : READ_16;
4765 cdb[1] = 0;
4766 cdb[2] = (u8) (disk_block >> 56);
4767 cdb[3] = (u8) (disk_block >> 48);
4768 cdb[4] = (u8) (disk_block >> 40);
4769 cdb[5] = (u8) (disk_block >> 32);
4770 cdb[6] = (u8) (disk_block >> 24);
4771 cdb[7] = (u8) (disk_block >> 16);
4772 cdb[8] = (u8) (disk_block >> 8);
4773 cdb[9] = (u8) (disk_block);
4774 cdb[10] = (u8) (disk_block_cnt >> 24);
4775 cdb[11] = (u8) (disk_block_cnt >> 16);
4776 cdb[12] = (u8) (disk_block_cnt >> 8);
4777 cdb[13] = (u8) (disk_block_cnt);
4778 cdb[14] = 0;
4779 cdb[15] = 0;
4780 cdb_len = 16;
4781 } else {
4782 cdb[0] = is_write ? WRITE_10 : READ_10;
4783 cdb[1] = 0;
4784 cdb[2] = (u8) (disk_block >> 24);
4785 cdb[3] = (u8) (disk_block >> 16);
4786 cdb[4] = (u8) (disk_block >> 8);
4787 cdb[5] = (u8) (disk_block);
4788 cdb[6] = 0;
4789 cdb[7] = (u8) (disk_block_cnt >> 8);
4790 cdb[8] = (u8) (disk_block_cnt);
4791 cdb[9] = 0;
4792 cdb_len = 10;
4793 }
4794 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4795 dev->scsi3addr,
4796 dev->phys_disk[map_index]);
4797 }
4798
4799 /*
4800 * Submit commands down the "normal" RAID stack path
4801 * All callers to hpsa_ciss_submit must check lockup_detected
4802 * beforehand, before (opt.) and after calling cmd_alloc
4803 */
4804 static int hpsa_ciss_submit(struct ctlr_info *h,
4805 struct CommandList *c, struct scsi_cmnd *cmd,
4806 unsigned char scsi3addr[])
4807 {
4808 cmd->host_scribble = (unsigned char *) c;
4809 c->cmd_type = CMD_SCSI;
4810 c->scsi_cmd = cmd;
4811 c->Header.ReplyQueue = 0; /* unused in simple mode */
4812 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4813 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4814
4815 /* Fill in the request block... */
4816
4817 c->Request.Timeout = 0;
4818 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4819 c->Request.CDBLen = cmd->cmd_len;
4820 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4821 switch (cmd->sc_data_direction) {
4822 case DMA_TO_DEVICE:
4823 c->Request.type_attr_dir =
4824 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4825 break;
4826 case DMA_FROM_DEVICE:
4827 c->Request.type_attr_dir =
4828 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4829 break;
4830 case DMA_NONE:
4831 c->Request.type_attr_dir =
4832 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4833 break;
4834 case DMA_BIDIRECTIONAL:
4835 /* This can happen if a buggy application does a scsi passthru
4836 * and sets both inlen and outlen to non-zero. ( see
4837 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4838 */
4839
4840 c->Request.type_attr_dir =
4841 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4842 /* This is technically wrong, and hpsa controllers should
4843 * reject it with CMD_INVALID, which is the most correct
4844 * response, but non-fibre backends appear to let it
4845 * slide by, and give the same results as if this field
4846 * were set correctly. Either way is acceptable for
4847 * our purposes here.
4848 */
4849
4850 break;
4851
4852 default:
4853 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4854 cmd->sc_data_direction);
4855 BUG();
4856 break;
4857 }
4858
4859 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4860 hpsa_cmd_resolve_and_free(h, c);
4861 return SCSI_MLQUEUE_HOST_BUSY;
4862 }
4863 enqueue_cmd_and_start_io(h, c);
4864 /* the cmd'll come back via intr handler in complete_scsi_command() */
4865 return 0;
4866 }
4867
4868 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4869 struct CommandList *c)
4870 {
4871 dma_addr_t cmd_dma_handle, err_dma_handle;
4872
4873 /* Zero out all of commandlist except the last field, refcount */
4874 memset(c, 0, offsetof(struct CommandList, refcount));
4875 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4876 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4877 c->err_info = h->errinfo_pool + index;
4878 memset(c->err_info, 0, sizeof(*c->err_info));
4879 err_dma_handle = h->errinfo_pool_dhandle
4880 + index * sizeof(*c->err_info);
4881 c->cmdindex = index;
4882 c->busaddr = (u32) cmd_dma_handle;
4883 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4884 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4885 c->h = h;
4886 c->scsi_cmd = SCSI_CMD_IDLE;
4887 }
4888
4889 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4890 {
4891 int i;
4892
4893 for (i = 0; i < h->nr_cmds; i++) {
4894 struct CommandList *c = h->cmd_pool + i;
4895
4896 hpsa_cmd_init(h, i, c);
4897 atomic_set(&c->refcount, 0);
4898 }
4899 }
4900
4901 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4902 struct CommandList *c)
4903 {
4904 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4905
4906 BUG_ON(c->cmdindex != index);
4907
4908 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4909 memset(c->err_info, 0, sizeof(*c->err_info));
4910 c->busaddr = (u32) cmd_dma_handle;
4911 }
4912
4913 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4914 struct CommandList *c, struct scsi_cmnd *cmd,
4915 unsigned char *scsi3addr)
4916 {
4917 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4918 int rc = IO_ACCEL_INELIGIBLE;
4919
4920 cmd->host_scribble = (unsigned char *) c;
4921
4922 if (dev->offload_enabled) {
4923 hpsa_cmd_init(h, c->cmdindex, c);
4924 c->cmd_type = CMD_SCSI;
4925 c->scsi_cmd = cmd;
4926 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4927 if (rc < 0) /* scsi_dma_map failed. */
4928 rc = SCSI_MLQUEUE_HOST_BUSY;
4929 } else if (dev->hba_ioaccel_enabled) {
4930 hpsa_cmd_init(h, c->cmdindex, c);
4931 c->cmd_type = CMD_SCSI;
4932 c->scsi_cmd = cmd;
4933 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4934 if (rc < 0) /* scsi_dma_map failed. */
4935 rc = SCSI_MLQUEUE_HOST_BUSY;
4936 }
4937 return rc;
4938 }
4939
4940 static void hpsa_command_resubmit_worker(struct work_struct *work)
4941 {
4942 struct scsi_cmnd *cmd;
4943 struct hpsa_scsi_dev_t *dev;
4944 struct CommandList *c = container_of(work, struct CommandList, work);
4945
4946 cmd = c->scsi_cmd;
4947 dev = cmd->device->hostdata;
4948 if (!dev) {
4949 cmd->result = DID_NO_CONNECT << 16;
4950 return hpsa_cmd_free_and_done(c->h, c, cmd);
4951 }
4952 if (c->reset_pending)
4953 return hpsa_cmd_resolve_and_free(c->h, c);
4954 if (c->abort_pending)
4955 return hpsa_cmd_abort_and_free(c->h, c, cmd);
4956 if (c->cmd_type == CMD_IOACCEL2) {
4957 struct ctlr_info *h = c->h;
4958 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4959 int rc;
4960
4961 if (c2->error_data.serv_response ==
4962 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4963 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4964 if (rc == 0)
4965 return;
4966 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4967 /*
4968 * If we get here, it means dma mapping failed.
4969 * Try again via scsi mid layer, which will
4970 * then get SCSI_MLQUEUE_HOST_BUSY.
4971 */
4972 cmd->result = DID_IMM_RETRY << 16;
4973 return hpsa_cmd_free_and_done(h, c, cmd);
4974 }
4975 /* else, fall thru and resubmit down CISS path */
4976 }
4977 }
4978 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4979 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4980 /*
4981 * If we get here, it means dma mapping failed. Try
4982 * again via scsi mid layer, which will then get
4983 * SCSI_MLQUEUE_HOST_BUSY.
4984 *
4985 * hpsa_ciss_submit will have already freed c
4986 * if it encountered a dma mapping failure.
4987 */
4988 cmd->result = DID_IMM_RETRY << 16;
4989 cmd->scsi_done(cmd);
4990 }
4991 }
4992
4993 /* Running in struct Scsi_Host->host_lock less mode */
4994 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4995 {
4996 struct ctlr_info *h;
4997 struct hpsa_scsi_dev_t *dev;
4998 unsigned char scsi3addr[8];
4999 struct CommandList *c;
5000 int rc = 0;
5001
5002 /* Get the ptr to our adapter structure out of cmd->host. */
5003 h = sdev_to_hba(cmd->device);
5004
5005 BUG_ON(cmd->request->tag < 0);
5006
5007 dev = cmd->device->hostdata;
5008 if (!dev) {
5009 cmd->result = DID_NO_CONNECT << 16;
5010 cmd->scsi_done(cmd);
5011 return 0;
5012 }
5013
5014 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5015
5016 if (unlikely(lockup_detected(h))) {
5017 cmd->result = DID_NO_CONNECT << 16;
5018 cmd->scsi_done(cmd);
5019 return 0;
5020 }
5021 c = cmd_tagged_alloc(h, cmd);
5022
5023 /*
5024 * Call alternate submit routine for I/O accelerated commands.
5025 * Retries always go down the normal I/O path.
5026 */
5027 if (likely(cmd->retries == 0 &&
5028 cmd->request->cmd_type == REQ_TYPE_FS &&
5029 h->acciopath_status)) {
5030 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5031 if (rc == 0)
5032 return 0;
5033 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5034 hpsa_cmd_resolve_and_free(h, c);
5035 return SCSI_MLQUEUE_HOST_BUSY;
5036 }
5037 }
5038 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5039 }
5040
5041 static void hpsa_scan_complete(struct ctlr_info *h)
5042 {
5043 unsigned long flags;
5044
5045 spin_lock_irqsave(&h->scan_lock, flags);
5046 h->scan_finished = 1;
5047 wake_up_all(&h->scan_wait_queue);
5048 spin_unlock_irqrestore(&h->scan_lock, flags);
5049 }
5050
5051 static void hpsa_scan_start(struct Scsi_Host *sh)
5052 {
5053 struct ctlr_info *h = shost_to_hba(sh);
5054 unsigned long flags;
5055
5056 /*
5057 * Don't let rescans be initiated on a controller known to be locked
5058 * up. If the controller locks up *during* a rescan, that thread is
5059 * probably hosed, but at least we can prevent new rescan threads from
5060 * piling up on a locked up controller.
5061 */
5062 if (unlikely(lockup_detected(h)))
5063 return hpsa_scan_complete(h);
5064
5065 /* wait until any scan already in progress is finished. */
5066 while (1) {
5067 spin_lock_irqsave(&h->scan_lock, flags);
5068 if (h->scan_finished)
5069 break;
5070 spin_unlock_irqrestore(&h->scan_lock, flags);
5071 wait_event(h->scan_wait_queue, h->scan_finished);
5072 /* Note: We don't need to worry about a race between this
5073 * thread and driver unload because the midlayer will
5074 * have incremented the reference count, so unload won't
5075 * happen if we're in here.
5076 */
5077 }
5078 h->scan_finished = 0; /* mark scan as in progress */
5079 spin_unlock_irqrestore(&h->scan_lock, flags);
5080
5081 if (unlikely(lockup_detected(h)))
5082 return hpsa_scan_complete(h);
5083
5084 hpsa_update_scsi_devices(h);
5085
5086 hpsa_scan_complete(h);
5087 }
5088
5089 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5090 {
5091 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5092
5093 if (!logical_drive)
5094 return -ENODEV;
5095
5096 if (qdepth < 1)
5097 qdepth = 1;
5098 else if (qdepth > logical_drive->queue_depth)
5099 qdepth = logical_drive->queue_depth;
5100
5101 return scsi_change_queue_depth(sdev, qdepth);
5102 }
5103
5104 static int hpsa_scan_finished(struct Scsi_Host *sh,
5105 unsigned long elapsed_time)
5106 {
5107 struct ctlr_info *h = shost_to_hba(sh);
5108 unsigned long flags;
5109 int finished;
5110
5111 spin_lock_irqsave(&h->scan_lock, flags);
5112 finished = h->scan_finished;
5113 spin_unlock_irqrestore(&h->scan_lock, flags);
5114 return finished;
5115 }
5116
5117 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5118 {
5119 struct Scsi_Host *sh;
5120 int error;
5121
5122 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5123 if (sh == NULL) {
5124 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5125 return -ENOMEM;
5126 }
5127
5128 sh->io_port = 0;
5129 sh->n_io_port = 0;
5130 sh->this_id = -1;
5131 sh->max_channel = 3;
5132 sh->max_cmd_len = MAX_COMMAND_SIZE;
5133 sh->max_lun = HPSA_MAX_LUN;
5134 sh->max_id = HPSA_MAX_LUN;
5135 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5136 sh->cmd_per_lun = sh->can_queue;
5137 sh->sg_tablesize = h->maxsgentries;
5138 sh->hostdata[0] = (unsigned long) h;
5139 sh->irq = h->intr[h->intr_mode];
5140 sh->unique_id = sh->irq;
5141 error = scsi_init_shared_tag_map(sh, sh->can_queue);
5142 if (error) {
5143 dev_err(&h->pdev->dev,
5144 "%s: scsi_init_shared_tag_map failed for controller %d\n",
5145 __func__, h->ctlr);
5146 scsi_host_put(sh);
5147 return error;
5148 }
5149 h->scsi_host = sh;
5150 return 0;
5151 }
5152
5153 static int hpsa_scsi_add_host(struct ctlr_info *h)
5154 {
5155 int rv;
5156
5157 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5158 if (rv) {
5159 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5160 return rv;
5161 }
5162 scsi_scan_host(h->scsi_host);
5163 return 0;
5164 }
5165
5166 /*
5167 * The block layer has already gone to the trouble of picking out a unique,
5168 * small-integer tag for this request. We use an offset from that value as
5169 * an index to select our command block. (The offset allows us to reserve the
5170 * low-numbered entries for our own uses.)
5171 */
5172 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5173 {
5174 int idx = scmd->request->tag;
5175
5176 if (idx < 0)
5177 return idx;
5178
5179 /* Offset to leave space for internal cmds. */
5180 return idx += HPSA_NRESERVED_CMDS;
5181 }
5182
5183 /*
5184 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5185 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5186 */
5187 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5188 struct CommandList *c, unsigned char lunaddr[],
5189 int reply_queue)
5190 {
5191 int rc;
5192
5193 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5194 (void) fill_cmd(c, TEST_UNIT_READY, h,
5195 NULL, 0, 0, lunaddr, TYPE_CMD);
5196 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5197 if (rc)
5198 return rc;
5199 /* no unmap needed here because no data xfer. */
5200
5201 /* Check if the unit is already ready. */
5202 if (c->err_info->CommandStatus == CMD_SUCCESS)
5203 return 0;
5204
5205 /*
5206 * The first command sent after reset will receive "unit attention" to
5207 * indicate that the LUN has been reset...this is actually what we're
5208 * looking for (but, success is good too).
5209 */
5210 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5211 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5212 (c->err_info->SenseInfo[2] == NO_SENSE ||
5213 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5214 return 0;
5215
5216 return 1;
5217 }
5218
5219 /*
5220 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5221 * returns zero when the unit is ready, and non-zero when giving up.
5222 */
5223 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5224 struct CommandList *c,
5225 unsigned char lunaddr[], int reply_queue)
5226 {
5227 int rc;
5228 int count = 0;
5229 int waittime = 1; /* seconds */
5230
5231 /* Send test unit ready until device ready, or give up. */
5232 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5233
5234 /*
5235 * Wait for a bit. do this first, because if we send
5236 * the TUR right away, the reset will just abort it.
5237 */
5238 msleep(1000 * waittime);
5239
5240 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5241 if (!rc)
5242 break;
5243
5244 /* Increase wait time with each try, up to a point. */
5245 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5246 waittime *= 2;
5247
5248 dev_warn(&h->pdev->dev,
5249 "waiting %d secs for device to become ready.\n",
5250 waittime);
5251 }
5252
5253 return rc;
5254 }
5255
5256 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5257 unsigned char lunaddr[],
5258 int reply_queue)
5259 {
5260 int first_queue;
5261 int last_queue;
5262 int rq;
5263 int rc = 0;
5264 struct CommandList *c;
5265
5266 c = cmd_alloc(h);
5267
5268 /*
5269 * If no specific reply queue was requested, then send the TUR
5270 * repeatedly, requesting a reply on each reply queue; otherwise execute
5271 * the loop exactly once using only the specified queue.
5272 */
5273 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5274 first_queue = 0;
5275 last_queue = h->nreply_queues - 1;
5276 } else {
5277 first_queue = reply_queue;
5278 last_queue = reply_queue;
5279 }
5280
5281 for (rq = first_queue; rq <= last_queue; rq++) {
5282 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5283 if (rc)
5284 break;
5285 }
5286
5287 if (rc)
5288 dev_warn(&h->pdev->dev, "giving up on device.\n");
5289 else
5290 dev_warn(&h->pdev->dev, "device is ready.\n");
5291
5292 cmd_free(h, c);
5293 return rc;
5294 }
5295
5296 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5297 * complaining. Doing a host- or bus-reset can't do anything good here.
5298 */
5299 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5300 {
5301 int rc;
5302 struct ctlr_info *h;
5303 struct hpsa_scsi_dev_t *dev;
5304 u8 reset_type;
5305 char msg[48];
5306
5307 /* find the controller to which the command to be aborted was sent */
5308 h = sdev_to_hba(scsicmd->device);
5309 if (h == NULL) /* paranoia */
5310 return FAILED;
5311
5312 if (lockup_detected(h))
5313 return FAILED;
5314
5315 dev = scsicmd->device->hostdata;
5316 if (!dev) {
5317 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5318 return FAILED;
5319 }
5320
5321 /* if controller locked up, we can guarantee command won't complete */
5322 if (lockup_detected(h)) {
5323 snprintf(msg, sizeof(msg),
5324 "cmd %d RESET FAILED, lockup detected",
5325 hpsa_get_cmd_index(scsicmd));
5326 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5327 return FAILED;
5328 }
5329
5330 /* this reset request might be the result of a lockup; check */
5331 if (detect_controller_lockup(h)) {
5332 snprintf(msg, sizeof(msg),
5333 "cmd %d RESET FAILED, new lockup detected",
5334 hpsa_get_cmd_index(scsicmd));
5335 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5336 return FAILED;
5337 }
5338
5339 /* Do not attempt on controller */
5340 if (is_hba_lunid(dev->scsi3addr))
5341 return SUCCESS;
5342
5343 if (is_logical_dev_addr_mode(dev->scsi3addr))
5344 reset_type = HPSA_DEVICE_RESET_MSG;
5345 else
5346 reset_type = HPSA_PHYS_TARGET_RESET;
5347
5348 sprintf(msg, "resetting %s",
5349 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5350 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5351
5352 h->reset_in_progress = 1;
5353
5354 /* send a reset to the SCSI LUN which the command was sent to */
5355 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5356 DEFAULT_REPLY_QUEUE);
5357 sprintf(msg, "reset %s %s",
5358 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5359 rc == 0 ? "completed successfully" : "failed");
5360 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5361 h->reset_in_progress = 0;
5362 return rc == 0 ? SUCCESS : FAILED;
5363 }
5364
5365 static void swizzle_abort_tag(u8 *tag)
5366 {
5367 u8 original_tag[8];
5368
5369 memcpy(original_tag, tag, 8);
5370 tag[0] = original_tag[3];
5371 tag[1] = original_tag[2];
5372 tag[2] = original_tag[1];
5373 tag[3] = original_tag[0];
5374 tag[4] = original_tag[7];
5375 tag[5] = original_tag[6];
5376 tag[6] = original_tag[5];
5377 tag[7] = original_tag[4];
5378 }
5379
5380 static void hpsa_get_tag(struct ctlr_info *h,
5381 struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5382 {
5383 u64 tag;
5384 if (c->cmd_type == CMD_IOACCEL1) {
5385 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5386 &h->ioaccel_cmd_pool[c->cmdindex];
5387 tag = le64_to_cpu(cm1->tag);
5388 *tagupper = cpu_to_le32(tag >> 32);
5389 *taglower = cpu_to_le32(tag);
5390 return;
5391 }
5392 if (c->cmd_type == CMD_IOACCEL2) {
5393 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5394 &h->ioaccel2_cmd_pool[c->cmdindex];
5395 /* upper tag not used in ioaccel2 mode */
5396 memset(tagupper, 0, sizeof(*tagupper));
5397 *taglower = cm2->Tag;
5398 return;
5399 }
5400 tag = le64_to_cpu(c->Header.tag);
5401 *tagupper = cpu_to_le32(tag >> 32);
5402 *taglower = cpu_to_le32(tag);
5403 }
5404
5405 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5406 struct CommandList *abort, int reply_queue)
5407 {
5408 int rc = IO_OK;
5409 struct CommandList *c;
5410 struct ErrorInfo *ei;
5411 __le32 tagupper, taglower;
5412
5413 c = cmd_alloc(h);
5414
5415 /* fill_cmd can't fail here, no buffer to map */
5416 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5417 0, 0, scsi3addr, TYPE_MSG);
5418 if (h->needs_abort_tags_swizzled)
5419 swizzle_abort_tag(&c->Request.CDB[4]);
5420 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5421 hpsa_get_tag(h, abort, &taglower, &tagupper);
5422 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5423 __func__, tagupper, taglower);
5424 /* no unmap needed here because no data xfer. */
5425
5426 ei = c->err_info;
5427 switch (ei->CommandStatus) {
5428 case CMD_SUCCESS:
5429 break;
5430 case CMD_TMF_STATUS:
5431 rc = hpsa_evaluate_tmf_status(h, c);
5432 break;
5433 case CMD_UNABORTABLE: /* Very common, don't make noise. */
5434 rc = -1;
5435 break;
5436 default:
5437 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5438 __func__, tagupper, taglower);
5439 hpsa_scsi_interpret_error(h, c);
5440 rc = -1;
5441 break;
5442 }
5443 cmd_free(h, c);
5444 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5445 __func__, tagupper, taglower);
5446 return rc;
5447 }
5448
5449 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5450 struct CommandList *command_to_abort, int reply_queue)
5451 {
5452 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5453 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5454 struct io_accel2_cmd *c2a =
5455 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5456 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5457 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5458
5459 /*
5460 * We're overlaying struct hpsa_tmf_struct on top of something which
5461 * was allocated as a struct io_accel2_cmd, so we better be sure it
5462 * actually fits, and doesn't overrun the error info space.
5463 */
5464 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5465 sizeof(struct io_accel2_cmd));
5466 BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5467 offsetof(struct hpsa_tmf_struct, error_len) +
5468 sizeof(ac->error_len));
5469
5470 c->cmd_type = IOACCEL2_TMF;
5471 c->scsi_cmd = SCSI_CMD_BUSY;
5472
5473 /* Adjust the DMA address to point to the accelerated command buffer */
5474 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5475 (c->cmdindex * sizeof(struct io_accel2_cmd));
5476 BUG_ON(c->busaddr & 0x0000007F);
5477
5478 memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5479 ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5480 ac->reply_queue = reply_queue;
5481 ac->tmf = IOACCEL2_TMF_ABORT;
5482 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5483 memset(ac->lun_id, 0, sizeof(ac->lun_id));
5484 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5485 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5486 ac->error_ptr = cpu_to_le64(c->busaddr +
5487 offsetof(struct io_accel2_cmd, error_data));
5488 ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5489 }
5490
5491 /* ioaccel2 path firmware cannot handle abort task requests.
5492 * Change abort requests to physical target reset, and send to the
5493 * address of the physical disk used for the ioaccel 2 command.
5494 * Return 0 on success (IO_OK)
5495 * -1 on failure
5496 */
5497
5498 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5499 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5500 {
5501 int rc = IO_OK;
5502 struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5503 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5504 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5505 unsigned char *psa = &phys_scsi3addr[0];
5506
5507 /* Get a pointer to the hpsa logical device. */
5508 scmd = abort->scsi_cmd;
5509 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5510 if (dev == NULL) {
5511 dev_warn(&h->pdev->dev,
5512 "Cannot abort: no device pointer for command.\n");
5513 return -1; /* not abortable */
5514 }
5515
5516 if (h->raid_offload_debug > 0)
5517 dev_info(&h->pdev->dev,
5518 "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5519 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
5520 "Reset as abort",
5521 scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
5522 scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
5523
5524 if (!dev->offload_enabled) {
5525 dev_warn(&h->pdev->dev,
5526 "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
5527 return -1; /* not abortable */
5528 }
5529
5530 /* Incoming scsi3addr is logical addr. We need physical disk addr. */
5531 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
5532 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
5533 return -1; /* not abortable */
5534 }
5535
5536 /* send the reset */
5537 if (h->raid_offload_debug > 0)
5538 dev_info(&h->pdev->dev,
5539 "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5540 psa[0], psa[1], psa[2], psa[3],
5541 psa[4], psa[5], psa[6], psa[7]);
5542 rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
5543 if (rc != 0) {
5544 dev_warn(&h->pdev->dev,
5545 "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5546 psa[0], psa[1], psa[2], psa[3],
5547 psa[4], psa[5], psa[6], psa[7]);
5548 return rc; /* failed to reset */
5549 }
5550
5551 /* wait for device to recover */
5552 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
5553 dev_warn(&h->pdev->dev,
5554 "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5555 psa[0], psa[1], psa[2], psa[3],
5556 psa[4], psa[5], psa[6], psa[7]);
5557 return -1; /* failed to recover */
5558 }
5559
5560 /* device recovered */
5561 dev_info(&h->pdev->dev,
5562 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5563 psa[0], psa[1], psa[2], psa[3],
5564 psa[4], psa[5], psa[6], psa[7]);
5565
5566 return rc; /* success */
5567 }
5568
5569 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
5570 struct CommandList *abort, int reply_queue)
5571 {
5572 int rc = IO_OK;
5573 struct CommandList *c;
5574 __le32 taglower, tagupper;
5575 struct hpsa_scsi_dev_t *dev;
5576 struct io_accel2_cmd *c2;
5577
5578 dev = abort->scsi_cmd->device->hostdata;
5579 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
5580 return -1;
5581
5582 c = cmd_alloc(h);
5583 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
5584 c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5585 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5586 hpsa_get_tag(h, abort, &taglower, &tagupper);
5587 dev_dbg(&h->pdev->dev,
5588 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
5589 __func__, tagupper, taglower);
5590 /* no unmap needed here because no data xfer. */
5591
5592 dev_dbg(&h->pdev->dev,
5593 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
5594 __func__, tagupper, taglower, c2->error_data.serv_response);
5595 switch (c2->error_data.serv_response) {
5596 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
5597 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
5598 rc = 0;
5599 break;
5600 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
5601 case IOACCEL2_SERV_RESPONSE_FAILURE:
5602 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
5603 rc = -1;
5604 break;
5605 default:
5606 dev_warn(&h->pdev->dev,
5607 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
5608 __func__, tagupper, taglower,
5609 c2->error_data.serv_response);
5610 rc = -1;
5611 }
5612 cmd_free(h, c);
5613 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
5614 tagupper, taglower);
5615 return rc;
5616 }
5617
5618 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
5619 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5620 {
5621 /*
5622 * ioccelerator mode 2 commands should be aborted via the
5623 * accelerated path, since RAID path is unaware of these commands,
5624 * but not all underlying firmware can handle abort TMF.
5625 * Change abort to physical device reset when abort TMF is unsupported.
5626 */
5627 if (abort->cmd_type == CMD_IOACCEL2) {
5628 if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)
5629 return hpsa_send_abort_ioaccel2(h, abort,
5630 reply_queue);
5631 else
5632 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
5633 abort, reply_queue);
5634 }
5635 return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
5636 }
5637
5638 /* Find out which reply queue a command was meant to return on */
5639 static int hpsa_extract_reply_queue(struct ctlr_info *h,
5640 struct CommandList *c)
5641 {
5642 if (c->cmd_type == CMD_IOACCEL2)
5643 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
5644 return c->Header.ReplyQueue;
5645 }
5646
5647 /*
5648 * Limit concurrency of abort commands to prevent
5649 * over-subscription of commands
5650 */
5651 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
5652 {
5653 #define ABORT_CMD_WAIT_MSECS 5000
5654 return !wait_event_timeout(h->abort_cmd_wait_queue,
5655 atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
5656 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
5657 }
5658
5659 /* Send an abort for the specified command.
5660 * If the device and controller support it,
5661 * send a task abort request.
5662 */
5663 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
5664 {
5665
5666 int rc;
5667 struct ctlr_info *h;
5668 struct hpsa_scsi_dev_t *dev;
5669 struct CommandList *abort; /* pointer to command to be aborted */
5670 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
5671 char msg[256]; /* For debug messaging. */
5672 int ml = 0;
5673 __le32 tagupper, taglower;
5674 int refcount, reply_queue;
5675
5676 if (sc == NULL)
5677 return FAILED;
5678
5679 if (sc->device == NULL)
5680 return FAILED;
5681
5682 /* Find the controller of the command to be aborted */
5683 h = sdev_to_hba(sc->device);
5684 if (h == NULL)
5685 return FAILED;
5686
5687 /* Find the device of the command to be aborted */
5688 dev = sc->device->hostdata;
5689 if (!dev) {
5690 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
5691 msg);
5692 return FAILED;
5693 }
5694
5695 /* If controller locked up, we can guarantee command won't complete */
5696 if (lockup_detected(h)) {
5697 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5698 "ABORT FAILED, lockup detected");
5699 return FAILED;
5700 }
5701
5702 /* This is a good time to check if controller lockup has occurred */
5703 if (detect_controller_lockup(h)) {
5704 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5705 "ABORT FAILED, new lockup detected");
5706 return FAILED;
5707 }
5708
5709 /* Check that controller supports some kind of task abort */
5710 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5711 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5712 return FAILED;
5713
5714 memset(msg, 0, sizeof(msg));
5715 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
5716 h->scsi_host->host_no, sc->device->channel,
5717 sc->device->id, sc->device->lun,
5718 "Aborting command", sc);
5719
5720 /* Get SCSI command to be aborted */
5721 abort = (struct CommandList *) sc->host_scribble;
5722 if (abort == NULL) {
5723 /* This can happen if the command already completed. */
5724 return SUCCESS;
5725 }
5726 refcount = atomic_inc_return(&abort->refcount);
5727 if (refcount == 1) { /* Command is done already. */
5728 cmd_free(h, abort);
5729 return SUCCESS;
5730 }
5731
5732 /* Don't bother trying the abort if we know it won't work. */
5733 if (abort->cmd_type != CMD_IOACCEL2 &&
5734 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5735 cmd_free(h, abort);
5736 return FAILED;
5737 }
5738
5739 /*
5740 * Check that we're aborting the right command.
5741 * It's possible the CommandList already completed and got re-used.
5742 */
5743 if (abort->scsi_cmd != sc) {
5744 cmd_free(h, abort);
5745 return SUCCESS;
5746 }
5747
5748 abort->abort_pending = true;
5749 hpsa_get_tag(h, abort, &taglower, &tagupper);
5750 reply_queue = hpsa_extract_reply_queue(h, abort);
5751 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5752 as = abort->scsi_cmd;
5753 if (as != NULL)
5754 ml += sprintf(msg+ml,
5755 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
5756 as->cmd_len, as->cmnd[0], as->cmnd[1],
5757 as->serial_number);
5758 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
5759 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5760
5761 /*
5762 * Command is in flight, or possibly already completed
5763 * by the firmware (but not to the scsi mid layer) but we can't
5764 * distinguish which. Send the abort down.
5765 */
5766 if (wait_for_available_abort_cmd(h)) {
5767 dev_warn(&h->pdev->dev,
5768 "%s FAILED, timeout waiting for an abort command to become available.\n",
5769 msg);
5770 cmd_free(h, abort);
5771 return FAILED;
5772 }
5773 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5774 atomic_inc(&h->abort_cmds_available);
5775 wake_up_all(&h->abort_cmd_wait_queue);
5776 if (rc != 0) {
5777 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
5778 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5779 "FAILED to abort command");
5780 cmd_free(h, abort);
5781 return FAILED;
5782 }
5783 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
5784 wait_event(h->event_sync_wait_queue,
5785 abort->scsi_cmd != sc || lockup_detected(h));
5786 cmd_free(h, abort);
5787 return !lockup_detected(h) ? SUCCESS : FAILED;
5788 }
5789
5790 /*
5791 * For operations with an associated SCSI command, a command block is allocated
5792 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
5793 * block request tag as an index into a table of entries. cmd_tagged_free() is
5794 * the complement, although cmd_free() may be called instead.
5795 */
5796 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
5797 struct scsi_cmnd *scmd)
5798 {
5799 int idx = hpsa_get_cmd_index(scmd);
5800 struct CommandList *c = h->cmd_pool + idx;
5801
5802 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
5803 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
5804 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
5805 /* The index value comes from the block layer, so if it's out of
5806 * bounds, it's probably not our bug.
5807 */
5808 BUG();
5809 }
5810
5811 atomic_inc(&c->refcount);
5812 if (unlikely(!hpsa_is_cmd_idle(c))) {
5813 /*
5814 * We expect that the SCSI layer will hand us a unique tag
5815 * value. Thus, there should never be a collision here between
5816 * two requests...because if the selected command isn't idle
5817 * then someone is going to be very disappointed.
5818 */
5819 dev_err(&h->pdev->dev,
5820 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
5821 idx);
5822 if (c->scsi_cmd != NULL)
5823 scsi_print_command(c->scsi_cmd);
5824 scsi_print_command(scmd);
5825 }
5826
5827 hpsa_cmd_partial_init(h, idx, c);
5828 return c;
5829 }
5830
5831 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
5832 {
5833 /*
5834 * Release our reference to the block. We don't need to do anything
5835 * else to free it, because it is accessed by index. (There's no point
5836 * in checking the result of the decrement, since we cannot guarantee
5837 * that there isn't a concurrent abort which is also accessing it.)
5838 */
5839 (void)atomic_dec(&c->refcount);
5840 }
5841
5842 /*
5843 * For operations that cannot sleep, a command block is allocated at init,
5844 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5845 * which ones are free or in use. Lock must be held when calling this.
5846 * cmd_free() is the complement.
5847 * This function never gives up and returns NULL. If it hangs,
5848 * another thread must call cmd_free() to free some tags.
5849 */
5850
5851 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5852 {
5853 struct CommandList *c;
5854 int refcount, i;
5855 int offset = 0;
5856
5857 /*
5858 * There is some *extremely* small but non-zero chance that that
5859 * multiple threads could get in here, and one thread could
5860 * be scanning through the list of bits looking for a free
5861 * one, but the free ones are always behind him, and other
5862 * threads sneak in behind him and eat them before he can
5863 * get to them, so that while there is always a free one, a
5864 * very unlucky thread might be starved anyway, never able to
5865 * beat the other threads. In reality, this happens so
5866 * infrequently as to be indistinguishable from never.
5867 *
5868 * Note that we start allocating commands before the SCSI host structure
5869 * is initialized. Since the search starts at bit zero, this
5870 * all works, since we have at least one command structure available;
5871 * however, it means that the structures with the low indexes have to be
5872 * reserved for driver-initiated requests, while requests from the block
5873 * layer will use the higher indexes.
5874 */
5875
5876 for (;;) {
5877 i = find_next_zero_bit(h->cmd_pool_bits,
5878 HPSA_NRESERVED_CMDS,
5879 offset);
5880 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
5881 offset = 0;
5882 continue;
5883 }
5884 c = h->cmd_pool + i;
5885 refcount = atomic_inc_return(&c->refcount);
5886 if (unlikely(refcount > 1)) {
5887 cmd_free(h, c); /* already in use */
5888 offset = (i + 1) % HPSA_NRESERVED_CMDS;
5889 continue;
5890 }
5891 set_bit(i & (BITS_PER_LONG - 1),
5892 h->cmd_pool_bits + (i / BITS_PER_LONG));
5893 break; /* it's ours now. */
5894 }
5895 hpsa_cmd_partial_init(h, i, c);
5896 return c;
5897 }
5898
5899 /*
5900 * This is the complementary operation to cmd_alloc(). Note, however, in some
5901 * corner cases it may also be used to free blocks allocated by
5902 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
5903 * the clear-bit is harmless.
5904 */
5905 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5906 {
5907 if (atomic_dec_and_test(&c->refcount)) {
5908 int i;
5909
5910 i = c - h->cmd_pool;
5911 clear_bit(i & (BITS_PER_LONG - 1),
5912 h->cmd_pool_bits + (i / BITS_PER_LONG));
5913 }
5914 }
5915
5916 #ifdef CONFIG_COMPAT
5917
5918 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5919 void __user *arg)
5920 {
5921 IOCTL32_Command_struct __user *arg32 =
5922 (IOCTL32_Command_struct __user *) arg;
5923 IOCTL_Command_struct arg64;
5924 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5925 int err;
5926 u32 cp;
5927
5928 memset(&arg64, 0, sizeof(arg64));
5929 err = 0;
5930 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5931 sizeof(arg64.LUN_info));
5932 err |= copy_from_user(&arg64.Request, &arg32->Request,
5933 sizeof(arg64.Request));
5934 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5935 sizeof(arg64.error_info));
5936 err |= get_user(arg64.buf_size, &arg32->buf_size);
5937 err |= get_user(cp, &arg32->buf);
5938 arg64.buf = compat_ptr(cp);
5939 err |= copy_to_user(p, &arg64, sizeof(arg64));
5940
5941 if (err)
5942 return -EFAULT;
5943
5944 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5945 if (err)
5946 return err;
5947 err |= copy_in_user(&arg32->error_info, &p->error_info,
5948 sizeof(arg32->error_info));
5949 if (err)
5950 return -EFAULT;
5951 return err;
5952 }
5953
5954 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5955 int cmd, void __user *arg)
5956 {
5957 BIG_IOCTL32_Command_struct __user *arg32 =
5958 (BIG_IOCTL32_Command_struct __user *) arg;
5959 BIG_IOCTL_Command_struct arg64;
5960 BIG_IOCTL_Command_struct __user *p =
5961 compat_alloc_user_space(sizeof(arg64));
5962 int err;
5963 u32 cp;
5964
5965 memset(&arg64, 0, sizeof(arg64));
5966 err = 0;
5967 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5968 sizeof(arg64.LUN_info));
5969 err |= copy_from_user(&arg64.Request, &arg32->Request,
5970 sizeof(arg64.Request));
5971 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5972 sizeof(arg64.error_info));
5973 err |= get_user(arg64.buf_size, &arg32->buf_size);
5974 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5975 err |= get_user(cp, &arg32->buf);
5976 arg64.buf = compat_ptr(cp);
5977 err |= copy_to_user(p, &arg64, sizeof(arg64));
5978
5979 if (err)
5980 return -EFAULT;
5981
5982 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5983 if (err)
5984 return err;
5985 err |= copy_in_user(&arg32->error_info, &p->error_info,
5986 sizeof(arg32->error_info));
5987 if (err)
5988 return -EFAULT;
5989 return err;
5990 }
5991
5992 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5993 {
5994 switch (cmd) {
5995 case CCISS_GETPCIINFO:
5996 case CCISS_GETINTINFO:
5997 case CCISS_SETINTINFO:
5998 case CCISS_GETNODENAME:
5999 case CCISS_SETNODENAME:
6000 case CCISS_GETHEARTBEAT:
6001 case CCISS_GETBUSTYPES:
6002 case CCISS_GETFIRMVER:
6003 case CCISS_GETDRIVVER:
6004 case CCISS_REVALIDVOLS:
6005 case CCISS_DEREGDISK:
6006 case CCISS_REGNEWDISK:
6007 case CCISS_REGNEWD:
6008 case CCISS_RESCANDISK:
6009 case CCISS_GETLUNINFO:
6010 return hpsa_ioctl(dev, cmd, arg);
6011
6012 case CCISS_PASSTHRU32:
6013 return hpsa_ioctl32_passthru(dev, cmd, arg);
6014 case CCISS_BIG_PASSTHRU32:
6015 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6016
6017 default:
6018 return -ENOIOCTLCMD;
6019 }
6020 }
6021 #endif
6022
6023 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6024 {
6025 struct hpsa_pci_info pciinfo;
6026
6027 if (!argp)
6028 return -EINVAL;
6029 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6030 pciinfo.bus = h->pdev->bus->number;
6031 pciinfo.dev_fn = h->pdev->devfn;
6032 pciinfo.board_id = h->board_id;
6033 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6034 return -EFAULT;
6035 return 0;
6036 }
6037
6038 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6039 {
6040 DriverVer_type DriverVer;
6041 unsigned char vmaj, vmin, vsubmin;
6042 int rc;
6043
6044 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6045 &vmaj, &vmin, &vsubmin);
6046 if (rc != 3) {
6047 dev_info(&h->pdev->dev, "driver version string '%s' "
6048 "unrecognized.", HPSA_DRIVER_VERSION);
6049 vmaj = 0;
6050 vmin = 0;
6051 vsubmin = 0;
6052 }
6053 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6054 if (!argp)
6055 return -EINVAL;
6056 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6057 return -EFAULT;
6058 return 0;
6059 }
6060
6061 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6062 {
6063 IOCTL_Command_struct iocommand;
6064 struct CommandList *c;
6065 char *buff = NULL;
6066 u64 temp64;
6067 int rc = 0;
6068
6069 if (!argp)
6070 return -EINVAL;
6071 if (!capable(CAP_SYS_RAWIO))
6072 return -EPERM;
6073 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6074 return -EFAULT;
6075 if ((iocommand.buf_size < 1) &&
6076 (iocommand.Request.Type.Direction != XFER_NONE)) {
6077 return -EINVAL;
6078 }
6079 if (iocommand.buf_size > 0) {
6080 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6081 if (buff == NULL)
6082 return -ENOMEM;
6083 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6084 /* Copy the data into the buffer we created */
6085 if (copy_from_user(buff, iocommand.buf,
6086 iocommand.buf_size)) {
6087 rc = -EFAULT;
6088 goto out_kfree;
6089 }
6090 } else {
6091 memset(buff, 0, iocommand.buf_size);
6092 }
6093 }
6094 c = cmd_alloc(h);
6095
6096 /* Fill in the command type */
6097 c->cmd_type = CMD_IOCTL_PEND;
6098 c->scsi_cmd = SCSI_CMD_BUSY;
6099 /* Fill in Command Header */
6100 c->Header.ReplyQueue = 0; /* unused in simple mode */
6101 if (iocommand.buf_size > 0) { /* buffer to fill */
6102 c->Header.SGList = 1;
6103 c->Header.SGTotal = cpu_to_le16(1);
6104 } else { /* no buffers to fill */
6105 c->Header.SGList = 0;
6106 c->Header.SGTotal = cpu_to_le16(0);
6107 }
6108 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6109
6110 /* Fill in Request block */
6111 memcpy(&c->Request, &iocommand.Request,
6112 sizeof(c->Request));
6113
6114 /* Fill in the scatter gather information */
6115 if (iocommand.buf_size > 0) {
6116 temp64 = pci_map_single(h->pdev, buff,
6117 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6118 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6119 c->SG[0].Addr = cpu_to_le64(0);
6120 c->SG[0].Len = cpu_to_le32(0);
6121 rc = -ENOMEM;
6122 goto out;
6123 }
6124 c->SG[0].Addr = cpu_to_le64(temp64);
6125 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6126 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6127 }
6128 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6129 if (iocommand.buf_size > 0)
6130 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6131 check_ioctl_unit_attention(h, c);
6132 if (rc) {
6133 rc = -EIO;
6134 goto out;
6135 }
6136
6137 /* Copy the error information out */
6138 memcpy(&iocommand.error_info, c->err_info,
6139 sizeof(iocommand.error_info));
6140 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6141 rc = -EFAULT;
6142 goto out;
6143 }
6144 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6145 iocommand.buf_size > 0) {
6146 /* Copy the data out of the buffer we created */
6147 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6148 rc = -EFAULT;
6149 goto out;
6150 }
6151 }
6152 out:
6153 cmd_free(h, c);
6154 out_kfree:
6155 kfree(buff);
6156 return rc;
6157 }
6158
6159 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6160 {
6161 BIG_IOCTL_Command_struct *ioc;
6162 struct CommandList *c;
6163 unsigned char **buff = NULL;
6164 int *buff_size = NULL;
6165 u64 temp64;
6166 BYTE sg_used = 0;
6167 int status = 0;
6168 u32 left;
6169 u32 sz;
6170 BYTE __user *data_ptr;
6171
6172 if (!argp)
6173 return -EINVAL;
6174 if (!capable(CAP_SYS_RAWIO))
6175 return -EPERM;
6176 ioc = (BIG_IOCTL_Command_struct *)
6177 kmalloc(sizeof(*ioc), GFP_KERNEL);
6178 if (!ioc) {
6179 status = -ENOMEM;
6180 goto cleanup1;
6181 }
6182 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6183 status = -EFAULT;
6184 goto cleanup1;
6185 }
6186 if ((ioc->buf_size < 1) &&
6187 (ioc->Request.Type.Direction != XFER_NONE)) {
6188 status = -EINVAL;
6189 goto cleanup1;
6190 }
6191 /* Check kmalloc limits using all SGs */
6192 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6193 status = -EINVAL;
6194 goto cleanup1;
6195 }
6196 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6197 status = -EINVAL;
6198 goto cleanup1;
6199 }
6200 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6201 if (!buff) {
6202 status = -ENOMEM;
6203 goto cleanup1;
6204 }
6205 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6206 if (!buff_size) {
6207 status = -ENOMEM;
6208 goto cleanup1;
6209 }
6210 left = ioc->buf_size;
6211 data_ptr = ioc->buf;
6212 while (left) {
6213 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6214 buff_size[sg_used] = sz;
6215 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6216 if (buff[sg_used] == NULL) {
6217 status = -ENOMEM;
6218 goto cleanup1;
6219 }
6220 if (ioc->Request.Type.Direction & XFER_WRITE) {
6221 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6222 status = -EFAULT;
6223 goto cleanup1;
6224 }
6225 } else
6226 memset(buff[sg_used], 0, sz);
6227 left -= sz;
6228 data_ptr += sz;
6229 sg_used++;
6230 }
6231 c = cmd_alloc(h);
6232
6233 c->cmd_type = CMD_IOCTL_PEND;
6234 c->scsi_cmd = SCSI_CMD_BUSY;
6235 c->Header.ReplyQueue = 0;
6236 c->Header.SGList = (u8) sg_used;
6237 c->Header.SGTotal = cpu_to_le16(sg_used);
6238 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6239 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6240 if (ioc->buf_size > 0) {
6241 int i;
6242 for (i = 0; i < sg_used; i++) {
6243 temp64 = pci_map_single(h->pdev, buff[i],
6244 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6245 if (dma_mapping_error(&h->pdev->dev,
6246 (dma_addr_t) temp64)) {
6247 c->SG[i].Addr = cpu_to_le64(0);
6248 c->SG[i].Len = cpu_to_le32(0);
6249 hpsa_pci_unmap(h->pdev, c, i,
6250 PCI_DMA_BIDIRECTIONAL);
6251 status = -ENOMEM;
6252 goto cleanup0;
6253 }
6254 c->SG[i].Addr = cpu_to_le64(temp64);
6255 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6256 c->SG[i].Ext = cpu_to_le32(0);
6257 }
6258 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6259 }
6260 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6261 if (sg_used)
6262 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6263 check_ioctl_unit_attention(h, c);
6264 if (status) {
6265 status = -EIO;
6266 goto cleanup0;
6267 }
6268
6269 /* Copy the error information out */
6270 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6271 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6272 status = -EFAULT;
6273 goto cleanup0;
6274 }
6275 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6276 int i;
6277
6278 /* Copy the data out of the buffer we created */
6279 BYTE __user *ptr = ioc->buf;
6280 for (i = 0; i < sg_used; i++) {
6281 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6282 status = -EFAULT;
6283 goto cleanup0;
6284 }
6285 ptr += buff_size[i];
6286 }
6287 }
6288 status = 0;
6289 cleanup0:
6290 cmd_free(h, c);
6291 cleanup1:
6292 if (buff) {
6293 int i;
6294
6295 for (i = 0; i < sg_used; i++)
6296 kfree(buff[i]);
6297 kfree(buff);
6298 }
6299 kfree(buff_size);
6300 kfree(ioc);
6301 return status;
6302 }
6303
6304 static void check_ioctl_unit_attention(struct ctlr_info *h,
6305 struct CommandList *c)
6306 {
6307 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6308 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6309 (void) check_for_unit_attention(h, c);
6310 }
6311
6312 /*
6313 * ioctl
6314 */
6315 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6316 {
6317 struct ctlr_info *h;
6318 void __user *argp = (void __user *)arg;
6319 int rc;
6320
6321 h = sdev_to_hba(dev);
6322
6323 switch (cmd) {
6324 case CCISS_DEREGDISK:
6325 case CCISS_REGNEWDISK:
6326 case CCISS_REGNEWD:
6327 hpsa_scan_start(h->scsi_host);
6328 return 0;
6329 case CCISS_GETPCIINFO:
6330 return hpsa_getpciinfo_ioctl(h, argp);
6331 case CCISS_GETDRIVVER:
6332 return hpsa_getdrivver_ioctl(h, argp);
6333 case CCISS_PASSTHRU:
6334 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6335 return -EAGAIN;
6336 rc = hpsa_passthru_ioctl(h, argp);
6337 atomic_inc(&h->passthru_cmds_avail);
6338 return rc;
6339 case CCISS_BIG_PASSTHRU:
6340 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6341 return -EAGAIN;
6342 rc = hpsa_big_passthru_ioctl(h, argp);
6343 atomic_inc(&h->passthru_cmds_avail);
6344 return rc;
6345 default:
6346 return -ENOTTY;
6347 }
6348 }
6349
6350 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6351 u8 reset_type)
6352 {
6353 struct CommandList *c;
6354
6355 c = cmd_alloc(h);
6356
6357 /* fill_cmd can't fail here, no data buffer to map */
6358 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6359 RAID_CTLR_LUNID, TYPE_MSG);
6360 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6361 c->waiting = NULL;
6362 enqueue_cmd_and_start_io(h, c);
6363 /* Don't wait for completion, the reset won't complete. Don't free
6364 * the command either. This is the last command we will send before
6365 * re-initializing everything, so it doesn't matter and won't leak.
6366 */
6367 return;
6368 }
6369
6370 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6371 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6372 int cmd_type)
6373 {
6374 int pci_dir = XFER_NONE;
6375 u64 tag; /* for commands to be aborted */
6376
6377 c->cmd_type = CMD_IOCTL_PEND;
6378 c->scsi_cmd = SCSI_CMD_BUSY;
6379 c->Header.ReplyQueue = 0;
6380 if (buff != NULL && size > 0) {
6381 c->Header.SGList = 1;
6382 c->Header.SGTotal = cpu_to_le16(1);
6383 } else {
6384 c->Header.SGList = 0;
6385 c->Header.SGTotal = cpu_to_le16(0);
6386 }
6387 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6388
6389 if (cmd_type == TYPE_CMD) {
6390 switch (cmd) {
6391 case HPSA_INQUIRY:
6392 /* are we trying to read a vital product page */
6393 if (page_code & VPD_PAGE) {
6394 c->Request.CDB[1] = 0x01;
6395 c->Request.CDB[2] = (page_code & 0xff);
6396 }
6397 c->Request.CDBLen = 6;
6398 c->Request.type_attr_dir =
6399 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6400 c->Request.Timeout = 0;
6401 c->Request.CDB[0] = HPSA_INQUIRY;
6402 c->Request.CDB[4] = size & 0xFF;
6403 break;
6404 case HPSA_REPORT_LOG:
6405 case HPSA_REPORT_PHYS:
6406 /* Talking to controller so It's a physical command
6407 mode = 00 target = 0. Nothing to write.
6408 */
6409 c->Request.CDBLen = 12;
6410 c->Request.type_attr_dir =
6411 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6412 c->Request.Timeout = 0;
6413 c->Request.CDB[0] = cmd;
6414 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6415 c->Request.CDB[7] = (size >> 16) & 0xFF;
6416 c->Request.CDB[8] = (size >> 8) & 0xFF;
6417 c->Request.CDB[9] = size & 0xFF;
6418 break;
6419 case BMIC_SENSE_DIAG_OPTIONS:
6420 c->Request.CDBLen = 16;
6421 c->Request.type_attr_dir =
6422 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6423 c->Request.Timeout = 0;
6424 /* Spec says this should be BMIC_WRITE */
6425 c->Request.CDB[0] = BMIC_READ;
6426 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6427 break;
6428 case BMIC_SET_DIAG_OPTIONS:
6429 c->Request.CDBLen = 16;
6430 c->Request.type_attr_dir =
6431 TYPE_ATTR_DIR(cmd_type,
6432 ATTR_SIMPLE, XFER_WRITE);
6433 c->Request.Timeout = 0;
6434 c->Request.CDB[0] = BMIC_WRITE;
6435 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6436 break;
6437 case HPSA_CACHE_FLUSH:
6438 c->Request.CDBLen = 12;
6439 c->Request.type_attr_dir =
6440 TYPE_ATTR_DIR(cmd_type,
6441 ATTR_SIMPLE, XFER_WRITE);
6442 c->Request.Timeout = 0;
6443 c->Request.CDB[0] = BMIC_WRITE;
6444 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6445 c->Request.CDB[7] = (size >> 8) & 0xFF;
6446 c->Request.CDB[8] = size & 0xFF;
6447 break;
6448 case TEST_UNIT_READY:
6449 c->Request.CDBLen = 6;
6450 c->Request.type_attr_dir =
6451 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6452 c->Request.Timeout = 0;
6453 break;
6454 case HPSA_GET_RAID_MAP:
6455 c->Request.CDBLen = 12;
6456 c->Request.type_attr_dir =
6457 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6458 c->Request.Timeout = 0;
6459 c->Request.CDB[0] = HPSA_CISS_READ;
6460 c->Request.CDB[1] = cmd;
6461 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6462 c->Request.CDB[7] = (size >> 16) & 0xFF;
6463 c->Request.CDB[8] = (size >> 8) & 0xFF;
6464 c->Request.CDB[9] = size & 0xFF;
6465 break;
6466 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6467 c->Request.CDBLen = 10;
6468 c->Request.type_attr_dir =
6469 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6470 c->Request.Timeout = 0;
6471 c->Request.CDB[0] = BMIC_READ;
6472 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6473 c->Request.CDB[7] = (size >> 16) & 0xFF;
6474 c->Request.CDB[8] = (size >> 8) & 0xFF;
6475 break;
6476 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6477 c->Request.CDBLen = 10;
6478 c->Request.type_attr_dir =
6479 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6480 c->Request.Timeout = 0;
6481 c->Request.CDB[0] = BMIC_READ;
6482 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6483 c->Request.CDB[7] = (size >> 16) & 0xFF;
6484 c->Request.CDB[8] = (size >> 8) & 0XFF;
6485 break;
6486 case BMIC_IDENTIFY_CONTROLLER:
6487 c->Request.CDBLen = 10;
6488 c->Request.type_attr_dir =
6489 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6490 c->Request.Timeout = 0;
6491 c->Request.CDB[0] = BMIC_READ;
6492 c->Request.CDB[1] = 0;
6493 c->Request.CDB[2] = 0;
6494 c->Request.CDB[3] = 0;
6495 c->Request.CDB[4] = 0;
6496 c->Request.CDB[5] = 0;
6497 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6498 c->Request.CDB[7] = (size >> 16) & 0xFF;
6499 c->Request.CDB[8] = (size >> 8) & 0XFF;
6500 c->Request.CDB[9] = 0;
6501 break;
6502
6503 default:
6504 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6505 BUG();
6506 return -1;
6507 }
6508 } else if (cmd_type == TYPE_MSG) {
6509 switch (cmd) {
6510
6511 case HPSA_PHYS_TARGET_RESET:
6512 c->Request.CDBLen = 16;
6513 c->Request.type_attr_dir =
6514 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6515 c->Request.Timeout = 0; /* Don't time out */
6516 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6517 c->Request.CDB[0] = HPSA_RESET;
6518 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6519 /* Physical target reset needs no control bytes 4-7*/
6520 c->Request.CDB[4] = 0x00;
6521 c->Request.CDB[5] = 0x00;
6522 c->Request.CDB[6] = 0x00;
6523 c->Request.CDB[7] = 0x00;
6524 break;
6525 case HPSA_DEVICE_RESET_MSG:
6526 c->Request.CDBLen = 16;
6527 c->Request.type_attr_dir =
6528 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6529 c->Request.Timeout = 0; /* Don't time out */
6530 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6531 c->Request.CDB[0] = cmd;
6532 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6533 /* If bytes 4-7 are zero, it means reset the */
6534 /* LunID device */
6535 c->Request.CDB[4] = 0x00;
6536 c->Request.CDB[5] = 0x00;
6537 c->Request.CDB[6] = 0x00;
6538 c->Request.CDB[7] = 0x00;
6539 break;
6540 case HPSA_ABORT_MSG:
6541 memcpy(&tag, buff, sizeof(tag));
6542 dev_dbg(&h->pdev->dev,
6543 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
6544 tag, c->Header.tag);
6545 c->Request.CDBLen = 16;
6546 c->Request.type_attr_dir =
6547 TYPE_ATTR_DIR(cmd_type,
6548 ATTR_SIMPLE, XFER_WRITE);
6549 c->Request.Timeout = 0; /* Don't time out */
6550 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
6551 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
6552 c->Request.CDB[2] = 0x00; /* reserved */
6553 c->Request.CDB[3] = 0x00; /* reserved */
6554 /* Tag to abort goes in CDB[4]-CDB[11] */
6555 memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
6556 c->Request.CDB[12] = 0x00; /* reserved */
6557 c->Request.CDB[13] = 0x00; /* reserved */
6558 c->Request.CDB[14] = 0x00; /* reserved */
6559 c->Request.CDB[15] = 0x00; /* reserved */
6560 break;
6561 default:
6562 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6563 cmd);
6564 BUG();
6565 }
6566 } else {
6567 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6568 BUG();
6569 }
6570
6571 switch (GET_DIR(c->Request.type_attr_dir)) {
6572 case XFER_READ:
6573 pci_dir = PCI_DMA_FROMDEVICE;
6574 break;
6575 case XFER_WRITE:
6576 pci_dir = PCI_DMA_TODEVICE;
6577 break;
6578 case XFER_NONE:
6579 pci_dir = PCI_DMA_NONE;
6580 break;
6581 default:
6582 pci_dir = PCI_DMA_BIDIRECTIONAL;
6583 }
6584 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6585 return -1;
6586 return 0;
6587 }
6588
6589 /*
6590 * Map (physical) PCI mem into (virtual) kernel space
6591 */
6592 static void __iomem *remap_pci_mem(ulong base, ulong size)
6593 {
6594 ulong page_base = ((ulong) base) & PAGE_MASK;
6595 ulong page_offs = ((ulong) base) - page_base;
6596 void __iomem *page_remapped = ioremap_nocache(page_base,
6597 page_offs + size);
6598
6599 return page_remapped ? (page_remapped + page_offs) : NULL;
6600 }
6601
6602 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6603 {
6604 return h->access.command_completed(h, q);
6605 }
6606
6607 static inline bool interrupt_pending(struct ctlr_info *h)
6608 {
6609 return h->access.intr_pending(h);
6610 }
6611
6612 static inline long interrupt_not_for_us(struct ctlr_info *h)
6613 {
6614 return (h->access.intr_pending(h) == 0) ||
6615 (h->interrupts_enabled == 0);
6616 }
6617
6618 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6619 u32 raw_tag)
6620 {
6621 if (unlikely(tag_index >= h->nr_cmds)) {
6622 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6623 return 1;
6624 }
6625 return 0;
6626 }
6627
6628 static inline void finish_cmd(struct CommandList *c)
6629 {
6630 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6631 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6632 || c->cmd_type == CMD_IOACCEL2))
6633 complete_scsi_command(c);
6634 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6635 complete(c->waiting);
6636 }
6637
6638 /* process completion of an indexed ("direct lookup") command */
6639 static inline void process_indexed_cmd(struct ctlr_info *h,
6640 u32 raw_tag)
6641 {
6642 u32 tag_index;
6643 struct CommandList *c;
6644
6645 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6646 if (!bad_tag(h, tag_index, raw_tag)) {
6647 c = h->cmd_pool + tag_index;
6648 finish_cmd(c);
6649 }
6650 }
6651
6652 /* Some controllers, like p400, will give us one interrupt
6653 * after a soft reset, even if we turned interrupts off.
6654 * Only need to check for this in the hpsa_xxx_discard_completions
6655 * functions.
6656 */
6657 static int ignore_bogus_interrupt(struct ctlr_info *h)
6658 {
6659 if (likely(!reset_devices))
6660 return 0;
6661
6662 if (likely(h->interrupts_enabled))
6663 return 0;
6664
6665 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6666 "(known firmware bug.) Ignoring.\n");
6667
6668 return 1;
6669 }
6670
6671 /*
6672 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6673 * Relies on (h-q[x] == x) being true for x such that
6674 * 0 <= x < MAX_REPLY_QUEUES.
6675 */
6676 static struct ctlr_info *queue_to_hba(u8 *queue)
6677 {
6678 return container_of((queue - *queue), struct ctlr_info, q[0]);
6679 }
6680
6681 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6682 {
6683 struct ctlr_info *h = queue_to_hba(queue);
6684 u8 q = *(u8 *) queue;
6685 u32 raw_tag;
6686
6687 if (ignore_bogus_interrupt(h))
6688 return IRQ_NONE;
6689
6690 if (interrupt_not_for_us(h))
6691 return IRQ_NONE;
6692 h->last_intr_timestamp = get_jiffies_64();
6693 while (interrupt_pending(h)) {
6694 raw_tag = get_next_completion(h, q);
6695 while (raw_tag != FIFO_EMPTY)
6696 raw_tag = next_command(h, q);
6697 }
6698 return IRQ_HANDLED;
6699 }
6700
6701 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6702 {
6703 struct ctlr_info *h = queue_to_hba(queue);
6704 u32 raw_tag;
6705 u8 q = *(u8 *) queue;
6706
6707 if (ignore_bogus_interrupt(h))
6708 return IRQ_NONE;
6709
6710 h->last_intr_timestamp = get_jiffies_64();
6711 raw_tag = get_next_completion(h, q);
6712 while (raw_tag != FIFO_EMPTY)
6713 raw_tag = next_command(h, q);
6714 return IRQ_HANDLED;
6715 }
6716
6717 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6718 {
6719 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6720 u32 raw_tag;
6721 u8 q = *(u8 *) queue;
6722
6723 if (interrupt_not_for_us(h))
6724 return IRQ_NONE;
6725 h->last_intr_timestamp = get_jiffies_64();
6726 while (interrupt_pending(h)) {
6727 raw_tag = get_next_completion(h, q);
6728 while (raw_tag != FIFO_EMPTY) {
6729 process_indexed_cmd(h, raw_tag);
6730 raw_tag = next_command(h, q);
6731 }
6732 }
6733 return IRQ_HANDLED;
6734 }
6735
6736 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6737 {
6738 struct ctlr_info *h = queue_to_hba(queue);
6739 u32 raw_tag;
6740 u8 q = *(u8 *) queue;
6741
6742 h->last_intr_timestamp = get_jiffies_64();
6743 raw_tag = get_next_completion(h, q);
6744 while (raw_tag != FIFO_EMPTY) {
6745 process_indexed_cmd(h, raw_tag);
6746 raw_tag = next_command(h, q);
6747 }
6748 return IRQ_HANDLED;
6749 }
6750
6751 /* Send a message CDB to the firmware. Careful, this only works
6752 * in simple mode, not performant mode due to the tag lookup.
6753 * We only ever use this immediately after a controller reset.
6754 */
6755 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6756 unsigned char type)
6757 {
6758 struct Command {
6759 struct CommandListHeader CommandHeader;
6760 struct RequestBlock Request;
6761 struct ErrDescriptor ErrorDescriptor;
6762 };
6763 struct Command *cmd;
6764 static const size_t cmd_sz = sizeof(*cmd) +
6765 sizeof(cmd->ErrorDescriptor);
6766 dma_addr_t paddr64;
6767 __le32 paddr32;
6768 u32 tag;
6769 void __iomem *vaddr;
6770 int i, err;
6771
6772 vaddr = pci_ioremap_bar(pdev, 0);
6773 if (vaddr == NULL)
6774 return -ENOMEM;
6775
6776 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6777 * CCISS commands, so they must be allocated from the lower 4GiB of
6778 * memory.
6779 */
6780 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6781 if (err) {
6782 iounmap(vaddr);
6783 return err;
6784 }
6785
6786 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6787 if (cmd == NULL) {
6788 iounmap(vaddr);
6789 return -ENOMEM;
6790 }
6791
6792 /* This must fit, because of the 32-bit consistent DMA mask. Also,
6793 * although there's no guarantee, we assume that the address is at
6794 * least 4-byte aligned (most likely, it's page-aligned).
6795 */
6796 paddr32 = cpu_to_le32(paddr64);
6797
6798 cmd->CommandHeader.ReplyQueue = 0;
6799 cmd->CommandHeader.SGList = 0;
6800 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6801 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6802 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6803
6804 cmd->Request.CDBLen = 16;
6805 cmd->Request.type_attr_dir =
6806 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6807 cmd->Request.Timeout = 0; /* Don't time out */
6808 cmd->Request.CDB[0] = opcode;
6809 cmd->Request.CDB[1] = type;
6810 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6811 cmd->ErrorDescriptor.Addr =
6812 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6813 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6814
6815 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6816
6817 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6818 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6819 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6820 break;
6821 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6822 }
6823
6824 iounmap(vaddr);
6825
6826 /* we leak the DMA buffer here ... no choice since the controller could
6827 * still complete the command.
6828 */
6829 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6830 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6831 opcode, type);
6832 return -ETIMEDOUT;
6833 }
6834
6835 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6836
6837 if (tag & HPSA_ERROR_BIT) {
6838 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6839 opcode, type);
6840 return -EIO;
6841 }
6842
6843 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6844 opcode, type);
6845 return 0;
6846 }
6847
6848 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6849
6850 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6851 void __iomem *vaddr, u32 use_doorbell)
6852 {
6853
6854 if (use_doorbell) {
6855 /* For everything after the P600, the PCI power state method
6856 * of resetting the controller doesn't work, so we have this
6857 * other way using the doorbell register.
6858 */
6859 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6860 writel(use_doorbell, vaddr + SA5_DOORBELL);
6861
6862 /* PMC hardware guys tell us we need a 10 second delay after
6863 * doorbell reset and before any attempt to talk to the board
6864 * at all to ensure that this actually works and doesn't fall
6865 * over in some weird corner cases.
6866 */
6867 msleep(10000);
6868 } else { /* Try to do it the PCI power state way */
6869
6870 /* Quoting from the Open CISS Specification: "The Power
6871 * Management Control/Status Register (CSR) controls the power
6872 * state of the device. The normal operating state is D0,
6873 * CSR=00h. The software off state is D3, CSR=03h. To reset
6874 * the controller, place the interface device in D3 then to D0,
6875 * this causes a secondary PCI reset which will reset the
6876 * controller." */
6877
6878 int rc = 0;
6879
6880 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6881
6882 /* enter the D3hot power management state */
6883 rc = pci_set_power_state(pdev, PCI_D3hot);
6884 if (rc)
6885 return rc;
6886
6887 msleep(500);
6888
6889 /* enter the D0 power management state */
6890 rc = pci_set_power_state(pdev, PCI_D0);
6891 if (rc)
6892 return rc;
6893
6894 /*
6895 * The P600 requires a small delay when changing states.
6896 * Otherwise we may think the board did not reset and we bail.
6897 * This for kdump only and is particular to the P600.
6898 */
6899 msleep(500);
6900 }
6901 return 0;
6902 }
6903
6904 static void init_driver_version(char *driver_version, int len)
6905 {
6906 memset(driver_version, 0, len);
6907 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6908 }
6909
6910 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6911 {
6912 char *driver_version;
6913 int i, size = sizeof(cfgtable->driver_version);
6914
6915 driver_version = kmalloc(size, GFP_KERNEL);
6916 if (!driver_version)
6917 return -ENOMEM;
6918
6919 init_driver_version(driver_version, size);
6920 for (i = 0; i < size; i++)
6921 writeb(driver_version[i], &cfgtable->driver_version[i]);
6922 kfree(driver_version);
6923 return 0;
6924 }
6925
6926 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6927 unsigned char *driver_ver)
6928 {
6929 int i;
6930
6931 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6932 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6933 }
6934
6935 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6936 {
6937
6938 char *driver_ver, *old_driver_ver;
6939 int rc, size = sizeof(cfgtable->driver_version);
6940
6941 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6942 if (!old_driver_ver)
6943 return -ENOMEM;
6944 driver_ver = old_driver_ver + size;
6945
6946 /* After a reset, the 32 bytes of "driver version" in the cfgtable
6947 * should have been changed, otherwise we know the reset failed.
6948 */
6949 init_driver_version(old_driver_ver, size);
6950 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6951 rc = !memcmp(driver_ver, old_driver_ver, size);
6952 kfree(old_driver_ver);
6953 return rc;
6954 }
6955 /* This does a hard reset of the controller using PCI power management
6956 * states or the using the doorbell register.
6957 */
6958 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6959 {
6960 u64 cfg_offset;
6961 u32 cfg_base_addr;
6962 u64 cfg_base_addr_index;
6963 void __iomem *vaddr;
6964 unsigned long paddr;
6965 u32 misc_fw_support;
6966 int rc;
6967 struct CfgTable __iomem *cfgtable;
6968 u32 use_doorbell;
6969 u16 command_register;
6970
6971 /* For controllers as old as the P600, this is very nearly
6972 * the same thing as
6973 *
6974 * pci_save_state(pci_dev);
6975 * pci_set_power_state(pci_dev, PCI_D3hot);
6976 * pci_set_power_state(pci_dev, PCI_D0);
6977 * pci_restore_state(pci_dev);
6978 *
6979 * For controllers newer than the P600, the pci power state
6980 * method of resetting doesn't work so we have another way
6981 * using the doorbell register.
6982 */
6983
6984 if (!ctlr_is_resettable(board_id)) {
6985 dev_warn(&pdev->dev, "Controller not resettable\n");
6986 return -ENODEV;
6987 }
6988
6989 /* if controller is soft- but not hard resettable... */
6990 if (!ctlr_is_hard_resettable(board_id))
6991 return -ENOTSUPP; /* try soft reset later. */
6992
6993 /* Save the PCI command register */
6994 pci_read_config_word(pdev, 4, &command_register);
6995 pci_save_state(pdev);
6996
6997 /* find the first memory BAR, so we can find the cfg table */
6998 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6999 if (rc)
7000 return rc;
7001 vaddr = remap_pci_mem(paddr, 0x250);
7002 if (!vaddr)
7003 return -ENOMEM;
7004
7005 /* find cfgtable in order to check if reset via doorbell is supported */
7006 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7007 &cfg_base_addr_index, &cfg_offset);
7008 if (rc)
7009 goto unmap_vaddr;
7010 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7011 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7012 if (!cfgtable) {
7013 rc = -ENOMEM;
7014 goto unmap_vaddr;
7015 }
7016 rc = write_driver_ver_to_cfgtable(cfgtable);
7017 if (rc)
7018 goto unmap_cfgtable;
7019
7020 /* If reset via doorbell register is supported, use that.
7021 * There are two such methods. Favor the newest method.
7022 */
7023 misc_fw_support = readl(&cfgtable->misc_fw_support);
7024 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7025 if (use_doorbell) {
7026 use_doorbell = DOORBELL_CTLR_RESET2;
7027 } else {
7028 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7029 if (use_doorbell) {
7030 dev_warn(&pdev->dev,
7031 "Soft reset not supported. Firmware update is required.\n");
7032 rc = -ENOTSUPP; /* try soft reset */
7033 goto unmap_cfgtable;
7034 }
7035 }
7036
7037 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7038 if (rc)
7039 goto unmap_cfgtable;
7040
7041 pci_restore_state(pdev);
7042 pci_write_config_word(pdev, 4, command_register);
7043
7044 /* Some devices (notably the HP Smart Array 5i Controller)
7045 need a little pause here */
7046 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7047
7048 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7049 if (rc) {
7050 dev_warn(&pdev->dev,
7051 "Failed waiting for board to become ready after hard reset\n");
7052 goto unmap_cfgtable;
7053 }
7054
7055 rc = controller_reset_failed(vaddr);
7056 if (rc < 0)
7057 goto unmap_cfgtable;
7058 if (rc) {
7059 dev_warn(&pdev->dev, "Unable to successfully reset "
7060 "controller. Will try soft reset.\n");
7061 rc = -ENOTSUPP;
7062 } else {
7063 dev_info(&pdev->dev, "board ready after hard reset.\n");
7064 }
7065
7066 unmap_cfgtable:
7067 iounmap(cfgtable);
7068
7069 unmap_vaddr:
7070 iounmap(vaddr);
7071 return rc;
7072 }
7073
7074 /*
7075 * We cannot read the structure directly, for portability we must use
7076 * the io functions.
7077 * This is for debug only.
7078 */
7079 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7080 {
7081 #ifdef HPSA_DEBUG
7082 int i;
7083 char temp_name[17];
7084
7085 dev_info(dev, "Controller Configuration information\n");
7086 dev_info(dev, "------------------------------------\n");
7087 for (i = 0; i < 4; i++)
7088 temp_name[i] = readb(&(tb->Signature[i]));
7089 temp_name[4] = '\0';
7090 dev_info(dev, " Signature = %s\n", temp_name);
7091 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7092 dev_info(dev, " Transport methods supported = 0x%x\n",
7093 readl(&(tb->TransportSupport)));
7094 dev_info(dev, " Transport methods active = 0x%x\n",
7095 readl(&(tb->TransportActive)));
7096 dev_info(dev, " Requested transport Method = 0x%x\n",
7097 readl(&(tb->HostWrite.TransportRequest)));
7098 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7099 readl(&(tb->HostWrite.CoalIntDelay)));
7100 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7101 readl(&(tb->HostWrite.CoalIntCount)));
7102 dev_info(dev, " Max outstanding commands = %d\n",
7103 readl(&(tb->CmdsOutMax)));
7104 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7105 for (i = 0; i < 16; i++)
7106 temp_name[i] = readb(&(tb->ServerName[i]));
7107 temp_name[16] = '\0';
7108 dev_info(dev, " Server Name = %s\n", temp_name);
7109 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7110 readl(&(tb->HeartBeat)));
7111 #endif /* HPSA_DEBUG */
7112 }
7113
7114 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7115 {
7116 int i, offset, mem_type, bar_type;
7117
7118 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7119 return 0;
7120 offset = 0;
7121 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7122 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7123 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7124 offset += 4;
7125 else {
7126 mem_type = pci_resource_flags(pdev, i) &
7127 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7128 switch (mem_type) {
7129 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7130 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7131 offset += 4; /* 32 bit */
7132 break;
7133 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7134 offset += 8;
7135 break;
7136 default: /* reserved in PCI 2.2 */
7137 dev_warn(&pdev->dev,
7138 "base address is invalid\n");
7139 return -1;
7140 break;
7141 }
7142 }
7143 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7144 return i + 1;
7145 }
7146 return -1;
7147 }
7148
7149 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7150 {
7151 if (h->msix_vector) {
7152 if (h->pdev->msix_enabled)
7153 pci_disable_msix(h->pdev);
7154 h->msix_vector = 0;
7155 } else if (h->msi_vector) {
7156 if (h->pdev->msi_enabled)
7157 pci_disable_msi(h->pdev);
7158 h->msi_vector = 0;
7159 }
7160 }
7161
7162 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7163 * controllers that are capable. If not, we use legacy INTx mode.
7164 */
7165 static void hpsa_interrupt_mode(struct ctlr_info *h)
7166 {
7167 #ifdef CONFIG_PCI_MSI
7168 int err, i;
7169 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7170
7171 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7172 hpsa_msix_entries[i].vector = 0;
7173 hpsa_msix_entries[i].entry = i;
7174 }
7175
7176 /* Some boards advertise MSI but don't really support it */
7177 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
7178 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7179 goto default_int_mode;
7180 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7181 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7182 h->msix_vector = MAX_REPLY_QUEUES;
7183 if (h->msix_vector > num_online_cpus())
7184 h->msix_vector = num_online_cpus();
7185 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
7186 1, h->msix_vector);
7187 if (err < 0) {
7188 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
7189 h->msix_vector = 0;
7190 goto single_msi_mode;
7191 } else if (err < h->msix_vector) {
7192 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7193 "available\n", err);
7194 }
7195 h->msix_vector = err;
7196 for (i = 0; i < h->msix_vector; i++)
7197 h->intr[i] = hpsa_msix_entries[i].vector;
7198 return;
7199 }
7200 single_msi_mode:
7201 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7202 dev_info(&h->pdev->dev, "MSI capable controller\n");
7203 if (!pci_enable_msi(h->pdev))
7204 h->msi_vector = 1;
7205 else
7206 dev_warn(&h->pdev->dev, "MSI init failed\n");
7207 }
7208 default_int_mode:
7209 #endif /* CONFIG_PCI_MSI */
7210 /* if we get here we're going to use the default interrupt mode */
7211 h->intr[h->intr_mode] = h->pdev->irq;
7212 }
7213
7214 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7215 {
7216 int i;
7217 u32 subsystem_vendor_id, subsystem_device_id;
7218
7219 subsystem_vendor_id = pdev->subsystem_vendor;
7220 subsystem_device_id = pdev->subsystem_device;
7221 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7222 subsystem_vendor_id;
7223
7224 for (i = 0; i < ARRAY_SIZE(products); i++)
7225 if (*board_id == products[i].board_id)
7226 return i;
7227
7228 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7229 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7230 !hpsa_allow_any) {
7231 dev_warn(&pdev->dev, "unrecognized board ID: "
7232 "0x%08x, ignoring.\n", *board_id);
7233 return -ENODEV;
7234 }
7235 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7236 }
7237
7238 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7239 unsigned long *memory_bar)
7240 {
7241 int i;
7242
7243 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7244 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7245 /* addressing mode bits already removed */
7246 *memory_bar = pci_resource_start(pdev, i);
7247 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7248 *memory_bar);
7249 return 0;
7250 }
7251 dev_warn(&pdev->dev, "no memory BAR found\n");
7252 return -ENODEV;
7253 }
7254
7255 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7256 int wait_for_ready)
7257 {
7258 int i, iterations;
7259 u32 scratchpad;
7260 if (wait_for_ready)
7261 iterations = HPSA_BOARD_READY_ITERATIONS;
7262 else
7263 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7264
7265 for (i = 0; i < iterations; i++) {
7266 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7267 if (wait_for_ready) {
7268 if (scratchpad == HPSA_FIRMWARE_READY)
7269 return 0;
7270 } else {
7271 if (scratchpad != HPSA_FIRMWARE_READY)
7272 return 0;
7273 }
7274 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7275 }
7276 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7277 return -ENODEV;
7278 }
7279
7280 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7281 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7282 u64 *cfg_offset)
7283 {
7284 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7285 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7286 *cfg_base_addr &= (u32) 0x0000ffff;
7287 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7288 if (*cfg_base_addr_index == -1) {
7289 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7290 return -ENODEV;
7291 }
7292 return 0;
7293 }
7294
7295 static void hpsa_free_cfgtables(struct ctlr_info *h)
7296 {
7297 if (h->transtable) {
7298 iounmap(h->transtable);
7299 h->transtable = NULL;
7300 }
7301 if (h->cfgtable) {
7302 iounmap(h->cfgtable);
7303 h->cfgtable = NULL;
7304 }
7305 }
7306
7307 /* Find and map CISS config table and transfer table
7308 + * several items must be unmapped (freed) later
7309 + * */
7310 static int hpsa_find_cfgtables(struct ctlr_info *h)
7311 {
7312 u64 cfg_offset;
7313 u32 cfg_base_addr;
7314 u64 cfg_base_addr_index;
7315 u32 trans_offset;
7316 int rc;
7317
7318 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7319 &cfg_base_addr_index, &cfg_offset);
7320 if (rc)
7321 return rc;
7322 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7323 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7324 if (!h->cfgtable) {
7325 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7326 return -ENOMEM;
7327 }
7328 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7329 if (rc)
7330 return rc;
7331 /* Find performant mode table. */
7332 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7333 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7334 cfg_base_addr_index)+cfg_offset+trans_offset,
7335 sizeof(*h->transtable));
7336 if (!h->transtable) {
7337 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7338 hpsa_free_cfgtables(h);
7339 return -ENOMEM;
7340 }
7341 return 0;
7342 }
7343
7344 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7345 {
7346 #define MIN_MAX_COMMANDS 16
7347 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7348
7349 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7350
7351 /* Limit commands in memory limited kdump scenario. */
7352 if (reset_devices && h->max_commands > 32)
7353 h->max_commands = 32;
7354
7355 if (h->max_commands < MIN_MAX_COMMANDS) {
7356 dev_warn(&h->pdev->dev,
7357 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7358 h->max_commands,
7359 MIN_MAX_COMMANDS);
7360 h->max_commands = MIN_MAX_COMMANDS;
7361 }
7362 }
7363
7364 /* If the controller reports that the total max sg entries is greater than 512,
7365 * then we know that chained SG blocks work. (Original smart arrays did not
7366 * support chained SG blocks and would return zero for max sg entries.)
7367 */
7368 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7369 {
7370 return h->maxsgentries > 512;
7371 }
7372
7373 /* Interrogate the hardware for some limits:
7374 * max commands, max SG elements without chaining, and with chaining,
7375 * SG chain block size, etc.
7376 */
7377 static void hpsa_find_board_params(struct ctlr_info *h)
7378 {
7379 hpsa_get_max_perf_mode_cmds(h);
7380 h->nr_cmds = h->max_commands;
7381 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7382 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7383 if (hpsa_supports_chained_sg_blocks(h)) {
7384 /* Limit in-command s/g elements to 32 save dma'able memory. */
7385 h->max_cmd_sg_entries = 32;
7386 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7387 h->maxsgentries--; /* save one for chain pointer */
7388 } else {
7389 /*
7390 * Original smart arrays supported at most 31 s/g entries
7391 * embedded inline in the command (trying to use more
7392 * would lock up the controller)
7393 */
7394 h->max_cmd_sg_entries = 31;
7395 h->maxsgentries = 31; /* default to traditional values */
7396 h->chainsize = 0;
7397 }
7398
7399 /* Find out what task management functions are supported and cache */
7400 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7401 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7402 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7403 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7404 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7405 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7406 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7407 }
7408
7409 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7410 {
7411 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7412 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7413 return false;
7414 }
7415 return true;
7416 }
7417
7418 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7419 {
7420 u32 driver_support;
7421
7422 driver_support = readl(&(h->cfgtable->driver_support));
7423 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7424 #ifdef CONFIG_X86
7425 driver_support |= ENABLE_SCSI_PREFETCH;
7426 #endif
7427 driver_support |= ENABLE_UNIT_ATTN;
7428 writel(driver_support, &(h->cfgtable->driver_support));
7429 }
7430
7431 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7432 * in a prefetch beyond physical memory.
7433 */
7434 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7435 {
7436 u32 dma_prefetch;
7437
7438 if (h->board_id != 0x3225103C)
7439 return;
7440 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7441 dma_prefetch |= 0x8000;
7442 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7443 }
7444
7445 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7446 {
7447 int i;
7448 u32 doorbell_value;
7449 unsigned long flags;
7450 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7451 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7452 spin_lock_irqsave(&h->lock, flags);
7453 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7454 spin_unlock_irqrestore(&h->lock, flags);
7455 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7456 goto done;
7457 /* delay and try again */
7458 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7459 }
7460 return -ENODEV;
7461 done:
7462 return 0;
7463 }
7464
7465 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7466 {
7467 int i;
7468 u32 doorbell_value;
7469 unsigned long flags;
7470
7471 /* under certain very rare conditions, this can take awhile.
7472 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7473 * as we enter this code.)
7474 */
7475 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7476 if (h->remove_in_progress)
7477 goto done;
7478 spin_lock_irqsave(&h->lock, flags);
7479 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7480 spin_unlock_irqrestore(&h->lock, flags);
7481 if (!(doorbell_value & CFGTBL_ChangeReq))
7482 goto done;
7483 /* delay and try again */
7484 msleep(MODE_CHANGE_WAIT_INTERVAL);
7485 }
7486 return -ENODEV;
7487 done:
7488 return 0;
7489 }
7490
7491 /* return -ENODEV or other reason on error, 0 on success */
7492 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7493 {
7494 u32 trans_support;
7495
7496 trans_support = readl(&(h->cfgtable->TransportSupport));
7497 if (!(trans_support & SIMPLE_MODE))
7498 return -ENOTSUPP;
7499
7500 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7501
7502 /* Update the field, and then ring the doorbell */
7503 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7504 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7505 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7506 if (hpsa_wait_for_mode_change_ack(h))
7507 goto error;
7508 print_cfg_table(&h->pdev->dev, h->cfgtable);
7509 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7510 goto error;
7511 h->transMethod = CFGTBL_Trans_Simple;
7512 return 0;
7513 error:
7514 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7515 return -ENODEV;
7516 }
7517
7518 /* free items allocated or mapped by hpsa_pci_init */
7519 static void hpsa_free_pci_init(struct ctlr_info *h)
7520 {
7521 hpsa_free_cfgtables(h); /* pci_init 4 */
7522 iounmap(h->vaddr); /* pci_init 3 */
7523 h->vaddr = NULL;
7524 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7525 /*
7526 * call pci_disable_device before pci_release_regions per
7527 * Documentation/PCI/pci.txt
7528 */
7529 pci_disable_device(h->pdev); /* pci_init 1 */
7530 pci_release_regions(h->pdev); /* pci_init 2 */
7531 }
7532
7533 /* several items must be freed later */
7534 static int hpsa_pci_init(struct ctlr_info *h)
7535 {
7536 int prod_index, err;
7537
7538 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7539 if (prod_index < 0)
7540 return prod_index;
7541 h->product_name = products[prod_index].product_name;
7542 h->access = *(products[prod_index].access);
7543
7544 h->needs_abort_tags_swizzled =
7545 ctlr_needs_abort_tags_swizzled(h->board_id);
7546
7547 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7548 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7549
7550 err = pci_enable_device(h->pdev);
7551 if (err) {
7552 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7553 pci_disable_device(h->pdev);
7554 return err;
7555 }
7556
7557 err = pci_request_regions(h->pdev, HPSA);
7558 if (err) {
7559 dev_err(&h->pdev->dev,
7560 "failed to obtain PCI resources\n");
7561 pci_disable_device(h->pdev);
7562 return err;
7563 }
7564
7565 pci_set_master(h->pdev);
7566
7567 hpsa_interrupt_mode(h);
7568 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7569 if (err)
7570 goto clean2; /* intmode+region, pci */
7571 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7572 if (!h->vaddr) {
7573 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7574 err = -ENOMEM;
7575 goto clean2; /* intmode+region, pci */
7576 }
7577 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7578 if (err)
7579 goto clean3; /* vaddr, intmode+region, pci */
7580 err = hpsa_find_cfgtables(h);
7581 if (err)
7582 goto clean3; /* vaddr, intmode+region, pci */
7583 hpsa_find_board_params(h);
7584
7585 if (!hpsa_CISS_signature_present(h)) {
7586 err = -ENODEV;
7587 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7588 }
7589 hpsa_set_driver_support_bits(h);
7590 hpsa_p600_dma_prefetch_quirk(h);
7591 err = hpsa_enter_simple_mode(h);
7592 if (err)
7593 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7594 return 0;
7595
7596 clean4: /* cfgtables, vaddr, intmode+region, pci */
7597 hpsa_free_cfgtables(h);
7598 clean3: /* vaddr, intmode+region, pci */
7599 iounmap(h->vaddr);
7600 h->vaddr = NULL;
7601 clean2: /* intmode+region, pci */
7602 hpsa_disable_interrupt_mode(h);
7603 /*
7604 * call pci_disable_device before pci_release_regions per
7605 * Documentation/PCI/pci.txt
7606 */
7607 pci_disable_device(h->pdev);
7608 pci_release_regions(h->pdev);
7609 return err;
7610 }
7611
7612 static void hpsa_hba_inquiry(struct ctlr_info *h)
7613 {
7614 int rc;
7615
7616 #define HBA_INQUIRY_BYTE_COUNT 64
7617 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7618 if (!h->hba_inquiry_data)
7619 return;
7620 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7621 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7622 if (rc != 0) {
7623 kfree(h->hba_inquiry_data);
7624 h->hba_inquiry_data = NULL;
7625 }
7626 }
7627
7628 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7629 {
7630 int rc, i;
7631 void __iomem *vaddr;
7632
7633 if (!reset_devices)
7634 return 0;
7635
7636 /* kdump kernel is loading, we don't know in which state is
7637 * the pci interface. The dev->enable_cnt is equal zero
7638 * so we call enable+disable, wait a while and switch it on.
7639 */
7640 rc = pci_enable_device(pdev);
7641 if (rc) {
7642 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7643 return -ENODEV;
7644 }
7645 pci_disable_device(pdev);
7646 msleep(260); /* a randomly chosen number */
7647 rc = pci_enable_device(pdev);
7648 if (rc) {
7649 dev_warn(&pdev->dev, "failed to enable device.\n");
7650 return -ENODEV;
7651 }
7652
7653 pci_set_master(pdev);
7654
7655 vaddr = pci_ioremap_bar(pdev, 0);
7656 if (vaddr == NULL) {
7657 rc = -ENOMEM;
7658 goto out_disable;
7659 }
7660 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7661 iounmap(vaddr);
7662
7663 /* Reset the controller with a PCI power-cycle or via doorbell */
7664 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7665
7666 /* -ENOTSUPP here means we cannot reset the controller
7667 * but it's already (and still) up and running in
7668 * "performant mode". Or, it might be 640x, which can't reset
7669 * due to concerns about shared bbwc between 6402/6404 pair.
7670 */
7671 if (rc)
7672 goto out_disable;
7673
7674 /* Now try to get the controller to respond to a no-op */
7675 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7676 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7677 if (hpsa_noop(pdev) == 0)
7678 break;
7679 else
7680 dev_warn(&pdev->dev, "no-op failed%s\n",
7681 (i < 11 ? "; re-trying" : ""));
7682 }
7683
7684 out_disable:
7685
7686 pci_disable_device(pdev);
7687 return rc;
7688 }
7689
7690 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7691 {
7692 kfree(h->cmd_pool_bits);
7693 h->cmd_pool_bits = NULL;
7694 if (h->cmd_pool) {
7695 pci_free_consistent(h->pdev,
7696 h->nr_cmds * sizeof(struct CommandList),
7697 h->cmd_pool,
7698 h->cmd_pool_dhandle);
7699 h->cmd_pool = NULL;
7700 h->cmd_pool_dhandle = 0;
7701 }
7702 if (h->errinfo_pool) {
7703 pci_free_consistent(h->pdev,
7704 h->nr_cmds * sizeof(struct ErrorInfo),
7705 h->errinfo_pool,
7706 h->errinfo_pool_dhandle);
7707 h->errinfo_pool = NULL;
7708 h->errinfo_pool_dhandle = 0;
7709 }
7710 }
7711
7712 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7713 {
7714 h->cmd_pool_bits = kzalloc(
7715 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7716 sizeof(unsigned long), GFP_KERNEL);
7717 h->cmd_pool = pci_alloc_consistent(h->pdev,
7718 h->nr_cmds * sizeof(*h->cmd_pool),
7719 &(h->cmd_pool_dhandle));
7720 h->errinfo_pool = pci_alloc_consistent(h->pdev,
7721 h->nr_cmds * sizeof(*h->errinfo_pool),
7722 &(h->errinfo_pool_dhandle));
7723 if ((h->cmd_pool_bits == NULL)
7724 || (h->cmd_pool == NULL)
7725 || (h->errinfo_pool == NULL)) {
7726 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7727 goto clean_up;
7728 }
7729 hpsa_preinitialize_commands(h);
7730 return 0;
7731 clean_up:
7732 hpsa_free_cmd_pool(h);
7733 return -ENOMEM;
7734 }
7735
7736 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
7737 {
7738 int i, cpu;
7739
7740 cpu = cpumask_first(cpu_online_mask);
7741 for (i = 0; i < h->msix_vector; i++) {
7742 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
7743 cpu = cpumask_next(cpu, cpu_online_mask);
7744 }
7745 }
7746
7747 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7748 static void hpsa_free_irqs(struct ctlr_info *h)
7749 {
7750 int i;
7751
7752 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
7753 /* Single reply queue, only one irq to free */
7754 i = h->intr_mode;
7755 irq_set_affinity_hint(h->intr[i], NULL);
7756 free_irq(h->intr[i], &h->q[i]);
7757 h->q[i] = 0;
7758 return;
7759 }
7760
7761 for (i = 0; i < h->msix_vector; i++) {
7762 irq_set_affinity_hint(h->intr[i], NULL);
7763 free_irq(h->intr[i], &h->q[i]);
7764 h->q[i] = 0;
7765 }
7766 for (; i < MAX_REPLY_QUEUES; i++)
7767 h->q[i] = 0;
7768 }
7769
7770 /* returns 0 on success; cleans up and returns -Enn on error */
7771 static int hpsa_request_irqs(struct ctlr_info *h,
7772 irqreturn_t (*msixhandler)(int, void *),
7773 irqreturn_t (*intxhandler)(int, void *))
7774 {
7775 int rc, i;
7776
7777 /*
7778 * initialize h->q[x] = x so that interrupt handlers know which
7779 * queue to process.
7780 */
7781 for (i = 0; i < MAX_REPLY_QUEUES; i++)
7782 h->q[i] = (u8) i;
7783
7784 if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
7785 /* If performant mode and MSI-X, use multiple reply queues */
7786 for (i = 0; i < h->msix_vector; i++) {
7787 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7788 rc = request_irq(h->intr[i], msixhandler,
7789 0, h->intrname[i],
7790 &h->q[i]);
7791 if (rc) {
7792 int j;
7793
7794 dev_err(&h->pdev->dev,
7795 "failed to get irq %d for %s\n",
7796 h->intr[i], h->devname);
7797 for (j = 0; j < i; j++) {
7798 free_irq(h->intr[j], &h->q[j]);
7799 h->q[j] = 0;
7800 }
7801 for (; j < MAX_REPLY_QUEUES; j++)
7802 h->q[j] = 0;
7803 return rc;
7804 }
7805 }
7806 hpsa_irq_affinity_hints(h);
7807 } else {
7808 /* Use single reply pool */
7809 if (h->msix_vector > 0 || h->msi_vector) {
7810 if (h->msix_vector)
7811 sprintf(h->intrname[h->intr_mode],
7812 "%s-msix", h->devname);
7813 else
7814 sprintf(h->intrname[h->intr_mode],
7815 "%s-msi", h->devname);
7816 rc = request_irq(h->intr[h->intr_mode],
7817 msixhandler, 0,
7818 h->intrname[h->intr_mode],
7819 &h->q[h->intr_mode]);
7820 } else {
7821 sprintf(h->intrname[h->intr_mode],
7822 "%s-intx", h->devname);
7823 rc = request_irq(h->intr[h->intr_mode],
7824 intxhandler, IRQF_SHARED,
7825 h->intrname[h->intr_mode],
7826 &h->q[h->intr_mode]);
7827 }
7828 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
7829 }
7830 if (rc) {
7831 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7832 h->intr[h->intr_mode], h->devname);
7833 hpsa_free_irqs(h);
7834 return -ENODEV;
7835 }
7836 return 0;
7837 }
7838
7839 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7840 {
7841 int rc;
7842 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7843
7844 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7845 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
7846 if (rc) {
7847 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7848 return rc;
7849 }
7850
7851 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7852 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7853 if (rc) {
7854 dev_warn(&h->pdev->dev, "Board failed to become ready "
7855 "after soft reset.\n");
7856 return rc;
7857 }
7858
7859 return 0;
7860 }
7861
7862 static void hpsa_free_reply_queues(struct ctlr_info *h)
7863 {
7864 int i;
7865
7866 for (i = 0; i < h->nreply_queues; i++) {
7867 if (!h->reply_queue[i].head)
7868 continue;
7869 pci_free_consistent(h->pdev,
7870 h->reply_queue_size,
7871 h->reply_queue[i].head,
7872 h->reply_queue[i].busaddr);
7873 h->reply_queue[i].head = NULL;
7874 h->reply_queue[i].busaddr = 0;
7875 }
7876 h->reply_queue_size = 0;
7877 }
7878
7879 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7880 {
7881 hpsa_free_performant_mode(h); /* init_one 7 */
7882 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
7883 hpsa_free_cmd_pool(h); /* init_one 5 */
7884 hpsa_free_irqs(h); /* init_one 4 */
7885 scsi_host_put(h->scsi_host); /* init_one 3 */
7886 h->scsi_host = NULL; /* init_one 3 */
7887 hpsa_free_pci_init(h); /* init_one 2_5 */
7888 free_percpu(h->lockup_detected); /* init_one 2 */
7889 h->lockup_detected = NULL; /* init_one 2 */
7890 if (h->resubmit_wq) {
7891 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
7892 h->resubmit_wq = NULL;
7893 }
7894 if (h->rescan_ctlr_wq) {
7895 destroy_workqueue(h->rescan_ctlr_wq);
7896 h->rescan_ctlr_wq = NULL;
7897 }
7898 kfree(h); /* init_one 1 */
7899 }
7900
7901 /* Called when controller lockup detected. */
7902 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7903 {
7904 int i, refcount;
7905 struct CommandList *c;
7906 int failcount = 0;
7907
7908 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7909 for (i = 0; i < h->nr_cmds; i++) {
7910 c = h->cmd_pool + i;
7911 refcount = atomic_inc_return(&c->refcount);
7912 if (refcount > 1) {
7913 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7914 finish_cmd(c);
7915 atomic_dec(&h->commands_outstanding);
7916 failcount++;
7917 }
7918 cmd_free(h, c);
7919 }
7920 dev_warn(&h->pdev->dev,
7921 "failed %d commands in fail_all\n", failcount);
7922 }
7923
7924 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7925 {
7926 int cpu;
7927
7928 for_each_online_cpu(cpu) {
7929 u32 *lockup_detected;
7930 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7931 *lockup_detected = value;
7932 }
7933 wmb(); /* be sure the per-cpu variables are out to memory */
7934 }
7935
7936 static void controller_lockup_detected(struct ctlr_info *h)
7937 {
7938 unsigned long flags;
7939 u32 lockup_detected;
7940
7941 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7942 spin_lock_irqsave(&h->lock, flags);
7943 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7944 if (!lockup_detected) {
7945 /* no heartbeat, but controller gave us a zero. */
7946 dev_warn(&h->pdev->dev,
7947 "lockup detected after %d but scratchpad register is zero\n",
7948 h->heartbeat_sample_interval / HZ);
7949 lockup_detected = 0xffffffff;
7950 }
7951 set_lockup_detected_for_all_cpus(h, lockup_detected);
7952 spin_unlock_irqrestore(&h->lock, flags);
7953 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7954 lockup_detected, h->heartbeat_sample_interval / HZ);
7955 pci_disable_device(h->pdev);
7956 fail_all_outstanding_cmds(h);
7957 }
7958
7959 static int detect_controller_lockup(struct ctlr_info *h)
7960 {
7961 u64 now;
7962 u32 heartbeat;
7963 unsigned long flags;
7964
7965 now = get_jiffies_64();
7966 /* If we've received an interrupt recently, we're ok. */
7967 if (time_after64(h->last_intr_timestamp +
7968 (h->heartbeat_sample_interval), now))
7969 return false;
7970
7971 /*
7972 * If we've already checked the heartbeat recently, we're ok.
7973 * This could happen if someone sends us a signal. We
7974 * otherwise don't care about signals in this thread.
7975 */
7976 if (time_after64(h->last_heartbeat_timestamp +
7977 (h->heartbeat_sample_interval), now))
7978 return false;
7979
7980 /* If heartbeat has not changed since we last looked, we're not ok. */
7981 spin_lock_irqsave(&h->lock, flags);
7982 heartbeat = readl(&h->cfgtable->HeartBeat);
7983 spin_unlock_irqrestore(&h->lock, flags);
7984 if (h->last_heartbeat == heartbeat) {
7985 controller_lockup_detected(h);
7986 return true;
7987 }
7988
7989 /* We're ok. */
7990 h->last_heartbeat = heartbeat;
7991 h->last_heartbeat_timestamp = now;
7992 return false;
7993 }
7994
7995 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7996 {
7997 int i;
7998 char *event_type;
7999
8000 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8001 return;
8002
8003 /* Ask the controller to clear the events we're handling. */
8004 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8005 | CFGTBL_Trans_io_accel2)) &&
8006 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8007 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8008
8009 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8010 event_type = "state change";
8011 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8012 event_type = "configuration change";
8013 /* Stop sending new RAID offload reqs via the IO accelerator */
8014 scsi_block_requests(h->scsi_host);
8015 for (i = 0; i < h->ndevices; i++)
8016 h->dev[i]->offload_enabled = 0;
8017 hpsa_drain_accel_commands(h);
8018 /* Set 'accelerator path config change' bit */
8019 dev_warn(&h->pdev->dev,
8020 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8021 h->events, event_type);
8022 writel(h->events, &(h->cfgtable->clear_event_notify));
8023 /* Set the "clear event notify field update" bit 6 */
8024 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8025 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8026 hpsa_wait_for_clear_event_notify_ack(h);
8027 scsi_unblock_requests(h->scsi_host);
8028 } else {
8029 /* Acknowledge controller notification events. */
8030 writel(h->events, &(h->cfgtable->clear_event_notify));
8031 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8032 hpsa_wait_for_clear_event_notify_ack(h);
8033 #if 0
8034 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8035 hpsa_wait_for_mode_change_ack(h);
8036 #endif
8037 }
8038 return;
8039 }
8040
8041 /* Check a register on the controller to see if there are configuration
8042 * changes (added/changed/removed logical drives, etc.) which mean that
8043 * we should rescan the controller for devices.
8044 * Also check flag for driver-initiated rescan.
8045 */
8046 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8047 {
8048 if (h->drv_req_rescan) {
8049 h->drv_req_rescan = 0;
8050 return 1;
8051 }
8052
8053 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8054 return 0;
8055
8056 h->events = readl(&(h->cfgtable->event_notify));
8057 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8058 }
8059
8060 /*
8061 * Check if any of the offline devices have become ready
8062 */
8063 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8064 {
8065 unsigned long flags;
8066 struct offline_device_entry *d;
8067 struct list_head *this, *tmp;
8068
8069 spin_lock_irqsave(&h->offline_device_lock, flags);
8070 list_for_each_safe(this, tmp, &h->offline_device_list) {
8071 d = list_entry(this, struct offline_device_entry,
8072 offline_list);
8073 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8074 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8075 spin_lock_irqsave(&h->offline_device_lock, flags);
8076 list_del(&d->offline_list);
8077 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8078 return 1;
8079 }
8080 spin_lock_irqsave(&h->offline_device_lock, flags);
8081 }
8082 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8083 return 0;
8084 }
8085
8086 static int hpsa_luns_changed(struct ctlr_info *h)
8087 {
8088 int rc = 1; /* assume there are changes */
8089 struct ReportLUNdata *logdev = NULL;
8090
8091 /* if we can't find out if lun data has changed,
8092 * assume that it has.
8093 */
8094
8095 if (!h->lastlogicals)
8096 goto out;
8097
8098 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8099 if (!logdev) {
8100 dev_warn(&h->pdev->dev,
8101 "Out of memory, can't track lun changes.\n");
8102 goto out;
8103 }
8104 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8105 dev_warn(&h->pdev->dev,
8106 "report luns failed, can't track lun changes.\n");
8107 goto out;
8108 }
8109 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8110 dev_info(&h->pdev->dev,
8111 "Lun changes detected.\n");
8112 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8113 goto out;
8114 } else
8115 rc = 0; /* no changes detected. */
8116 out:
8117 kfree(logdev);
8118 return rc;
8119 }
8120
8121 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8122 {
8123 unsigned long flags;
8124 struct ctlr_info *h = container_of(to_delayed_work(work),
8125 struct ctlr_info, rescan_ctlr_work);
8126
8127
8128 if (h->remove_in_progress)
8129 return;
8130
8131 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
8132 scsi_host_get(h->scsi_host);
8133 hpsa_ack_ctlr_events(h);
8134 hpsa_scan_start(h->scsi_host);
8135 scsi_host_put(h->scsi_host);
8136 } else if (h->discovery_polling) {
8137 hpsa_disable_rld_caching(h);
8138 if (hpsa_luns_changed(h)) {
8139 struct Scsi_Host *sh = NULL;
8140
8141 dev_info(&h->pdev->dev,
8142 "driver discovery polling rescan.\n");
8143 sh = scsi_host_get(h->scsi_host);
8144 if (sh != NULL) {
8145 hpsa_scan_start(sh);
8146 scsi_host_put(sh);
8147 }
8148 }
8149 }
8150 spin_lock_irqsave(&h->lock, flags);
8151 if (!h->remove_in_progress)
8152 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8153 h->heartbeat_sample_interval);
8154 spin_unlock_irqrestore(&h->lock, flags);
8155 }
8156
8157 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8158 {
8159 unsigned long flags;
8160 struct ctlr_info *h = container_of(to_delayed_work(work),
8161 struct ctlr_info, monitor_ctlr_work);
8162
8163 detect_controller_lockup(h);
8164 if (lockup_detected(h))
8165 return;
8166
8167 spin_lock_irqsave(&h->lock, flags);
8168 if (!h->remove_in_progress)
8169 schedule_delayed_work(&h->monitor_ctlr_work,
8170 h->heartbeat_sample_interval);
8171 spin_unlock_irqrestore(&h->lock, flags);
8172 }
8173
8174 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8175 char *name)
8176 {
8177 struct workqueue_struct *wq = NULL;
8178
8179 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8180 if (!wq)
8181 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8182
8183 return wq;
8184 }
8185
8186 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8187 {
8188 int dac, rc;
8189 struct ctlr_info *h;
8190 int try_soft_reset = 0;
8191 unsigned long flags;
8192 u32 board_id;
8193
8194 if (number_of_controllers == 0)
8195 printk(KERN_INFO DRIVER_NAME "\n");
8196
8197 rc = hpsa_lookup_board_id(pdev, &board_id);
8198 if (rc < 0) {
8199 dev_warn(&pdev->dev, "Board ID not found\n");
8200 return rc;
8201 }
8202
8203 rc = hpsa_init_reset_devices(pdev, board_id);
8204 if (rc) {
8205 if (rc != -ENOTSUPP)
8206 return rc;
8207 /* If the reset fails in a particular way (it has no way to do
8208 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8209 * a soft reset once we get the controller configured up to the
8210 * point that it can accept a command.
8211 */
8212 try_soft_reset = 1;
8213 rc = 0;
8214 }
8215
8216 reinit_after_soft_reset:
8217
8218 /* Command structures must be aligned on a 32-byte boundary because
8219 * the 5 lower bits of the address are used by the hardware. and by
8220 * the driver. See comments in hpsa.h for more info.
8221 */
8222 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8223 h = kzalloc(sizeof(*h), GFP_KERNEL);
8224 if (!h) {
8225 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8226 return -ENOMEM;
8227 }
8228
8229 h->pdev = pdev;
8230
8231 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8232 INIT_LIST_HEAD(&h->offline_device_list);
8233 spin_lock_init(&h->lock);
8234 spin_lock_init(&h->offline_device_lock);
8235 spin_lock_init(&h->scan_lock);
8236 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8237 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8238
8239 /* Allocate and clear per-cpu variable lockup_detected */
8240 h->lockup_detected = alloc_percpu(u32);
8241 if (!h->lockup_detected) {
8242 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8243 rc = -ENOMEM;
8244 goto clean1; /* aer/h */
8245 }
8246 set_lockup_detected_for_all_cpus(h, 0);
8247
8248 rc = hpsa_pci_init(h);
8249 if (rc)
8250 goto clean2; /* lu, aer/h */
8251
8252 /* relies on h-> settings made by hpsa_pci_init, including
8253 * interrupt_mode h->intr */
8254 rc = hpsa_scsi_host_alloc(h);
8255 if (rc)
8256 goto clean2_5; /* pci, lu, aer/h */
8257
8258 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8259 h->ctlr = number_of_controllers;
8260 number_of_controllers++;
8261
8262 /* configure PCI DMA stuff */
8263 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8264 if (rc == 0) {
8265 dac = 1;
8266 } else {
8267 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8268 if (rc == 0) {
8269 dac = 0;
8270 } else {
8271 dev_err(&pdev->dev, "no suitable DMA available\n");
8272 goto clean3; /* shost, pci, lu, aer/h */
8273 }
8274 }
8275
8276 /* make sure the board interrupts are off */
8277 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8278
8279 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8280 if (rc)
8281 goto clean3; /* shost, pci, lu, aer/h */
8282 rc = hpsa_alloc_cmd_pool(h);
8283 if (rc)
8284 goto clean4; /* irq, shost, pci, lu, aer/h */
8285 rc = hpsa_alloc_sg_chain_blocks(h);
8286 if (rc)
8287 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8288 init_waitqueue_head(&h->scan_wait_queue);
8289 init_waitqueue_head(&h->abort_cmd_wait_queue);
8290 init_waitqueue_head(&h->event_sync_wait_queue);
8291 mutex_init(&h->reset_mutex);
8292 h->scan_finished = 1; /* no scan currently in progress */
8293
8294 pci_set_drvdata(pdev, h);
8295 h->ndevices = 0;
8296
8297 spin_lock_init(&h->devlock);
8298 rc = hpsa_put_ctlr_into_performant_mode(h);
8299 if (rc)
8300 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8301
8302 /* hook into SCSI subsystem */
8303 rc = hpsa_scsi_add_host(h);
8304 if (rc)
8305 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8306
8307 /* create the resubmit workqueue */
8308 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8309 if (!h->rescan_ctlr_wq) {
8310 rc = -ENOMEM;
8311 goto clean7;
8312 }
8313
8314 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8315 if (!h->resubmit_wq) {
8316 rc = -ENOMEM;
8317 goto clean7; /* aer/h */
8318 }
8319
8320 /*
8321 * At this point, the controller is ready to take commands.
8322 * Now, if reset_devices and the hard reset didn't work, try
8323 * the soft reset and see if that works.
8324 */
8325 if (try_soft_reset) {
8326
8327 /* This is kind of gross. We may or may not get a completion
8328 * from the soft reset command, and if we do, then the value
8329 * from the fifo may or may not be valid. So, we wait 10 secs
8330 * after the reset throwing away any completions we get during
8331 * that time. Unregister the interrupt handler and register
8332 * fake ones to scoop up any residual completions.
8333 */
8334 spin_lock_irqsave(&h->lock, flags);
8335 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8336 spin_unlock_irqrestore(&h->lock, flags);
8337 hpsa_free_irqs(h);
8338 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8339 hpsa_intx_discard_completions);
8340 if (rc) {
8341 dev_warn(&h->pdev->dev,
8342 "Failed to request_irq after soft reset.\n");
8343 /*
8344 * cannot goto clean7 or free_irqs will be called
8345 * again. Instead, do its work
8346 */
8347 hpsa_free_performant_mode(h); /* clean7 */
8348 hpsa_free_sg_chain_blocks(h); /* clean6 */
8349 hpsa_free_cmd_pool(h); /* clean5 */
8350 /*
8351 * skip hpsa_free_irqs(h) clean4 since that
8352 * was just called before request_irqs failed
8353 */
8354 goto clean3;
8355 }
8356
8357 rc = hpsa_kdump_soft_reset(h);
8358 if (rc)
8359 /* Neither hard nor soft reset worked, we're hosed. */
8360 goto clean7;
8361
8362 dev_info(&h->pdev->dev, "Board READY.\n");
8363 dev_info(&h->pdev->dev,
8364 "Waiting for stale completions to drain.\n");
8365 h->access.set_intr_mask(h, HPSA_INTR_ON);
8366 msleep(10000);
8367 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8368
8369 rc = controller_reset_failed(h->cfgtable);
8370 if (rc)
8371 dev_info(&h->pdev->dev,
8372 "Soft reset appears to have failed.\n");
8373
8374 /* since the controller's reset, we have to go back and re-init
8375 * everything. Easiest to just forget what we've done and do it
8376 * all over again.
8377 */
8378 hpsa_undo_allocations_after_kdump_soft_reset(h);
8379 try_soft_reset = 0;
8380 if (rc)
8381 /* don't goto clean, we already unallocated */
8382 return -ENODEV;
8383
8384 goto reinit_after_soft_reset;
8385 }
8386
8387 /* Enable Accelerated IO path at driver layer */
8388 h->acciopath_status = 1;
8389 /* Disable discovery polling.*/
8390 h->discovery_polling = 0;
8391
8392
8393 /* Turn the interrupts on so we can service requests */
8394 h->access.set_intr_mask(h, HPSA_INTR_ON);
8395
8396 hpsa_hba_inquiry(h);
8397
8398 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8399 if (!h->lastlogicals)
8400 dev_info(&h->pdev->dev,
8401 "Can't track change to report lun data\n");
8402
8403 /* Monitor the controller for firmware lockups */
8404 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8405 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8406 schedule_delayed_work(&h->monitor_ctlr_work,
8407 h->heartbeat_sample_interval);
8408 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8409 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8410 h->heartbeat_sample_interval);
8411 return 0;
8412
8413 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8414 hpsa_free_performant_mode(h);
8415 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8416 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8417 hpsa_free_sg_chain_blocks(h);
8418 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8419 hpsa_free_cmd_pool(h);
8420 clean4: /* irq, shost, pci, lu, aer/h */
8421 hpsa_free_irqs(h);
8422 clean3: /* shost, pci, lu, aer/h */
8423 scsi_host_put(h->scsi_host);
8424 h->scsi_host = NULL;
8425 clean2_5: /* pci, lu, aer/h */
8426 hpsa_free_pci_init(h);
8427 clean2: /* lu, aer/h */
8428 if (h->lockup_detected) {
8429 free_percpu(h->lockup_detected);
8430 h->lockup_detected = NULL;
8431 }
8432 clean1: /* wq/aer/h */
8433 if (h->resubmit_wq) {
8434 destroy_workqueue(h->resubmit_wq);
8435 h->resubmit_wq = NULL;
8436 }
8437 if (h->rescan_ctlr_wq) {
8438 destroy_workqueue(h->rescan_ctlr_wq);
8439 h->rescan_ctlr_wq = NULL;
8440 }
8441 kfree(h);
8442 return rc;
8443 }
8444
8445 static void hpsa_flush_cache(struct ctlr_info *h)
8446 {
8447 char *flush_buf;
8448 struct CommandList *c;
8449 int rc;
8450
8451 if (unlikely(lockup_detected(h)))
8452 return;
8453 flush_buf = kzalloc(4, GFP_KERNEL);
8454 if (!flush_buf)
8455 return;
8456
8457 c = cmd_alloc(h);
8458
8459 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8460 RAID_CTLR_LUNID, TYPE_CMD)) {
8461 goto out;
8462 }
8463 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8464 PCI_DMA_TODEVICE, NO_TIMEOUT);
8465 if (rc)
8466 goto out;
8467 if (c->err_info->CommandStatus != 0)
8468 out:
8469 dev_warn(&h->pdev->dev,
8470 "error flushing cache on controller\n");
8471 cmd_free(h, c);
8472 kfree(flush_buf);
8473 }
8474
8475 /* Make controller gather fresh report lun data each time we
8476 * send down a report luns request
8477 */
8478 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8479 {
8480 u32 *options;
8481 struct CommandList *c;
8482 int rc;
8483
8484 /* Don't bother trying to set diag options if locked up */
8485 if (unlikely(h->lockup_detected))
8486 return;
8487
8488 options = kzalloc(sizeof(*options), GFP_KERNEL);
8489 if (!options) {
8490 dev_err(&h->pdev->dev,
8491 "Error: failed to disable rld caching, during alloc.\n");
8492 return;
8493 }
8494
8495 c = cmd_alloc(h);
8496
8497 /* first, get the current diag options settings */
8498 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8499 RAID_CTLR_LUNID, TYPE_CMD))
8500 goto errout;
8501
8502 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8503 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8504 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8505 goto errout;
8506
8507 /* Now, set the bit for disabling the RLD caching */
8508 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8509
8510 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8511 RAID_CTLR_LUNID, TYPE_CMD))
8512 goto errout;
8513
8514 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8515 PCI_DMA_TODEVICE, NO_TIMEOUT);
8516 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8517 goto errout;
8518
8519 /* Now verify that it got set: */
8520 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8521 RAID_CTLR_LUNID, TYPE_CMD))
8522 goto errout;
8523
8524 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8525 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8526 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8527 goto errout;
8528
8529 if (*options && HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8530 goto out;
8531
8532 errout:
8533 dev_err(&h->pdev->dev,
8534 "Error: failed to disable report lun data caching.\n");
8535 out:
8536 cmd_free(h, c);
8537 kfree(options);
8538 }
8539
8540 static void hpsa_shutdown(struct pci_dev *pdev)
8541 {
8542 struct ctlr_info *h;
8543
8544 h = pci_get_drvdata(pdev);
8545 /* Turn board interrupts off and send the flush cache command
8546 * sendcmd will turn off interrupt, and send the flush...
8547 * To write all data in the battery backed cache to disks
8548 */
8549 hpsa_flush_cache(h);
8550 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8551 hpsa_free_irqs(h); /* init_one 4 */
8552 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8553 }
8554
8555 static void hpsa_free_device_info(struct ctlr_info *h)
8556 {
8557 int i;
8558
8559 for (i = 0; i < h->ndevices; i++) {
8560 kfree(h->dev[i]);
8561 h->dev[i] = NULL;
8562 }
8563 }
8564
8565 static void hpsa_remove_one(struct pci_dev *pdev)
8566 {
8567 struct ctlr_info *h;
8568 unsigned long flags;
8569
8570 if (pci_get_drvdata(pdev) == NULL) {
8571 dev_err(&pdev->dev, "unable to remove device\n");
8572 return;
8573 }
8574 h = pci_get_drvdata(pdev);
8575
8576 /* Get rid of any controller monitoring work items */
8577 spin_lock_irqsave(&h->lock, flags);
8578 h->remove_in_progress = 1;
8579 spin_unlock_irqrestore(&h->lock, flags);
8580 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8581 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8582 destroy_workqueue(h->rescan_ctlr_wq);
8583 destroy_workqueue(h->resubmit_wq);
8584
8585 /*
8586 * Call before disabling interrupts.
8587 * scsi_remove_host can trigger I/O operations especially
8588 * when multipath is enabled. There can be SYNCHRONIZE CACHE
8589 * operations which cannot complete and will hang the system.
8590 */
8591 if (h->scsi_host)
8592 scsi_remove_host(h->scsi_host); /* init_one 8 */
8593 /* includes hpsa_free_irqs - init_one 4 */
8594 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8595 hpsa_shutdown(pdev);
8596
8597 hpsa_free_device_info(h); /* scan */
8598
8599 kfree(h->hba_inquiry_data); /* init_one 10 */
8600 h->hba_inquiry_data = NULL; /* init_one 10 */
8601 hpsa_free_ioaccel2_sg_chain_blocks(h);
8602 hpsa_free_performant_mode(h); /* init_one 7 */
8603 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8604 hpsa_free_cmd_pool(h); /* init_one 5 */
8605 kfree(h->lastlogicals);
8606
8607 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8608
8609 scsi_host_put(h->scsi_host); /* init_one 3 */
8610 h->scsi_host = NULL; /* init_one 3 */
8611
8612 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8613 hpsa_free_pci_init(h); /* init_one 2.5 */
8614
8615 free_percpu(h->lockup_detected); /* init_one 2 */
8616 h->lockup_detected = NULL; /* init_one 2 */
8617 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
8618 kfree(h); /* init_one 1 */
8619 }
8620
8621 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8622 __attribute__((unused)) pm_message_t state)
8623 {
8624 return -ENOSYS;
8625 }
8626
8627 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8628 {
8629 return -ENOSYS;
8630 }
8631
8632 static struct pci_driver hpsa_pci_driver = {
8633 .name = HPSA,
8634 .probe = hpsa_init_one,
8635 .remove = hpsa_remove_one,
8636 .id_table = hpsa_pci_device_id, /* id_table */
8637 .shutdown = hpsa_shutdown,
8638 .suspend = hpsa_suspend,
8639 .resume = hpsa_resume,
8640 };
8641
8642 /* Fill in bucket_map[], given nsgs (the max number of
8643 * scatter gather elements supported) and bucket[],
8644 * which is an array of 8 integers. The bucket[] array
8645 * contains 8 different DMA transfer sizes (in 16
8646 * byte increments) which the controller uses to fetch
8647 * commands. This function fills in bucket_map[], which
8648 * maps a given number of scatter gather elements to one of
8649 * the 8 DMA transfer sizes. The point of it is to allow the
8650 * controller to only do as much DMA as needed to fetch the
8651 * command, with the DMA transfer size encoded in the lower
8652 * bits of the command address.
8653 */
8654 static void calc_bucket_map(int bucket[], int num_buckets,
8655 int nsgs, int min_blocks, u32 *bucket_map)
8656 {
8657 int i, j, b, size;
8658
8659 /* Note, bucket_map must have nsgs+1 entries. */
8660 for (i = 0; i <= nsgs; i++) {
8661 /* Compute size of a command with i SG entries */
8662 size = i + min_blocks;
8663 b = num_buckets; /* Assume the biggest bucket */
8664 /* Find the bucket that is just big enough */
8665 for (j = 0; j < num_buckets; j++) {
8666 if (bucket[j] >= size) {
8667 b = j;
8668 break;
8669 }
8670 }
8671 /* for a command with i SG entries, use bucket b. */
8672 bucket_map[i] = b;
8673 }
8674 }
8675
8676 /*
8677 * return -ENODEV on err, 0 on success (or no action)
8678 * allocates numerous items that must be freed later
8679 */
8680 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8681 {
8682 int i;
8683 unsigned long register_value;
8684 unsigned long transMethod = CFGTBL_Trans_Performant |
8685 (trans_support & CFGTBL_Trans_use_short_tags) |
8686 CFGTBL_Trans_enable_directed_msix |
8687 (trans_support & (CFGTBL_Trans_io_accel1 |
8688 CFGTBL_Trans_io_accel2));
8689 struct access_method access = SA5_performant_access;
8690
8691 /* This is a bit complicated. There are 8 registers on
8692 * the controller which we write to to tell it 8 different
8693 * sizes of commands which there may be. It's a way of
8694 * reducing the DMA done to fetch each command. Encoded into
8695 * each command's tag are 3 bits which communicate to the controller
8696 * which of the eight sizes that command fits within. The size of
8697 * each command depends on how many scatter gather entries there are.
8698 * Each SG entry requires 16 bytes. The eight registers are programmed
8699 * with the number of 16-byte blocks a command of that size requires.
8700 * The smallest command possible requires 5 such 16 byte blocks.
8701 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8702 * blocks. Note, this only extends to the SG entries contained
8703 * within the command block, and does not extend to chained blocks
8704 * of SG elements. bft[] contains the eight values we write to
8705 * the registers. They are not evenly distributed, but have more
8706 * sizes for small commands, and fewer sizes for larger commands.
8707 */
8708 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8709 #define MIN_IOACCEL2_BFT_ENTRY 5
8710 #define HPSA_IOACCEL2_HEADER_SZ 4
8711 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8712 13, 14, 15, 16, 17, 18, 19,
8713 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8714 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8715 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8716 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8717 16 * MIN_IOACCEL2_BFT_ENTRY);
8718 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8719 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8720 /* 5 = 1 s/g entry or 4k
8721 * 6 = 2 s/g entry or 8k
8722 * 8 = 4 s/g entry or 16k
8723 * 10 = 6 s/g entry or 24k
8724 */
8725
8726 /* If the controller supports either ioaccel method then
8727 * we can also use the RAID stack submit path that does not
8728 * perform the superfluous readl() after each command submission.
8729 */
8730 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8731 access = SA5_performant_access_no_read;
8732
8733 /* Controller spec: zero out this buffer. */
8734 for (i = 0; i < h->nreply_queues; i++)
8735 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8736
8737 bft[7] = SG_ENTRIES_IN_CMD + 4;
8738 calc_bucket_map(bft, ARRAY_SIZE(bft),
8739 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8740 for (i = 0; i < 8; i++)
8741 writel(bft[i], &h->transtable->BlockFetch[i]);
8742
8743 /* size of controller ring buffer */
8744 writel(h->max_commands, &h->transtable->RepQSize);
8745 writel(h->nreply_queues, &h->transtable->RepQCount);
8746 writel(0, &h->transtable->RepQCtrAddrLow32);
8747 writel(0, &h->transtable->RepQCtrAddrHigh32);
8748
8749 for (i = 0; i < h->nreply_queues; i++) {
8750 writel(0, &h->transtable->RepQAddr[i].upper);
8751 writel(h->reply_queue[i].busaddr,
8752 &h->transtable->RepQAddr[i].lower);
8753 }
8754
8755 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8756 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8757 /*
8758 * enable outbound interrupt coalescing in accelerator mode;
8759 */
8760 if (trans_support & CFGTBL_Trans_io_accel1) {
8761 access = SA5_ioaccel_mode1_access;
8762 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8763 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8764 } else {
8765 if (trans_support & CFGTBL_Trans_io_accel2) {
8766 access = SA5_ioaccel_mode2_access;
8767 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8768 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8769 }
8770 }
8771 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8772 if (hpsa_wait_for_mode_change_ack(h)) {
8773 dev_err(&h->pdev->dev,
8774 "performant mode problem - doorbell timeout\n");
8775 return -ENODEV;
8776 }
8777 register_value = readl(&(h->cfgtable->TransportActive));
8778 if (!(register_value & CFGTBL_Trans_Performant)) {
8779 dev_err(&h->pdev->dev,
8780 "performant mode problem - transport not active\n");
8781 return -ENODEV;
8782 }
8783 /* Change the access methods to the performant access methods */
8784 h->access = access;
8785 h->transMethod = transMethod;
8786
8787 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8788 (trans_support & CFGTBL_Trans_io_accel2)))
8789 return 0;
8790
8791 if (trans_support & CFGTBL_Trans_io_accel1) {
8792 /* Set up I/O accelerator mode */
8793 for (i = 0; i < h->nreply_queues; i++) {
8794 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8795 h->reply_queue[i].current_entry =
8796 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8797 }
8798 bft[7] = h->ioaccel_maxsg + 8;
8799 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8800 h->ioaccel1_blockFetchTable);
8801
8802 /* initialize all reply queue entries to unused */
8803 for (i = 0; i < h->nreply_queues; i++)
8804 memset(h->reply_queue[i].head,
8805 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8806 h->reply_queue_size);
8807
8808 /* set all the constant fields in the accelerator command
8809 * frames once at init time to save CPU cycles later.
8810 */
8811 for (i = 0; i < h->nr_cmds; i++) {
8812 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8813
8814 cp->function = IOACCEL1_FUNCTION_SCSIIO;
8815 cp->err_info = (u32) (h->errinfo_pool_dhandle +
8816 (i * sizeof(struct ErrorInfo)));
8817 cp->err_info_len = sizeof(struct ErrorInfo);
8818 cp->sgl_offset = IOACCEL1_SGLOFFSET;
8819 cp->host_context_flags =
8820 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8821 cp->timeout_sec = 0;
8822 cp->ReplyQueue = 0;
8823 cp->tag =
8824 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8825 cp->host_addr =
8826 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8827 (i * sizeof(struct io_accel1_cmd)));
8828 }
8829 } else if (trans_support & CFGTBL_Trans_io_accel2) {
8830 u64 cfg_offset, cfg_base_addr_index;
8831 u32 bft2_offset, cfg_base_addr;
8832 int rc;
8833
8834 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8835 &cfg_base_addr_index, &cfg_offset);
8836 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8837 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8838 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8839 4, h->ioaccel2_blockFetchTable);
8840 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
8841 BUILD_BUG_ON(offsetof(struct CfgTable,
8842 io_accel_request_size_offset) != 0xb8);
8843 h->ioaccel2_bft2_regs =
8844 remap_pci_mem(pci_resource_start(h->pdev,
8845 cfg_base_addr_index) +
8846 cfg_offset + bft2_offset,
8847 ARRAY_SIZE(bft2) *
8848 sizeof(*h->ioaccel2_bft2_regs));
8849 for (i = 0; i < ARRAY_SIZE(bft2); i++)
8850 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
8851 }
8852 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8853 if (hpsa_wait_for_mode_change_ack(h)) {
8854 dev_err(&h->pdev->dev,
8855 "performant mode problem - enabling ioaccel mode\n");
8856 return -ENODEV;
8857 }
8858 return 0;
8859 }
8860
8861 /* Free ioaccel1 mode command blocks and block fetch table */
8862 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8863 {
8864 if (h->ioaccel_cmd_pool) {
8865 pci_free_consistent(h->pdev,
8866 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8867 h->ioaccel_cmd_pool,
8868 h->ioaccel_cmd_pool_dhandle);
8869 h->ioaccel_cmd_pool = NULL;
8870 h->ioaccel_cmd_pool_dhandle = 0;
8871 }
8872 kfree(h->ioaccel1_blockFetchTable);
8873 h->ioaccel1_blockFetchTable = NULL;
8874 }
8875
8876 /* Allocate ioaccel1 mode command blocks and block fetch table */
8877 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8878 {
8879 h->ioaccel_maxsg =
8880 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8881 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
8882 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
8883
8884 /* Command structures must be aligned on a 128-byte boundary
8885 * because the 7 lower bits of the address are used by the
8886 * hardware.
8887 */
8888 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
8889 IOACCEL1_COMMANDLIST_ALIGNMENT);
8890 h->ioaccel_cmd_pool =
8891 pci_alloc_consistent(h->pdev,
8892 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8893 &(h->ioaccel_cmd_pool_dhandle));
8894
8895 h->ioaccel1_blockFetchTable =
8896 kmalloc(((h->ioaccel_maxsg + 1) *
8897 sizeof(u32)), GFP_KERNEL);
8898
8899 if ((h->ioaccel_cmd_pool == NULL) ||
8900 (h->ioaccel1_blockFetchTable == NULL))
8901 goto clean_up;
8902
8903 memset(h->ioaccel_cmd_pool, 0,
8904 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
8905 return 0;
8906
8907 clean_up:
8908 hpsa_free_ioaccel1_cmd_and_bft(h);
8909 return -ENOMEM;
8910 }
8911
8912 /* Free ioaccel2 mode command blocks and block fetch table */
8913 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8914 {
8915 hpsa_free_ioaccel2_sg_chain_blocks(h);
8916
8917 if (h->ioaccel2_cmd_pool) {
8918 pci_free_consistent(h->pdev,
8919 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8920 h->ioaccel2_cmd_pool,
8921 h->ioaccel2_cmd_pool_dhandle);
8922 h->ioaccel2_cmd_pool = NULL;
8923 h->ioaccel2_cmd_pool_dhandle = 0;
8924 }
8925 kfree(h->ioaccel2_blockFetchTable);
8926 h->ioaccel2_blockFetchTable = NULL;
8927 }
8928
8929 /* Allocate ioaccel2 mode command blocks and block fetch table */
8930 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8931 {
8932 int rc;
8933
8934 /* Allocate ioaccel2 mode command blocks and block fetch table */
8935
8936 h->ioaccel_maxsg =
8937 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8938 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
8939 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
8940
8941 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
8942 IOACCEL2_COMMANDLIST_ALIGNMENT);
8943 h->ioaccel2_cmd_pool =
8944 pci_alloc_consistent(h->pdev,
8945 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8946 &(h->ioaccel2_cmd_pool_dhandle));
8947
8948 h->ioaccel2_blockFetchTable =
8949 kmalloc(((h->ioaccel_maxsg + 1) *
8950 sizeof(u32)), GFP_KERNEL);
8951
8952 if ((h->ioaccel2_cmd_pool == NULL) ||
8953 (h->ioaccel2_blockFetchTable == NULL)) {
8954 rc = -ENOMEM;
8955 goto clean_up;
8956 }
8957
8958 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
8959 if (rc)
8960 goto clean_up;
8961
8962 memset(h->ioaccel2_cmd_pool, 0,
8963 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
8964 return 0;
8965
8966 clean_up:
8967 hpsa_free_ioaccel2_cmd_and_bft(h);
8968 return rc;
8969 }
8970
8971 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
8972 static void hpsa_free_performant_mode(struct ctlr_info *h)
8973 {
8974 kfree(h->blockFetchTable);
8975 h->blockFetchTable = NULL;
8976 hpsa_free_reply_queues(h);
8977 hpsa_free_ioaccel1_cmd_and_bft(h);
8978 hpsa_free_ioaccel2_cmd_and_bft(h);
8979 }
8980
8981 /* return -ENODEV on error, 0 on success (or no action)
8982 * allocates numerous items that must be freed later
8983 */
8984 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
8985 {
8986 u32 trans_support;
8987 unsigned long transMethod = CFGTBL_Trans_Performant |
8988 CFGTBL_Trans_use_short_tags;
8989 int i, rc;
8990
8991 if (hpsa_simple_mode)
8992 return 0;
8993
8994 trans_support = readl(&(h->cfgtable->TransportSupport));
8995 if (!(trans_support & PERFORMANT_MODE))
8996 return 0;
8997
8998 /* Check for I/O accelerator mode support */
8999 if (trans_support & CFGTBL_Trans_io_accel1) {
9000 transMethod |= CFGTBL_Trans_io_accel1 |
9001 CFGTBL_Trans_enable_directed_msix;
9002 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9003 if (rc)
9004 return rc;
9005 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9006 transMethod |= CFGTBL_Trans_io_accel2 |
9007 CFGTBL_Trans_enable_directed_msix;
9008 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9009 if (rc)
9010 return rc;
9011 }
9012
9013 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
9014 hpsa_get_max_perf_mode_cmds(h);
9015 /* Performant mode ring buffer and supporting data structures */
9016 h->reply_queue_size = h->max_commands * sizeof(u64);
9017
9018 for (i = 0; i < h->nreply_queues; i++) {
9019 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9020 h->reply_queue_size,
9021 &(h->reply_queue[i].busaddr));
9022 if (!h->reply_queue[i].head) {
9023 rc = -ENOMEM;
9024 goto clean1; /* rq, ioaccel */
9025 }
9026 h->reply_queue[i].size = h->max_commands;
9027 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9028 h->reply_queue[i].current_entry = 0;
9029 }
9030
9031 /* Need a block fetch table for performant mode */
9032 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9033 sizeof(u32)), GFP_KERNEL);
9034 if (!h->blockFetchTable) {
9035 rc = -ENOMEM;
9036 goto clean1; /* rq, ioaccel */
9037 }
9038
9039 rc = hpsa_enter_performant_mode(h, trans_support);
9040 if (rc)
9041 goto clean2; /* bft, rq, ioaccel */
9042 return 0;
9043
9044 clean2: /* bft, rq, ioaccel */
9045 kfree(h->blockFetchTable);
9046 h->blockFetchTable = NULL;
9047 clean1: /* rq, ioaccel */
9048 hpsa_free_reply_queues(h);
9049 hpsa_free_ioaccel1_cmd_and_bft(h);
9050 hpsa_free_ioaccel2_cmd_and_bft(h);
9051 return rc;
9052 }
9053
9054 static int is_accelerated_cmd(struct CommandList *c)
9055 {
9056 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9057 }
9058
9059 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9060 {
9061 struct CommandList *c = NULL;
9062 int i, accel_cmds_out;
9063 int refcount;
9064
9065 do { /* wait for all outstanding ioaccel commands to drain out */
9066 accel_cmds_out = 0;
9067 for (i = 0; i < h->nr_cmds; i++) {
9068 c = h->cmd_pool + i;
9069 refcount = atomic_inc_return(&c->refcount);
9070 if (refcount > 1) /* Command is allocated */
9071 accel_cmds_out += is_accelerated_cmd(c);
9072 cmd_free(h, c);
9073 }
9074 if (accel_cmds_out <= 0)
9075 break;
9076 msleep(100);
9077 } while (1);
9078 }
9079
9080 /*
9081 * This is it. Register the PCI driver information for the cards we control
9082 * the OS will call our registered routines when it finds one of our cards.
9083 */
9084 static int __init hpsa_init(void)
9085 {
9086 return pci_register_driver(&hpsa_pci_driver);
9087 }
9088
9089 static void __exit hpsa_cleanup(void)
9090 {
9091 pci_unregister_driver(&hpsa_pci_driver);
9092 }
9093
9094 static void __attribute__((unused)) verify_offsets(void)
9095 {
9096 #define VERIFY_OFFSET(member, offset) \
9097 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9098
9099 VERIFY_OFFSET(structure_size, 0);
9100 VERIFY_OFFSET(volume_blk_size, 4);
9101 VERIFY_OFFSET(volume_blk_cnt, 8);
9102 VERIFY_OFFSET(phys_blk_shift, 16);
9103 VERIFY_OFFSET(parity_rotation_shift, 17);
9104 VERIFY_OFFSET(strip_size, 18);
9105 VERIFY_OFFSET(disk_starting_blk, 20);
9106 VERIFY_OFFSET(disk_blk_cnt, 28);
9107 VERIFY_OFFSET(data_disks_per_row, 36);
9108 VERIFY_OFFSET(metadata_disks_per_row, 38);
9109 VERIFY_OFFSET(row_cnt, 40);
9110 VERIFY_OFFSET(layout_map_count, 42);
9111 VERIFY_OFFSET(flags, 44);
9112 VERIFY_OFFSET(dekindex, 46);
9113 /* VERIFY_OFFSET(reserved, 48 */
9114 VERIFY_OFFSET(data, 64);
9115
9116 #undef VERIFY_OFFSET
9117
9118 #define VERIFY_OFFSET(member, offset) \
9119 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9120
9121 VERIFY_OFFSET(IU_type, 0);
9122 VERIFY_OFFSET(direction, 1);
9123 VERIFY_OFFSET(reply_queue, 2);
9124 /* VERIFY_OFFSET(reserved1, 3); */
9125 VERIFY_OFFSET(scsi_nexus, 4);
9126 VERIFY_OFFSET(Tag, 8);
9127 VERIFY_OFFSET(cdb, 16);
9128 VERIFY_OFFSET(cciss_lun, 32);
9129 VERIFY_OFFSET(data_len, 40);
9130 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9131 VERIFY_OFFSET(sg_count, 45);
9132 /* VERIFY_OFFSET(reserved3 */
9133 VERIFY_OFFSET(err_ptr, 48);
9134 VERIFY_OFFSET(err_len, 56);
9135 /* VERIFY_OFFSET(reserved4 */
9136 VERIFY_OFFSET(sg, 64);
9137
9138 #undef VERIFY_OFFSET
9139
9140 #define VERIFY_OFFSET(member, offset) \
9141 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9142
9143 VERIFY_OFFSET(dev_handle, 0x00);
9144 VERIFY_OFFSET(reserved1, 0x02);
9145 VERIFY_OFFSET(function, 0x03);
9146 VERIFY_OFFSET(reserved2, 0x04);
9147 VERIFY_OFFSET(err_info, 0x0C);
9148 VERIFY_OFFSET(reserved3, 0x10);
9149 VERIFY_OFFSET(err_info_len, 0x12);
9150 VERIFY_OFFSET(reserved4, 0x13);
9151 VERIFY_OFFSET(sgl_offset, 0x14);
9152 VERIFY_OFFSET(reserved5, 0x15);
9153 VERIFY_OFFSET(transfer_len, 0x1C);
9154 VERIFY_OFFSET(reserved6, 0x20);
9155 VERIFY_OFFSET(io_flags, 0x24);
9156 VERIFY_OFFSET(reserved7, 0x26);
9157 VERIFY_OFFSET(LUN, 0x34);
9158 VERIFY_OFFSET(control, 0x3C);
9159 VERIFY_OFFSET(CDB, 0x40);
9160 VERIFY_OFFSET(reserved8, 0x50);
9161 VERIFY_OFFSET(host_context_flags, 0x60);
9162 VERIFY_OFFSET(timeout_sec, 0x62);
9163 VERIFY_OFFSET(ReplyQueue, 0x64);
9164 VERIFY_OFFSET(reserved9, 0x65);
9165 VERIFY_OFFSET(tag, 0x68);
9166 VERIFY_OFFSET(host_addr, 0x70);
9167 VERIFY_OFFSET(CISS_LUN, 0x78);
9168 VERIFY_OFFSET(SG, 0x78 + 8);
9169 #undef VERIFY_OFFSET
9170 }
9171
9172 module_init(hpsa_init);
9173 module_exit(hpsa_cleanup);
Michael's Linux tree.