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1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
41 #include <linux/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
58 #include <asm/io.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
61
62 #include "libata.h"
63
64 static unsigned int ata_dev_init_params(struct ata_device *dev,
65 u16 heads, u16 sectors);
66 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
67 static void ata_dev_xfermask(struct ata_device *dev);
68
69 static unsigned int ata_unique_id = 1;
70 static struct workqueue_struct *ata_wq;
71
72 int atapi_enabled = 1;
73 module_param(atapi_enabled, int, 0444);
74 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
75
76 int atapi_dmadir = 0;
77 module_param(atapi_dmadir, int, 0444);
78 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
79
80 int libata_fua = 0;
81 module_param_named(fua, libata_fua, int, 0444);
82 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
83
84 MODULE_AUTHOR("Jeff Garzik");
85 MODULE_DESCRIPTION("Library module for ATA devices");
86 MODULE_LICENSE("GPL");
87 MODULE_VERSION(DRV_VERSION);
88
89
90 /**
91 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
92 * @tf: Taskfile to convert
93 * @fis: Buffer into which data will output
94 * @pmp: Port multiplier port
95 *
96 * Converts a standard ATA taskfile to a Serial ATA
97 * FIS structure (Register - Host to Device).
98 *
99 * LOCKING:
100 * Inherited from caller.
101 */
102
103 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
104 {
105 fis[0] = 0x27; /* Register - Host to Device FIS */
106 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
107 bit 7 indicates Command FIS */
108 fis[2] = tf->command;
109 fis[3] = tf->feature;
110
111 fis[4] = tf->lbal;
112 fis[5] = tf->lbam;
113 fis[6] = tf->lbah;
114 fis[7] = tf->device;
115
116 fis[8] = tf->hob_lbal;
117 fis[9] = tf->hob_lbam;
118 fis[10] = tf->hob_lbah;
119 fis[11] = tf->hob_feature;
120
121 fis[12] = tf->nsect;
122 fis[13] = tf->hob_nsect;
123 fis[14] = 0;
124 fis[15] = tf->ctl;
125
126 fis[16] = 0;
127 fis[17] = 0;
128 fis[18] = 0;
129 fis[19] = 0;
130 }
131
132 /**
133 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
134 * @fis: Buffer from which data will be input
135 * @tf: Taskfile to output
136 *
137 * Converts a serial ATA FIS structure to a standard ATA taskfile.
138 *
139 * LOCKING:
140 * Inherited from caller.
141 */
142
143 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
144 {
145 tf->command = fis[2]; /* status */
146 tf->feature = fis[3]; /* error */
147
148 tf->lbal = fis[4];
149 tf->lbam = fis[5];
150 tf->lbah = fis[6];
151 tf->device = fis[7];
152
153 tf->hob_lbal = fis[8];
154 tf->hob_lbam = fis[9];
155 tf->hob_lbah = fis[10];
156
157 tf->nsect = fis[12];
158 tf->hob_nsect = fis[13];
159 }
160
161 static const u8 ata_rw_cmds[] = {
162 /* pio multi */
163 ATA_CMD_READ_MULTI,
164 ATA_CMD_WRITE_MULTI,
165 ATA_CMD_READ_MULTI_EXT,
166 ATA_CMD_WRITE_MULTI_EXT,
167 0,
168 0,
169 0,
170 ATA_CMD_WRITE_MULTI_FUA_EXT,
171 /* pio */
172 ATA_CMD_PIO_READ,
173 ATA_CMD_PIO_WRITE,
174 ATA_CMD_PIO_READ_EXT,
175 ATA_CMD_PIO_WRITE_EXT,
176 0,
177 0,
178 0,
179 0,
180 /* dma */
181 ATA_CMD_READ,
182 ATA_CMD_WRITE,
183 ATA_CMD_READ_EXT,
184 ATA_CMD_WRITE_EXT,
185 0,
186 0,
187 0,
188 ATA_CMD_WRITE_FUA_EXT
189 };
190
191 /**
192 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
193 * @qc: command to examine and configure
194 *
195 * Examine the device configuration and tf->flags to calculate
196 * the proper read/write commands and protocol to use.
197 *
198 * LOCKING:
199 * caller.
200 */
201 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
202 {
203 struct ata_taskfile *tf = &qc->tf;
204 struct ata_device *dev = qc->dev;
205 u8 cmd;
206
207 int index, fua, lba48, write;
208
209 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
210 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
211 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
212
213 if (dev->flags & ATA_DFLAG_PIO) {
214 tf->protocol = ATA_PROT_PIO;
215 index = dev->multi_count ? 0 : 8;
216 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
217 /* Unable to use DMA due to host limitation */
218 tf->protocol = ATA_PROT_PIO;
219 index = dev->multi_count ? 0 : 8;
220 } else {
221 tf->protocol = ATA_PROT_DMA;
222 index = 16;
223 }
224
225 cmd = ata_rw_cmds[index + fua + lba48 + write];
226 if (cmd) {
227 tf->command = cmd;
228 return 0;
229 }
230 return -1;
231 }
232
233 /**
234 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
235 * @pio_mask: pio_mask
236 * @mwdma_mask: mwdma_mask
237 * @udma_mask: udma_mask
238 *
239 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
240 * unsigned int xfer_mask.
241 *
242 * LOCKING:
243 * None.
244 *
245 * RETURNS:
246 * Packed xfer_mask.
247 */
248 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
249 unsigned int mwdma_mask,
250 unsigned int udma_mask)
251 {
252 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
253 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
254 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
255 }
256
257 /**
258 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
259 * @xfer_mask: xfer_mask to unpack
260 * @pio_mask: resulting pio_mask
261 * @mwdma_mask: resulting mwdma_mask
262 * @udma_mask: resulting udma_mask
263 *
264 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
265 * Any NULL distination masks will be ignored.
266 */
267 static void ata_unpack_xfermask(unsigned int xfer_mask,
268 unsigned int *pio_mask,
269 unsigned int *mwdma_mask,
270 unsigned int *udma_mask)
271 {
272 if (pio_mask)
273 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
274 if (mwdma_mask)
275 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
276 if (udma_mask)
277 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
278 }
279
280 static const struct ata_xfer_ent {
281 int shift, bits;
282 u8 base;
283 } ata_xfer_tbl[] = {
284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
285 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
286 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
287 { -1, },
288 };
289
290 /**
291 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
292 * @xfer_mask: xfer_mask of interest
293 *
294 * Return matching XFER_* value for @xfer_mask. Only the highest
295 * bit of @xfer_mask is considered.
296 *
297 * LOCKING:
298 * None.
299 *
300 * RETURNS:
301 * Matching XFER_* value, 0 if no match found.
302 */
303 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
304 {
305 int highbit = fls(xfer_mask) - 1;
306 const struct ata_xfer_ent *ent;
307
308 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
309 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
310 return ent->base + highbit - ent->shift;
311 return 0;
312 }
313
314 /**
315 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
316 * @xfer_mode: XFER_* of interest
317 *
318 * Return matching xfer_mask for @xfer_mode.
319 *
320 * LOCKING:
321 * None.
322 *
323 * RETURNS:
324 * Matching xfer_mask, 0 if no match found.
325 */
326 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
327 {
328 const struct ata_xfer_ent *ent;
329
330 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
331 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
332 return 1 << (ent->shift + xfer_mode - ent->base);
333 return 0;
334 }
335
336 /**
337 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
338 * @xfer_mode: XFER_* of interest
339 *
340 * Return matching xfer_shift for @xfer_mode.
341 *
342 * LOCKING:
343 * None.
344 *
345 * RETURNS:
346 * Matching xfer_shift, -1 if no match found.
347 */
348 static int ata_xfer_mode2shift(unsigned int xfer_mode)
349 {
350 const struct ata_xfer_ent *ent;
351
352 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
353 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
354 return ent->shift;
355 return -1;
356 }
357
358 /**
359 * ata_mode_string - convert xfer_mask to string
360 * @xfer_mask: mask of bits supported; only highest bit counts.
361 *
362 * Determine string which represents the highest speed
363 * (highest bit in @modemask).
364 *
365 * LOCKING:
366 * None.
367 *
368 * RETURNS:
369 * Constant C string representing highest speed listed in
370 * @mode_mask, or the constant C string "<n/a>".
371 */
372 static const char *ata_mode_string(unsigned int xfer_mask)
373 {
374 static const char * const xfer_mode_str[] = {
375 "PIO0",
376 "PIO1",
377 "PIO2",
378 "PIO3",
379 "PIO4",
380 "MWDMA0",
381 "MWDMA1",
382 "MWDMA2",
383 "UDMA/16",
384 "UDMA/25",
385 "UDMA/33",
386 "UDMA/44",
387 "UDMA/66",
388 "UDMA/100",
389 "UDMA/133",
390 "UDMA7",
391 };
392 int highbit;
393
394 highbit = fls(xfer_mask) - 1;
395 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
396 return xfer_mode_str[highbit];
397 return "<n/a>";
398 }
399
400 static const char *sata_spd_string(unsigned int spd)
401 {
402 static const char * const spd_str[] = {
403 "1.5 Gbps",
404 "3.0 Gbps",
405 };
406
407 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
408 return "<unknown>";
409 return spd_str[spd - 1];
410 }
411
412 void ata_dev_disable(struct ata_device *dev)
413 {
414 if (ata_dev_enabled(dev)) {
415 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
416 dev->class++;
417 }
418 }
419
420 /**
421 * ata_pio_devchk - PATA device presence detection
422 * @ap: ATA channel to examine
423 * @device: Device to examine (starting at zero)
424 *
425 * This technique was originally described in
426 * Hale Landis's ATADRVR (www.ata-atapi.com), and
427 * later found its way into the ATA/ATAPI spec.
428 *
429 * Write a pattern to the ATA shadow registers,
430 * and if a device is present, it will respond by
431 * correctly storing and echoing back the
432 * ATA shadow register contents.
433 *
434 * LOCKING:
435 * caller.
436 */
437
438 static unsigned int ata_pio_devchk(struct ata_port *ap,
439 unsigned int device)
440 {
441 struct ata_ioports *ioaddr = &ap->ioaddr;
442 u8 nsect, lbal;
443
444 ap->ops->dev_select(ap, device);
445
446 outb(0x55, ioaddr->nsect_addr);
447 outb(0xaa, ioaddr->lbal_addr);
448
449 outb(0xaa, ioaddr->nsect_addr);
450 outb(0x55, ioaddr->lbal_addr);
451
452 outb(0x55, ioaddr->nsect_addr);
453 outb(0xaa, ioaddr->lbal_addr);
454
455 nsect = inb(ioaddr->nsect_addr);
456 lbal = inb(ioaddr->lbal_addr);
457
458 if ((nsect == 0x55) && (lbal == 0xaa))
459 return 1; /* we found a device */
460
461 return 0; /* nothing found */
462 }
463
464 /**
465 * ata_mmio_devchk - PATA device presence detection
466 * @ap: ATA channel to examine
467 * @device: Device to examine (starting at zero)
468 *
469 * This technique was originally described in
470 * Hale Landis's ATADRVR (www.ata-atapi.com), and
471 * later found its way into the ATA/ATAPI spec.
472 *
473 * Write a pattern to the ATA shadow registers,
474 * and if a device is present, it will respond by
475 * correctly storing and echoing back the
476 * ATA shadow register contents.
477 *
478 * LOCKING:
479 * caller.
480 */
481
482 static unsigned int ata_mmio_devchk(struct ata_port *ap,
483 unsigned int device)
484 {
485 struct ata_ioports *ioaddr = &ap->ioaddr;
486 u8 nsect, lbal;
487
488 ap->ops->dev_select(ap, device);
489
490 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
491 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
492
493 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
494 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
495
496 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
497 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
498
499 nsect = readb((void __iomem *) ioaddr->nsect_addr);
500 lbal = readb((void __iomem *) ioaddr->lbal_addr);
501
502 if ((nsect == 0x55) && (lbal == 0xaa))
503 return 1; /* we found a device */
504
505 return 0; /* nothing found */
506 }
507
508 /**
509 * ata_devchk - PATA device presence detection
510 * @ap: ATA channel to examine
511 * @device: Device to examine (starting at zero)
512 *
513 * Dispatch ATA device presence detection, depending
514 * on whether we are using PIO or MMIO to talk to the
515 * ATA shadow registers.
516 *
517 * LOCKING:
518 * caller.
519 */
520
521 static unsigned int ata_devchk(struct ata_port *ap,
522 unsigned int device)
523 {
524 if (ap->flags & ATA_FLAG_MMIO)
525 return ata_mmio_devchk(ap, device);
526 return ata_pio_devchk(ap, device);
527 }
528
529 /**
530 * ata_dev_classify - determine device type based on ATA-spec signature
531 * @tf: ATA taskfile register set for device to be identified
532 *
533 * Determine from taskfile register contents whether a device is
534 * ATA or ATAPI, as per "Signature and persistence" section
535 * of ATA/PI spec (volume 1, sect 5.14).
536 *
537 * LOCKING:
538 * None.
539 *
540 * RETURNS:
541 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
542 * the event of failure.
543 */
544
545 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
546 {
547 /* Apple's open source Darwin code hints that some devices only
548 * put a proper signature into the LBA mid/high registers,
549 * So, we only check those. It's sufficient for uniqueness.
550 */
551
552 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
553 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
554 DPRINTK("found ATA device by sig\n");
555 return ATA_DEV_ATA;
556 }
557
558 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
559 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
560 DPRINTK("found ATAPI device by sig\n");
561 return ATA_DEV_ATAPI;
562 }
563
564 DPRINTK("unknown device\n");
565 return ATA_DEV_UNKNOWN;
566 }
567
568 /**
569 * ata_dev_try_classify - Parse returned ATA device signature
570 * @ap: ATA channel to examine
571 * @device: Device to examine (starting at zero)
572 * @r_err: Value of error register on completion
573 *
574 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
575 * an ATA/ATAPI-defined set of values is placed in the ATA
576 * shadow registers, indicating the results of device detection
577 * and diagnostics.
578 *
579 * Select the ATA device, and read the values from the ATA shadow
580 * registers. Then parse according to the Error register value,
581 * and the spec-defined values examined by ata_dev_classify().
582 *
583 * LOCKING:
584 * caller.
585 *
586 * RETURNS:
587 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
588 */
589
590 static unsigned int
591 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
592 {
593 struct ata_taskfile tf;
594 unsigned int class;
595 u8 err;
596
597 ap->ops->dev_select(ap, device);
598
599 memset(&tf, 0, sizeof(tf));
600
601 ap->ops->tf_read(ap, &tf);
602 err = tf.feature;
603 if (r_err)
604 *r_err = err;
605
606 /* see if device passed diags */
607 if (err == 1)
608 /* do nothing */ ;
609 else if ((device == 0) && (err == 0x81))
610 /* do nothing */ ;
611 else
612 return ATA_DEV_NONE;
613
614 /* determine if device is ATA or ATAPI */
615 class = ata_dev_classify(&tf);
616
617 if (class == ATA_DEV_UNKNOWN)
618 return ATA_DEV_NONE;
619 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
620 return ATA_DEV_NONE;
621 return class;
622 }
623
624 /**
625 * ata_id_string - Convert IDENTIFY DEVICE page into string
626 * @id: IDENTIFY DEVICE results we will examine
627 * @s: string into which data is output
628 * @ofs: offset into identify device page
629 * @len: length of string to return. must be an even number.
630 *
631 * The strings in the IDENTIFY DEVICE page are broken up into
632 * 16-bit chunks. Run through the string, and output each
633 * 8-bit chunk linearly, regardless of platform.
634 *
635 * LOCKING:
636 * caller.
637 */
638
639 void ata_id_string(const u16 *id, unsigned char *s,
640 unsigned int ofs, unsigned int len)
641 {
642 unsigned int c;
643
644 while (len > 0) {
645 c = id[ofs] >> 8;
646 *s = c;
647 s++;
648
649 c = id[ofs] & 0xff;
650 *s = c;
651 s++;
652
653 ofs++;
654 len -= 2;
655 }
656 }
657
658 /**
659 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
660 * @id: IDENTIFY DEVICE results we will examine
661 * @s: string into which data is output
662 * @ofs: offset into identify device page
663 * @len: length of string to return. must be an odd number.
664 *
665 * This function is identical to ata_id_string except that it
666 * trims trailing spaces and terminates the resulting string with
667 * null. @len must be actual maximum length (even number) + 1.
668 *
669 * LOCKING:
670 * caller.
671 */
672 void ata_id_c_string(const u16 *id, unsigned char *s,
673 unsigned int ofs, unsigned int len)
674 {
675 unsigned char *p;
676
677 WARN_ON(!(len & 1));
678
679 ata_id_string(id, s, ofs, len - 1);
680
681 p = s + strnlen(s, len - 1);
682 while (p > s && p[-1] == ' ')
683 p--;
684 *p = '\0';
685 }
686
687 static u64 ata_id_n_sectors(const u16 *id)
688 {
689 if (ata_id_has_lba(id)) {
690 if (ata_id_has_lba48(id))
691 return ata_id_u64(id, 100);
692 else
693 return ata_id_u32(id, 60);
694 } else {
695 if (ata_id_current_chs_valid(id))
696 return ata_id_u32(id, 57);
697 else
698 return id[1] * id[3] * id[6];
699 }
700 }
701
702 /**
703 * ata_noop_dev_select - Select device 0/1 on ATA bus
704 * @ap: ATA channel to manipulate
705 * @device: ATA device (numbered from zero) to select
706 *
707 * This function performs no actual function.
708 *
709 * May be used as the dev_select() entry in ata_port_operations.
710 *
711 * LOCKING:
712 * caller.
713 */
714 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
715 {
716 }
717
718
719 /**
720 * ata_std_dev_select - Select device 0/1 on ATA bus
721 * @ap: ATA channel to manipulate
722 * @device: ATA device (numbered from zero) to select
723 *
724 * Use the method defined in the ATA specification to
725 * make either device 0, or device 1, active on the
726 * ATA channel. Works with both PIO and MMIO.
727 *
728 * May be used as the dev_select() entry in ata_port_operations.
729 *
730 * LOCKING:
731 * caller.
732 */
733
734 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
735 {
736 u8 tmp;
737
738 if (device == 0)
739 tmp = ATA_DEVICE_OBS;
740 else
741 tmp = ATA_DEVICE_OBS | ATA_DEV1;
742
743 if (ap->flags & ATA_FLAG_MMIO) {
744 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
745 } else {
746 outb(tmp, ap->ioaddr.device_addr);
747 }
748 ata_pause(ap); /* needed; also flushes, for mmio */
749 }
750
751 /**
752 * ata_dev_select - Select device 0/1 on ATA bus
753 * @ap: ATA channel to manipulate
754 * @device: ATA device (numbered from zero) to select
755 * @wait: non-zero to wait for Status register BSY bit to clear
756 * @can_sleep: non-zero if context allows sleeping
757 *
758 * Use the method defined in the ATA specification to
759 * make either device 0, or device 1, active on the
760 * ATA channel.
761 *
762 * This is a high-level version of ata_std_dev_select(),
763 * which additionally provides the services of inserting
764 * the proper pauses and status polling, where needed.
765 *
766 * LOCKING:
767 * caller.
768 */
769
770 void ata_dev_select(struct ata_port *ap, unsigned int device,
771 unsigned int wait, unsigned int can_sleep)
772 {
773 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
774 ap->id, device, wait);
775
776 if (wait)
777 ata_wait_idle(ap);
778
779 ap->ops->dev_select(ap, device);
780
781 if (wait) {
782 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
783 msleep(150);
784 ata_wait_idle(ap);
785 }
786 }
787
788 /**
789 * ata_dump_id - IDENTIFY DEVICE info debugging output
790 * @id: IDENTIFY DEVICE page to dump
791 *
792 * Dump selected 16-bit words from the given IDENTIFY DEVICE
793 * page.
794 *
795 * LOCKING:
796 * caller.
797 */
798
799 static inline void ata_dump_id(const u16 *id)
800 {
801 DPRINTK("49==0x%04x "
802 "53==0x%04x "
803 "63==0x%04x "
804 "64==0x%04x "
805 "75==0x%04x \n",
806 id[49],
807 id[53],
808 id[63],
809 id[64],
810 id[75]);
811 DPRINTK("80==0x%04x "
812 "81==0x%04x "
813 "82==0x%04x "
814 "83==0x%04x "
815 "84==0x%04x \n",
816 id[80],
817 id[81],
818 id[82],
819 id[83],
820 id[84]);
821 DPRINTK("88==0x%04x "
822 "93==0x%04x\n",
823 id[88],
824 id[93]);
825 }
826
827 /**
828 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
829 * @id: IDENTIFY data to compute xfer mask from
830 *
831 * Compute the xfermask for this device. This is not as trivial
832 * as it seems if we must consider early devices correctly.
833 *
834 * FIXME: pre IDE drive timing (do we care ?).
835 *
836 * LOCKING:
837 * None.
838 *
839 * RETURNS:
840 * Computed xfermask
841 */
842 static unsigned int ata_id_xfermask(const u16 *id)
843 {
844 unsigned int pio_mask, mwdma_mask, udma_mask;
845
846 /* Usual case. Word 53 indicates word 64 is valid */
847 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
848 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
849 pio_mask <<= 3;
850 pio_mask |= 0x7;
851 } else {
852 /* If word 64 isn't valid then Word 51 high byte holds
853 * the PIO timing number for the maximum. Turn it into
854 * a mask.
855 */
856 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
857
858 /* But wait.. there's more. Design your standards by
859 * committee and you too can get a free iordy field to
860 * process. However its the speeds not the modes that
861 * are supported... Note drivers using the timing API
862 * will get this right anyway
863 */
864 }
865
866 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
867
868 udma_mask = 0;
869 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
870 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
871
872 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
873 }
874
875 /**
876 * ata_port_queue_task - Queue port_task
877 * @ap: The ata_port to queue port_task for
878 *
879 * Schedule @fn(@data) for execution after @delay jiffies using
880 * port_task. There is one port_task per port and it's the
881 * user(low level driver)'s responsibility to make sure that only
882 * one task is active at any given time.
883 *
884 * libata core layer takes care of synchronization between
885 * port_task and EH. ata_port_queue_task() may be ignored for EH
886 * synchronization.
887 *
888 * LOCKING:
889 * Inherited from caller.
890 */
891 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
892 unsigned long delay)
893 {
894 int rc;
895
896 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
897 return;
898
899 PREPARE_WORK(&ap->port_task, fn, data);
900
901 if (!delay)
902 rc = queue_work(ata_wq, &ap->port_task);
903 else
904 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
905
906 /* rc == 0 means that another user is using port task */
907 WARN_ON(rc == 0);
908 }
909
910 /**
911 * ata_port_flush_task - Flush port_task
912 * @ap: The ata_port to flush port_task for
913 *
914 * After this function completes, port_task is guranteed not to
915 * be running or scheduled.
916 *
917 * LOCKING:
918 * Kernel thread context (may sleep)
919 */
920 void ata_port_flush_task(struct ata_port *ap)
921 {
922 unsigned long flags;
923
924 DPRINTK("ENTER\n");
925
926 spin_lock_irqsave(&ap->host_set->lock, flags);
927 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
928 spin_unlock_irqrestore(&ap->host_set->lock, flags);
929
930 DPRINTK("flush #1\n");
931 flush_workqueue(ata_wq);
932
933 /*
934 * At this point, if a task is running, it's guaranteed to see
935 * the FLUSH flag; thus, it will never queue pio tasks again.
936 * Cancel and flush.
937 */
938 if (!cancel_delayed_work(&ap->port_task)) {
939 DPRINTK("flush #2\n");
940 flush_workqueue(ata_wq);
941 }
942
943 spin_lock_irqsave(&ap->host_set->lock, flags);
944 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
945 spin_unlock_irqrestore(&ap->host_set->lock, flags);
946
947 DPRINTK("EXIT\n");
948 }
949
950 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
951 {
952 struct completion *waiting = qc->private_data;
953
954 complete(waiting);
955 }
956
957 /**
958 * ata_exec_internal - execute libata internal command
959 * @dev: Device to which the command is sent
960 * @tf: Taskfile registers for the command and the result
961 * @cdb: CDB for packet command
962 * @dma_dir: Data tranfer direction of the command
963 * @buf: Data buffer of the command
964 * @buflen: Length of data buffer
965 *
966 * Executes libata internal command with timeout. @tf contains
967 * command on entry and result on return. Timeout and error
968 * conditions are reported via return value. No recovery action
969 * is taken after a command times out. It's caller's duty to
970 * clean up after timeout.
971 *
972 * LOCKING:
973 * None. Should be called with kernel context, might sleep.
974 */
975
976 unsigned ata_exec_internal(struct ata_device *dev,
977 struct ata_taskfile *tf, const u8 *cdb,
978 int dma_dir, void *buf, unsigned int buflen)
979 {
980 struct ata_port *ap = dev->ap;
981 u8 command = tf->command;
982 struct ata_queued_cmd *qc;
983 unsigned int tag, preempted_tag;
984 DECLARE_COMPLETION(wait);
985 unsigned long flags;
986 unsigned int err_mask;
987
988 spin_lock_irqsave(&ap->host_set->lock, flags);
989
990 /* no internal command while frozen */
991 if (ap->flags & ATA_FLAG_FROZEN) {
992 spin_unlock_irqrestore(&ap->host_set->lock, flags);
993 return AC_ERR_SYSTEM;
994 }
995
996 /* initialize internal qc */
997
998 /* XXX: Tag 0 is used for drivers with legacy EH as some
999 * drivers choke if any other tag is given. This breaks
1000 * ata_tag_internal() test for those drivers. Don't use new
1001 * EH stuff without converting to it.
1002 */
1003 if (ap->ops->error_handler)
1004 tag = ATA_TAG_INTERNAL;
1005 else
1006 tag = 0;
1007
1008 if (test_and_set_bit(tag, &ap->qactive))
1009 BUG();
1010 qc = __ata_qc_from_tag(ap, tag);
1011
1012 qc->tag = tag;
1013 qc->scsicmd = NULL;
1014 qc->ap = ap;
1015 qc->dev = dev;
1016 ata_qc_reinit(qc);
1017
1018 preempted_tag = ap->active_tag;
1019 ap->active_tag = ATA_TAG_POISON;
1020
1021 /* prepare & issue qc */
1022 qc->tf = *tf;
1023 if (cdb)
1024 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1025 qc->flags |= ATA_QCFLAG_RESULT_TF;
1026 qc->dma_dir = dma_dir;
1027 if (dma_dir != DMA_NONE) {
1028 ata_sg_init_one(qc, buf, buflen);
1029 qc->nsect = buflen / ATA_SECT_SIZE;
1030 }
1031
1032 qc->private_data = &wait;
1033 qc->complete_fn = ata_qc_complete_internal;
1034
1035 ata_qc_issue(qc);
1036
1037 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1038
1039 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1040 ata_port_flush_task(ap);
1041
1042 spin_lock_irqsave(&ap->host_set->lock, flags);
1043
1044 /* We're racing with irq here. If we lose, the
1045 * following test prevents us from completing the qc
1046 * again. If completion irq occurs after here but
1047 * before the caller cleans up, it will result in a
1048 * spurious interrupt. We can live with that.
1049 */
1050 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1051 qc->err_mask = AC_ERR_TIMEOUT;
1052 ata_qc_complete(qc);
1053
1054 ata_dev_printk(dev, KERN_WARNING,
1055 "qc timeout (cmd 0x%x)\n", command);
1056 }
1057
1058 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1059 }
1060
1061 /* finish up */
1062 spin_lock_irqsave(&ap->host_set->lock, flags);
1063
1064 *tf = qc->result_tf;
1065 err_mask = qc->err_mask;
1066
1067 ata_qc_free(qc);
1068 ap->active_tag = preempted_tag;
1069
1070 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1071 * Until those drivers are fixed, we detect the condition
1072 * here, fail the command with AC_ERR_SYSTEM and reenable the
1073 * port.
1074 *
1075 * Note that this doesn't change any behavior as internal
1076 * command failure results in disabling the device in the
1077 * higher layer for LLDDs without new reset/EH callbacks.
1078 *
1079 * Kill the following code as soon as those drivers are fixed.
1080 */
1081 if (ap->flags & ATA_FLAG_DISABLED) {
1082 err_mask |= AC_ERR_SYSTEM;
1083 ata_port_probe(ap);
1084 }
1085
1086 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1087
1088 return err_mask;
1089 }
1090
1091 /**
1092 * ata_pio_need_iordy - check if iordy needed
1093 * @adev: ATA device
1094 *
1095 * Check if the current speed of the device requires IORDY. Used
1096 * by various controllers for chip configuration.
1097 */
1098
1099 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1100 {
1101 int pio;
1102 int speed = adev->pio_mode - XFER_PIO_0;
1103
1104 if (speed < 2)
1105 return 0;
1106 if (speed > 2)
1107 return 1;
1108
1109 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1110
1111 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1112 pio = adev->id[ATA_ID_EIDE_PIO];
1113 /* Is the speed faster than the drive allows non IORDY ? */
1114 if (pio) {
1115 /* This is cycle times not frequency - watch the logic! */
1116 if (pio > 240) /* PIO2 is 240nS per cycle */
1117 return 1;
1118 return 0;
1119 }
1120 }
1121 return 0;
1122 }
1123
1124 /**
1125 * ata_dev_read_id - Read ID data from the specified device
1126 * @dev: target device
1127 * @p_class: pointer to class of the target device (may be changed)
1128 * @post_reset: is this read ID post-reset?
1129 * @id: buffer to read IDENTIFY data into
1130 *
1131 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1132 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1133 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1134 * for pre-ATA4 drives.
1135 *
1136 * LOCKING:
1137 * Kernel thread context (may sleep)
1138 *
1139 * RETURNS:
1140 * 0 on success, -errno otherwise.
1141 */
1142 static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1143 int post_reset, u16 *id)
1144 {
1145 struct ata_port *ap = dev->ap;
1146 unsigned int class = *p_class;
1147 struct ata_taskfile tf;
1148 unsigned int err_mask = 0;
1149 const char *reason;
1150 int rc;
1151
1152 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1153
1154 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1155
1156 retry:
1157 ata_tf_init(dev, &tf);
1158
1159 switch (class) {
1160 case ATA_DEV_ATA:
1161 tf.command = ATA_CMD_ID_ATA;
1162 break;
1163 case ATA_DEV_ATAPI:
1164 tf.command = ATA_CMD_ID_ATAPI;
1165 break;
1166 default:
1167 rc = -ENODEV;
1168 reason = "unsupported class";
1169 goto err_out;
1170 }
1171
1172 tf.protocol = ATA_PROT_PIO;
1173
1174 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1175 id, sizeof(id[0]) * ATA_ID_WORDS);
1176 if (err_mask) {
1177 rc = -EIO;
1178 reason = "I/O error";
1179 goto err_out;
1180 }
1181
1182 swap_buf_le16(id, ATA_ID_WORDS);
1183
1184 /* sanity check */
1185 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1186 rc = -EINVAL;
1187 reason = "device reports illegal type";
1188 goto err_out;
1189 }
1190
1191 if (post_reset && class == ATA_DEV_ATA) {
1192 /*
1193 * The exact sequence expected by certain pre-ATA4 drives is:
1194 * SRST RESET
1195 * IDENTIFY
1196 * INITIALIZE DEVICE PARAMETERS
1197 * anything else..
1198 * Some drives were very specific about that exact sequence.
1199 */
1200 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1201 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1202 if (err_mask) {
1203 rc = -EIO;
1204 reason = "INIT_DEV_PARAMS failed";
1205 goto err_out;
1206 }
1207
1208 /* current CHS translation info (id[53-58]) might be
1209 * changed. reread the identify device info.
1210 */
1211 post_reset = 0;
1212 goto retry;
1213 }
1214 }
1215
1216 *p_class = class;
1217
1218 return 0;
1219
1220 err_out:
1221 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1222 "(%s, err_mask=0x%x)\n", reason, err_mask);
1223 return rc;
1224 }
1225
1226 static inline u8 ata_dev_knobble(struct ata_device *dev)
1227 {
1228 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1229 }
1230
1231 /**
1232 * ata_dev_configure - Configure the specified ATA/ATAPI device
1233 * @dev: Target device to configure
1234 * @print_info: Enable device info printout
1235 *
1236 * Configure @dev according to @dev->id. Generic and low-level
1237 * driver specific fixups are also applied.
1238 *
1239 * LOCKING:
1240 * Kernel thread context (may sleep)
1241 *
1242 * RETURNS:
1243 * 0 on success, -errno otherwise
1244 */
1245 static int ata_dev_configure(struct ata_device *dev, int print_info)
1246 {
1247 struct ata_port *ap = dev->ap;
1248 const u16 *id = dev->id;
1249 unsigned int xfer_mask;
1250 int i, rc;
1251
1252 if (!ata_dev_enabled(dev)) {
1253 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1254 ap->id, dev->devno);
1255 return 0;
1256 }
1257
1258 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1259
1260 /* print device capabilities */
1261 if (print_info)
1262 ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x "
1263 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1264 id[49], id[82], id[83], id[84],
1265 id[85], id[86], id[87], id[88]);
1266
1267 /* initialize to-be-configured parameters */
1268 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1269 dev->max_sectors = 0;
1270 dev->cdb_len = 0;
1271 dev->n_sectors = 0;
1272 dev->cylinders = 0;
1273 dev->heads = 0;
1274 dev->sectors = 0;
1275
1276 /*
1277 * common ATA, ATAPI feature tests
1278 */
1279
1280 /* find max transfer mode; for printk only */
1281 xfer_mask = ata_id_xfermask(id);
1282
1283 ata_dump_id(id);
1284
1285 /* ATA-specific feature tests */
1286 if (dev->class == ATA_DEV_ATA) {
1287 dev->n_sectors = ata_id_n_sectors(id);
1288
1289 if (ata_id_has_lba(id)) {
1290 const char *lba_desc;
1291
1292 lba_desc = "LBA";
1293 dev->flags |= ATA_DFLAG_LBA;
1294 if (ata_id_has_lba48(id)) {
1295 dev->flags |= ATA_DFLAG_LBA48;
1296 lba_desc = "LBA48";
1297 }
1298
1299 /* print device info to dmesg */
1300 if (print_info)
1301 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1302 "max %s, %Lu sectors: %s\n",
1303 ata_id_major_version(id),
1304 ata_mode_string(xfer_mask),
1305 (unsigned long long)dev->n_sectors,
1306 lba_desc);
1307 } else {
1308 /* CHS */
1309
1310 /* Default translation */
1311 dev->cylinders = id[1];
1312 dev->heads = id[3];
1313 dev->sectors = id[6];
1314
1315 if (ata_id_current_chs_valid(id)) {
1316 /* Current CHS translation is valid. */
1317 dev->cylinders = id[54];
1318 dev->heads = id[55];
1319 dev->sectors = id[56];
1320 }
1321
1322 /* print device info to dmesg */
1323 if (print_info)
1324 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1325 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1326 ata_id_major_version(id),
1327 ata_mode_string(xfer_mask),
1328 (unsigned long long)dev->n_sectors,
1329 dev->cylinders, dev->heads, dev->sectors);
1330 }
1331
1332 dev->cdb_len = 16;
1333 }
1334
1335 /* ATAPI-specific feature tests */
1336 else if (dev->class == ATA_DEV_ATAPI) {
1337 rc = atapi_cdb_len(id);
1338 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1339 ata_dev_printk(dev, KERN_WARNING,
1340 "unsupported CDB len\n");
1341 rc = -EINVAL;
1342 goto err_out_nosup;
1343 }
1344 dev->cdb_len = (unsigned int) rc;
1345
1346 /* print device info to dmesg */
1347 if (print_info)
1348 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s\n",
1349 ata_mode_string(xfer_mask));
1350 }
1351
1352 ap->host->max_cmd_len = 0;
1353 for (i = 0; i < ATA_MAX_DEVICES; i++)
1354 ap->host->max_cmd_len = max_t(unsigned int,
1355 ap->host->max_cmd_len,
1356 ap->device[i].cdb_len);
1357
1358 /* limit bridge transfers to udma5, 200 sectors */
1359 if (ata_dev_knobble(dev)) {
1360 if (print_info)
1361 ata_dev_printk(dev, KERN_INFO,
1362 "applying bridge limits\n");
1363 dev->udma_mask &= ATA_UDMA5;
1364 dev->max_sectors = ATA_MAX_SECTORS;
1365 }
1366
1367 if (ap->ops->dev_config)
1368 ap->ops->dev_config(ap, dev);
1369
1370 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1371 return 0;
1372
1373 err_out_nosup:
1374 DPRINTK("EXIT, err\n");
1375 return rc;
1376 }
1377
1378 /**
1379 * ata_bus_probe - Reset and probe ATA bus
1380 * @ap: Bus to probe
1381 *
1382 * Master ATA bus probing function. Initiates a hardware-dependent
1383 * bus reset, then attempts to identify any devices found on
1384 * the bus.
1385 *
1386 * LOCKING:
1387 * PCI/etc. bus probe sem.
1388 *
1389 * RETURNS:
1390 * Zero on success, negative errno otherwise.
1391 */
1392
1393 static int ata_bus_probe(struct ata_port *ap)
1394 {
1395 unsigned int classes[ATA_MAX_DEVICES];
1396 int tries[ATA_MAX_DEVICES];
1397 int i, rc, down_xfermask;
1398 struct ata_device *dev;
1399
1400 ata_port_probe(ap);
1401
1402 for (i = 0; i < ATA_MAX_DEVICES; i++)
1403 tries[i] = ATA_PROBE_MAX_TRIES;
1404
1405 retry:
1406 down_xfermask = 0;
1407
1408 /* reset and determine device classes */
1409 for (i = 0; i < ATA_MAX_DEVICES; i++)
1410 classes[i] = ATA_DEV_UNKNOWN;
1411
1412 if (ap->ops->probe_reset) {
1413 rc = ap->ops->probe_reset(ap, classes);
1414 if (rc) {
1415 ata_port_printk(ap, KERN_ERR,
1416 "reset failed (errno=%d)\n", rc);
1417 return rc;
1418 }
1419 } else {
1420 ap->ops->phy_reset(ap);
1421
1422 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1423 if (!(ap->flags & ATA_FLAG_DISABLED))
1424 classes[i] = ap->device[i].class;
1425 ap->device[i].class = ATA_DEV_UNKNOWN;
1426 }
1427
1428 ata_port_probe(ap);
1429 }
1430
1431 for (i = 0; i < ATA_MAX_DEVICES; i++)
1432 if (classes[i] == ATA_DEV_UNKNOWN)
1433 classes[i] = ATA_DEV_NONE;
1434
1435 /* read IDENTIFY page and configure devices */
1436 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1437 dev = &ap->device[i];
1438
1439 if (tries[i])
1440 dev->class = classes[i];
1441
1442 if (!ata_dev_enabled(dev))
1443 continue;
1444
1445 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1446 if (rc)
1447 goto fail;
1448
1449 rc = ata_dev_configure(dev, 1);
1450 if (rc)
1451 goto fail;
1452 }
1453
1454 /* configure transfer mode */
1455 rc = ata_set_mode(ap, &dev);
1456 if (rc) {
1457 down_xfermask = 1;
1458 goto fail;
1459 }
1460
1461 for (i = 0; i < ATA_MAX_DEVICES; i++)
1462 if (ata_dev_enabled(&ap->device[i]))
1463 return 0;
1464
1465 /* no device present, disable port */
1466 ata_port_disable(ap);
1467 ap->ops->port_disable(ap);
1468 return -ENODEV;
1469
1470 fail:
1471 switch (rc) {
1472 case -EINVAL:
1473 case -ENODEV:
1474 tries[dev->devno] = 0;
1475 break;
1476 case -EIO:
1477 sata_down_spd_limit(ap);
1478 /* fall through */
1479 default:
1480 tries[dev->devno]--;
1481 if (down_xfermask &&
1482 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1483 tries[dev->devno] = 0;
1484 }
1485
1486 if (!tries[dev->devno]) {
1487 ata_down_xfermask_limit(dev, 1);
1488 ata_dev_disable(dev);
1489 }
1490
1491 goto retry;
1492 }
1493
1494 /**
1495 * ata_port_probe - Mark port as enabled
1496 * @ap: Port for which we indicate enablement
1497 *
1498 * Modify @ap data structure such that the system
1499 * thinks that the entire port is enabled.
1500 *
1501 * LOCKING: host_set lock, or some other form of
1502 * serialization.
1503 */
1504
1505 void ata_port_probe(struct ata_port *ap)
1506 {
1507 ap->flags &= ~ATA_FLAG_DISABLED;
1508 }
1509
1510 /**
1511 * sata_print_link_status - Print SATA link status
1512 * @ap: SATA port to printk link status about
1513 *
1514 * This function prints link speed and status of a SATA link.
1515 *
1516 * LOCKING:
1517 * None.
1518 */
1519 static void sata_print_link_status(struct ata_port *ap)
1520 {
1521 u32 sstatus, scontrol, tmp;
1522
1523 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1524 return;
1525 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1526
1527 if (ata_port_online(ap)) {
1528 tmp = (sstatus >> 4) & 0xf;
1529 ata_port_printk(ap, KERN_INFO,
1530 "SATA link up %s (SStatus %X SControl %X)\n",
1531 sata_spd_string(tmp), sstatus, scontrol);
1532 } else {
1533 ata_port_printk(ap, KERN_INFO,
1534 "SATA link down (SStatus %X SControl %X)\n",
1535 sstatus, scontrol);
1536 }
1537 }
1538
1539 /**
1540 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1541 * @ap: SATA port associated with target SATA PHY.
1542 *
1543 * This function issues commands to standard SATA Sxxx
1544 * PHY registers, to wake up the phy (and device), and
1545 * clear any reset condition.
1546 *
1547 * LOCKING:
1548 * PCI/etc. bus probe sem.
1549 *
1550 */
1551 void __sata_phy_reset(struct ata_port *ap)
1552 {
1553 u32 sstatus;
1554 unsigned long timeout = jiffies + (HZ * 5);
1555
1556 if (ap->flags & ATA_FLAG_SATA_RESET) {
1557 /* issue phy wake/reset */
1558 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1559 /* Couldn't find anything in SATA I/II specs, but
1560 * AHCI-1.1 10.4.2 says at least 1 ms. */
1561 mdelay(1);
1562 }
1563 /* phy wake/clear reset */
1564 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1565
1566 /* wait for phy to become ready, if necessary */
1567 do {
1568 msleep(200);
1569 sata_scr_read(ap, SCR_STATUS, &sstatus);
1570 if ((sstatus & 0xf) != 1)
1571 break;
1572 } while (time_before(jiffies, timeout));
1573
1574 /* print link status */
1575 sata_print_link_status(ap);
1576
1577 /* TODO: phy layer with polling, timeouts, etc. */
1578 if (!ata_port_offline(ap))
1579 ata_port_probe(ap);
1580 else
1581 ata_port_disable(ap);
1582
1583 if (ap->flags & ATA_FLAG_DISABLED)
1584 return;
1585
1586 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1587 ata_port_disable(ap);
1588 return;
1589 }
1590
1591 ap->cbl = ATA_CBL_SATA;
1592 }
1593
1594 /**
1595 * sata_phy_reset - Reset SATA bus.
1596 * @ap: SATA port associated with target SATA PHY.
1597 *
1598 * This function resets the SATA bus, and then probes
1599 * the bus for devices.
1600 *
1601 * LOCKING:
1602 * PCI/etc. bus probe sem.
1603 *
1604 */
1605 void sata_phy_reset(struct ata_port *ap)
1606 {
1607 __sata_phy_reset(ap);
1608 if (ap->flags & ATA_FLAG_DISABLED)
1609 return;
1610 ata_bus_reset(ap);
1611 }
1612
1613 /**
1614 * ata_dev_pair - return other device on cable
1615 * @adev: device
1616 *
1617 * Obtain the other device on the same cable, or if none is
1618 * present NULL is returned
1619 */
1620
1621 struct ata_device *ata_dev_pair(struct ata_device *adev)
1622 {
1623 struct ata_port *ap = adev->ap;
1624 struct ata_device *pair = &ap->device[1 - adev->devno];
1625 if (!ata_dev_enabled(pair))
1626 return NULL;
1627 return pair;
1628 }
1629
1630 /**
1631 * ata_port_disable - Disable port.
1632 * @ap: Port to be disabled.
1633 *
1634 * Modify @ap data structure such that the system
1635 * thinks that the entire port is disabled, and should
1636 * never attempt to probe or communicate with devices
1637 * on this port.
1638 *
1639 * LOCKING: host_set lock, or some other form of
1640 * serialization.
1641 */
1642
1643 void ata_port_disable(struct ata_port *ap)
1644 {
1645 ap->device[0].class = ATA_DEV_NONE;
1646 ap->device[1].class = ATA_DEV_NONE;
1647 ap->flags |= ATA_FLAG_DISABLED;
1648 }
1649
1650 /**
1651 * sata_down_spd_limit - adjust SATA spd limit downward
1652 * @ap: Port to adjust SATA spd limit for
1653 *
1654 * Adjust SATA spd limit of @ap downward. Note that this
1655 * function only adjusts the limit. The change must be applied
1656 * using sata_set_spd().
1657 *
1658 * LOCKING:
1659 * Inherited from caller.
1660 *
1661 * RETURNS:
1662 * 0 on success, negative errno on failure
1663 */
1664 int sata_down_spd_limit(struct ata_port *ap)
1665 {
1666 u32 sstatus, spd, mask;
1667 int rc, highbit;
1668
1669 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1670 if (rc)
1671 return rc;
1672
1673 mask = ap->sata_spd_limit;
1674 if (mask <= 1)
1675 return -EINVAL;
1676 highbit = fls(mask) - 1;
1677 mask &= ~(1 << highbit);
1678
1679 spd = (sstatus >> 4) & 0xf;
1680 if (spd <= 1)
1681 return -EINVAL;
1682 spd--;
1683 mask &= (1 << spd) - 1;
1684 if (!mask)
1685 return -EINVAL;
1686
1687 ap->sata_spd_limit = mask;
1688
1689 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1690 sata_spd_string(fls(mask)));
1691
1692 return 0;
1693 }
1694
1695 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1696 {
1697 u32 spd, limit;
1698
1699 if (ap->sata_spd_limit == UINT_MAX)
1700 limit = 0;
1701 else
1702 limit = fls(ap->sata_spd_limit);
1703
1704 spd = (*scontrol >> 4) & 0xf;
1705 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1706
1707 return spd != limit;
1708 }
1709
1710 /**
1711 * sata_set_spd_needed - is SATA spd configuration needed
1712 * @ap: Port in question
1713 *
1714 * Test whether the spd limit in SControl matches
1715 * @ap->sata_spd_limit. This function is used to determine
1716 * whether hardreset is necessary to apply SATA spd
1717 * configuration.
1718 *
1719 * LOCKING:
1720 * Inherited from caller.
1721 *
1722 * RETURNS:
1723 * 1 if SATA spd configuration is needed, 0 otherwise.
1724 */
1725 int sata_set_spd_needed(struct ata_port *ap)
1726 {
1727 u32 scontrol;
1728
1729 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1730 return 0;
1731
1732 return __sata_set_spd_needed(ap, &scontrol);
1733 }
1734
1735 /**
1736 * sata_set_spd - set SATA spd according to spd limit
1737 * @ap: Port to set SATA spd for
1738 *
1739 * Set SATA spd of @ap according to sata_spd_limit.
1740 *
1741 * LOCKING:
1742 * Inherited from caller.
1743 *
1744 * RETURNS:
1745 * 0 if spd doesn't need to be changed, 1 if spd has been
1746 * changed. Negative errno if SCR registers are inaccessible.
1747 */
1748 int sata_set_spd(struct ata_port *ap)
1749 {
1750 u32 scontrol;
1751 int rc;
1752
1753 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1754 return rc;
1755
1756 if (!__sata_set_spd_needed(ap, &scontrol))
1757 return 0;
1758
1759 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1760 return rc;
1761
1762 return 1;
1763 }
1764
1765 /*
1766 * This mode timing computation functionality is ported over from
1767 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1768 */
1769 /*
1770 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1771 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1772 * for PIO 5, which is a nonstandard extension and UDMA6, which
1773 * is currently supported only by Maxtor drives.
1774 */
1775
1776 static const struct ata_timing ata_timing[] = {
1777
1778 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1779 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1780 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1781 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1782
1783 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1784 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1785 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1786
1787 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1788
1789 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1790 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1791 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1792
1793 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1794 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1795 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1796
1797 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1798 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1799 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1800
1801 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1802 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1803 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1804
1805 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1806
1807 { 0xFF }
1808 };
1809
1810 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1811 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1812
1813 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1814 {
1815 q->setup = EZ(t->setup * 1000, T);
1816 q->act8b = EZ(t->act8b * 1000, T);
1817 q->rec8b = EZ(t->rec8b * 1000, T);
1818 q->cyc8b = EZ(t->cyc8b * 1000, T);
1819 q->active = EZ(t->active * 1000, T);
1820 q->recover = EZ(t->recover * 1000, T);
1821 q->cycle = EZ(t->cycle * 1000, T);
1822 q->udma = EZ(t->udma * 1000, UT);
1823 }
1824
1825 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1826 struct ata_timing *m, unsigned int what)
1827 {
1828 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1829 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1830 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1831 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1832 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1833 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1834 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1835 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1836 }
1837
1838 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1839 {
1840 const struct ata_timing *t;
1841
1842 for (t = ata_timing; t->mode != speed; t++)
1843 if (t->mode == 0xFF)
1844 return NULL;
1845 return t;
1846 }
1847
1848 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1849 struct ata_timing *t, int T, int UT)
1850 {
1851 const struct ata_timing *s;
1852 struct ata_timing p;
1853
1854 /*
1855 * Find the mode.
1856 */
1857
1858 if (!(s = ata_timing_find_mode(speed)))
1859 return -EINVAL;
1860
1861 memcpy(t, s, sizeof(*s));
1862
1863 /*
1864 * If the drive is an EIDE drive, it can tell us it needs extended
1865 * PIO/MW_DMA cycle timing.
1866 */
1867
1868 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1869 memset(&p, 0, sizeof(p));
1870 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1871 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1872 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1873 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1874 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1875 }
1876 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1877 }
1878
1879 /*
1880 * Convert the timing to bus clock counts.
1881 */
1882
1883 ata_timing_quantize(t, t, T, UT);
1884
1885 /*
1886 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1887 * S.M.A.R.T * and some other commands. We have to ensure that the
1888 * DMA cycle timing is slower/equal than the fastest PIO timing.
1889 */
1890
1891 if (speed > XFER_PIO_4) {
1892 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1893 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1894 }
1895
1896 /*
1897 * Lengthen active & recovery time so that cycle time is correct.
1898 */
1899
1900 if (t->act8b + t->rec8b < t->cyc8b) {
1901 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1902 t->rec8b = t->cyc8b - t->act8b;
1903 }
1904
1905 if (t->active + t->recover < t->cycle) {
1906 t->active += (t->cycle - (t->active + t->recover)) / 2;
1907 t->recover = t->cycle - t->active;
1908 }
1909
1910 return 0;
1911 }
1912
1913 /**
1914 * ata_down_xfermask_limit - adjust dev xfer masks downward
1915 * @dev: Device to adjust xfer masks
1916 * @force_pio0: Force PIO0
1917 *
1918 * Adjust xfer masks of @dev downward. Note that this function
1919 * does not apply the change. Invoking ata_set_mode() afterwards
1920 * will apply the limit.
1921 *
1922 * LOCKING:
1923 * Inherited from caller.
1924 *
1925 * RETURNS:
1926 * 0 on success, negative errno on failure
1927 */
1928 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
1929 {
1930 unsigned long xfer_mask;
1931 int highbit;
1932
1933 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1934 dev->udma_mask);
1935
1936 if (!xfer_mask)
1937 goto fail;
1938 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1939 if (xfer_mask & ATA_MASK_UDMA)
1940 xfer_mask &= ~ATA_MASK_MWDMA;
1941
1942 highbit = fls(xfer_mask) - 1;
1943 xfer_mask &= ~(1 << highbit);
1944 if (force_pio0)
1945 xfer_mask &= 1 << ATA_SHIFT_PIO;
1946 if (!xfer_mask)
1947 goto fail;
1948
1949 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1950 &dev->udma_mask);
1951
1952 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
1953 ata_mode_string(xfer_mask));
1954
1955 return 0;
1956
1957 fail:
1958 return -EINVAL;
1959 }
1960
1961 static int ata_dev_set_mode(struct ata_device *dev)
1962 {
1963 unsigned int err_mask;
1964 int rc;
1965
1966 dev->flags &= ~ATA_DFLAG_PIO;
1967 if (dev->xfer_shift == ATA_SHIFT_PIO)
1968 dev->flags |= ATA_DFLAG_PIO;
1969
1970 err_mask = ata_dev_set_xfermode(dev);
1971 if (err_mask) {
1972 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
1973 "(err_mask=0x%x)\n", err_mask);
1974 return -EIO;
1975 }
1976
1977 rc = ata_dev_revalidate(dev, 0);
1978 if (rc)
1979 return rc;
1980
1981 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1982 dev->xfer_shift, (int)dev->xfer_mode);
1983
1984 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1985 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1986 return 0;
1987 }
1988
1989 /**
1990 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1991 * @ap: port on which timings will be programmed
1992 * @r_failed_dev: out paramter for failed device
1993 *
1994 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1995 * ata_set_mode() fails, pointer to the failing device is
1996 * returned in @r_failed_dev.
1997 *
1998 * LOCKING:
1999 * PCI/etc. bus probe sem.
2000 *
2001 * RETURNS:
2002 * 0 on success, negative errno otherwise
2003 */
2004 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2005 {
2006 struct ata_device *dev;
2007 int i, rc = 0, used_dma = 0, found = 0;
2008
2009 /* has private set_mode? */
2010 if (ap->ops->set_mode) {
2011 /* FIXME: make ->set_mode handle no device case and
2012 * return error code and failing device on failure.
2013 */
2014 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2015 if (ata_dev_enabled(&ap->device[i])) {
2016 ap->ops->set_mode(ap);
2017 break;
2018 }
2019 }
2020 return 0;
2021 }
2022
2023 /* step 1: calculate xfer_mask */
2024 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2025 unsigned int pio_mask, dma_mask;
2026
2027 dev = &ap->device[i];
2028
2029 if (!ata_dev_enabled(dev))
2030 continue;
2031
2032 ata_dev_xfermask(dev);
2033
2034 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2035 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2036 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2037 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2038
2039 found = 1;
2040 if (dev->dma_mode)
2041 used_dma = 1;
2042 }
2043 if (!found)
2044 goto out;
2045
2046 /* step 2: always set host PIO timings */
2047 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2048 dev = &ap->device[i];
2049 if (!ata_dev_enabled(dev))
2050 continue;
2051
2052 if (!dev->pio_mode) {
2053 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2054 rc = -EINVAL;
2055 goto out;
2056 }
2057
2058 dev->xfer_mode = dev->pio_mode;
2059 dev->xfer_shift = ATA_SHIFT_PIO;
2060 if (ap->ops->set_piomode)
2061 ap->ops->set_piomode(ap, dev);
2062 }
2063
2064 /* step 3: set host DMA timings */
2065 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2066 dev = &ap->device[i];
2067
2068 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2069 continue;
2070
2071 dev->xfer_mode = dev->dma_mode;
2072 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2073 if (ap->ops->set_dmamode)
2074 ap->ops->set_dmamode(ap, dev);
2075 }
2076
2077 /* step 4: update devices' xfer mode */
2078 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2079 dev = &ap->device[i];
2080
2081 if (!ata_dev_enabled(dev))
2082 continue;
2083
2084 rc = ata_dev_set_mode(dev);
2085 if (rc)
2086 goto out;
2087 }
2088
2089 /* Record simplex status. If we selected DMA then the other
2090 * host channels are not permitted to do so.
2091 */
2092 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2093 ap->host_set->simplex_claimed = 1;
2094
2095 /* step5: chip specific finalisation */
2096 if (ap->ops->post_set_mode)
2097 ap->ops->post_set_mode(ap);
2098
2099 out:
2100 if (rc)
2101 *r_failed_dev = dev;
2102 return rc;
2103 }
2104
2105 /**
2106 * ata_tf_to_host - issue ATA taskfile to host controller
2107 * @ap: port to which command is being issued
2108 * @tf: ATA taskfile register set
2109 *
2110 * Issues ATA taskfile register set to ATA host controller,
2111 * with proper synchronization with interrupt handler and
2112 * other threads.
2113 *
2114 * LOCKING:
2115 * spin_lock_irqsave(host_set lock)
2116 */
2117
2118 static inline void ata_tf_to_host(struct ata_port *ap,
2119 const struct ata_taskfile *tf)
2120 {
2121 ap->ops->tf_load(ap, tf);
2122 ap->ops->exec_command(ap, tf);
2123 }
2124
2125 /**
2126 * ata_busy_sleep - sleep until BSY clears, or timeout
2127 * @ap: port containing status register to be polled
2128 * @tmout_pat: impatience timeout
2129 * @tmout: overall timeout
2130 *
2131 * Sleep until ATA Status register bit BSY clears,
2132 * or a timeout occurs.
2133 *
2134 * LOCKING: None.
2135 */
2136
2137 unsigned int ata_busy_sleep (struct ata_port *ap,
2138 unsigned long tmout_pat, unsigned long tmout)
2139 {
2140 unsigned long timer_start, timeout;
2141 u8 status;
2142
2143 status = ata_busy_wait(ap, ATA_BUSY, 300);
2144 timer_start = jiffies;
2145 timeout = timer_start + tmout_pat;
2146 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2147 msleep(50);
2148 status = ata_busy_wait(ap, ATA_BUSY, 3);
2149 }
2150
2151 if (status & ATA_BUSY)
2152 ata_port_printk(ap, KERN_WARNING,
2153 "port is slow to respond, please be patient\n");
2154
2155 timeout = timer_start + tmout;
2156 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2157 msleep(50);
2158 status = ata_chk_status(ap);
2159 }
2160
2161 if (status & ATA_BUSY) {
2162 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2163 "(%lu secs)\n", tmout / HZ);
2164 return 1;
2165 }
2166
2167 return 0;
2168 }
2169
2170 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2171 {
2172 struct ata_ioports *ioaddr = &ap->ioaddr;
2173 unsigned int dev0 = devmask & (1 << 0);
2174 unsigned int dev1 = devmask & (1 << 1);
2175 unsigned long timeout;
2176
2177 /* if device 0 was found in ata_devchk, wait for its
2178 * BSY bit to clear
2179 */
2180 if (dev0)
2181 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2182
2183 /* if device 1 was found in ata_devchk, wait for
2184 * register access, then wait for BSY to clear
2185 */
2186 timeout = jiffies + ATA_TMOUT_BOOT;
2187 while (dev1) {
2188 u8 nsect, lbal;
2189
2190 ap->ops->dev_select(ap, 1);
2191 if (ap->flags & ATA_FLAG_MMIO) {
2192 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2193 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2194 } else {
2195 nsect = inb(ioaddr->nsect_addr);
2196 lbal = inb(ioaddr->lbal_addr);
2197 }
2198 if ((nsect == 1) && (lbal == 1))
2199 break;
2200 if (time_after(jiffies, timeout)) {
2201 dev1 = 0;
2202 break;
2203 }
2204 msleep(50); /* give drive a breather */
2205 }
2206 if (dev1)
2207 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2208
2209 /* is all this really necessary? */
2210 ap->ops->dev_select(ap, 0);
2211 if (dev1)
2212 ap->ops->dev_select(ap, 1);
2213 if (dev0)
2214 ap->ops->dev_select(ap, 0);
2215 }
2216
2217 static unsigned int ata_bus_softreset(struct ata_port *ap,
2218 unsigned int devmask)
2219 {
2220 struct ata_ioports *ioaddr = &ap->ioaddr;
2221
2222 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2223
2224 /* software reset. causes dev0 to be selected */
2225 if (ap->flags & ATA_FLAG_MMIO) {
2226 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2227 udelay(20); /* FIXME: flush */
2228 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2229 udelay(20); /* FIXME: flush */
2230 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2231 } else {
2232 outb(ap->ctl, ioaddr->ctl_addr);
2233 udelay(10);
2234 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2235 udelay(10);
2236 outb(ap->ctl, ioaddr->ctl_addr);
2237 }
2238
2239 /* spec mandates ">= 2ms" before checking status.
2240 * We wait 150ms, because that was the magic delay used for
2241 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2242 * between when the ATA command register is written, and then
2243 * status is checked. Because waiting for "a while" before
2244 * checking status is fine, post SRST, we perform this magic
2245 * delay here as well.
2246 *
2247 * Old drivers/ide uses the 2mS rule and then waits for ready
2248 */
2249 msleep(150);
2250
2251 /* Before we perform post reset processing we want to see if
2252 * the bus shows 0xFF because the odd clown forgets the D7
2253 * pulldown resistor.
2254 */
2255 if (ata_check_status(ap) == 0xFF) {
2256 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2257 return AC_ERR_OTHER;
2258 }
2259
2260 ata_bus_post_reset(ap, devmask);
2261
2262 return 0;
2263 }
2264
2265 /**
2266 * ata_bus_reset - reset host port and associated ATA channel
2267 * @ap: port to reset
2268 *
2269 * This is typically the first time we actually start issuing
2270 * commands to the ATA channel. We wait for BSY to clear, then
2271 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2272 * result. Determine what devices, if any, are on the channel
2273 * by looking at the device 0/1 error register. Look at the signature
2274 * stored in each device's taskfile registers, to determine if
2275 * the device is ATA or ATAPI.
2276 *
2277 * LOCKING:
2278 * PCI/etc. bus probe sem.
2279 * Obtains host_set lock.
2280 *
2281 * SIDE EFFECTS:
2282 * Sets ATA_FLAG_DISABLED if bus reset fails.
2283 */
2284
2285 void ata_bus_reset(struct ata_port *ap)
2286 {
2287 struct ata_ioports *ioaddr = &ap->ioaddr;
2288 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2289 u8 err;
2290 unsigned int dev0, dev1 = 0, devmask = 0;
2291
2292 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2293
2294 /* determine if device 0/1 are present */
2295 if (ap->flags & ATA_FLAG_SATA_RESET)
2296 dev0 = 1;
2297 else {
2298 dev0 = ata_devchk(ap, 0);
2299 if (slave_possible)
2300 dev1 = ata_devchk(ap, 1);
2301 }
2302
2303 if (dev0)
2304 devmask |= (1 << 0);
2305 if (dev1)
2306 devmask |= (1 << 1);
2307
2308 /* select device 0 again */
2309 ap->ops->dev_select(ap, 0);
2310
2311 /* issue bus reset */
2312 if (ap->flags & ATA_FLAG_SRST)
2313 if (ata_bus_softreset(ap, devmask))
2314 goto err_out;
2315
2316 /*
2317 * determine by signature whether we have ATA or ATAPI devices
2318 */
2319 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2320 if ((slave_possible) && (err != 0x81))
2321 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2322
2323 /* re-enable interrupts */
2324 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2325 ata_irq_on(ap);
2326
2327 /* is double-select really necessary? */
2328 if (ap->device[1].class != ATA_DEV_NONE)
2329 ap->ops->dev_select(ap, 1);
2330 if (ap->device[0].class != ATA_DEV_NONE)
2331 ap->ops->dev_select(ap, 0);
2332
2333 /* if no devices were detected, disable this port */
2334 if ((ap->device[0].class == ATA_DEV_NONE) &&
2335 (ap->device[1].class == ATA_DEV_NONE))
2336 goto err_out;
2337
2338 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2339 /* set up device control for ATA_FLAG_SATA_RESET */
2340 if (ap->flags & ATA_FLAG_MMIO)
2341 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2342 else
2343 outb(ap->ctl, ioaddr->ctl_addr);
2344 }
2345
2346 DPRINTK("EXIT\n");
2347 return;
2348
2349 err_out:
2350 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2351 ap->ops->port_disable(ap);
2352
2353 DPRINTK("EXIT\n");
2354 }
2355
2356 static int sata_phy_resume(struct ata_port *ap)
2357 {
2358 unsigned long timeout = jiffies + (HZ * 5);
2359 u32 scontrol, sstatus;
2360 int rc;
2361
2362 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2363 return rc;
2364
2365 scontrol = (scontrol & 0x0f0) | 0x300;
2366
2367 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2368 return rc;
2369
2370 /* Wait for phy to become ready, if necessary. */
2371 do {
2372 msleep(200);
2373 if ((rc = sata_scr_read(ap, SCR_STATUS, &sstatus)))
2374 return rc;
2375 if ((sstatus & 0xf) != 1)
2376 return 0;
2377 } while (time_before(jiffies, timeout));
2378
2379 return -EBUSY;
2380 }
2381
2382 /**
2383 * ata_std_probeinit - initialize probing
2384 * @ap: port to be probed
2385 *
2386 * @ap is about to be probed. Initialize it. This function is
2387 * to be used as standard callback for ata_drive_probe_reset().
2388 *
2389 * NOTE!!! Do not use this function as probeinit if a low level
2390 * driver implements only hardreset. Just pass NULL as probeinit
2391 * in that case. Using this function is probably okay but doing
2392 * so makes reset sequence different from the original
2393 * ->phy_reset implementation and Jeff nervous. :-P
2394 */
2395 void ata_std_probeinit(struct ata_port *ap)
2396 {
2397 u32 scontrol;
2398
2399 /* resume link */
2400 sata_phy_resume(ap);
2401
2402 /* init sata_spd_limit to the current value */
2403 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
2404 int spd = (scontrol >> 4) & 0xf;
2405 ap->sata_spd_limit &= (1 << spd) - 1;
2406 }
2407
2408 /* wait for device */
2409 if (ata_port_online(ap))
2410 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2411 }
2412
2413 /**
2414 * ata_std_softreset - reset host port via ATA SRST
2415 * @ap: port to reset
2416 * @classes: resulting classes of attached devices
2417 *
2418 * Reset host port using ATA SRST. This function is to be used
2419 * as standard callback for ata_drive_*_reset() functions.
2420 *
2421 * LOCKING:
2422 * Kernel thread context (may sleep)
2423 *
2424 * RETURNS:
2425 * 0 on success, -errno otherwise.
2426 */
2427 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2428 {
2429 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2430 unsigned int devmask = 0, err_mask;
2431 u8 err;
2432
2433 DPRINTK("ENTER\n");
2434
2435 if (ata_port_offline(ap)) {
2436 classes[0] = ATA_DEV_NONE;
2437 goto out;
2438 }
2439
2440 /* determine if device 0/1 are present */
2441 if (ata_devchk(ap, 0))
2442 devmask |= (1 << 0);
2443 if (slave_possible && ata_devchk(ap, 1))
2444 devmask |= (1 << 1);
2445
2446 /* select device 0 again */
2447 ap->ops->dev_select(ap, 0);
2448
2449 /* issue bus reset */
2450 DPRINTK("about to softreset, devmask=%x\n", devmask);
2451 err_mask = ata_bus_softreset(ap, devmask);
2452 if (err_mask) {
2453 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2454 err_mask);
2455 return -EIO;
2456 }
2457
2458 /* determine by signature whether we have ATA or ATAPI devices */
2459 classes[0] = ata_dev_try_classify(ap, 0, &err);
2460 if (slave_possible && err != 0x81)
2461 classes[1] = ata_dev_try_classify(ap, 1, &err);
2462
2463 out:
2464 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2465 return 0;
2466 }
2467
2468 /**
2469 * sata_std_hardreset - reset host port via SATA phy reset
2470 * @ap: port to reset
2471 * @class: resulting class of attached device
2472 *
2473 * SATA phy-reset host port using DET bits of SControl register.
2474 * This function is to be used as standard callback for
2475 * ata_drive_*_reset().
2476 *
2477 * LOCKING:
2478 * Kernel thread context (may sleep)
2479 *
2480 * RETURNS:
2481 * 0 on success, -errno otherwise.
2482 */
2483 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2484 {
2485 u32 scontrol;
2486 int rc;
2487
2488 DPRINTK("ENTER\n");
2489
2490 if (sata_set_spd_needed(ap)) {
2491 /* SATA spec says nothing about how to reconfigure
2492 * spd. To be on the safe side, turn off phy during
2493 * reconfiguration. This works for at least ICH7 AHCI
2494 * and Sil3124.
2495 */
2496 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2497 return rc;
2498
2499 scontrol = (scontrol & 0x0f0) | 0x302;
2500
2501 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2502 return rc;
2503
2504 sata_set_spd(ap);
2505 }
2506
2507 /* issue phy wake/reset */
2508 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2509 return rc;
2510
2511 scontrol = (scontrol & 0x0f0) | 0x301;
2512
2513 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2514 return rc;
2515
2516 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2517 * 10.4.2 says at least 1 ms.
2518 */
2519 msleep(1);
2520
2521 /* bring phy back */
2522 sata_phy_resume(ap);
2523
2524 /* TODO: phy layer with polling, timeouts, etc. */
2525 if (ata_port_offline(ap)) {
2526 *class = ATA_DEV_NONE;
2527 DPRINTK("EXIT, link offline\n");
2528 return 0;
2529 }
2530
2531 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2532 ata_port_printk(ap, KERN_ERR,
2533 "COMRESET failed (device not ready)\n");
2534 return -EIO;
2535 }
2536
2537 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2538
2539 *class = ata_dev_try_classify(ap, 0, NULL);
2540
2541 DPRINTK("EXIT, class=%u\n", *class);
2542 return 0;
2543 }
2544
2545 /**
2546 * ata_std_postreset - standard postreset callback
2547 * @ap: the target ata_port
2548 * @classes: classes of attached devices
2549 *
2550 * This function is invoked after a successful reset. Note that
2551 * the device might have been reset more than once using
2552 * different reset methods before postreset is invoked.
2553 *
2554 * This function is to be used as standard callback for
2555 * ata_drive_*_reset().
2556 *
2557 * LOCKING:
2558 * Kernel thread context (may sleep)
2559 */
2560 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2561 {
2562 u32 serror;
2563
2564 DPRINTK("ENTER\n");
2565
2566 /* print link status */
2567 sata_print_link_status(ap);
2568
2569 /* clear SError */
2570 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2571 sata_scr_write(ap, SCR_ERROR, serror);
2572
2573 /* re-enable interrupts */
2574 if (!ap->ops->error_handler) {
2575 /* FIXME: hack. create a hook instead */
2576 if (ap->ioaddr.ctl_addr)
2577 ata_irq_on(ap);
2578 }
2579
2580 /* is double-select really necessary? */
2581 if (classes[0] != ATA_DEV_NONE)
2582 ap->ops->dev_select(ap, 1);
2583 if (classes[1] != ATA_DEV_NONE)
2584 ap->ops->dev_select(ap, 0);
2585
2586 /* bail out if no device is present */
2587 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2588 DPRINTK("EXIT, no device\n");
2589 return;
2590 }
2591
2592 /* set up device control */
2593 if (ap->ioaddr.ctl_addr) {
2594 if (ap->flags & ATA_FLAG_MMIO)
2595 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2596 else
2597 outb(ap->ctl, ap->ioaddr.ctl_addr);
2598 }
2599
2600 DPRINTK("EXIT\n");
2601 }
2602
2603 /**
2604 * ata_std_probe_reset - standard probe reset method
2605 * @ap: prot to perform probe-reset
2606 * @classes: resulting classes of attached devices
2607 *
2608 * The stock off-the-shelf ->probe_reset method.
2609 *
2610 * LOCKING:
2611 * Kernel thread context (may sleep)
2612 *
2613 * RETURNS:
2614 * 0 on success, -errno otherwise.
2615 */
2616 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2617 {
2618 ata_reset_fn_t hardreset;
2619
2620 hardreset = NULL;
2621 if (sata_scr_valid(ap))
2622 hardreset = sata_std_hardreset;
2623
2624 return ata_drive_probe_reset(ap, ata_std_probeinit,
2625 ata_std_softreset, hardreset,
2626 ata_std_postreset, classes);
2627 }
2628
2629 int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2630 unsigned int *classes)
2631 {
2632 int i, rc;
2633
2634 for (i = 0; i < ATA_MAX_DEVICES; i++)
2635 classes[i] = ATA_DEV_UNKNOWN;
2636
2637 rc = reset(ap, classes);
2638 if (rc)
2639 return rc;
2640
2641 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2642 * is complete and convert all ATA_DEV_UNKNOWN to
2643 * ATA_DEV_NONE.
2644 */
2645 for (i = 0; i < ATA_MAX_DEVICES; i++)
2646 if (classes[i] != ATA_DEV_UNKNOWN)
2647 break;
2648
2649 if (i < ATA_MAX_DEVICES)
2650 for (i = 0; i < ATA_MAX_DEVICES; i++)
2651 if (classes[i] == ATA_DEV_UNKNOWN)
2652 classes[i] = ATA_DEV_NONE;
2653
2654 return 0;
2655 }
2656
2657 /**
2658 * ata_drive_probe_reset - Perform probe reset with given methods
2659 * @ap: port to reset
2660 * @probeinit: probeinit method (can be NULL)
2661 * @softreset: softreset method (can be NULL)
2662 * @hardreset: hardreset method (can be NULL)
2663 * @postreset: postreset method (can be NULL)
2664 * @classes: resulting classes of attached devices
2665 *
2666 * Reset the specified port and classify attached devices using
2667 * given methods. This function prefers softreset but tries all
2668 * possible reset sequences to reset and classify devices. This
2669 * function is intended to be used for constructing ->probe_reset
2670 * callback by low level drivers.
2671 *
2672 * Reset methods should follow the following rules.
2673 *
2674 * - Return 0 on sucess, -errno on failure.
2675 * - If classification is supported, fill classes[] with
2676 * recognized class codes.
2677 * - If classification is not supported, leave classes[] alone.
2678 *
2679 * LOCKING:
2680 * Kernel thread context (may sleep)
2681 *
2682 * RETURNS:
2683 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2684 * if classification fails, and any error code from reset
2685 * methods.
2686 */
2687 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2688 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2689 ata_postreset_fn_t postreset, unsigned int *classes)
2690 {
2691 int rc = -EINVAL;
2692
2693 ata_eh_freeze_port(ap);
2694
2695 if (probeinit)
2696 probeinit(ap);
2697
2698 if (softreset && !sata_set_spd_needed(ap)) {
2699 rc = ata_do_reset(ap, softreset, classes);
2700 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2701 goto done;
2702 ata_port_printk(ap, KERN_INFO, "softreset failed, "
2703 "will try hardreset in 5 secs\n");
2704 ssleep(5);
2705 }
2706
2707 if (!hardreset)
2708 goto done;
2709
2710 while (1) {
2711 rc = ata_do_reset(ap, hardreset, classes);
2712 if (rc == 0) {
2713 if (classes[0] != ATA_DEV_UNKNOWN)
2714 goto done;
2715 break;
2716 }
2717
2718 if (sata_down_spd_limit(ap))
2719 goto done;
2720
2721 ata_port_printk(ap, KERN_INFO, "hardreset failed, "
2722 "will retry in 5 secs\n");
2723 ssleep(5);
2724 }
2725
2726 if (softreset) {
2727 ata_port_printk(ap, KERN_INFO,
2728 "hardreset succeeded without classification, "
2729 "will retry softreset in 5 secs\n");
2730 ssleep(5);
2731
2732 rc = ata_do_reset(ap, softreset, classes);
2733 }
2734
2735 done:
2736 if (rc == 0) {
2737 if (postreset)
2738 postreset(ap, classes);
2739
2740 ata_eh_thaw_port(ap);
2741
2742 if (classes[0] == ATA_DEV_UNKNOWN)
2743 rc = -ENODEV;
2744 }
2745 return rc;
2746 }
2747
2748 /**
2749 * ata_dev_same_device - Determine whether new ID matches configured device
2750 * @dev: device to compare against
2751 * @new_class: class of the new device
2752 * @new_id: IDENTIFY page of the new device
2753 *
2754 * Compare @new_class and @new_id against @dev and determine
2755 * whether @dev is the device indicated by @new_class and
2756 * @new_id.
2757 *
2758 * LOCKING:
2759 * None.
2760 *
2761 * RETURNS:
2762 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2763 */
2764 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2765 const u16 *new_id)
2766 {
2767 const u16 *old_id = dev->id;
2768 unsigned char model[2][41], serial[2][21];
2769 u64 new_n_sectors;
2770
2771 if (dev->class != new_class) {
2772 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2773 dev->class, new_class);
2774 return 0;
2775 }
2776
2777 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2778 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2779 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2780 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2781 new_n_sectors = ata_id_n_sectors(new_id);
2782
2783 if (strcmp(model[0], model[1])) {
2784 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2785 "'%s' != '%s'\n", model[0], model[1]);
2786 return 0;
2787 }
2788
2789 if (strcmp(serial[0], serial[1])) {
2790 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2791 "'%s' != '%s'\n", serial[0], serial[1]);
2792 return 0;
2793 }
2794
2795 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2796 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2797 "%llu != %llu\n",
2798 (unsigned long long)dev->n_sectors,
2799 (unsigned long long)new_n_sectors);
2800 return 0;
2801 }
2802
2803 return 1;
2804 }
2805
2806 /**
2807 * ata_dev_revalidate - Revalidate ATA device
2808 * @dev: device to revalidate
2809 * @post_reset: is this revalidation after reset?
2810 *
2811 * Re-read IDENTIFY page and make sure @dev is still attached to
2812 * the port.
2813 *
2814 * LOCKING:
2815 * Kernel thread context (may sleep)
2816 *
2817 * RETURNS:
2818 * 0 on success, negative errno otherwise
2819 */
2820 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2821 {
2822 unsigned int class = dev->class;
2823 u16 *id = (void *)dev->ap->sector_buf;
2824 int rc;
2825
2826 if (!ata_dev_enabled(dev)) {
2827 rc = -ENODEV;
2828 goto fail;
2829 }
2830
2831 /* read ID data */
2832 rc = ata_dev_read_id(dev, &class, post_reset, id);
2833 if (rc)
2834 goto fail;
2835
2836 /* is the device still there? */
2837 if (!ata_dev_same_device(dev, class, id)) {
2838 rc = -ENODEV;
2839 goto fail;
2840 }
2841
2842 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2843
2844 /* configure device according to the new ID */
2845 rc = ata_dev_configure(dev, 0);
2846 if (rc == 0)
2847 return 0;
2848
2849 fail:
2850 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2851 return rc;
2852 }
2853
2854 static const char * const ata_dma_blacklist [] = {
2855 "WDC AC11000H", NULL,
2856 "WDC AC22100H", NULL,
2857 "WDC AC32500H", NULL,
2858 "WDC AC33100H", NULL,
2859 "WDC AC31600H", NULL,
2860 "WDC AC32100H", "24.09P07",
2861 "WDC AC23200L", "21.10N21",
2862 "Compaq CRD-8241B", NULL,
2863 "CRD-8400B", NULL,
2864 "CRD-8480B", NULL,
2865 "CRD-8482B", NULL,
2866 "CRD-84", NULL,
2867 "SanDisk SDP3B", NULL,
2868 "SanDisk SDP3B-64", NULL,
2869 "SANYO CD-ROM CRD", NULL,
2870 "HITACHI CDR-8", NULL,
2871 "HITACHI CDR-8335", NULL,
2872 "HITACHI CDR-8435", NULL,
2873 "Toshiba CD-ROM XM-6202B", NULL,
2874 "TOSHIBA CD-ROM XM-1702BC", NULL,
2875 "CD-532E-A", NULL,
2876 "E-IDE CD-ROM CR-840", NULL,
2877 "CD-ROM Drive/F5A", NULL,
2878 "WPI CDD-820", NULL,
2879 "SAMSUNG CD-ROM SC-148C", NULL,
2880 "SAMSUNG CD-ROM SC", NULL,
2881 "SanDisk SDP3B-64", NULL,
2882 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2883 "_NEC DV5800A", NULL,
2884 "SAMSUNG CD-ROM SN-124", "N001"
2885 };
2886
2887 static int ata_strim(char *s, size_t len)
2888 {
2889 len = strnlen(s, len);
2890
2891 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2892 while ((len > 0) && (s[len - 1] == ' ')) {
2893 len--;
2894 s[len] = 0;
2895 }
2896 return len;
2897 }
2898
2899 static int ata_dma_blacklisted(const struct ata_device *dev)
2900 {
2901 unsigned char model_num[40];
2902 unsigned char model_rev[16];
2903 unsigned int nlen, rlen;
2904 int i;
2905
2906 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2907 sizeof(model_num));
2908 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2909 sizeof(model_rev));
2910 nlen = ata_strim(model_num, sizeof(model_num));
2911 rlen = ata_strim(model_rev, sizeof(model_rev));
2912
2913 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2914 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2915 if (ata_dma_blacklist[i+1] == NULL)
2916 return 1;
2917 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2918 return 1;
2919 }
2920 }
2921 return 0;
2922 }
2923
2924 /**
2925 * ata_dev_xfermask - Compute supported xfermask of the given device
2926 * @dev: Device to compute xfermask for
2927 *
2928 * Compute supported xfermask of @dev and store it in
2929 * dev->*_mask. This function is responsible for applying all
2930 * known limits including host controller limits, device
2931 * blacklist, etc...
2932 *
2933 * FIXME: The current implementation limits all transfer modes to
2934 * the fastest of the lowested device on the port. This is not
2935 * required on most controllers.
2936 *
2937 * LOCKING:
2938 * None.
2939 */
2940 static void ata_dev_xfermask(struct ata_device *dev)
2941 {
2942 struct ata_port *ap = dev->ap;
2943 struct ata_host_set *hs = ap->host_set;
2944 unsigned long xfer_mask;
2945 int i;
2946
2947 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2948 ap->mwdma_mask, ap->udma_mask);
2949
2950 /* Apply cable rule here. Don't apply it early because when
2951 * we handle hot plug the cable type can itself change.
2952 */
2953 if (ap->cbl == ATA_CBL_PATA40)
2954 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
2955
2956 /* FIXME: Use port-wide xfermask for now */
2957 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2958 struct ata_device *d = &ap->device[i];
2959
2960 if (ata_dev_absent(d))
2961 continue;
2962
2963 if (ata_dev_disabled(d)) {
2964 /* to avoid violating device selection timing */
2965 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2966 UINT_MAX, UINT_MAX);
2967 continue;
2968 }
2969
2970 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2971 d->mwdma_mask, d->udma_mask);
2972 xfer_mask &= ata_id_xfermask(d->id);
2973 if (ata_dma_blacklisted(d))
2974 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2975 }
2976
2977 if (ata_dma_blacklisted(dev))
2978 ata_dev_printk(dev, KERN_WARNING,
2979 "device is on DMA blacklist, disabling DMA\n");
2980
2981 if (hs->flags & ATA_HOST_SIMPLEX) {
2982 if (hs->simplex_claimed)
2983 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2984 }
2985
2986 if (ap->ops->mode_filter)
2987 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2988
2989 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2990 &dev->mwdma_mask, &dev->udma_mask);
2991 }
2992
2993 /**
2994 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2995 * @dev: Device to which command will be sent
2996 *
2997 * Issue SET FEATURES - XFER MODE command to device @dev
2998 * on port @ap.
2999 *
3000 * LOCKING:
3001 * PCI/etc. bus probe sem.
3002 *
3003 * RETURNS:
3004 * 0 on success, AC_ERR_* mask otherwise.
3005 */
3006
3007 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3008 {
3009 struct ata_taskfile tf;
3010 unsigned int err_mask;
3011
3012 /* set up set-features taskfile */
3013 DPRINTK("set features - xfer mode\n");
3014
3015 ata_tf_init(dev, &tf);
3016 tf.command = ATA_CMD_SET_FEATURES;
3017 tf.feature = SETFEATURES_XFER;
3018 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3019 tf.protocol = ATA_PROT_NODATA;
3020 tf.nsect = dev->xfer_mode;
3021
3022 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3023
3024 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3025 return err_mask;
3026 }
3027
3028 /**
3029 * ata_dev_init_params - Issue INIT DEV PARAMS command
3030 * @dev: Device to which command will be sent
3031 * @heads: Number of heads
3032 * @sectors: Number of sectors
3033 *
3034 * LOCKING:
3035 * Kernel thread context (may sleep)
3036 *
3037 * RETURNS:
3038 * 0 on success, AC_ERR_* mask otherwise.
3039 */
3040 static unsigned int ata_dev_init_params(struct ata_device *dev,
3041 u16 heads, u16 sectors)
3042 {
3043 struct ata_taskfile tf;
3044 unsigned int err_mask;
3045
3046 /* Number of sectors per track 1-255. Number of heads 1-16 */
3047 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3048 return AC_ERR_INVALID;
3049
3050 /* set up init dev params taskfile */
3051 DPRINTK("init dev params \n");
3052
3053 ata_tf_init(dev, &tf);
3054 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3055 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3056 tf.protocol = ATA_PROT_NODATA;
3057 tf.nsect = sectors;
3058 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3059
3060 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3061
3062 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3063 return err_mask;
3064 }
3065
3066 /**
3067 * ata_sg_clean - Unmap DMA memory associated with command
3068 * @qc: Command containing DMA memory to be released
3069 *
3070 * Unmap all mapped DMA memory associated with this command.
3071 *
3072 * LOCKING:
3073 * spin_lock_irqsave(host_set lock)
3074 */
3075
3076 static void ata_sg_clean(struct ata_queued_cmd *qc)
3077 {
3078 struct ata_port *ap = qc->ap;
3079 struct scatterlist *sg = qc->__sg;
3080 int dir = qc->dma_dir;
3081 void *pad_buf = NULL;
3082
3083 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3084 WARN_ON(sg == NULL);
3085
3086 if (qc->flags & ATA_QCFLAG_SINGLE)
3087 WARN_ON(qc->n_elem > 1);
3088
3089 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3090
3091 /* if we padded the buffer out to 32-bit bound, and data
3092 * xfer direction is from-device, we must copy from the
3093 * pad buffer back into the supplied buffer
3094 */
3095 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3096 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3097
3098 if (qc->flags & ATA_QCFLAG_SG) {
3099 if (qc->n_elem)
3100 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3101 /* restore last sg */
3102 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3103 if (pad_buf) {
3104 struct scatterlist *psg = &qc->pad_sgent;
3105 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3106 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3107 kunmap_atomic(addr, KM_IRQ0);
3108 }
3109 } else {
3110 if (qc->n_elem)
3111 dma_unmap_single(ap->dev,
3112 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3113 dir);
3114 /* restore sg */
3115 sg->length += qc->pad_len;
3116 if (pad_buf)
3117 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3118 pad_buf, qc->pad_len);
3119 }
3120
3121 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3122 qc->__sg = NULL;
3123 }
3124
3125 /**
3126 * ata_fill_sg - Fill PCI IDE PRD table
3127 * @qc: Metadata associated with taskfile to be transferred
3128 *
3129 * Fill PCI IDE PRD (scatter-gather) table with segments
3130 * associated with the current disk command.
3131 *
3132 * LOCKING:
3133 * spin_lock_irqsave(host_set lock)
3134 *
3135 */
3136 static void ata_fill_sg(struct ata_queued_cmd *qc)
3137 {
3138 struct ata_port *ap = qc->ap;
3139 struct scatterlist *sg;
3140 unsigned int idx;
3141
3142 WARN_ON(qc->__sg == NULL);
3143 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3144
3145 idx = 0;
3146 ata_for_each_sg(sg, qc) {
3147 u32 addr, offset;
3148 u32 sg_len, len;
3149
3150 /* determine if physical DMA addr spans 64K boundary.
3151 * Note h/w doesn't support 64-bit, so we unconditionally
3152 * truncate dma_addr_t to u32.
3153 */
3154 addr = (u32) sg_dma_address(sg);
3155 sg_len = sg_dma_len(sg);
3156
3157 while (sg_len) {
3158 offset = addr & 0xffff;
3159 len = sg_len;
3160 if ((offset + sg_len) > 0x10000)
3161 len = 0x10000 - offset;
3162
3163 ap->prd[idx].addr = cpu_to_le32(addr);
3164 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3165 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3166
3167 idx++;
3168 sg_len -= len;
3169 addr += len;
3170 }
3171 }
3172
3173 if (idx)
3174 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3175 }
3176 /**
3177 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3178 * @qc: Metadata associated with taskfile to check
3179 *
3180 * Allow low-level driver to filter ATA PACKET commands, returning
3181 * a status indicating whether or not it is OK to use DMA for the
3182 * supplied PACKET command.
3183 *
3184 * LOCKING:
3185 * spin_lock_irqsave(host_set lock)
3186 *
3187 * RETURNS: 0 when ATAPI DMA can be used
3188 * nonzero otherwise
3189 */
3190 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3191 {
3192 struct ata_port *ap = qc->ap;
3193 int rc = 0; /* Assume ATAPI DMA is OK by default */
3194
3195 if (ap->ops->check_atapi_dma)
3196 rc = ap->ops->check_atapi_dma(qc);
3197
3198 return rc;
3199 }
3200 /**
3201 * ata_qc_prep - Prepare taskfile for submission
3202 * @qc: Metadata associated with taskfile to be prepared
3203 *
3204 * Prepare ATA taskfile for submission.
3205 *
3206 * LOCKING:
3207 * spin_lock_irqsave(host_set lock)
3208 */
3209 void ata_qc_prep(struct ata_queued_cmd *qc)
3210 {
3211 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3212 return;
3213
3214 ata_fill_sg(qc);
3215 }
3216
3217 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3218
3219 /**
3220 * ata_sg_init_one - Associate command with memory buffer
3221 * @qc: Command to be associated
3222 * @buf: Memory buffer
3223 * @buflen: Length of memory buffer, in bytes.
3224 *
3225 * Initialize the data-related elements of queued_cmd @qc
3226 * to point to a single memory buffer, @buf of byte length @buflen.
3227 *
3228 * LOCKING:
3229 * spin_lock_irqsave(host_set lock)
3230 */
3231
3232 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3233 {
3234 struct scatterlist *sg;
3235
3236 qc->flags |= ATA_QCFLAG_SINGLE;
3237
3238 memset(&qc->sgent, 0, sizeof(qc->sgent));
3239 qc->__sg = &qc->sgent;
3240 qc->n_elem = 1;
3241 qc->orig_n_elem = 1;
3242 qc->buf_virt = buf;
3243
3244 sg = qc->__sg;
3245 sg_init_one(sg, buf, buflen);
3246 }
3247
3248 /**
3249 * ata_sg_init - Associate command with scatter-gather table.
3250 * @qc: Command to be associated
3251 * @sg: Scatter-gather table.
3252 * @n_elem: Number of elements in s/g table.
3253 *
3254 * Initialize the data-related elements of queued_cmd @qc
3255 * to point to a scatter-gather table @sg, containing @n_elem
3256 * elements.
3257 *
3258 * LOCKING:
3259 * spin_lock_irqsave(host_set lock)
3260 */
3261
3262 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3263 unsigned int n_elem)
3264 {
3265 qc->flags |= ATA_QCFLAG_SG;
3266 qc->__sg = sg;
3267 qc->n_elem = n_elem;
3268 qc->orig_n_elem = n_elem;
3269 }
3270
3271 /**
3272 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3273 * @qc: Command with memory buffer to be mapped.
3274 *
3275 * DMA-map the memory buffer associated with queued_cmd @qc.
3276 *
3277 * LOCKING:
3278 * spin_lock_irqsave(host_set lock)
3279 *
3280 * RETURNS:
3281 * Zero on success, negative on error.
3282 */
3283
3284 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3285 {
3286 struct ata_port *ap = qc->ap;
3287 int dir = qc->dma_dir;
3288 struct scatterlist *sg = qc->__sg;
3289 dma_addr_t dma_address;
3290 int trim_sg = 0;
3291
3292 /* we must lengthen transfers to end on a 32-bit boundary */
3293 qc->pad_len = sg->length & 3;
3294 if (qc->pad_len) {
3295 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3296 struct scatterlist *psg = &qc->pad_sgent;
3297
3298 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3299
3300 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3301
3302 if (qc->tf.flags & ATA_TFLAG_WRITE)
3303 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3304 qc->pad_len);
3305
3306 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3307 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3308 /* trim sg */
3309 sg->length -= qc->pad_len;
3310 if (sg->length == 0)
3311 trim_sg = 1;
3312
3313 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3314 sg->length, qc->pad_len);
3315 }
3316
3317 if (trim_sg) {
3318 qc->n_elem--;
3319 goto skip_map;
3320 }
3321
3322 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3323 sg->length, dir);
3324 if (dma_mapping_error(dma_address)) {
3325 /* restore sg */
3326 sg->length += qc->pad_len;
3327 return -1;
3328 }
3329
3330 sg_dma_address(sg) = dma_address;
3331 sg_dma_len(sg) = sg->length;
3332
3333 skip_map:
3334 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3335 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3336
3337 return 0;
3338 }
3339
3340 /**
3341 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3342 * @qc: Command with scatter-gather table to be mapped.
3343 *
3344 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3345 *
3346 * LOCKING:
3347 * spin_lock_irqsave(host_set lock)
3348 *
3349 * RETURNS:
3350 * Zero on success, negative on error.
3351 *
3352 */
3353
3354 static int ata_sg_setup(struct ata_queued_cmd *qc)
3355 {
3356 struct ata_port *ap = qc->ap;
3357 struct scatterlist *sg = qc->__sg;
3358 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3359 int n_elem, pre_n_elem, dir, trim_sg = 0;
3360
3361 VPRINTK("ENTER, ata%u\n", ap->id);
3362 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3363
3364 /* we must lengthen transfers to end on a 32-bit boundary */
3365 qc->pad_len = lsg->length & 3;
3366 if (qc->pad_len) {
3367 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3368 struct scatterlist *psg = &qc->pad_sgent;
3369 unsigned int offset;
3370
3371 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3372
3373 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3374
3375 /*
3376 * psg->page/offset are used to copy to-be-written
3377 * data in this function or read data in ata_sg_clean.
3378 */
3379 offset = lsg->offset + lsg->length - qc->pad_len;
3380 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3381 psg->offset = offset_in_page(offset);
3382
3383 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3384 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3385 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3386 kunmap_atomic(addr, KM_IRQ0);
3387 }
3388
3389 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3390 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3391 /* trim last sg */
3392 lsg->length -= qc->pad_len;
3393 if (lsg->length == 0)
3394 trim_sg = 1;
3395
3396 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3397 qc->n_elem - 1, lsg->length, qc->pad_len);
3398 }
3399
3400 pre_n_elem = qc->n_elem;
3401 if (trim_sg && pre_n_elem)
3402 pre_n_elem--;
3403
3404 if (!pre_n_elem) {
3405 n_elem = 0;
3406 goto skip_map;
3407 }
3408
3409 dir = qc->dma_dir;
3410 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3411 if (n_elem < 1) {
3412 /* restore last sg */
3413 lsg->length += qc->pad_len;
3414 return -1;
3415 }
3416
3417 DPRINTK("%d sg elements mapped\n", n_elem);
3418
3419 skip_map:
3420 qc->n_elem = n_elem;
3421
3422 return 0;
3423 }
3424
3425 /**
3426 * ata_poll_qc_complete - turn irq back on and finish qc
3427 * @qc: Command to complete
3428 * @err_mask: ATA status register content
3429 *
3430 * LOCKING:
3431 * None. (grabs host lock)
3432 */
3433
3434 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
3435 {
3436 struct ata_port *ap = qc->ap;
3437 unsigned long flags;
3438
3439 spin_lock_irqsave(&ap->host_set->lock, flags);
3440 ap->flags &= ~ATA_FLAG_NOINTR;
3441 ata_irq_on(ap);
3442 ata_qc_complete(qc);
3443 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3444 }
3445
3446 /**
3447 * ata_pio_poll - poll using PIO, depending on current state
3448 * @qc: qc in progress
3449 *
3450 * LOCKING:
3451 * None. (executing in kernel thread context)
3452 *
3453 * RETURNS:
3454 * timeout value to use
3455 */
3456 static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
3457 {
3458 struct ata_port *ap = qc->ap;
3459 u8 status;
3460 unsigned int poll_state = HSM_ST_UNKNOWN;
3461 unsigned int reg_state = HSM_ST_UNKNOWN;
3462
3463 switch (ap->hsm_task_state) {
3464 case HSM_ST:
3465 case HSM_ST_POLL:
3466 poll_state = HSM_ST_POLL;
3467 reg_state = HSM_ST;
3468 break;
3469 case HSM_ST_LAST:
3470 case HSM_ST_LAST_POLL:
3471 poll_state = HSM_ST_LAST_POLL;
3472 reg_state = HSM_ST_LAST;
3473 break;
3474 default:
3475 BUG();
3476 break;
3477 }
3478
3479 status = ata_chk_status(ap);
3480 if (status & ATA_BUSY) {
3481 if (time_after(jiffies, ap->pio_task_timeout)) {
3482 qc->err_mask |= AC_ERR_TIMEOUT;
3483 ap->hsm_task_state = HSM_ST_TMOUT;
3484 return 0;
3485 }
3486 ap->hsm_task_state = poll_state;
3487 return ATA_SHORT_PAUSE;
3488 }
3489
3490 ap->hsm_task_state = reg_state;
3491 return 0;
3492 }
3493
3494 /**
3495 * ata_pio_complete - check if drive is busy or idle
3496 * @qc: qc to complete
3497 *
3498 * LOCKING:
3499 * None. (executing in kernel thread context)
3500 *
3501 * RETURNS:
3502 * Non-zero if qc completed, zero otherwise.
3503 */
3504 static int ata_pio_complete(struct ata_queued_cmd *qc)
3505 {
3506 struct ata_port *ap = qc->ap;
3507 u8 drv_stat;
3508
3509 /*
3510 * This is purely heuristic. This is a fast path. Sometimes when
3511 * we enter, BSY will be cleared in a chk-status or two. If not,
3512 * the drive is probably seeking or something. Snooze for a couple
3513 * msecs, then chk-status again. If still busy, fall back to
3514 * HSM_ST_POLL state.
3515 */
3516 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3517 if (drv_stat & ATA_BUSY) {
3518 msleep(2);
3519 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3520 if (drv_stat & ATA_BUSY) {
3521 ap->hsm_task_state = HSM_ST_LAST_POLL;
3522 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3523 return 0;
3524 }
3525 }
3526
3527 drv_stat = ata_wait_idle(ap);
3528 if (!ata_ok(drv_stat)) {
3529 qc->err_mask |= __ac_err_mask(drv_stat);
3530 ap->hsm_task_state = HSM_ST_ERR;
3531 return 0;
3532 }
3533
3534 ap->hsm_task_state = HSM_ST_IDLE;
3535
3536 WARN_ON(qc->err_mask);
3537 ata_poll_qc_complete(qc);
3538
3539 /* another command may start at this point */
3540
3541 return 1;
3542 }
3543
3544
3545 /**
3546 * swap_buf_le16 - swap halves of 16-bit words in place
3547 * @buf: Buffer to swap
3548 * @buf_words: Number of 16-bit words in buffer.
3549 *
3550 * Swap halves of 16-bit words if needed to convert from
3551 * little-endian byte order to native cpu byte order, or
3552 * vice-versa.
3553 *
3554 * LOCKING:
3555 * Inherited from caller.
3556 */
3557 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3558 {
3559 #ifdef __BIG_ENDIAN
3560 unsigned int i;
3561
3562 for (i = 0; i < buf_words; i++)
3563 buf[i] = le16_to_cpu(buf[i]);
3564 #endif /* __BIG_ENDIAN */
3565 }
3566
3567 /**
3568 * ata_mmio_data_xfer - Transfer data by MMIO
3569 * @ap: port to read/write
3570 * @buf: data buffer
3571 * @buflen: buffer length
3572 * @write_data: read/write
3573 *
3574 * Transfer data from/to the device data register by MMIO.
3575 *
3576 * LOCKING:
3577 * Inherited from caller.
3578 */
3579
3580 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3581 unsigned int buflen, int write_data)
3582 {
3583 unsigned int i;
3584 unsigned int words = buflen >> 1;
3585 u16 *buf16 = (u16 *) buf;
3586 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3587
3588 /* Transfer multiple of 2 bytes */
3589 if (write_data) {
3590 for (i = 0; i < words; i++)
3591 writew(le16_to_cpu(buf16[i]), mmio);
3592 } else {
3593 for (i = 0; i < words; i++)
3594 buf16[i] = cpu_to_le16(readw(mmio));
3595 }
3596
3597 /* Transfer trailing 1 byte, if any. */
3598 if (unlikely(buflen & 0x01)) {
3599 u16 align_buf[1] = { 0 };
3600 unsigned char *trailing_buf = buf + buflen - 1;
3601
3602 if (write_data) {
3603 memcpy(align_buf, trailing_buf, 1);
3604 writew(le16_to_cpu(align_buf[0]), mmio);
3605 } else {
3606 align_buf[0] = cpu_to_le16(readw(mmio));
3607 memcpy(trailing_buf, align_buf, 1);
3608 }
3609 }
3610 }
3611
3612 /**
3613 * ata_pio_data_xfer - Transfer data by PIO
3614 * @ap: port to read/write
3615 * @buf: data buffer
3616 * @buflen: buffer length
3617 * @write_data: read/write
3618 *
3619 * Transfer data from/to the device data register by PIO.
3620 *
3621 * LOCKING:
3622 * Inherited from caller.
3623 */
3624
3625 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3626 unsigned int buflen, int write_data)
3627 {
3628 unsigned int words = buflen >> 1;
3629
3630 /* Transfer multiple of 2 bytes */
3631 if (write_data)
3632 outsw(ap->ioaddr.data_addr, buf, words);
3633 else
3634 insw(ap->ioaddr.data_addr, buf, words);
3635
3636 /* Transfer trailing 1 byte, if any. */
3637 if (unlikely(buflen & 0x01)) {
3638 u16 align_buf[1] = { 0 };
3639 unsigned char *trailing_buf = buf + buflen - 1;
3640
3641 if (write_data) {
3642 memcpy(align_buf, trailing_buf, 1);
3643 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3644 } else {
3645 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3646 memcpy(trailing_buf, align_buf, 1);
3647 }
3648 }
3649 }
3650
3651 /**
3652 * ata_data_xfer - Transfer data from/to the data register.
3653 * @ap: port to read/write
3654 * @buf: data buffer
3655 * @buflen: buffer length
3656 * @do_write: read/write
3657 *
3658 * Transfer data from/to the device data register.
3659 *
3660 * LOCKING:
3661 * Inherited from caller.
3662 */
3663
3664 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3665 unsigned int buflen, int do_write)
3666 {
3667 /* Make the crap hardware pay the costs not the good stuff */
3668 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3669 unsigned long flags;
3670 local_irq_save(flags);
3671 if (ap->flags & ATA_FLAG_MMIO)
3672 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3673 else
3674 ata_pio_data_xfer(ap, buf, buflen, do_write);
3675 local_irq_restore(flags);
3676 } else {
3677 if (ap->flags & ATA_FLAG_MMIO)
3678 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3679 else
3680 ata_pio_data_xfer(ap, buf, buflen, do_write);
3681 }
3682 }
3683
3684 /**
3685 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3686 * @qc: Command on going
3687 *
3688 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3689 *
3690 * LOCKING:
3691 * Inherited from caller.
3692 */
3693
3694 static void ata_pio_sector(struct ata_queued_cmd *qc)
3695 {
3696 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3697 struct scatterlist *sg = qc->__sg;
3698 struct ata_port *ap = qc->ap;
3699 struct page *page;
3700 unsigned int offset;
3701 unsigned char *buf;
3702
3703 if (qc->cursect == (qc->nsect - 1))
3704 ap->hsm_task_state = HSM_ST_LAST;
3705
3706 page = sg[qc->cursg].page;
3707 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3708
3709 /* get the current page and offset */
3710 page = nth_page(page, (offset >> PAGE_SHIFT));
3711 offset %= PAGE_SIZE;
3712
3713 buf = kmap(page) + offset;
3714
3715 qc->cursect++;
3716 qc->cursg_ofs++;
3717
3718 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3719 qc->cursg++;
3720 qc->cursg_ofs = 0;
3721 }
3722
3723 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3724
3725 /* do the actual data transfer */
3726 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3727 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3728
3729 kunmap(page);
3730 }
3731
3732 /**
3733 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3734 * @qc: Command on going
3735 * @bytes: number of bytes
3736 *
3737 * Transfer Transfer data from/to the ATAPI device.
3738 *
3739 * LOCKING:
3740 * Inherited from caller.
3741 *
3742 */
3743
3744 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3745 {
3746 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3747 struct scatterlist *sg = qc->__sg;
3748 struct ata_port *ap = qc->ap;
3749 struct page *page;
3750 unsigned char *buf;
3751 unsigned int offset, count;
3752
3753 if (qc->curbytes + bytes >= qc->nbytes)
3754 ap->hsm_task_state = HSM_ST_LAST;
3755
3756 next_sg:
3757 if (unlikely(qc->cursg >= qc->n_elem)) {
3758 /*
3759 * The end of qc->sg is reached and the device expects
3760 * more data to transfer. In order not to overrun qc->sg
3761 * and fulfill length specified in the byte count register,
3762 * - for read case, discard trailing data from the device
3763 * - for write case, padding zero data to the device
3764 */
3765 u16 pad_buf[1] = { 0 };
3766 unsigned int words = bytes >> 1;
3767 unsigned int i;
3768
3769 if (words) /* warning if bytes > 1 */
3770 ata_dev_printk(qc->dev, KERN_WARNING,
3771 "%u bytes trailing data\n", bytes);
3772
3773 for (i = 0; i < words; i++)
3774 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3775
3776 ap->hsm_task_state = HSM_ST_LAST;
3777 return;
3778 }
3779
3780 sg = &qc->__sg[qc->cursg];
3781
3782 page = sg->page;
3783 offset = sg->offset + qc->cursg_ofs;
3784
3785 /* get the current page and offset */
3786 page = nth_page(page, (offset >> PAGE_SHIFT));
3787 offset %= PAGE_SIZE;
3788
3789 /* don't overrun current sg */
3790 count = min(sg->length - qc->cursg_ofs, bytes);
3791
3792 /* don't cross page boundaries */
3793 count = min(count, (unsigned int)PAGE_SIZE - offset);
3794
3795 buf = kmap(page) + offset;
3796
3797 bytes -= count;
3798 qc->curbytes += count;
3799 qc->cursg_ofs += count;
3800
3801 if (qc->cursg_ofs == sg->length) {
3802 qc->cursg++;
3803 qc->cursg_ofs = 0;
3804 }
3805
3806 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3807
3808 /* do the actual data transfer */
3809 ata_data_xfer(ap, buf, count, do_write);
3810
3811 kunmap(page);
3812
3813 if (bytes)
3814 goto next_sg;
3815 }
3816
3817 /**
3818 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3819 * @qc: Command on going
3820 *
3821 * Transfer Transfer data from/to the ATAPI device.
3822 *
3823 * LOCKING:
3824 * Inherited from caller.
3825 */
3826
3827 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3828 {
3829 struct ata_port *ap = qc->ap;
3830 struct ata_device *dev = qc->dev;
3831 unsigned int ireason, bc_lo, bc_hi, bytes;
3832 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3833
3834 ap->ops->tf_read(ap, &qc->tf);
3835 ireason = qc->tf.nsect;
3836 bc_lo = qc->tf.lbam;
3837 bc_hi = qc->tf.lbah;
3838 bytes = (bc_hi << 8) | bc_lo;
3839
3840 /* shall be cleared to zero, indicating xfer of data */
3841 if (ireason & (1 << 0))
3842 goto err_out;
3843
3844 /* make sure transfer direction matches expected */
3845 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3846 if (do_write != i_write)
3847 goto err_out;
3848
3849 __atapi_pio_bytes(qc, bytes);
3850
3851 return;
3852
3853 err_out:
3854 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3855 qc->err_mask |= AC_ERR_HSM;
3856 ap->hsm_task_state = HSM_ST_ERR;
3857 }
3858
3859 /**
3860 * ata_pio_block - start PIO on a block
3861 * @qc: qc to transfer block for
3862 *
3863 * LOCKING:
3864 * None. (executing in kernel thread context)
3865 */
3866 static void ata_pio_block(struct ata_queued_cmd *qc)
3867 {
3868 struct ata_port *ap = qc->ap;
3869 u8 status;
3870
3871 /*
3872 * This is purely heuristic. This is a fast path.
3873 * Sometimes when we enter, BSY will be cleared in
3874 * a chk-status or two. If not, the drive is probably seeking
3875 * or something. Snooze for a couple msecs, then
3876 * chk-status again. If still busy, fall back to
3877 * HSM_ST_POLL state.
3878 */
3879 status = ata_busy_wait(ap, ATA_BUSY, 5);
3880 if (status & ATA_BUSY) {
3881 msleep(2);
3882 status = ata_busy_wait(ap, ATA_BUSY, 10);
3883 if (status & ATA_BUSY) {
3884 ap->hsm_task_state = HSM_ST_POLL;
3885 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3886 return;
3887 }
3888 }
3889
3890 /* check error */
3891 if (status & (ATA_ERR | ATA_DF)) {
3892 qc->err_mask |= AC_ERR_DEV;
3893 ap->hsm_task_state = HSM_ST_ERR;
3894 return;
3895 }
3896
3897 /* transfer data if any */
3898 if (is_atapi_taskfile(&qc->tf)) {
3899 /* DRQ=0 means no more data to transfer */
3900 if ((status & ATA_DRQ) == 0) {
3901 ap->hsm_task_state = HSM_ST_LAST;
3902 return;
3903 }
3904
3905 atapi_pio_bytes(qc);
3906 } else {
3907 /* handle BSY=0, DRQ=0 as error */
3908 if ((status & ATA_DRQ) == 0) {
3909 qc->err_mask |= AC_ERR_HSM;
3910 ap->hsm_task_state = HSM_ST_ERR;
3911 return;
3912 }
3913
3914 ata_pio_sector(qc);
3915 }
3916 }
3917
3918 static void ata_pio_error(struct ata_queued_cmd *qc)
3919 {
3920 struct ata_port *ap = qc->ap;
3921
3922 if (qc->tf.command != ATA_CMD_PACKET)
3923 ata_dev_printk(qc->dev, KERN_WARNING, "PIO error\n");
3924
3925 /* make sure qc->err_mask is available to
3926 * know what's wrong and recover
3927 */
3928 WARN_ON(qc->err_mask == 0);
3929
3930 ap->hsm_task_state = HSM_ST_IDLE;
3931
3932 ata_poll_qc_complete(qc);
3933 }
3934
3935 static void ata_pio_task(void *_data)
3936 {
3937 struct ata_queued_cmd *qc = _data;
3938 struct ata_port *ap = qc->ap;
3939 unsigned long timeout;
3940 int qc_completed;
3941
3942 fsm_start:
3943 timeout = 0;
3944 qc_completed = 0;
3945
3946 switch (ap->hsm_task_state) {
3947 case HSM_ST_IDLE:
3948 return;
3949
3950 case HSM_ST:
3951 ata_pio_block(qc);
3952 break;
3953
3954 case HSM_ST_LAST:
3955 qc_completed = ata_pio_complete(qc);
3956 break;
3957
3958 case HSM_ST_POLL:
3959 case HSM_ST_LAST_POLL:
3960 timeout = ata_pio_poll(qc);
3961 break;
3962
3963 case HSM_ST_TMOUT:
3964 case HSM_ST_ERR:
3965 ata_pio_error(qc);
3966 return;
3967 }
3968
3969 if (timeout)
3970 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
3971 else if (!qc_completed)
3972 goto fsm_start;
3973 }
3974
3975 /**
3976 * atapi_packet_task - Write CDB bytes to hardware
3977 * @_data: qc in progress
3978 *
3979 * When device has indicated its readiness to accept
3980 * a CDB, this function is called. Send the CDB.
3981 * If DMA is to be performed, exit immediately.
3982 * Otherwise, we are in polling mode, so poll
3983 * status under operation succeeds or fails.
3984 *
3985 * LOCKING:
3986 * Kernel thread context (may sleep)
3987 */
3988 static void atapi_packet_task(void *_data)
3989 {
3990 struct ata_queued_cmd *qc = _data;
3991 struct ata_port *ap = qc->ap;
3992 u8 status;
3993
3994 /* sleep-wait for BSY to clear */
3995 DPRINTK("busy wait\n");
3996 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3997 qc->err_mask |= AC_ERR_TIMEOUT;
3998 goto err_out;
3999 }
4000
4001 /* make sure DRQ is set */
4002 status = ata_chk_status(ap);
4003 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
4004 qc->err_mask |= AC_ERR_HSM;
4005 goto err_out;
4006 }
4007
4008 /* send SCSI cdb */
4009 DPRINTK("send cdb\n");
4010 WARN_ON(qc->dev->cdb_len < 12);
4011
4012 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4013 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4014 unsigned long flags;
4015
4016 /* Once we're done issuing command and kicking bmdma,
4017 * irq handler takes over. To not lose irq, we need
4018 * to clear NOINTR flag before sending cdb, but
4019 * interrupt handler shouldn't be invoked before we're
4020 * finished. Hence, the following locking.
4021 */
4022 spin_lock_irqsave(&ap->host_set->lock, flags);
4023 ap->flags &= ~ATA_FLAG_NOINTR;
4024 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4025 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4026 ap->ops->bmdma_start(qc); /* initiate bmdma */
4027 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4028 } else {
4029 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4030
4031 /* PIO commands are handled by polling */
4032 ap->hsm_task_state = HSM_ST;
4033 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4034 }
4035
4036 return;
4037
4038 err_out:
4039 ata_poll_qc_complete(qc);
4040 }
4041
4042 /**
4043 * ata_qc_new - Request an available ATA command, for queueing
4044 * @ap: Port associated with device @dev
4045 * @dev: Device from whom we request an available command structure
4046 *
4047 * LOCKING:
4048 * None.
4049 */
4050
4051 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4052 {
4053 struct ata_queued_cmd *qc = NULL;
4054 unsigned int i;
4055
4056 /* no command while frozen */
4057 if (unlikely(ap->flags & ATA_FLAG_FROZEN))
4058 return NULL;
4059
4060 /* the last tag is reserved for internal command. */
4061 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4062 if (!test_and_set_bit(i, &ap->qactive)) {
4063 qc = __ata_qc_from_tag(ap, i);
4064 break;
4065 }
4066
4067 if (qc)
4068 qc->tag = i;
4069
4070 return qc;
4071 }
4072
4073 /**
4074 * ata_qc_new_init - Request an available ATA command, and initialize it
4075 * @dev: Device from whom we request an available command structure
4076 *
4077 * LOCKING:
4078 * None.
4079 */
4080
4081 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4082 {
4083 struct ata_port *ap = dev->ap;
4084 struct ata_queued_cmd *qc;
4085
4086 qc = ata_qc_new(ap);
4087 if (qc) {
4088 qc->scsicmd = NULL;
4089 qc->ap = ap;
4090 qc->dev = dev;
4091
4092 ata_qc_reinit(qc);
4093 }
4094
4095 return qc;
4096 }
4097
4098 /**
4099 * ata_qc_free - free unused ata_queued_cmd
4100 * @qc: Command to complete
4101 *
4102 * Designed to free unused ata_queued_cmd object
4103 * in case something prevents using it.
4104 *
4105 * LOCKING:
4106 * spin_lock_irqsave(host_set lock)
4107 */
4108 void ata_qc_free(struct ata_queued_cmd *qc)
4109 {
4110 struct ata_port *ap = qc->ap;
4111 unsigned int tag;
4112
4113 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4114
4115 qc->flags = 0;
4116 tag = qc->tag;
4117 if (likely(ata_tag_valid(tag))) {
4118 qc->tag = ATA_TAG_POISON;
4119 clear_bit(tag, &ap->qactive);
4120 }
4121 }
4122
4123 void __ata_qc_complete(struct ata_queued_cmd *qc)
4124 {
4125 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4126 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4127
4128 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4129 ata_sg_clean(qc);
4130
4131 /* command should be marked inactive atomically with qc completion */
4132 qc->ap->active_tag = ATA_TAG_POISON;
4133
4134 /* atapi: mark qc as inactive to prevent the interrupt handler
4135 * from completing the command twice later, before the error handler
4136 * is called. (when rc != 0 and atapi request sense is needed)
4137 */
4138 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4139
4140 /* call completion callback */
4141 qc->complete_fn(qc);
4142 }
4143
4144 /**
4145 * ata_qc_complete - Complete an active ATA command
4146 * @qc: Command to complete
4147 * @err_mask: ATA Status register contents
4148 *
4149 * Indicate to the mid and upper layers that an ATA
4150 * command has completed, with either an ok or not-ok status.
4151 *
4152 * LOCKING:
4153 * spin_lock_irqsave(host_set lock)
4154 */
4155 void ata_qc_complete(struct ata_queued_cmd *qc)
4156 {
4157 struct ata_port *ap = qc->ap;
4158
4159 /* XXX: New EH and old EH use different mechanisms to
4160 * synchronize EH with regular execution path.
4161 *
4162 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4163 * Normal execution path is responsible for not accessing a
4164 * failed qc. libata core enforces the rule by returning NULL
4165 * from ata_qc_from_tag() for failed qcs.
4166 *
4167 * Old EH depends on ata_qc_complete() nullifying completion
4168 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4169 * not synchronize with interrupt handler. Only PIO task is
4170 * taken care of.
4171 */
4172 if (ap->ops->error_handler) {
4173 WARN_ON(ap->flags & ATA_FLAG_FROZEN);
4174
4175 if (unlikely(qc->err_mask))
4176 qc->flags |= ATA_QCFLAG_FAILED;
4177
4178 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4179 if (!ata_tag_internal(qc->tag)) {
4180 /* always fill result TF for failed qc */
4181 ap->ops->tf_read(ap, &qc->result_tf);
4182 ata_qc_schedule_eh(qc);
4183 return;
4184 }
4185 }
4186
4187 /* read result TF if requested */
4188 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4189 ap->ops->tf_read(ap, &qc->result_tf);
4190
4191 __ata_qc_complete(qc);
4192 } else {
4193 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4194 return;
4195
4196 /* read result TF if failed or requested */
4197 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4198 ap->ops->tf_read(ap, &qc->result_tf);
4199
4200 __ata_qc_complete(qc);
4201 }
4202 }
4203
4204 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4205 {
4206 struct ata_port *ap = qc->ap;
4207
4208 switch (qc->tf.protocol) {
4209 case ATA_PROT_DMA:
4210 case ATA_PROT_ATAPI_DMA:
4211 return 1;
4212
4213 case ATA_PROT_ATAPI:
4214 case ATA_PROT_PIO:
4215 if (ap->flags & ATA_FLAG_PIO_DMA)
4216 return 1;
4217
4218 /* fall through */
4219
4220 default:
4221 return 0;
4222 }
4223
4224 /* never reached */
4225 }
4226
4227 /**
4228 * ata_qc_issue - issue taskfile to device
4229 * @qc: command to issue to device
4230 *
4231 * Prepare an ATA command to submission to device.
4232 * This includes mapping the data into a DMA-able
4233 * area, filling in the S/G table, and finally
4234 * writing the taskfile to hardware, starting the command.
4235 *
4236 * LOCKING:
4237 * spin_lock_irqsave(host_set lock)
4238 */
4239 void ata_qc_issue(struct ata_queued_cmd *qc)
4240 {
4241 struct ata_port *ap = qc->ap;
4242
4243 qc->ap->active_tag = qc->tag;
4244 qc->flags |= ATA_QCFLAG_ACTIVE;
4245
4246 if (ata_should_dma_map(qc)) {
4247 if (qc->flags & ATA_QCFLAG_SG) {
4248 if (ata_sg_setup(qc))
4249 goto sg_err;
4250 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4251 if (ata_sg_setup_one(qc))
4252 goto sg_err;
4253 }
4254 } else {
4255 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4256 }
4257
4258 ap->ops->qc_prep(qc);
4259
4260 qc->err_mask |= ap->ops->qc_issue(qc);
4261 if (unlikely(qc->err_mask))
4262 goto err;
4263 return;
4264
4265 sg_err:
4266 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4267 qc->err_mask |= AC_ERR_SYSTEM;
4268 err:
4269 ata_qc_complete(qc);
4270 }
4271
4272 /**
4273 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4274 * @qc: command to issue to device
4275 *
4276 * Using various libata functions and hooks, this function
4277 * starts an ATA command. ATA commands are grouped into
4278 * classes called "protocols", and issuing each type of protocol
4279 * is slightly different.
4280 *
4281 * May be used as the qc_issue() entry in ata_port_operations.
4282 *
4283 * LOCKING:
4284 * spin_lock_irqsave(host_set lock)
4285 *
4286 * RETURNS:
4287 * Zero on success, AC_ERR_* mask on failure
4288 */
4289
4290 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4291 {
4292 struct ata_port *ap = qc->ap;
4293
4294 ata_dev_select(ap, qc->dev->devno, 1, 0);
4295
4296 switch (qc->tf.protocol) {
4297 case ATA_PROT_NODATA:
4298 ata_tf_to_host(ap, &qc->tf);
4299 break;
4300
4301 case ATA_PROT_DMA:
4302 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4303 ap->ops->bmdma_setup(qc); /* set up bmdma */
4304 ap->ops->bmdma_start(qc); /* initiate bmdma */
4305 break;
4306
4307 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4308 ata_qc_set_polling(qc);
4309 ata_tf_to_host(ap, &qc->tf);
4310 ap->hsm_task_state = HSM_ST;
4311 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4312 break;
4313
4314 case ATA_PROT_ATAPI:
4315 ata_qc_set_polling(qc);
4316 ata_tf_to_host(ap, &qc->tf);
4317 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4318 break;
4319
4320 case ATA_PROT_ATAPI_NODATA:
4321 ap->flags |= ATA_FLAG_NOINTR;
4322 ata_tf_to_host(ap, &qc->tf);
4323 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4324 break;
4325
4326 case ATA_PROT_ATAPI_DMA:
4327 ap->flags |= ATA_FLAG_NOINTR;
4328 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4329 ap->ops->bmdma_setup(qc); /* set up bmdma */
4330 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
4331 break;
4332
4333 default:
4334 WARN_ON(1);
4335 return AC_ERR_SYSTEM;
4336 }
4337
4338 return 0;
4339 }
4340
4341 /**
4342 * ata_host_intr - Handle host interrupt for given (port, task)
4343 * @ap: Port on which interrupt arrived (possibly...)
4344 * @qc: Taskfile currently active in engine
4345 *
4346 * Handle host interrupt for given queued command. Currently,
4347 * only DMA interrupts are handled. All other commands are
4348 * handled via polling with interrupts disabled (nIEN bit).
4349 *
4350 * LOCKING:
4351 * spin_lock_irqsave(host_set lock)
4352 *
4353 * RETURNS:
4354 * One if interrupt was handled, zero if not (shared irq).
4355 */
4356
4357 inline unsigned int ata_host_intr (struct ata_port *ap,
4358 struct ata_queued_cmd *qc)
4359 {
4360 u8 status, host_stat;
4361
4362 switch (qc->tf.protocol) {
4363
4364 case ATA_PROT_DMA:
4365 case ATA_PROT_ATAPI_DMA:
4366 case ATA_PROT_ATAPI:
4367 /* check status of DMA engine */
4368 host_stat = ap->ops->bmdma_status(ap);
4369 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4370
4371 /* if it's not our irq... */
4372 if (!(host_stat & ATA_DMA_INTR))
4373 goto idle_irq;
4374
4375 /* before we do anything else, clear DMA-Start bit */
4376 ap->ops->bmdma_stop(qc);
4377
4378 /* fall through */
4379
4380 case ATA_PROT_ATAPI_NODATA:
4381 case ATA_PROT_NODATA:
4382 /* check altstatus */
4383 status = ata_altstatus(ap);
4384 if (status & ATA_BUSY)
4385 goto idle_irq;
4386
4387 /* check main status, clearing INTRQ */
4388 status = ata_chk_status(ap);
4389 if (unlikely(status & ATA_BUSY))
4390 goto idle_irq;
4391 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4392 ap->id, qc->tf.protocol, status);
4393
4394 /* ack bmdma irq events */
4395 ap->ops->irq_clear(ap);
4396
4397 /* complete taskfile transaction */
4398 qc->err_mask |= ac_err_mask(status);
4399 ata_qc_complete(qc);
4400 break;
4401
4402 default:
4403 goto idle_irq;
4404 }
4405
4406 return 1; /* irq handled */
4407
4408 idle_irq:
4409 ap->stats.idle_irq++;
4410
4411 #ifdef ATA_IRQ_TRAP
4412 if ((ap->stats.idle_irq % 1000) == 0) {
4413 ata_irq_ack(ap, 0); /* debug trap */
4414 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4415 return 1;
4416 }
4417 #endif
4418 return 0; /* irq not handled */
4419 }
4420
4421 /**
4422 * ata_interrupt - Default ATA host interrupt handler
4423 * @irq: irq line (unused)
4424 * @dev_instance: pointer to our ata_host_set information structure
4425 * @regs: unused
4426 *
4427 * Default interrupt handler for PCI IDE devices. Calls
4428 * ata_host_intr() for each port that is not disabled.
4429 *
4430 * LOCKING:
4431 * Obtains host_set lock during operation.
4432 *
4433 * RETURNS:
4434 * IRQ_NONE or IRQ_HANDLED.
4435 */
4436
4437 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4438 {
4439 struct ata_host_set *host_set = dev_instance;
4440 unsigned int i;
4441 unsigned int handled = 0;
4442 unsigned long flags;
4443
4444 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4445 spin_lock_irqsave(&host_set->lock, flags);
4446
4447 for (i = 0; i < host_set->n_ports; i++) {
4448 struct ata_port *ap;
4449
4450 ap = host_set->ports[i];
4451 if (ap &&
4452 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
4453 struct ata_queued_cmd *qc;
4454
4455 qc = ata_qc_from_tag(ap, ap->active_tag);
4456 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4457 (qc->flags & ATA_QCFLAG_ACTIVE))
4458 handled |= ata_host_intr(ap, qc);
4459 }
4460 }
4461
4462 spin_unlock_irqrestore(&host_set->lock, flags);
4463
4464 return IRQ_RETVAL(handled);
4465 }
4466
4467 /**
4468 * sata_scr_valid - test whether SCRs are accessible
4469 * @ap: ATA port to test SCR accessibility for
4470 *
4471 * Test whether SCRs are accessible for @ap.
4472 *
4473 * LOCKING:
4474 * None.
4475 *
4476 * RETURNS:
4477 * 1 if SCRs are accessible, 0 otherwise.
4478 */
4479 int sata_scr_valid(struct ata_port *ap)
4480 {
4481 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4482 }
4483
4484 /**
4485 * sata_scr_read - read SCR register of the specified port
4486 * @ap: ATA port to read SCR for
4487 * @reg: SCR to read
4488 * @val: Place to store read value
4489 *
4490 * Read SCR register @reg of @ap into *@val. This function is
4491 * guaranteed to succeed if the cable type of the port is SATA
4492 * and the port implements ->scr_read.
4493 *
4494 * LOCKING:
4495 * None.
4496 *
4497 * RETURNS:
4498 * 0 on success, negative errno on failure.
4499 */
4500 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4501 {
4502 if (sata_scr_valid(ap)) {
4503 *val = ap->ops->scr_read(ap, reg);
4504 return 0;
4505 }
4506 return -EOPNOTSUPP;
4507 }
4508
4509 /**
4510 * sata_scr_write - write SCR register of the specified port
4511 * @ap: ATA port to write SCR for
4512 * @reg: SCR to write
4513 * @val: value to write
4514 *
4515 * Write @val to SCR register @reg of @ap. This function is
4516 * guaranteed to succeed if the cable type of the port is SATA
4517 * and the port implements ->scr_read.
4518 *
4519 * LOCKING:
4520 * None.
4521 *
4522 * RETURNS:
4523 * 0 on success, negative errno on failure.
4524 */
4525 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4526 {
4527 if (sata_scr_valid(ap)) {
4528 ap->ops->scr_write(ap, reg, val);
4529 return 0;
4530 }
4531 return -EOPNOTSUPP;
4532 }
4533
4534 /**
4535 * sata_scr_write_flush - write SCR register of the specified port and flush
4536 * @ap: ATA port to write SCR for
4537 * @reg: SCR to write
4538 * @val: value to write
4539 *
4540 * This function is identical to sata_scr_write() except that this
4541 * function performs flush after writing to the register.
4542 *
4543 * LOCKING:
4544 * None.
4545 *
4546 * RETURNS:
4547 * 0 on success, negative errno on failure.
4548 */
4549 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4550 {
4551 if (sata_scr_valid(ap)) {
4552 ap->ops->scr_write(ap, reg, val);
4553 ap->ops->scr_read(ap, reg);
4554 return 0;
4555 }
4556 return -EOPNOTSUPP;
4557 }
4558
4559 /**
4560 * ata_port_online - test whether the given port is online
4561 * @ap: ATA port to test
4562 *
4563 * Test whether @ap is online. Note that this function returns 0
4564 * if online status of @ap cannot be obtained, so
4565 * ata_port_online(ap) != !ata_port_offline(ap).
4566 *
4567 * LOCKING:
4568 * None.
4569 *
4570 * RETURNS:
4571 * 1 if the port online status is available and online.
4572 */
4573 int ata_port_online(struct ata_port *ap)
4574 {
4575 u32 sstatus;
4576
4577 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4578 return 1;
4579 return 0;
4580 }
4581
4582 /**
4583 * ata_port_offline - test whether the given port is offline
4584 * @ap: ATA port to test
4585 *
4586 * Test whether @ap is offline. Note that this function returns
4587 * 0 if offline status of @ap cannot be obtained, so
4588 * ata_port_online(ap) != !ata_port_offline(ap).
4589 *
4590 * LOCKING:
4591 * None.
4592 *
4593 * RETURNS:
4594 * 1 if the port offline status is available and offline.
4595 */
4596 int ata_port_offline(struct ata_port *ap)
4597 {
4598 u32 sstatus;
4599
4600 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4601 return 1;
4602 return 0;
4603 }
4604
4605 /*
4606 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4607 * without filling any other registers
4608 */
4609 static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
4610 {
4611 struct ata_taskfile tf;
4612 int err;
4613
4614 ata_tf_init(dev, &tf);
4615
4616 tf.command = cmd;
4617 tf.flags |= ATA_TFLAG_DEVICE;
4618 tf.protocol = ATA_PROT_NODATA;
4619
4620 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4621 if (err)
4622 ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
4623 __FUNCTION__, err);
4624
4625 return err;
4626 }
4627
4628 static int ata_flush_cache(struct ata_device *dev)
4629 {
4630 u8 cmd;
4631
4632 if (!ata_try_flush_cache(dev))
4633 return 0;
4634
4635 if (ata_id_has_flush_ext(dev->id))
4636 cmd = ATA_CMD_FLUSH_EXT;
4637 else
4638 cmd = ATA_CMD_FLUSH;
4639
4640 return ata_do_simple_cmd(dev, cmd);
4641 }
4642
4643 static int ata_standby_drive(struct ata_device *dev)
4644 {
4645 return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
4646 }
4647
4648 static int ata_start_drive(struct ata_device *dev)
4649 {
4650 return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
4651 }
4652
4653 /**
4654 * ata_device_resume - wakeup a previously suspended devices
4655 * @dev: the device to resume
4656 *
4657 * Kick the drive back into action, by sending it an idle immediate
4658 * command and making sure its transfer mode matches between drive
4659 * and host.
4660 *
4661 */
4662 int ata_device_resume(struct ata_device *dev)
4663 {
4664 struct ata_port *ap = dev->ap;
4665
4666 if (ap->flags & ATA_FLAG_SUSPENDED) {
4667 struct ata_device *failed_dev;
4668 ap->flags &= ~ATA_FLAG_SUSPENDED;
4669 while (ata_set_mode(ap, &failed_dev))
4670 ata_dev_disable(failed_dev);
4671 }
4672 if (!ata_dev_enabled(dev))
4673 return 0;
4674 if (dev->class == ATA_DEV_ATA)
4675 ata_start_drive(dev);
4676
4677 return 0;
4678 }
4679
4680 /**
4681 * ata_device_suspend - prepare a device for suspend
4682 * @dev: the device to suspend
4683 *
4684 * Flush the cache on the drive, if appropriate, then issue a
4685 * standbynow command.
4686 */
4687 int ata_device_suspend(struct ata_device *dev, pm_message_t state)
4688 {
4689 struct ata_port *ap = dev->ap;
4690
4691 if (!ata_dev_enabled(dev))
4692 return 0;
4693 if (dev->class == ATA_DEV_ATA)
4694 ata_flush_cache(dev);
4695
4696 if (state.event != PM_EVENT_FREEZE)
4697 ata_standby_drive(dev);
4698 ap->flags |= ATA_FLAG_SUSPENDED;
4699 return 0;
4700 }
4701
4702 /**
4703 * ata_port_start - Set port up for dma.
4704 * @ap: Port to initialize
4705 *
4706 * Called just after data structures for each port are
4707 * initialized. Allocates space for PRD table.
4708 *
4709 * May be used as the port_start() entry in ata_port_operations.
4710 *
4711 * LOCKING:
4712 * Inherited from caller.
4713 */
4714
4715 int ata_port_start (struct ata_port *ap)
4716 {
4717 struct device *dev = ap->dev;
4718 int rc;
4719
4720 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4721 if (!ap->prd)
4722 return -ENOMEM;
4723
4724 rc = ata_pad_alloc(ap, dev);
4725 if (rc) {
4726 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4727 return rc;
4728 }
4729
4730 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4731
4732 return 0;
4733 }
4734
4735
4736 /**
4737 * ata_port_stop - Undo ata_port_start()
4738 * @ap: Port to shut down
4739 *
4740 * Frees the PRD table.
4741 *
4742 * May be used as the port_stop() entry in ata_port_operations.
4743 *
4744 * LOCKING:
4745 * Inherited from caller.
4746 */
4747
4748 void ata_port_stop (struct ata_port *ap)
4749 {
4750 struct device *dev = ap->dev;
4751
4752 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4753 ata_pad_free(ap, dev);
4754 }
4755
4756 void ata_host_stop (struct ata_host_set *host_set)
4757 {
4758 if (host_set->mmio_base)
4759 iounmap(host_set->mmio_base);
4760 }
4761
4762
4763 /**
4764 * ata_host_remove - Unregister SCSI host structure with upper layers
4765 * @ap: Port to unregister
4766 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4767 *
4768 * LOCKING:
4769 * Inherited from caller.
4770 */
4771
4772 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4773 {
4774 struct Scsi_Host *sh = ap->host;
4775
4776 DPRINTK("ENTER\n");
4777
4778 if (do_unregister)
4779 scsi_remove_host(sh);
4780
4781 ap->ops->port_stop(ap);
4782 }
4783
4784 /**
4785 * ata_host_init - Initialize an ata_port structure
4786 * @ap: Structure to initialize
4787 * @host: associated SCSI mid-layer structure
4788 * @host_set: Collection of hosts to which @ap belongs
4789 * @ent: Probe information provided by low-level driver
4790 * @port_no: Port number associated with this ata_port
4791 *
4792 * Initialize a new ata_port structure, and its associated
4793 * scsi_host.
4794 *
4795 * LOCKING:
4796 * Inherited from caller.
4797 */
4798
4799 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4800 struct ata_host_set *host_set,
4801 const struct ata_probe_ent *ent, unsigned int port_no)
4802 {
4803 unsigned int i;
4804
4805 host->max_id = 16;
4806 host->max_lun = 1;
4807 host->max_channel = 1;
4808 host->unique_id = ata_unique_id++;
4809 host->max_cmd_len = 12;
4810
4811 ap->flags = ATA_FLAG_DISABLED;
4812 ap->id = host->unique_id;
4813 ap->host = host;
4814 ap->ctl = ATA_DEVCTL_OBS;
4815 ap->host_set = host_set;
4816 ap->dev = ent->dev;
4817 ap->port_no = port_no;
4818 ap->hard_port_no =
4819 ent->legacy_mode ? ent->hard_port_no : port_no;
4820 ap->pio_mask = ent->pio_mask;
4821 ap->mwdma_mask = ent->mwdma_mask;
4822 ap->udma_mask = ent->udma_mask;
4823 ap->flags |= ent->host_flags;
4824 ap->ops = ent->port_ops;
4825 ap->sata_spd_limit = UINT_MAX;
4826 ap->active_tag = ATA_TAG_POISON;
4827 ap->last_ctl = 0xFF;
4828
4829 INIT_WORK(&ap->port_task, NULL, NULL);
4830 INIT_LIST_HEAD(&ap->eh_done_q);
4831
4832 /* set cable type */
4833 ap->cbl = ATA_CBL_NONE;
4834 if (ap->flags & ATA_FLAG_SATA)
4835 ap->cbl = ATA_CBL_SATA;
4836
4837 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4838 struct ata_device *dev = &ap->device[i];
4839 dev->ap = ap;
4840 dev->devno = i;
4841 dev->pio_mask = UINT_MAX;
4842 dev->mwdma_mask = UINT_MAX;
4843 dev->udma_mask = UINT_MAX;
4844 }
4845
4846 #ifdef ATA_IRQ_TRAP
4847 ap->stats.unhandled_irq = 1;
4848 ap->stats.idle_irq = 1;
4849 #endif
4850
4851 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4852 }
4853
4854 /**
4855 * ata_host_add - Attach low-level ATA driver to system
4856 * @ent: Information provided by low-level driver
4857 * @host_set: Collections of ports to which we add
4858 * @port_no: Port number associated with this host
4859 *
4860 * Attach low-level ATA driver to system.
4861 *
4862 * LOCKING:
4863 * PCI/etc. bus probe sem.
4864 *
4865 * RETURNS:
4866 * New ata_port on success, for NULL on error.
4867 */
4868
4869 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4870 struct ata_host_set *host_set,
4871 unsigned int port_no)
4872 {
4873 struct Scsi_Host *host;
4874 struct ata_port *ap;
4875 int rc;
4876
4877 DPRINTK("ENTER\n");
4878
4879 if (!ent->port_ops->probe_reset &&
4880 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4881 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4882 port_no);
4883 return NULL;
4884 }
4885
4886 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4887 if (!host)
4888 return NULL;
4889
4890 host->transportt = &ata_scsi_transport_template;
4891
4892 ap = ata_shost_to_port(host);
4893
4894 ata_host_init(ap, host, host_set, ent, port_no);
4895
4896 rc = ap->ops->port_start(ap);
4897 if (rc)
4898 goto err_out;
4899
4900 return ap;
4901
4902 err_out:
4903 scsi_host_put(host);
4904 return NULL;
4905 }
4906
4907 /**
4908 * ata_device_add - Register hardware device with ATA and SCSI layers
4909 * @ent: Probe information describing hardware device to be registered
4910 *
4911 * This function processes the information provided in the probe
4912 * information struct @ent, allocates the necessary ATA and SCSI
4913 * host information structures, initializes them, and registers
4914 * everything with requisite kernel subsystems.
4915 *
4916 * This function requests irqs, probes the ATA bus, and probes
4917 * the SCSI bus.
4918 *
4919 * LOCKING:
4920 * PCI/etc. bus probe sem.
4921 *
4922 * RETURNS:
4923 * Number of ports registered. Zero on error (no ports registered).
4924 */
4925
4926 int ata_device_add(const struct ata_probe_ent *ent)
4927 {
4928 unsigned int count = 0, i;
4929 struct device *dev = ent->dev;
4930 struct ata_host_set *host_set;
4931
4932 DPRINTK("ENTER\n");
4933 /* alloc a container for our list of ATA ports (buses) */
4934 host_set = kzalloc(sizeof(struct ata_host_set) +
4935 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4936 if (!host_set)
4937 return 0;
4938 spin_lock_init(&host_set->lock);
4939
4940 host_set->dev = dev;
4941 host_set->n_ports = ent->n_ports;
4942 host_set->irq = ent->irq;
4943 host_set->mmio_base = ent->mmio_base;
4944 host_set->private_data = ent->private_data;
4945 host_set->ops = ent->port_ops;
4946 host_set->flags = ent->host_set_flags;
4947
4948 /* register each port bound to this device */
4949 for (i = 0; i < ent->n_ports; i++) {
4950 struct ata_port *ap;
4951 unsigned long xfer_mode_mask;
4952
4953 ap = ata_host_add(ent, host_set, i);
4954 if (!ap)
4955 goto err_out;
4956
4957 host_set->ports[i] = ap;
4958 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4959 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4960 (ap->pio_mask << ATA_SHIFT_PIO);
4961
4962 /* print per-port info to dmesg */
4963 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
4964 "ctl 0x%lX bmdma 0x%lX irq %lu\n",
4965 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4966 ata_mode_string(xfer_mode_mask),
4967 ap->ioaddr.cmd_addr,
4968 ap->ioaddr.ctl_addr,
4969 ap->ioaddr.bmdma_addr,
4970 ent->irq);
4971
4972 ata_chk_status(ap);
4973 host_set->ops->irq_clear(ap);
4974 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
4975 count++;
4976 }
4977
4978 if (!count)
4979 goto err_free_ret;
4980
4981 /* obtain irq, that is shared between channels */
4982 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4983 DRV_NAME, host_set))
4984 goto err_out;
4985
4986 /* perform each probe synchronously */
4987 DPRINTK("probe begin\n");
4988 for (i = 0; i < count; i++) {
4989 struct ata_port *ap;
4990 int rc;
4991
4992 ap = host_set->ports[i];
4993
4994 DPRINTK("ata%u: bus probe begin\n", ap->id);
4995 rc = ata_bus_probe(ap);
4996 DPRINTK("ata%u: bus probe end\n", ap->id);
4997
4998 if (rc) {
4999 /* FIXME: do something useful here?
5000 * Current libata behavior will
5001 * tear down everything when
5002 * the module is removed
5003 * or the h/w is unplugged.
5004 */
5005 }
5006
5007 rc = scsi_add_host(ap->host, dev);
5008 if (rc) {
5009 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5010 /* FIXME: do something useful here */
5011 /* FIXME: handle unconditional calls to
5012 * scsi_scan_host and ata_host_remove, below,
5013 * at the very least
5014 */
5015 }
5016 }
5017
5018 /* probes are done, now scan each port's disk(s) */
5019 DPRINTK("host probe begin\n");
5020 for (i = 0; i < count; i++) {
5021 struct ata_port *ap = host_set->ports[i];
5022
5023 ata_scsi_scan_host(ap);
5024 }
5025
5026 dev_set_drvdata(dev, host_set);
5027
5028 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5029 return ent->n_ports; /* success */
5030
5031 err_out:
5032 for (i = 0; i < count; i++) {
5033 ata_host_remove(host_set->ports[i], 1);
5034 scsi_host_put(host_set->ports[i]->host);
5035 }
5036 err_free_ret:
5037 kfree(host_set);
5038 VPRINTK("EXIT, returning 0\n");
5039 return 0;
5040 }
5041
5042 /**
5043 * ata_host_set_remove - PCI layer callback for device removal
5044 * @host_set: ATA host set that was removed
5045 *
5046 * Unregister all objects associated with this host set. Free those
5047 * objects.
5048 *
5049 * LOCKING:
5050 * Inherited from calling layer (may sleep).
5051 */
5052
5053 void ata_host_set_remove(struct ata_host_set *host_set)
5054 {
5055 struct ata_port *ap;
5056 unsigned int i;
5057
5058 for (i = 0; i < host_set->n_ports; i++) {
5059 ap = host_set->ports[i];
5060 scsi_remove_host(ap->host);
5061 }
5062
5063 free_irq(host_set->irq, host_set);
5064
5065 for (i = 0; i < host_set->n_ports; i++) {
5066 ap = host_set->ports[i];
5067
5068 ata_scsi_release(ap->host);
5069
5070 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5071 struct ata_ioports *ioaddr = &ap->ioaddr;
5072
5073 if (ioaddr->cmd_addr == 0x1f0)
5074 release_region(0x1f0, 8);
5075 else if (ioaddr->cmd_addr == 0x170)
5076 release_region(0x170, 8);
5077 }
5078
5079 scsi_host_put(ap->host);
5080 }
5081
5082 if (host_set->ops->host_stop)
5083 host_set->ops->host_stop(host_set);
5084
5085 kfree(host_set);
5086 }
5087
5088 /**
5089 * ata_scsi_release - SCSI layer callback hook for host unload
5090 * @host: libata host to be unloaded
5091 *
5092 * Performs all duties necessary to shut down a libata port...
5093 * Kill port kthread, disable port, and release resources.
5094 *
5095 * LOCKING:
5096 * Inherited from SCSI layer.
5097 *
5098 * RETURNS:
5099 * One.
5100 */
5101
5102 int ata_scsi_release(struct Scsi_Host *host)
5103 {
5104 struct ata_port *ap = ata_shost_to_port(host);
5105
5106 DPRINTK("ENTER\n");
5107
5108 ap->ops->port_disable(ap);
5109 ata_host_remove(ap, 0);
5110
5111 DPRINTK("EXIT\n");
5112 return 1;
5113 }
5114
5115 /**
5116 * ata_std_ports - initialize ioaddr with standard port offsets.
5117 * @ioaddr: IO address structure to be initialized
5118 *
5119 * Utility function which initializes data_addr, error_addr,
5120 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5121 * device_addr, status_addr, and command_addr to standard offsets
5122 * relative to cmd_addr.
5123 *
5124 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5125 */
5126
5127 void ata_std_ports(struct ata_ioports *ioaddr)
5128 {
5129 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5130 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5131 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5132 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5133 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5134 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5135 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5136 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5137 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5138 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5139 }
5140
5141
5142 #ifdef CONFIG_PCI
5143
5144 void ata_pci_host_stop (struct ata_host_set *host_set)
5145 {
5146 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5147
5148 pci_iounmap(pdev, host_set->mmio_base);
5149 }
5150
5151 /**
5152 * ata_pci_remove_one - PCI layer callback for device removal
5153 * @pdev: PCI device that was removed
5154 *
5155 * PCI layer indicates to libata via this hook that
5156 * hot-unplug or module unload event has occurred.
5157 * Handle this by unregistering all objects associated
5158 * with this PCI device. Free those objects. Then finally
5159 * release PCI resources and disable device.
5160 *
5161 * LOCKING:
5162 * Inherited from PCI layer (may sleep).
5163 */
5164
5165 void ata_pci_remove_one (struct pci_dev *pdev)
5166 {
5167 struct device *dev = pci_dev_to_dev(pdev);
5168 struct ata_host_set *host_set = dev_get_drvdata(dev);
5169
5170 ata_host_set_remove(host_set);
5171 pci_release_regions(pdev);
5172 pci_disable_device(pdev);
5173 dev_set_drvdata(dev, NULL);
5174 }
5175
5176 /* move to PCI subsystem */
5177 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5178 {
5179 unsigned long tmp = 0;
5180
5181 switch (bits->width) {
5182 case 1: {
5183 u8 tmp8 = 0;
5184 pci_read_config_byte(pdev, bits->reg, &tmp8);
5185 tmp = tmp8;
5186 break;
5187 }
5188 case 2: {
5189 u16 tmp16 = 0;
5190 pci_read_config_word(pdev, bits->reg, &tmp16);
5191 tmp = tmp16;
5192 break;
5193 }
5194 case 4: {
5195 u32 tmp32 = 0;
5196 pci_read_config_dword(pdev, bits->reg, &tmp32);
5197 tmp = tmp32;
5198 break;
5199 }
5200
5201 default:
5202 return -EINVAL;
5203 }
5204
5205 tmp &= bits->mask;
5206
5207 return (tmp == bits->val) ? 1 : 0;
5208 }
5209
5210 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5211 {
5212 pci_save_state(pdev);
5213 pci_disable_device(pdev);
5214 pci_set_power_state(pdev, PCI_D3hot);
5215 return 0;
5216 }
5217
5218 int ata_pci_device_resume(struct pci_dev *pdev)
5219 {
5220 pci_set_power_state(pdev, PCI_D0);
5221 pci_restore_state(pdev);
5222 pci_enable_device(pdev);
5223 pci_set_master(pdev);
5224 return 0;
5225 }
5226 #endif /* CONFIG_PCI */
5227
5228
5229 static int __init ata_init(void)
5230 {
5231 ata_wq = create_workqueue("ata");
5232 if (!ata_wq)
5233 return -ENOMEM;
5234
5235 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5236 return 0;
5237 }
5238
5239 static void __exit ata_exit(void)
5240 {
5241 destroy_workqueue(ata_wq);
5242 }
5243
5244 module_init(ata_init);
5245 module_exit(ata_exit);
5246
5247 static unsigned long ratelimit_time;
5248 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5249
5250 int ata_ratelimit(void)
5251 {
5252 int rc;
5253 unsigned long flags;
5254
5255 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5256
5257 if (time_after(jiffies, ratelimit_time)) {
5258 rc = 1;
5259 ratelimit_time = jiffies + (HZ/5);
5260 } else
5261 rc = 0;
5262
5263 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5264
5265 return rc;
5266 }
5267
5268 /**
5269 * ata_wait_register - wait until register value changes
5270 * @reg: IO-mapped register
5271 * @mask: Mask to apply to read register value
5272 * @val: Wait condition
5273 * @interval_msec: polling interval in milliseconds
5274 * @timeout_msec: timeout in milliseconds
5275 *
5276 * Waiting for some bits of register to change is a common
5277 * operation for ATA controllers. This function reads 32bit LE
5278 * IO-mapped register @reg and tests for the following condition.
5279 *
5280 * (*@reg & mask) != val
5281 *
5282 * If the condition is met, it returns; otherwise, the process is
5283 * repeated after @interval_msec until timeout.
5284 *
5285 * LOCKING:
5286 * Kernel thread context (may sleep)
5287 *
5288 * RETURNS:
5289 * The final register value.
5290 */
5291 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5292 unsigned long interval_msec,
5293 unsigned long timeout_msec)
5294 {
5295 unsigned long timeout;
5296 u32 tmp;
5297
5298 tmp = ioread32(reg);
5299
5300 /* Calculate timeout _after_ the first read to make sure
5301 * preceding writes reach the controller before starting to
5302 * eat away the timeout.
5303 */
5304 timeout = jiffies + (timeout_msec * HZ) / 1000;
5305
5306 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5307 msleep(interval_msec);
5308 tmp = ioread32(reg);
5309 }
5310
5311 return tmp;
5312 }
5313
5314 /*
5315 * libata is essentially a library of internal helper functions for
5316 * low-level ATA host controller drivers. As such, the API/ABI is
5317 * likely to change as new drivers are added and updated.
5318 * Do not depend on ABI/API stability.
5319 */
5320
5321 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5322 EXPORT_SYMBOL_GPL(ata_std_ports);
5323 EXPORT_SYMBOL_GPL(ata_device_add);
5324 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5325 EXPORT_SYMBOL_GPL(ata_sg_init);
5326 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5327 EXPORT_SYMBOL_GPL(ata_qc_complete);
5328 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5329 EXPORT_SYMBOL_GPL(ata_tf_load);
5330 EXPORT_SYMBOL_GPL(ata_tf_read);
5331 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5332 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5333 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5334 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5335 EXPORT_SYMBOL_GPL(ata_check_status);
5336 EXPORT_SYMBOL_GPL(ata_altstatus);
5337 EXPORT_SYMBOL_GPL(ata_exec_command);
5338 EXPORT_SYMBOL_GPL(ata_port_start);
5339 EXPORT_SYMBOL_GPL(ata_port_stop);
5340 EXPORT_SYMBOL_GPL(ata_host_stop);
5341 EXPORT_SYMBOL_GPL(ata_interrupt);
5342 EXPORT_SYMBOL_GPL(ata_qc_prep);
5343 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5344 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5345 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5346 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5347 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5348 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5349 EXPORT_SYMBOL_GPL(ata_port_probe);
5350 EXPORT_SYMBOL_GPL(sata_set_spd);
5351 EXPORT_SYMBOL_GPL(sata_phy_reset);
5352 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5353 EXPORT_SYMBOL_GPL(ata_bus_reset);
5354 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5355 EXPORT_SYMBOL_GPL(ata_std_softreset);
5356 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5357 EXPORT_SYMBOL_GPL(ata_std_postreset);
5358 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5359 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5360 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5361 EXPORT_SYMBOL_GPL(ata_dev_classify);
5362 EXPORT_SYMBOL_GPL(ata_dev_pair);
5363 EXPORT_SYMBOL_GPL(ata_port_disable);
5364 EXPORT_SYMBOL_GPL(ata_ratelimit);
5365 EXPORT_SYMBOL_GPL(ata_wait_register);
5366 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5367 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5368 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5369 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5370 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5371 EXPORT_SYMBOL_GPL(ata_scsi_release);
5372 EXPORT_SYMBOL_GPL(ata_host_intr);
5373 EXPORT_SYMBOL_GPL(sata_scr_valid);
5374 EXPORT_SYMBOL_GPL(sata_scr_read);
5375 EXPORT_SYMBOL_GPL(sata_scr_write);
5376 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
5377 EXPORT_SYMBOL_GPL(ata_port_online);
5378 EXPORT_SYMBOL_GPL(ata_port_offline);
5379 EXPORT_SYMBOL_GPL(ata_id_string);
5380 EXPORT_SYMBOL_GPL(ata_id_c_string);
5381 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5382
5383 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5384 EXPORT_SYMBOL_GPL(ata_timing_compute);
5385 EXPORT_SYMBOL_GPL(ata_timing_merge);
5386
5387 #ifdef CONFIG_PCI
5388 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5389 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5390 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5391 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5392 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5393 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5394 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5395 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5396 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5397 #endif /* CONFIG_PCI */
5398
5399 EXPORT_SYMBOL_GPL(ata_device_suspend);
5400 EXPORT_SYMBOL_GPL(ata_device_resume);
5401 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5402 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
5403
5404 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5405 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
5406 EXPORT_SYMBOL_GPL(ata_port_abort);
5407 EXPORT_SYMBOL_GPL(ata_port_freeze);
5408 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
5409 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
5410 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5411 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);