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[people/ms/u-boot.git] / drivers / serial / ns16550.c
1 /*
2 * COM1 NS16550 support
3 * originally from linux source (arch/powerpc/boot/ns16550.c)
4 * modified to use CONFIG_SYS_ISA_MEM and new defines
5 */
6
7 #include <common.h>
8 #include <clk.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <ns16550.h>
12 #include <serial.h>
13 #include <watchdog.h>
14 #include <linux/types.h>
15 #include <asm/io.h>
16
17 DECLARE_GLOBAL_DATA_PTR;
18
19 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
20 #define UART_MCRVAL (UART_MCR_DTR | \
21 UART_MCR_RTS) /* RTS/DTR */
22
23 #ifndef CONFIG_DM_SERIAL
24 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
25 #define serial_out(x, y) outb(x, (ulong)y)
26 #define serial_in(y) inb((ulong)y)
27 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
28 #define serial_out(x, y) out_be32(y, x)
29 #define serial_in(y) in_be32(y)
30 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
31 #define serial_out(x, y) out_le32(y, x)
32 #define serial_in(y) in_le32(y)
33 #else
34 #define serial_out(x, y) writeb(x, y)
35 #define serial_in(y) readb(y)
36 #endif
37 #endif /* !CONFIG_DM_SERIAL */
38
39 #if defined(CONFIG_SOC_KEYSTONE)
40 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
41 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
42 #undef UART_MCRVAL
43 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
44 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
45 #else
46 #define UART_MCRVAL (UART_MCR_RTS)
47 #endif
48 #endif
49
50 #ifndef CONFIG_SYS_NS16550_IER
51 #define CONFIG_SYS_NS16550_IER 0x00
52 #endif /* CONFIG_SYS_NS16550_IER */
53
54 static inline void serial_out_shift(void *addr, int shift, int value)
55 {
56 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
57 outb(value, (ulong)addr);
58 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
59 out_le32(addr, value);
60 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
61 out_be32(addr, value);
62 #elif defined(CONFIG_SYS_NS16550_MEM32)
63 writel(value, addr);
64 #elif defined(CONFIG_SYS_BIG_ENDIAN)
65 writeb(value, addr + (1 << shift) - 1);
66 #else
67 writeb(value, addr);
68 #endif
69 }
70
71 static inline int serial_in_shift(void *addr, int shift)
72 {
73 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
74 return inb((ulong)addr);
75 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
76 return in_le32(addr);
77 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
78 return in_be32(addr);
79 #elif defined(CONFIG_SYS_NS16550_MEM32)
80 return readl(addr);
81 #elif defined(CONFIG_SYS_BIG_ENDIAN)
82 return readb(addr + (1 << shift) - 1);
83 #else
84 return readb(addr);
85 #endif
86 }
87
88 #ifdef CONFIG_DM_SERIAL
89
90 #ifndef CONFIG_SYS_NS16550_CLK
91 #define CONFIG_SYS_NS16550_CLK 0
92 #endif
93
94 static void ns16550_writeb(NS16550_t port, int offset, int value)
95 {
96 struct ns16550_platdata *plat = port->plat;
97 unsigned char *addr;
98
99 offset *= 1 << plat->reg_shift;
100 addr = (unsigned char *)plat->base + offset;
101
102 /*
103 * As far as we know it doesn't make sense to support selection of
104 * these options at run-time, so use the existing CONFIG options.
105 */
106 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
107 }
108
109 static int ns16550_readb(NS16550_t port, int offset)
110 {
111 struct ns16550_platdata *plat = port->plat;
112 unsigned char *addr;
113
114 offset *= 1 << plat->reg_shift;
115 addr = (unsigned char *)plat->base + offset;
116
117 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
118 }
119
120 static u32 ns16550_getfcr(NS16550_t port)
121 {
122 struct ns16550_platdata *plat = port->plat;
123
124 return plat->fcr;
125 }
126
127 /* We can clean these up once everything is moved to driver model */
128 #define serial_out(value, addr) \
129 ns16550_writeb(com_port, \
130 (unsigned char *)addr - (unsigned char *)com_port, value)
131 #define serial_in(addr) \
132 ns16550_readb(com_port, \
133 (unsigned char *)addr - (unsigned char *)com_port)
134 #else
135 static u32 ns16550_getfcr(NS16550_t port)
136 {
137 return UART_FCR_DEFVAL;
138 }
139 #endif
140
141 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
142 {
143 const unsigned int mode_x_div = 16;
144
145 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
146 }
147
148 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
149 {
150 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
151 serial_out(baud_divisor & 0xff, &com_port->dll);
152 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
153 serial_out(UART_LCRVAL, &com_port->lcr);
154 }
155
156 void NS16550_init(NS16550_t com_port, int baud_divisor)
157 {
158 #if (defined(CONFIG_SPL_BUILD) && \
159 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
160 /*
161 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
162 * before SPL starts only THRE bit is set. We have to empty the
163 * transmitter before initialization starts.
164 */
165 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
166 == UART_LSR_THRE) {
167 if (baud_divisor != -1)
168 NS16550_setbrg(com_port, baud_divisor);
169 serial_out(0, &com_port->mdr1);
170 }
171 #endif
172
173 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
174 ;
175
176 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
177 #if defined(CONFIG_ARCH_OMAP2PLUS)
178 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
179 #endif
180 serial_out(UART_MCRVAL, &com_port->mcr);
181 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
182 if (baud_divisor != -1)
183 NS16550_setbrg(com_port, baud_divisor);
184 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX)
185 /* /16 is proper to hit 115200 with 48MHz */
186 serial_out(0, &com_port->mdr1);
187 #endif
188 #if defined(CONFIG_SOC_KEYSTONE)
189 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
190 #endif
191 }
192
193 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
194 void NS16550_reinit(NS16550_t com_port, int baud_divisor)
195 {
196 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
197 NS16550_setbrg(com_port, 0);
198 serial_out(UART_MCRVAL, &com_port->mcr);
199 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
200 NS16550_setbrg(com_port, baud_divisor);
201 }
202 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
203
204 void NS16550_putc(NS16550_t com_port, char c)
205 {
206 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
207 ;
208 serial_out(c, &com_port->thr);
209
210 /*
211 * Call watchdog_reset() upon newline. This is done here in putc
212 * since the environment code uses a single puts() to print the complete
213 * environment upon "printenv". So we can't put this watchdog call
214 * in puts().
215 */
216 if (c == '\n')
217 WATCHDOG_RESET();
218 }
219
220 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
221 char NS16550_getc(NS16550_t com_port)
222 {
223 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
224 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
225 extern void usbtty_poll(void);
226 usbtty_poll();
227 #endif
228 WATCHDOG_RESET();
229 }
230 return serial_in(&com_port->rbr);
231 }
232
233 int NS16550_tstc(NS16550_t com_port)
234 {
235 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
236 }
237
238 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
239
240 #ifdef CONFIG_DEBUG_UART_NS16550
241
242 #include <debug_uart.h>
243
244 static inline void _debug_uart_init(void)
245 {
246 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
247 int baud_divisor;
248
249 /*
250 * We copy the code from above because it is already horribly messy.
251 * Trying to refactor to nicely remove the duplication doesn't seem
252 * feasible. The better fix is to move all users of this driver to
253 * driver model.
254 */
255 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
256 CONFIG_BAUDRATE);
257 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
258 serial_dout(&com_port->mcr, UART_MCRVAL);
259 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
260
261 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
262 serial_dout(&com_port->dll, baud_divisor & 0xff);
263 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
264 serial_dout(&com_port->lcr, UART_LCRVAL);
265 }
266
267 static inline void _debug_uart_putc(int ch)
268 {
269 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
270
271 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
272 ;
273 serial_dout(&com_port->thr, ch);
274 }
275
276 DEBUG_UART_FUNCS
277
278 #endif
279
280 #ifdef CONFIG_DEBUG_UART_OMAP
281
282 #include <debug_uart.h>
283
284 static inline void _debug_uart_init(void)
285 {
286 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
287 int baud_divisor;
288
289 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
290 CONFIG_BAUDRATE);
291 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
292 serial_dout(&com_port->mdr1, 0x7);
293 serial_dout(&com_port->mcr, UART_MCRVAL);
294 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
295
296 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
297 serial_dout(&com_port->dll, baud_divisor & 0xff);
298 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
299 serial_dout(&com_port->lcr, UART_LCRVAL);
300 serial_dout(&com_port->mdr1, 0x0);
301 }
302
303 static inline void _debug_uart_putc(int ch)
304 {
305 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
306
307 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
308 ;
309 serial_dout(&com_port->thr, ch);
310 }
311
312 DEBUG_UART_FUNCS
313
314 #endif
315
316 #ifdef CONFIG_DM_SERIAL
317
318 #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
319
320 #define BUF_COUNT 256
321
322 static void rx_fifo_to_buf(struct udevice *dev)
323 {
324 struct NS16550 *const com_port = dev_get_priv(dev);
325 struct ns16550_platdata *plat = dev->platdata;
326
327 /* Read all available chars into buffer */
328 while ((serial_in(&com_port->lsr) & UART_LSR_DR)) {
329 plat->buf[plat->wr_ptr++] = serial_in(&com_port->rbr);
330 plat->wr_ptr %= BUF_COUNT;
331 }
332 }
333
334 static int rx_pending(struct udevice *dev)
335 {
336 struct ns16550_platdata *plat = dev->platdata;
337
338 /*
339 * At startup it may happen, that some already received chars are
340 * "stuck" in the RX FIFO, even with the interrupt enabled. This
341 * RX FIFO flushing makes sure, that these chars are read out and
342 * the RX interrupts works as expected.
343 */
344 rx_fifo_to_buf(dev);
345
346 return plat->rd_ptr != plat->wr_ptr ? 1 : 0;
347 }
348
349 static int rx_get(struct udevice *dev)
350 {
351 struct ns16550_platdata *plat = dev->platdata;
352 char val;
353
354 val = plat->buf[plat->rd_ptr++];
355 plat->rd_ptr %= BUF_COUNT;
356
357 return val;
358 }
359
360 void ns16550_handle_irq(void *data)
361 {
362 struct udevice *dev = (struct udevice *)data;
363 struct NS16550 *const com_port = dev_get_priv(dev);
364
365 /* Check if interrupt is pending */
366 if (serial_in(&com_port->iir) & UART_IIR_NO_INT)
367 return;
368
369 /* Flush all available characters from the RX FIFO into the RX buffer */
370 rx_fifo_to_buf(dev);
371 }
372
373 #else /* CONFIG_SERIAL_IRQ_BUFFER */
374
375 static int rx_pending(struct udevice *dev)
376 {
377 struct NS16550 *const com_port = dev_get_priv(dev);
378
379 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
380 }
381
382 static int rx_get(struct udevice *dev)
383 {
384 struct NS16550 *const com_port = dev_get_priv(dev);
385
386 return serial_in(&com_port->rbr);
387 }
388
389 #endif /* CONFIG_SERIAL_IRQ_BUFFER */
390
391 static int ns16550_serial_putc(struct udevice *dev, const char ch)
392 {
393 struct NS16550 *const com_port = dev_get_priv(dev);
394
395 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
396 return -EAGAIN;
397 serial_out(ch, &com_port->thr);
398
399 /*
400 * Call watchdog_reset() upon newline. This is done here in putc
401 * since the environment code uses a single puts() to print the complete
402 * environment upon "printenv". So we can't put this watchdog call
403 * in puts().
404 */
405 if (ch == '\n')
406 WATCHDOG_RESET();
407
408 return 0;
409 }
410
411 static int ns16550_serial_pending(struct udevice *dev, bool input)
412 {
413 struct NS16550 *const com_port = dev_get_priv(dev);
414
415 if (input)
416 return rx_pending(dev);
417 else
418 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
419 }
420
421 static int ns16550_serial_getc(struct udevice *dev)
422 {
423 if (!ns16550_serial_pending(dev, true))
424 return -EAGAIN;
425
426 return rx_get(dev);
427 }
428
429 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
430 {
431 struct NS16550 *const com_port = dev_get_priv(dev);
432 struct ns16550_platdata *plat = com_port->plat;
433 int clock_divisor;
434
435 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
436
437 NS16550_setbrg(com_port, clock_divisor);
438
439 return 0;
440 }
441
442 int ns16550_serial_probe(struct udevice *dev)
443 {
444 struct NS16550 *const com_port = dev_get_priv(dev);
445
446 com_port->plat = dev_get_platdata(dev);
447 NS16550_init(com_port, -1);
448
449 #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
450 if (gd->flags & GD_FLG_RELOC) {
451 struct ns16550_platdata *plat = dev->platdata;
452
453 /* Allocate the RX buffer */
454 plat->buf = malloc(BUF_COUNT);
455
456 /* Install the interrupt handler */
457 irq_install_handler(plat->irq, ns16550_handle_irq, dev);
458
459 /* Enable RX interrupts */
460 serial_out(UART_IER_RDI, &com_port->ier);
461 }
462 #endif
463
464 return 0;
465 }
466
467 #if CONFIG_IS_ENABLED(SERIAL_PRESENT) && \
468 (!defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL))
469 static int ns16550_serial_remove(struct udevice *dev)
470 {
471 #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
472 if (gd->flags & GD_FLG_RELOC) {
473 struct ns16550_platdata *plat = dev->platdata;
474
475 irq_free_handler(plat->irq);
476 }
477 #endif
478
479 return 0;
480 }
481 #endif
482
483 #if CONFIG_IS_ENABLED(OF_CONTROL)
484 enum {
485 PORT_NS16550 = 0,
486 PORT_JZ4780,
487 };
488 #endif
489
490 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
491 int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
492 {
493 struct ns16550_platdata *plat = dev->platdata;
494 const u32 port_type = dev_get_driver_data(dev);
495 fdt_addr_t addr;
496 struct clk clk;
497 int err;
498
499 /* try Processor Local Bus device first */
500 addr = dev_read_addr(dev);
501 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
502 if (addr == FDT_ADDR_T_NONE) {
503 /* then try pci device */
504 struct fdt_pci_addr pci_addr;
505 u32 bar;
506 int ret;
507
508 /* we prefer to use a memory-mapped register */
509 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
510 FDT_PCI_SPACE_MEM32, "reg",
511 &pci_addr);
512 if (ret) {
513 /* try if there is any i/o-mapped register */
514 ret = fdtdec_get_pci_addr(gd->fdt_blob,
515 dev_of_offset(dev),
516 FDT_PCI_SPACE_IO,
517 "reg", &pci_addr);
518 if (ret)
519 return ret;
520 }
521
522 ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
523 if (ret)
524 return ret;
525
526 addr = bar;
527 }
528 #endif
529
530 if (addr == FDT_ADDR_T_NONE)
531 return -EINVAL;
532
533 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
534 plat->base = addr;
535 #else
536 plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
537 #endif
538
539 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
540 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
541
542 err = clk_get_by_index(dev, 0, &clk);
543 if (!err) {
544 err = clk_get_rate(&clk);
545 if (!IS_ERR_VALUE(err))
546 plat->clock = err;
547 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
548 debug("ns16550 failed to get clock\n");
549 return err;
550 }
551
552 if (!plat->clock)
553 plat->clock = dev_read_u32_default(dev, "clock-frequency",
554 CONFIG_SYS_NS16550_CLK);
555 if (!plat->clock) {
556 debug("ns16550 clock not defined\n");
557 return -EINVAL;
558 }
559
560 plat->fcr = UART_FCR_DEFVAL;
561 if (port_type == PORT_JZ4780)
562 plat->fcr |= UART_FCR_UME;
563
564 #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
565 plat->irq = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
566 "interrupts", 0);
567 if (!plat->irq) {
568 debug("ns16550 interrupt not provided\n");
569 return -EINVAL;
570 }
571 #endif
572
573 return 0;
574 }
575 #endif
576
577 const struct dm_serial_ops ns16550_serial_ops = {
578 .putc = ns16550_serial_putc,
579 .pending = ns16550_serial_pending,
580 .getc = ns16550_serial_getc,
581 .setbrg = ns16550_serial_setbrg,
582 };
583
584 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
585 /*
586 * Please consider existing compatible strings before adding a new
587 * one to keep this table compact. Or you may add a generic "ns16550"
588 * compatible string to your dts.
589 */
590 static const struct udevice_id ns16550_serial_ids[] = {
591 { .compatible = "ns16550", .data = PORT_NS16550 },
592 { .compatible = "ns16550a", .data = PORT_NS16550 },
593 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
594 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
595 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
596 { .compatible = "ti,omap2-uart", .data = PORT_NS16550 },
597 { .compatible = "ti,omap3-uart", .data = PORT_NS16550 },
598 { .compatible = "ti,omap4-uart", .data = PORT_NS16550 },
599 { .compatible = "ti,am3352-uart", .data = PORT_NS16550 },
600 { .compatible = "ti,am4372-uart", .data = PORT_NS16550 },
601 { .compatible = "ti,dra742-uart", .data = PORT_NS16550 },
602 {}
603 };
604 #endif /* OF_CONTROL && !OF_PLATDATA */
605
606 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
607
608 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
609 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
610 U_BOOT_DRIVER(ns16550_serial) = {
611 .name = "ns16550_serial",
612 .id = UCLASS_SERIAL,
613 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
614 .of_match = ns16550_serial_ids,
615 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
616 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
617 #endif
618 .priv_auto_alloc_size = sizeof(struct NS16550),
619 .probe = ns16550_serial_probe,
620 .remove = ns16550_serial_remove,
621 .ops = &ns16550_serial_ops,
622 .flags = DM_FLAG_PRE_RELOC,
623 };
624 #endif
625 #endif /* SERIAL_PRESENT */
626
627 #endif /* CONFIG_DM_SERIAL */