3 * originally from linux source (arch/powerpc/boot/ns16550.c)
4 * modified to use CONFIG_SYS_ISA_MEM and new defines
14 #include <linux/types.h>
17 DECLARE_GLOBAL_DATA_PTR
;
19 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
20 #define UART_MCRVAL (UART_MCR_DTR | \
21 UART_MCR_RTS) /* RTS/DTR */
23 #ifndef CONFIG_DM_SERIAL
24 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
25 #define serial_out(x, y) outb(x, (ulong)y)
26 #define serial_in(y) inb((ulong)y)
27 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
28 #define serial_out(x, y) out_be32(y, x)
29 #define serial_in(y) in_be32(y)
30 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
31 #define serial_out(x, y) out_le32(y, x)
32 #define serial_in(y) in_le32(y)
34 #define serial_out(x, y) writeb(x, y)
35 #define serial_in(y) readb(y)
37 #endif /* !CONFIG_DM_SERIAL */
39 #if defined(CONFIG_SOC_KEYSTONE)
40 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
41 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
43 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
44 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
46 #define UART_MCRVAL (UART_MCR_RTS)
50 #ifndef CONFIG_SYS_NS16550_IER
51 #define CONFIG_SYS_NS16550_IER 0x00
52 #endif /* CONFIG_SYS_NS16550_IER */
54 static inline void serial_out_shift(void *addr
, int shift
, int value
)
56 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
57 outb(value
, (ulong
)addr
);
58 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
59 out_le32(addr
, value
);
60 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
61 out_be32(addr
, value
);
62 #elif defined(CONFIG_SYS_NS16550_MEM32)
64 #elif defined(CONFIG_SYS_BIG_ENDIAN)
65 writeb(value
, addr
+ (1 << shift
) - 1);
71 static inline int serial_in_shift(void *addr
, int shift
)
73 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
74 return inb((ulong
)addr
);
75 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
77 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
79 #elif defined(CONFIG_SYS_NS16550_MEM32)
81 #elif defined(CONFIG_SYS_BIG_ENDIAN)
82 return readb(addr
+ (1 << shift
) - 1);
88 #ifdef CONFIG_DM_SERIAL
90 #ifndef CONFIG_SYS_NS16550_CLK
91 #define CONFIG_SYS_NS16550_CLK 0
94 static void ns16550_writeb(NS16550_t port
, int offset
, int value
)
96 struct ns16550_platdata
*plat
= port
->plat
;
99 offset
*= 1 << plat
->reg_shift
;
100 addr
= (unsigned char *)plat
->base
+ offset
;
103 * As far as we know it doesn't make sense to support selection of
104 * these options at run-time, so use the existing CONFIG options.
106 serial_out_shift(addr
+ plat
->reg_offset
, plat
->reg_shift
, value
);
109 static int ns16550_readb(NS16550_t port
, int offset
)
111 struct ns16550_platdata
*plat
= port
->plat
;
114 offset
*= 1 << plat
->reg_shift
;
115 addr
= (unsigned char *)plat
->base
+ offset
;
117 return serial_in_shift(addr
+ plat
->reg_offset
, plat
->reg_shift
);
120 static u32
ns16550_getfcr(NS16550_t port
)
122 struct ns16550_platdata
*plat
= port
->plat
;
127 /* We can clean these up once everything is moved to driver model */
128 #define serial_out(value, addr) \
129 ns16550_writeb(com_port, \
130 (unsigned char *)addr - (unsigned char *)com_port, value)
131 #define serial_in(addr) \
132 ns16550_readb(com_port, \
133 (unsigned char *)addr - (unsigned char *)com_port)
135 static u32
ns16550_getfcr(NS16550_t port
)
137 return UART_FCR_DEFVAL
;
141 int ns16550_calc_divisor(NS16550_t port
, int clock
, int baudrate
)
143 const unsigned int mode_x_div
= 16;
145 return DIV_ROUND_CLOSEST(clock
, mode_x_div
* baudrate
);
148 static void NS16550_setbrg(NS16550_t com_port
, int baud_divisor
)
150 serial_out(UART_LCR_BKSE
| UART_LCRVAL
, &com_port
->lcr
);
151 serial_out(baud_divisor
& 0xff, &com_port
->dll
);
152 serial_out((baud_divisor
>> 8) & 0xff, &com_port
->dlm
);
153 serial_out(UART_LCRVAL
, &com_port
->lcr
);
156 void NS16550_init(NS16550_t com_port
, int baud_divisor
)
158 #if (defined(CONFIG_SPL_BUILD) && \
159 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
161 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
162 * before SPL starts only THRE bit is set. We have to empty the
163 * transmitter before initialization starts.
165 if ((serial_in(&com_port
->lsr
) & (UART_LSR_TEMT
| UART_LSR_THRE
))
167 if (baud_divisor
!= -1)
168 NS16550_setbrg(com_port
, baud_divisor
);
169 serial_out(0, &com_port
->mdr1
);
173 while (!(serial_in(&com_port
->lsr
) & UART_LSR_TEMT
))
176 serial_out(CONFIG_SYS_NS16550_IER
, &com_port
->ier
);
177 #if defined(CONFIG_ARCH_OMAP2PLUS)
178 serial_out(0x7, &com_port
->mdr1
); /* mode select reset TL16C750*/
180 serial_out(UART_MCRVAL
, &com_port
->mcr
);
181 serial_out(ns16550_getfcr(com_port
), &com_port
->fcr
);
182 if (baud_divisor
!= -1)
183 NS16550_setbrg(com_port
, baud_divisor
);
184 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX)
185 /* /16 is proper to hit 115200 with 48MHz */
186 serial_out(0, &com_port
->mdr1
);
188 #if defined(CONFIG_SOC_KEYSTONE)
189 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE
, &com_port
->regC
);
193 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
194 void NS16550_reinit(NS16550_t com_port
, int baud_divisor
)
196 serial_out(CONFIG_SYS_NS16550_IER
, &com_port
->ier
);
197 NS16550_setbrg(com_port
, 0);
198 serial_out(UART_MCRVAL
, &com_port
->mcr
);
199 serial_out(ns16550_getfcr(com_port
), &com_port
->fcr
);
200 NS16550_setbrg(com_port
, baud_divisor
);
202 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
204 void NS16550_putc(NS16550_t com_port
, char c
)
206 while ((serial_in(&com_port
->lsr
) & UART_LSR_THRE
) == 0)
208 serial_out(c
, &com_port
->thr
);
211 * Call watchdog_reset() upon newline. This is done here in putc
212 * since the environment code uses a single puts() to print the complete
213 * environment upon "printenv". So we can't put this watchdog call
220 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
221 char NS16550_getc(NS16550_t com_port
)
223 while ((serial_in(&com_port
->lsr
) & UART_LSR_DR
) == 0) {
224 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
225 extern void usbtty_poll(void);
230 return serial_in(&com_port
->rbr
);
233 int NS16550_tstc(NS16550_t com_port
)
235 return (serial_in(&com_port
->lsr
) & UART_LSR_DR
) != 0;
238 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
240 #ifdef CONFIG_DEBUG_UART_NS16550
242 #include <debug_uart.h>
244 static inline void _debug_uart_init(void)
246 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
250 * We copy the code from above because it is already horribly messy.
251 * Trying to refactor to nicely remove the duplication doesn't seem
252 * feasible. The better fix is to move all users of this driver to
255 baud_divisor
= ns16550_calc_divisor(com_port
, CONFIG_DEBUG_UART_CLOCK
,
257 serial_dout(&com_port
->ier
, CONFIG_SYS_NS16550_IER
);
258 serial_dout(&com_port
->mcr
, UART_MCRVAL
);
259 serial_dout(&com_port
->fcr
, UART_FCR_DEFVAL
);
261 serial_dout(&com_port
->lcr
, UART_LCR_BKSE
| UART_LCRVAL
);
262 serial_dout(&com_port
->dll
, baud_divisor
& 0xff);
263 serial_dout(&com_port
->dlm
, (baud_divisor
>> 8) & 0xff);
264 serial_dout(&com_port
->lcr
, UART_LCRVAL
);
267 static inline void _debug_uart_putc(int ch
)
269 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
271 while (!(serial_din(&com_port
->lsr
) & UART_LSR_THRE
))
273 serial_dout(&com_port
->thr
, ch
);
280 #ifdef CONFIG_DEBUG_UART_OMAP
282 #include <debug_uart.h>
284 static inline void _debug_uart_init(void)
286 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
289 baud_divisor
= ns16550_calc_divisor(com_port
, CONFIG_DEBUG_UART_CLOCK
,
291 serial_dout(&com_port
->ier
, CONFIG_SYS_NS16550_IER
);
292 serial_dout(&com_port
->mdr1
, 0x7);
293 serial_dout(&com_port
->mcr
, UART_MCRVAL
);
294 serial_dout(&com_port
->fcr
, UART_FCR_DEFVAL
);
296 serial_dout(&com_port
->lcr
, UART_LCR_BKSE
| UART_LCRVAL
);
297 serial_dout(&com_port
->dll
, baud_divisor
& 0xff);
298 serial_dout(&com_port
->dlm
, (baud_divisor
>> 8) & 0xff);
299 serial_dout(&com_port
->lcr
, UART_LCRVAL
);
300 serial_dout(&com_port
->mdr1
, 0x0);
303 static inline void _debug_uart_putc(int ch
)
305 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
307 while (!(serial_din(&com_port
->lsr
) & UART_LSR_THRE
))
309 serial_dout(&com_port
->thr
, ch
);
316 #ifdef CONFIG_DM_SERIAL
317 static int ns16550_serial_putc(struct udevice
*dev
, const char ch
)
319 struct NS16550
*const com_port
= dev_get_priv(dev
);
321 if (!(serial_in(&com_port
->lsr
) & UART_LSR_THRE
))
323 serial_out(ch
, &com_port
->thr
);
326 * Call watchdog_reset() upon newline. This is done here in putc
327 * since the environment code uses a single puts() to print the complete
328 * environment upon "printenv". So we can't put this watchdog call
337 static int ns16550_serial_pending(struct udevice
*dev
, bool input
)
339 struct NS16550
*const com_port
= dev_get_priv(dev
);
342 return (serial_in(&com_port
->lsr
) & UART_LSR_DR
) ? 1 : 0;
344 return (serial_in(&com_port
->lsr
) & UART_LSR_THRE
) ? 0 : 1;
347 static int ns16550_serial_getc(struct udevice
*dev
)
349 struct NS16550
*const com_port
= dev_get_priv(dev
);
351 if (!(serial_in(&com_port
->lsr
) & UART_LSR_DR
))
354 return serial_in(&com_port
->rbr
);
357 static int ns16550_serial_setbrg(struct udevice
*dev
, int baudrate
)
359 struct NS16550
*const com_port
= dev_get_priv(dev
);
360 struct ns16550_platdata
*plat
= com_port
->plat
;
363 clock_divisor
= ns16550_calc_divisor(com_port
, plat
->clock
, baudrate
);
365 NS16550_setbrg(com_port
, clock_divisor
);
370 int ns16550_serial_probe(struct udevice
*dev
)
372 struct NS16550
*const com_port
= dev_get_priv(dev
);
374 com_port
->plat
= dev_get_platdata(dev
);
375 NS16550_init(com_port
, -1);
380 #if CONFIG_IS_ENABLED(OF_CONTROL)
387 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
388 int ns16550_serial_ofdata_to_platdata(struct udevice
*dev
)
390 struct ns16550_platdata
*plat
= dev
->platdata
;
391 const u32 port_type
= dev_get_driver_data(dev
);
396 /* try Processor Local Bus device first */
397 addr
= dev_read_addr(dev
);
398 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
399 if (addr
== FDT_ADDR_T_NONE
) {
400 /* then try pci device */
401 struct fdt_pci_addr pci_addr
;
405 /* we prefer to use a memory-mapped register */
406 ret
= fdtdec_get_pci_addr(gd
->fdt_blob
, dev_of_offset(dev
),
407 FDT_PCI_SPACE_MEM32
, "reg",
410 /* try if there is any i/o-mapped register */
411 ret
= fdtdec_get_pci_addr(gd
->fdt_blob
,
419 ret
= fdtdec_get_pci_bar32(dev
, &pci_addr
, &bar
);
427 if (addr
== FDT_ADDR_T_NONE
)
430 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
433 plat
->base
= (unsigned long)map_physmem(addr
, 0, MAP_NOCACHE
);
436 plat
->reg_offset
= dev_read_u32_default(dev
, "reg-offset", 0);
437 plat
->reg_shift
= dev_read_u32_default(dev
, "reg-shift", 0);
439 err
= clk_get_by_index(dev
, 0, &clk
);
441 err
= clk_get_rate(&clk
);
442 if (!IS_ERR_VALUE(err
))
444 } else if (err
!= -ENOENT
&& err
!= -ENODEV
&& err
!= -ENOSYS
) {
445 debug("ns16550 failed to get clock\n");
450 plat
->clock
= dev_read_u32_default(dev
, "clock-frequency",
451 CONFIG_SYS_NS16550_CLK
);
453 debug("ns16550 clock not defined\n");
457 plat
->fcr
= UART_FCR_DEFVAL
;
458 if (port_type
== PORT_JZ4780
)
459 plat
->fcr
|= UART_FCR_UME
;
465 const struct dm_serial_ops ns16550_serial_ops
= {
466 .putc
= ns16550_serial_putc
,
467 .pending
= ns16550_serial_pending
,
468 .getc
= ns16550_serial_getc
,
469 .setbrg
= ns16550_serial_setbrg
,
472 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
474 * Please consider existing compatible strings before adding a new
475 * one to keep this table compact. Or you may add a generic "ns16550"
476 * compatible string to your dts.
478 static const struct udevice_id ns16550_serial_ids
[] = {
479 { .compatible
= "ns16550", .data
= PORT_NS16550
},
480 { .compatible
= "ns16550a", .data
= PORT_NS16550
},
481 { .compatible
= "ingenic,jz4780-uart", .data
= PORT_JZ4780
},
482 { .compatible
= "nvidia,tegra20-uart", .data
= PORT_NS16550
},
483 { .compatible
= "snps,dw-apb-uart", .data
= PORT_NS16550
},
484 { .compatible
= "ti,omap2-uart", .data
= PORT_NS16550
},
485 { .compatible
= "ti,omap3-uart", .data
= PORT_NS16550
},
486 { .compatible
= "ti,omap4-uart", .data
= PORT_NS16550
},
487 { .compatible
= "ti,am3352-uart", .data
= PORT_NS16550
},
488 { .compatible
= "ti,am4372-uart", .data
= PORT_NS16550
},
489 { .compatible
= "ti,dra742-uart", .data
= PORT_NS16550
},
492 #endif /* OF_CONTROL && !OF_PLATDATA */
494 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
496 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
497 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
498 U_BOOT_DRIVER(ns16550_serial
) = {
499 .name
= "ns16550_serial",
501 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
502 .of_match
= ns16550_serial_ids
,
503 .ofdata_to_platdata
= ns16550_serial_ofdata_to_platdata
,
504 .platdata_auto_alloc_size
= sizeof(struct ns16550_platdata
),
506 .priv_auto_alloc_size
= sizeof(struct NS16550
),
507 .probe
= ns16550_serial_probe
,
508 .ops
= &ns16550_serial_ops
,
509 .flags
= DM_FLAG_PRE_RELOC
,
512 #endif /* SERIAL_PRESENT */
514 #endif /* CONFIG_DM_SERIAL */