drivers/serial/serial_sh.c

   1 /*
   2  * SuperH SCIF device driver.
   3  * Copyright (c) 2007 Nobuhiro Iwamatsu
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  18  */
  19
  20 #include <common.h>
  21 #include <asm/processor.h>
  22
  23 #ifdef CFG_SCIF_CONSOLE
  24
  25 #if defined (CONFIG_CONS_SCIF0)
  26 #define SCIF_BASE       SCIF0_BASE
  27 #elif defined (CONFIG_CONS_SCIF1)
  28 #define SCIF_BASE       SCIF1_BASE
  29 #else
  30 #error "Default SCIF doesn't set....."
  31 #endif
  32
  33 /* Base register */
  34 #define SCSMR   (vu_short *)(SCIF_BASE + 0x0)
  35 #define SCBRR   (vu_char  *)(SCIF_BASE + 0x4)
  36 #define SCSCR   (vu_short *)(SCIF_BASE + 0x8)
  37 #define SCFCR   (vu_short *)(SCIF_BASE + 0x18)
  38 #define SCFDR   (vu_short *)(SCIF_BASE + 0x1C)
  39 #ifdef CONFIG_SH7720 /* SH7720 specific */
  40 #define SCFSR   (vu_short *)(SCIF_BASE + 0x14)   /* SCSSR */
  41 #define SCFTDR  (vu_char  *)(SCIF_BASE + 0x20)
  42 #define SCFRDR  (vu_char  *)(SCIF_BASE + 0x24)
  43 #else
  44 #define SCFTDR  (vu_char  *)(SCIF_BASE + 0xC)
  45 #define SCFSR   (vu_short *)(SCIF_BASE + 0x10)
  46 #define SCFRDR  (vu_char  *)(SCIF_BASE + 0x14)
  47 #endif
  48
  49 #if defined(CONFIG_SH4A)
  50 #define SCRFDR  (vu_short *)(SCIF_BASE + 0x20)
  51 #define SCSPTR  (vu_short *)(SCIF_BASE + 0x24)
  52 #define SCLSR   (vu_short *)(SCIF_BASE + 0x28)
  53 #define SCRER   (vu_short *)(SCIF_BASE + 0x2C)
  54 #define LSR_ORER        1
  55 #elif defined (CONFIG_SH4)
  56 #define SCSPTR  (vu_short *)(SCIF_BASE + 0x20)
  57 #define SCLSR   (vu_short *)(SCIF_BASE + 0x24)
  58 #define LSR_ORER        1
  59 #elif defined (CONFIG_SH3)
  60 #ifdef CONFIG_SH7720 /* SH7720 specific */
  61 # define SCLSR  SCFSR   /* SCSSR */
  62 #else
  63 # define SCLSR   (vu_short *)(SCIF_BASE + 0x24)
  64 #endif
  65 #define LSR_ORER        0x0200
  66 #endif
  67
  68 #define SCR_RE          (1 << 4)
  69 #define SCR_TE          (1 << 5)
  70 #define FCR_RFRST       (1 << 1) /* RFCL */
  71 #define FCR_TFRST       (1 << 2) /* TFCL */
  72 #define FSR_DR          (1 << 0)
  73 #define FSR_RDF         (1 << 1)
  74 #define FSR_FER         (1 << 3)
  75 #define FSR_BRK         (1 << 4)
  76 #define FSR_FER         (1 << 3)
  77 #define FSR_TEND        (1 << 6)
  78 #define FSR_ER          (1 << 7)
  79
  80 /*----------------------------------------------------------------------*/
  81
  82 void serial_setbrg (void)
  83 {
  84         DECLARE_GLOBAL_DATA_PTR;
  85
  86 #if defined(CONFIG_CPU_SH7720)
  87         int divisor = gd->baudrate * 16;
  88
  89         *SCBRR = (CONFIG_SYS_CLK_FREQ * 2 + (divisor / 2)) /
  90                                                 (gd->baudrate * 32) - 1;
  91 #else
  92         int divisor = gd->baudrate * 32;
  93
  94         *SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) /
  95                                                 (gd->baudrate * 32) - 1;
  96 #endif
  97 }
  98
  99 int serial_init (void)
 100 {
 101         *SCSCR = (SCR_RE | SCR_TE);
 102         *SCSMR = 0 ;
 103         *SCSMR = 0;
 104         *SCFCR = (FCR_RFRST | FCR_TFRST);
 105         *SCFCR;
 106         *SCFCR = 0;
 107
 108         serial_setbrg();
 109         return 0;
 110 }
 111
 112 static int serial_tx_fifo_level (void)
 113 {
 114         return (*SCFDR >> 8) & 0x1F;
 115 }
 116
 117 static int serial_rx_fifo_level (void)
 118 {
 119         return (*SCFDR >> 0) & 0x1F;
 120 }
 121
 122 void serial_raw_putc (const char c)
 123 {
 124         unsigned int fsr_bits_to_clear;
 125
 126         while (1) {
 127                 if (*SCFSR & FSR_TEND) {                /* Tx fifo is empty */
 128                         fsr_bits_to_clear = FSR_TEND;
 129                         break;
 130                 }
 131         }
 132
 133         *SCFTDR = c;
 134         if (fsr_bits_to_clear != 0)
 135                 *SCFSR &= ~fsr_bits_to_clear;
 136 }
 137
 138 void serial_putc (const char c)
 139 {
 140         if (c == '\n')
 141                 serial_raw_putc ('\r');
 142         serial_raw_putc (c);
 143 }
 144
 145 void serial_puts (const char *s)
 146 {
 147         char c;
 148         while ((c = *s++) != 0)
 149                 serial_putc (c);
 150 }
 151
 152 int serial_tstc (void)
 153 {
 154         return serial_rx_fifo_level() ? 1 : 0;
 155 }
 156
 157 #define FSR_ERR_CLEAR   0x0063
 158 #define RDRF_CLEAR      0x00fc
 159 void handle_error( void ){
 160
 161         (void)*SCFSR ;
 162         *SCFSR = FSR_ERR_CLEAR ;
 163         (void)*SCLSR ;
 164         *SCLSR = 0x00 ;
 165 }
 166
 167 int serial_getc_check( void ){
 168         unsigned short status;
 169
 170         status = *SCFSR ;
 171
 172         if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK))
 173                 handle_error();
 174         if( *SCLSR & LSR_ORER )
 175                 handle_error();
 176         return (status & ( FSR_DR | FSR_RDF ));
 177 }
 178
 179 int serial_getc (void)
 180 {
 181         unsigned short status ;
 182         char ch;
 183         while(!serial_getc_check());
 184
 185         ch = *SCFRDR;
 186         status =  *SCFSR ;
 187
 188         *SCFSR = RDRF_CLEAR ;
 189
 190         if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK))
 191                 handle_error();
 192
 193         if( *SCLSR & LSR_ORER )
 194                 handle_error();
 195
 196         return ch ;
 197 }
 198
 199 #endif  /* CFG_SCIF_CONSOLE */