drivers/serial/serial_stm32.c

   1 /*
   2  * (C) Copyright 2015
   3  * Kamil Lulko, <kamil.lulko@gmail.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <asm/io.h>
  11 #include <serial.h>
  12 #include <asm/arch/stm32.h>
  13 #include <dm/platform_data/serial_stm32.h>
  14
  15 struct stm32_usart {
  16         u32 sr;
  17         u32 dr;
  18         u32 brr;
  19         u32 cr1;
  20         u32 cr2;
  21         u32 cr3;
  22         u32 gtpr;
  23 };
  24
  25 #define USART_CR1_RE                    (1 << 2)
  26 #define USART_CR1_TE                    (1 << 3)
  27 #define USART_CR1_UE                    (1 << 13)
  28
  29 #define USART_SR_FLAG_RXNE      (1 << 5)
  30 #define USART_SR_FLAG_TXE               (1 << 7)
  31
  32 #define USART_BRR_F_MASK                0xF
  33 #define USART_BRR_M_SHIFT       4
  34 #define USART_BRR_M_MASK        0xFFF0
  35
  36 DECLARE_GLOBAL_DATA_PTR;
  37
  38 #define MAX_SERIAL_PORTS                4
  39
  40 /*
  41  * RCC USART specific definitions
  42  */
  43 #define RCC_ENR_USART1EN                (1 << 4)
  44 #define RCC_ENR_USART2EN                (1 << 17)
  45 #define RCC_ENR_USART3EN                (1 << 18)
  46 #define RCC_ENR_USART6EN                (1 <<  5)
  47
  48 /* Array used to figure out which RCC bit needs to be set */
  49 static const unsigned long usart_port_rcc_pairs[MAX_SERIAL_PORTS][2] = {
  50         { STM32_USART1_BASE, RCC_ENR_USART1EN },
  51         { STM32_USART2_BASE, RCC_ENR_USART2EN },
  52         { STM32_USART3_BASE, RCC_ENR_USART3EN },
  53         { STM32_USART6_BASE, RCC_ENR_USART6EN }
  54 };
  55
  56 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
  57 {
  58         struct stm32_serial_platdata *plat = dev->platdata;
  59         struct stm32_usart *const usart = plat->base;
  60         u32  clock, int_div, frac_div, tmp;
  61
  62         if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)
  63                 clock = clock_get(CLOCK_APB1);
  64         else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)
  65                 clock = clock_get(CLOCK_APB2);
  66         else
  67                 return -EINVAL;
  68
  69         int_div = (25 * clock) / (4 * baudrate);
  70         tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
  71         frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
  72         tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
  73         writel(tmp, &usart->brr);
  74
  75         return 0;
  76 }
  77
  78 static int stm32_serial_getc(struct udevice *dev)
  79 {
  80         struct stm32_serial_platdata *plat = dev->platdata;
  81         struct stm32_usart *const usart = plat->base;
  82
  83         if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
  84                 return -EAGAIN;
  85
  86         return readl(&usart->dr);
  87 }
  88
  89 static int stm32_serial_putc(struct udevice *dev, const char c)
  90 {
  91         struct stm32_serial_platdata *plat = dev->platdata;
  92         struct stm32_usart *const usart = plat->base;
  93
  94         if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
  95                 return -EAGAIN;
  96
  97         writel(c, &usart->dr);
  98
  99         return 0;
 100 }
 101
 102 static int stm32_serial_pending(struct udevice *dev, bool input)
 103 {
 104         struct stm32_serial_platdata *plat = dev->platdata;
 105         struct stm32_usart *const usart = plat->base;
 106
 107         if (input)
 108                 return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
 109         else
 110                 return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
 111 }
 112
 113 static int stm32_serial_probe(struct udevice *dev)
 114 {
 115         struct stm32_serial_platdata *plat = dev->platdata;
 116         struct stm32_usart *const usart = plat->base;
 117         int usart_port = -1;
 118         int i;
 119
 120         for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 121                 if ((u32)usart == usart_port_rcc_pairs[i][0]) {
 122                         usart_port = i;
 123                         break;
 124                 }
 125         }
 126
 127         if (usart_port == -1)
 128                 return -EINVAL;
 129
 130         if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)
 131                 setbits_le32(&STM32_RCC->apb1enr,
 132                              usart_port_rcc_pairs[usart_port][1]);
 133         else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)
 134                 setbits_le32(&STM32_RCC->apb2enr,
 135                              usart_port_rcc_pairs[usart_port][1]);
 136         else
 137                 return -EINVAL;
 138
 139         setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
 140
 141         return 0;
 142 }
 143
 144 static const struct dm_serial_ops stm32_serial_ops = {
 145         .putc = stm32_serial_putc,
 146         .pending = stm32_serial_pending,
 147         .getc = stm32_serial_getc,
 148         .setbrg = stm32_serial_setbrg,
 149 };
 150
 151 U_BOOT_DRIVER(serial_stm32) = {
 152         .name = "serial_stm32",
 153         .id = UCLASS_SERIAL,
 154         .ops = &stm32_serial_ops,
 155         .probe = stm32_serial_probe,
 156         .flags = DM_FLAG_PRE_RELOC,
 157 };