drivers/serial_pl011.h

   1 /*
   2  * (C) Copyright 2003, 2004
   3  * ARM Ltd.
   4  * Philippe Robin, <philippe.robin@arm.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 /*
  26  * ARM PrimeCell UART's (PL010 & PL011)
  27  * ------------------------------------
  28  *
  29  *  Definitions common to both PL010 & PL011
  30  *
  31  */
  32 #define UART_PL01x_DR                   0x00     /*  Data read or written from the interface. */
  33 #define UART_PL01x_RSR                  0x04     /*  Receive status register (Read). */
  34 #define UART_PL01x_ECR                  0x04     /*  Error clear register (Write). */
  35 #define UART_PL01x_FR                   0x18     /*  Flag register (Read only). */
  36
  37 #define UART_PL01x_RSR_OE               0x08
  38 #define UART_PL01x_RSR_BE               0x04
  39 #define UART_PL01x_RSR_PE               0x02
  40 #define UART_PL01x_RSR_FE               0x01
  41
  42 #define UART_PL01x_FR_TXFE              0x80
  43 #define UART_PL01x_FR_RXFF              0x40
  44 #define UART_PL01x_FR_TXFF              0x20
  45 #define UART_PL01x_FR_RXFE              0x10
  46 #define UART_PL01x_FR_BUSY              0x08
  47 #define UART_PL01x_FR_TMSK              (UART_PL01x_FR_TXFF + UART_PL01x_FR_BUSY)
  48
  49 /*
  50  *  PL010 definitions
  51  *
  52  */
  53 #define UART_PL010_LCRH                 0x08     /*  Line control register, high byte. */
  54 #define UART_PL010_LCRM                 0x0C     /*  Line control register, middle byte. */
  55 #define UART_PL010_LCRL                 0x10     /*  Line control register, low byte. */
  56 #define UART_PL010_CR                   0x14     /*  Control register. */
  57 #define UART_PL010_IIR                  0x1C     /*  Interrupt indentification register (Read). */
  58 #define UART_PL010_ICR                  0x1C     /*  Interrupt clear register (Write). */
  59 #define UART_PL010_ILPR                 0x20     /*  IrDA low power counter register. */
  60
  61 #define UART_PL010_CR_LPE               (1 << 7)
  62 #define UART_PL010_CR_RTIE              (1 << 6)
  63 #define UART_PL010_CR_TIE               (1 << 5)
  64 #define UART_PL010_CR_RIE               (1 << 4)
  65 #define UART_PL010_CR_MSIE              (1 << 3)
  66 #define UART_PL010_CR_IIRLP             (1 << 2)
  67 #define UART_PL010_CR_SIREN             (1 << 1)
  68 #define UART_PL010_CR_UARTEN            (1 << 0)
  69
  70 #define UART_PL010_LCRH_WLEN_8          (3 << 5)
  71 #define UART_PL010_LCRH_WLEN_7          (2 << 5)
  72 #define UART_PL010_LCRH_WLEN_6          (1 << 5)
  73 #define UART_PL010_LCRH_WLEN_5          (0 << 5)
  74 #define UART_PL010_LCRH_FEN             (1 << 4)
  75 #define UART_PL010_LCRH_STP2            (1 << 3)
  76 #define UART_PL010_LCRH_EPS             (1 << 2)
  77 #define UART_PL010_LCRH_PEN             (1 << 1)
  78 #define UART_PL010_LCRH_BRK             (1 << 0)
  79
  80
  81 #define UART_PL010_BAUD_460800            1
  82 #define UART_PL010_BAUD_230400            3
  83 #define UART_PL010_BAUD_115200            7
  84 #define UART_PL010_BAUD_57600             15
  85 #define UART_PL010_BAUD_38400             23
  86 #define UART_PL010_BAUD_19200             47
  87 #define UART_PL010_BAUD_14400             63
  88 #define UART_PL010_BAUD_9600              95
  89 #define UART_PL010_BAUD_4800              191
  90 #define UART_PL010_BAUD_2400              383
  91 #define UART_PL010_BAUD_1200              767
  92 /*
  93  *  PL011 definitions
  94  *
  95  */
  96 #define UART_PL011_IBRD                 0x24
  97 #define UART_PL011_FBRD                 0x28
  98 #define UART_PL011_LCRH                 0x2C
  99 #define UART_PL011_CR                   0x30
 100 #define UART_PL011_IMSC                 0x38
 101 #define UART_PL011_PERIPH_ID0           0xFE0
 102
 103 #define UART_PL011_LCRH_SPS             (1 << 7)
 104 #define UART_PL011_LCRH_WLEN_8          (3 << 5)
 105 #define UART_PL011_LCRH_WLEN_7          (2 << 5)
 106 #define UART_PL011_LCRH_WLEN_6          (1 << 5)
 107 #define UART_PL011_LCRH_WLEN_5          (0 << 5)
 108 #define UART_PL011_LCRH_FEN             (1 << 4)
 109 #define UART_PL011_LCRH_STP2            (1 << 3)
 110 #define UART_PL011_LCRH_EPS             (1 << 2)
 111 #define UART_PL011_LCRH_PEN             (1 << 1)
 112 #define UART_PL011_LCRH_BRK             (1 << 0)
 113
 114 #define UART_PL011_CR_CTSEN             (1 << 15)
 115 #define UART_PL011_CR_RTSEN             (1 << 14)
 116 #define UART_PL011_CR_OUT2              (1 << 13)
 117 #define UART_PL011_CR_OUT1              (1 << 12)
 118 #define UART_PL011_CR_RTS               (1 << 11)
 119 #define UART_PL011_CR_DTR               (1 << 10)
 120 #define UART_PL011_CR_RXE               (1 << 9)
 121 #define UART_PL011_CR_TXE               (1 << 8)
 122 #define UART_PL011_CR_LPE               (1 << 7)
 123 #define UART_PL011_CR_IIRLP             (1 << 2)
 124 #define UART_PL011_CR_SIREN             (1 << 1)
 125 #define UART_PL011_CR_UARTEN            (1 << 0)
 126
 127 #define UART_PL011_IMSC_OEIM            (1 << 10)
 128 #define UART_PL011_IMSC_BEIM            (1 << 9)
 129 #define UART_PL011_IMSC_PEIM            (1 << 8)
 130 #define UART_PL011_IMSC_FEIM            (1 << 7)
 131 #define UART_PL011_IMSC_RTIM            (1 << 6)
 132 #define UART_PL011_IMSC_TXIM            (1 << 5)
 133 #define UART_PL011_IMSC_RXIM            (1 << 4)
 134 #define UART_PL011_IMSC_DSRMIM          (1 << 3)
 135 #define UART_PL011_IMSC_DCDMIM          (1 << 2)
 136 #define UART_PL011_IMSC_CTSMIM          (1 << 1)
 137 #define UART_PL011_IMSC_RIMIM           (1 << 0)