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pmdomain: mediatek: Move Kconfig options to the pmdomain subsystem
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1 # SPDX-License-Identifier: GPL-2.0-only
2 #
3 # MediaTek SoC drivers
4 #
5 menu "MediaTek SoC drivers"
6 depends on ARCH_MEDIATEK || COMPILE_TEST
7
8 config MTK_CMDQ
9 tristate "MediaTek CMDQ Support"
10 depends on ARCH_MEDIATEK || COMPILE_TEST
11 select MAILBOX
12 select MTK_CMDQ_MBOX
13 select MTK_INFRACFG
14 help
15 Say yes here to add support for the MediaTek Command Queue (CMDQ)
16 driver. The CMDQ is used to help read/write registers with critical
17 time limitation, such as updating display configuration during the
18 vblank.
19
20 config MTK_DEVAPC
21 tristate "Mediatek Device APC Support"
22 help
23 Say yes here to enable support for Mediatek Device APC driver.
24 This driver is mainly used to handle the violation which catches
25 unexpected transaction.
26 The violation information is logged for further analysis or
27 countermeasures.
28
29 config MTK_INFRACFG
30 bool "MediaTek INFRACFG Support"
31 select REGMAP
32 help
33 Say yes here to add support for the MediaTek INFRACFG controller. The
34 INFRACFG controller contains various infrastructure registers not
35 directly associated to any device.
36
37 config MTK_PMIC_WRAP
38 tristate "MediaTek PMIC Wrapper Support"
39 depends on RESET_CONTROLLER
40 depends on OF
41 select REGMAP
42 help
43 Say yes here to add support for MediaTek PMIC Wrapper found
44 on different MediaTek SoCs. The PMIC wrapper is a proprietary
45 hardware to connect the PMIC.
46
47 config MTK_REGULATOR_COUPLER
48 bool "MediaTek SoC Regulator Coupler" if COMPILE_TEST
49 default ARCH_MEDIATEK
50 depends on REGULATOR
51
52 config MTK_MMSYS
53 tristate "MediaTek MMSYS Support"
54 default ARCH_MEDIATEK
55 depends on HAS_IOMEM
56 depends on MTK_CMDQ || MTK_CMDQ=n
57 help
58 Say yes here to add support for the MediaTek Multimedia
59 Subsystem (MMSYS).
60
61 config MTK_SVS
62 tristate "MediaTek Smart Voltage Scaling(SVS)"
63 depends on NVMEM_MTK_EFUSE && NVMEM
64 help
65 The Smart Voltage Scaling(SVS) engine is a piece of hardware
66 which has several controllers(banks) for calculating suitable
67 voltage to different power domains(CPU/GPU/CCI) according to
68 chip process corner, temperatures and other factors. Then DVFS
69 driver could apply SVS bank voltage to PMIC/Buck.
70
71 endmenu