2 * Andestech ATCSPI200 SPI controller driver.
4 * Copyright 2017 Andes Technology, Inc.
5 * Author: Rick Chen (rick@andestech.com)
7 * SPDX-License-Identifier: GPL-2.0+
17 DECLARE_GLOBAL_DATA_PTR
;
19 #define MAX_TRANSFER_LEN 512
21 #define SPI_TIMEOUT 0x100000
24 #define SPI0_BASE 0xf0b00000
25 #define SPI1_BASE 0xf0f00000
26 #define NSPI_MAX_CS_NUM 1
28 struct atcspi200_spi_regs
{
31 u32 format
; /* 0x10 */
32 #define DATA_LENGTH(x) ((x-1)<<8)
36 #define TRAMODE_OFFSET 24
37 #define TRAMODE_MASK (0x0F<<TRAMODE_OFFSET)
38 #define TRAMODE_WR_SYNC (0<<TRAMODE_OFFSET)
39 #define TRAMODE_WO (1<<TRAMODE_OFFSET)
40 #define TRAMODE_RO (2<<TRAMODE_OFFSET)
41 #define TRAMODE_WR (3<<TRAMODE_OFFSET)
42 #define TRAMODE_RW (4<<TRAMODE_OFFSET)
43 #define TRAMODE_WDR (5<<TRAMODE_OFFSET)
44 #define TRAMODE_RDW (6<<TRAMODE_OFFSET)
45 #define TRAMODE_NONE (7<<TRAMODE_OFFSET)
46 #define TRAMODE_DW (8<<TRAMODE_OFFSET)
47 #define TRAMODE_DR (9<<TRAMODE_OFFSET)
48 #define WCNT_OFFSET 12
49 #define WCNT_MASK (0x1FF<<WCNT_OFFSET)
51 #define RCNT_MASK (0x1FF<<RCNT_OFFSET)
56 #define TXFTH_OFFSET 16
57 #define RXFTH_OFFSET 8
58 #define TXDMAEN (1<<4)
59 #define RXDMAEN (1<<3)
65 #define TXEPTY (1<<22)
66 #define TXFVE_MASK (0x1F<<16)
68 #define RXFVE_OFFSET (8)
69 #define RXFVE_MASK (0x1F<<RXFVE_OFFSET)
73 u32 timing
; /* 0x40 */
74 #define SCLK_DIV_MASK 0xFF
77 struct nds_spi_slave
{
79 struct spi_slave slave
;
81 volatile struct atcspi200_spi_regs
*regs
;
94 unsigned int max_transfer_length
;
97 static int __atcspi200_spi_set_speed(struct nds_spi_slave
*ns
)
101 tm
= ns
->regs
->timing
;
102 tm
&= ~SCLK_DIV_MASK
;
104 if(ns
->freq
>= ns
->clock
)
107 for (div
= 0; div
< 0xff; div
++) {
108 if (ns
->freq
>= ns
->clock
/ (2 * (div
+ 1)))
114 ns
->regs
->timing
= tm
;
120 static int __atcspi200_spi_claim_bus(struct nds_spi_slave
*ns
)
122 unsigned int format
=0;
123 ns
->regs
->ctrl
|= (TXFRST
|RXFRST
|SPIRST
);
124 while((ns
->regs
->ctrl
&(TXFRST
|RXFRST
|SPIRST
))&&(ns
->to
--))
129 format
= ns
->mode
|DATA_LENGTH(8);
130 ns
->regs
->format
= format
;
131 __atcspi200_spi_set_speed(ns
);
136 static int __atcspi200_spi_release_bus(struct nds_spi_slave
*ns
)
142 static int __atcspi200_spi_start(struct nds_spi_slave
*ns
)
145 int tc
= ns
->regs
->tctrl
;
147 tc
&= ~(WCNT_MASK
|RCNT_MASK
|TRAMODE_MASK
);
148 if ((ns
->din
)&&(ns
->cmd_len
))
157 tc
|= (ns
->cmd_len
+olen
-1) << WCNT_OFFSET
;
160 tc
|= (ns
->tran_len
-1) << RCNT_OFFSET
;
162 ns
->regs
->tctrl
= tc
;
165 for (i
=0;i
<ns
->cmd_len
;i
++)
166 ns
->regs
->data
= ns
->cmd_buf
[i
];
171 static int __atcspi200_spi_stop(struct nds_spi_slave
*ns
)
173 ns
->regs
->timing
= ns
->mtiming
;
174 while ((ns
->regs
->status
& SPIBSY
)&&(ns
->to
--))
181 static void __nspi_espi_tx(struct nds_spi_slave
*ns
, const void *dout
)
183 ns
->regs
->data
= *(u8
*)dout
;
186 static int __nspi_espi_rx(struct nds_spi_slave
*ns
, void *din
, unsigned int bytes
)
188 *(u8
*)din
= ns
->regs
->data
;
193 static int __atcspi200_spi_xfer(struct nds_spi_slave
*ns
,
194 unsigned int bitlen
, const void *data_out
, void *data_in
,
197 unsigned int event
, rx_bytes
;
198 const void *dout
= NULL
;
200 int num_blks
, num_chunks
, max_tran_len
, tran_len
;
202 u8
*cmd_buf
= ns
->cmd_buf
;
203 size_t cmd_len
= ns
->cmd_len
;
204 size_t data_len
= bitlen
/ 8;
208 max_tran_len
= ns
->max_transfer_length
;
211 cmd_len
= ns
->cmd_len
= data_len
;
212 memcpy(cmd_buf
, data_out
, cmd_len
);
220 ns
->data_len
= data_len
;
221 ns
->din
= (u8
*)data_in
;
222 ns
->dout
= (u8
*)data_out
;
225 case SPI_XFER_BEGIN
| SPI_XFER_END
:
229 cmd_len
= ns
->cmd_len
= data_len
;
230 memcpy(cmd_buf
, data_out
, cmd_len
);
233 __atcspi200_spi_start(ns
);
236 debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %u\n",
237 *(uint
*)data_out
, data_out
, *(uint
*)data_in
, data_in
, data_len
);
238 num_chunks
= DIV_ROUND_UP(data_len
, max_tran_len
);
241 while (num_chunks
--) {
242 tran_len
= min(data_len
, (size_t)max_tran_len
);
243 ns
->tran_len
= tran_len
;
244 num_blks
= DIV_ROUND_UP(tran_len
, CHUNK_SIZE
);
245 num_bytes
= (tran_len
) % CHUNK_SIZE
;
247 num_bytes
= CHUNK_SIZE
;
248 __atcspi200_spi_start(ns
);
251 event
= in_le32(&ns
->regs
->status
);
252 if ((event
& TXEPTY
) && (data_out
)) {
253 __nspi_espi_tx(ns
, dout
);
254 num_blks
-= CHUNK_SIZE
;
258 if ((event
& RXFVE_MASK
) && (data_in
)) {
259 rf_cnt
= ((event
& RXFVE_MASK
)>> RXFVE_OFFSET
);
260 if (rf_cnt
>= CHUNK_SIZE
)
261 rx_bytes
= CHUNK_SIZE
;
262 else if (num_blks
== 1 && rf_cnt
== num_bytes
)
263 rx_bytes
= num_bytes
;
267 if (__nspi_espi_rx(ns
, din
, rx_bytes
) == rx_bytes
) {
268 num_blks
-= CHUNK_SIZE
;
269 din
= (unsigned char *)din
+ rx_bytes
;
274 data_len
-= tran_len
;
277 ns
->cmd_buf
[1] += ((tran_len
>>16)&0xff);
278 ns
->cmd_buf
[2] += ((tran_len
>>8)&0xff);
279 ns
->cmd_buf
[3] += ((tran_len
)&0xff);
280 ns
->data_len
= data_len
;
282 ret
= __atcspi200_spi_stop(ns
);
284 ret
= __atcspi200_spi_stop(ns
);
289 #ifndef CONFIG_DM_SPI
290 #define to_nds_spi_slave(s) container_of(s, struct nds_spi_slave, slave)
291 struct spi_slave
*spi_setup_slave(unsigned int bus
, unsigned int cs
,
292 unsigned int max_hz
, unsigned int mode
)
294 struct nds_spi_slave
*ns
;
296 if (!spi_cs_is_valid(bus
, cs
))
299 ns
= spi_alloc_slave(struct nds_spi_slave
, bus
, cs
);
303 ns
->regs
= (struct atcspi200_spi_regs
*)SPI0_BASE
;
307 ns
->regs
= (struct atcspi200_spi_regs
*)SPI1_BASE
;
316 ns
->to
= SPI_TIMEOUT
;
317 ns
->max_transfer_length
= MAX_TRANSFER_LEN
;
318 ns
->slave
.max_write_size
= MAX_TRANSFER_LEN
;
325 void spi_free_slave(struct spi_slave
*slave
)
327 struct nds_spi_slave
*ns
= to_nds_spi_slave(slave
);
336 int spi_claim_bus(struct spi_slave
*slave
)
338 struct nds_spi_slave
*ns
= to_nds_spi_slave(slave
);
339 return __atcspi200_spi_claim_bus(ns
);
342 void spi_release_bus(struct spi_slave
*slave
)
344 struct nds_spi_slave
*ns
= to_nds_spi_slave(slave
);
345 __atcspi200_spi_release_bus(ns
);
348 int spi_xfer(struct spi_slave
*slave
, unsigned int bitlen
, const void *data_out
,
349 void *data_in
, unsigned long flags
)
351 struct nds_spi_slave
*ns
= to_nds_spi_slave(slave
);
352 return __atcspi200_spi_xfer(ns
, bitlen
, data_out
, data_in
, flags
);
355 int spi_cs_is_valid(unsigned int bus
, unsigned int cs
)
357 return bus
== 0 && cs
< NSPI_MAX_CS_NUM
;
360 void spi_cs_activate(struct spi_slave
*slave
)
362 struct nds_spi_slave
*ns
= to_nds_spi_slave(slave
);
363 __atcspi200_spi_start(ns
);
366 void spi_cs_deactivate(struct spi_slave
*slave
)
368 struct nds_spi_slave
*ns
= to_nds_spi_slave(slave
);
369 __atcspi200_spi_stop(ns
);
372 static int atcspi200_spi_set_speed(struct udevice
*bus
, uint max_hz
)
374 struct nds_spi_slave
*ns
= dev_get_priv(bus
);
376 debug("%s speed %u\n", __func__
, max_hz
);
379 __atcspi200_spi_set_speed(ns
);
384 static int atcspi200_spi_set_mode(struct udevice
*bus
, uint mode
)
386 struct nds_spi_slave
*ns
= dev_get_priv(bus
);
388 debug("%s mode %u\n", __func__
, mode
);
394 static int atcspi200_spi_claim_bus(struct udevice
*dev
)
396 struct dm_spi_slave_platdata
*slave_plat
=
397 dev_get_parent_platdata(dev
);
398 struct udevice
*bus
= dev
->parent
;
399 struct nds_spi_slave
*ns
= dev_get_priv(bus
);
401 if (slave_plat
->cs
>= ns
->num_cs
) {
402 printf("Invalid SPI chipselect\n");
406 return __atcspi200_spi_claim_bus(ns
);
409 static int atcspi200_spi_release_bus(struct udevice
*dev
)
411 struct nds_spi_slave
*ns
= dev_get_priv(dev
->parent
);
413 return __atcspi200_spi_release_bus(ns
);
416 static int atcspi200_spi_xfer(struct udevice
*dev
, unsigned int bitlen
,
417 const void *dout
, void *din
,
420 struct udevice
*bus
= dev
->parent
;
421 struct nds_spi_slave
*ns
= dev_get_priv(bus
);
423 return __atcspi200_spi_xfer(ns
, bitlen
, dout
, din
, flags
);
426 static int atcspi200_spi_get_clk(struct udevice
*bus
)
428 struct nds_spi_slave
*ns
= dev_get_priv(bus
);
433 ret
= clk_get_by_index(bus
, 0, &clk
);
437 clk_rate
= clk_get_rate(&clk
);
441 ns
->clock
= clk_rate
;
447 static int atcspi200_spi_probe(struct udevice
*bus
)
449 struct nds_spi_slave
*ns
= dev_get_priv(bus
);
451 ns
->to
= SPI_TIMEOUT
;
452 ns
->max_transfer_length
= MAX_TRANSFER_LEN
;
453 ns
->mtiming
= ns
->regs
->timing
;
454 atcspi200_spi_get_clk(bus
);
459 static int atcspi200_ofdata_to_platadata(struct udevice
*bus
)
461 struct nds_spi_slave
*ns
= dev_get_priv(bus
);
462 const void *blob
= gd
->fdt_blob
;
463 int node
= dev_of_offset(bus
);
465 ns
->regs
= map_physmem(devfdt_get_addr(bus
),
466 sizeof(struct atcspi200_spi_regs
),
469 printf("%s: could not map device address\n", __func__
);
472 ns
->num_cs
= fdtdec_get_int(blob
, node
, "num-cs", 4);
477 static const struct dm_spi_ops atcspi200_spi_ops
= {
478 .claim_bus
= atcspi200_spi_claim_bus
,
479 .release_bus
= atcspi200_spi_release_bus
,
480 .xfer
= atcspi200_spi_xfer
,
481 .set_speed
= atcspi200_spi_set_speed
,
482 .set_mode
= atcspi200_spi_set_mode
,
485 static const struct udevice_id atcspi200_spi_ids
[] = {
486 { .compatible
= "andestech,atcspi200" },
490 U_BOOT_DRIVER(atcspi200_spi
) = {
491 .name
= "atcspi200_spi",
493 .of_match
= atcspi200_spi_ids
,
494 .ops
= &atcspi200_spi_ops
,
495 .ofdata_to_platdata
= atcspi200_ofdata_to_platadata
,
496 .priv_auto_alloc_size
= sizeof(struct nds_spi_slave
),
497 .probe
= atcspi200_spi_probe
,