drivers/spi/atmel_spi.h

   1 /*
   2  * Register definitions for the Atmel AT32/AT91 SPI Controller
   3  */
   4
   5 /* Register offsets */
   6 #define ATMEL_SPI_CR                    0x0000
   7 #define ATMEL_SPI_MR                    0x0004
   8 #define ATMEL_SPI_RDR                   0x0008
   9 #define ATMEL_SPI_TDR                   0x000c
  10 #define ATMEL_SPI_SR                    0x0010
  11 #define ATMEL_SPI_IER                   0x0014
  12 #define ATMEL_SPI_IDR                   0x0018
  13 #define ATMEL_SPI_IMR                   0x001c
  14 #define ATMEL_SPI_CSR(x)                (0x0030 + 4 * (x))
  15 #define ATMEL_SPI_VERSION               0x00fc
  16
  17 /* Bits in CR */
  18 #define ATMEL_SPI_CR_SPIEN              (1 << 0)
  19 #define ATMEL_SPI_CR_SPIDIS             (1 << 1)
  20 #define ATMEL_SPI_CR_SWRST              (1 << 7)
  21 #define ATMEL_SPI_CR_LASTXFER           (1 << 24)
  22
  23 /* Bits in MR */
  24 #define ATMEL_SPI_MR_MSTR               (1 << 0)
  25 #define ATMEL_SPI_MR_PS                 (1 << 1)
  26 #define ATMEL_SPI_MR_PCSDEC             (1 << 2)
  27 #define ATMEL_SPI_MR_FDIV               (1 << 3)
  28 #define ATMEL_SPI_MR_MODFDIS            (1 << 4)
  29 #define ATMEL_SPI_MR_LLB                (1 << 7)
  30 #define ATMEL_SPI_MR_PCS(x)             (((x) & 15) << 16)
  31 #define ATMEL_SPI_MR_DLYBCS(x)          ((x) << 24)
  32
  33 /* Bits in RDR */
  34 #define ATMEL_SPI_RDR_RD(x)             (x)
  35 #define ATMEL_SPI_RDR_PCS(x)            ((x) << 16)
  36
  37 /* Bits in TDR */
  38 #define ATMEL_SPI_TDR_TD(x)             (x)
  39 #define ATMEL_SPI_TDR_PCS(x)            ((x) << 16)
  40 #define ATMEL_SPI_TDR_LASTXFER          (1 << 24)
  41
  42 /* Bits in SR/IER/IDR/IMR */
  43 #define ATMEL_SPI_SR_RDRF               (1 << 0)
  44 #define ATMEL_SPI_SR_TDRE               (1 << 1)
  45 #define ATMEL_SPI_SR_MODF               (1 << 2)
  46 #define ATMEL_SPI_SR_OVRES              (1 << 3)
  47 #define ATMEL_SPI_SR_ENDRX              (1 << 4)
  48 #define ATMEL_SPI_SR_ENDTX              (1 << 5)
  49 #define ATMEL_SPI_SR_RXBUFF             (1 << 6)
  50 #define ATMEL_SPI_SR_TXBUFE             (1 << 7)
  51 #define ATMEL_SPI_SR_NSSR               (1 << 8)
  52 #define ATMEL_SPI_SR_TXEMPTY            (1 << 9)
  53 #define ATMEL_SPI_SR_SPIENS             (1 << 16)
  54
  55 /* Bits in CSRx */
  56 #define ATMEL_SPI_CSRx_CPOL             (1 << 0)
  57 #define ATMEL_SPI_CSRx_NCPHA            (1 << 1)
  58 #define ATMEL_SPI_CSRx_CSAAT            (1 << 3)
  59 #define ATMEL_SPI_CSRx_BITS(x)          ((x) << 4)
  60 #define ATMEL_SPI_CSRx_SCBR(x)          ((x) << 8)
  61 #define ATMEL_SPI_CSRx_SCBR_MAX         0xff
  62 #define ATMEL_SPI_CSRx_DLYBS(x)         ((x) << 16)
  63 #define ATMEL_SPI_CSRx_DLYBCT(x)        ((x) << 24)
  64
  65 /* Bits in VERSION */
  66 #define ATMEL_SPI_VERSION_REV(x)        ((x) << 0)
  67 #define ATMEL_SPI_VERSION_MFN(x)        ((x) << 16)
  68
  69 /* Constants for CSRx:BITS */
  70 #define ATMEL_SPI_BITS_8                0
  71 #define ATMEL_SPI_BITS_9                1
  72 #define ATMEL_SPI_BITS_10               2
  73 #define ATMEL_SPI_BITS_11               3
  74 #define ATMEL_SPI_BITS_12               4
  75 #define ATMEL_SPI_BITS_13               5
  76 #define ATMEL_SPI_BITS_14               6
  77 #define ATMEL_SPI_BITS_15               7
  78 #define ATMEL_SPI_BITS_16               8
  79
  80 struct atmel_spi_slave {
  81         struct spi_slave slave;
  82         void            *regs;
  83         u32             mr;
  84 };
  85
  86 static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
  87 {
  88         return container_of(slave, struct atmel_spi_slave, slave);
  89 }
  90
  91 /* Register access macros */
  92 #define spi_readl(as, reg)                                      \
  93         readl(as->regs + ATMEL_SPI_##reg)
  94 #define spi_writel(as, reg, value)                              \
  95         writel(value, as->regs + ATMEL_SPI_##reg)