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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/spi/cf_spi.c
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
9 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/immap.h>
18 struct spi_slave slave
;
23 extern void cfspi_port_conf(void);
24 extern int cfspi_claim_bus(uint bus
, uint cs
);
25 extern void cfspi_release_bus(uint bus
, uint cs
);
27 DECLARE_GLOBAL_DATA_PTR
;
29 #ifndef CONFIG_SPI_IDLE_VAL
30 #if defined(CONFIG_SPI_MMC)
31 #define CONFIG_SPI_IDLE_VAL 0xFFFF
33 #define CONFIG_SPI_IDLE_VAL 0x0
37 #if defined(CONFIG_CF_DSPI)
38 /* DSPI specific mode */
39 #define SPI_MODE_MOD 0x00200000
40 #define SPI_DBLRATE 0x00100000
42 static inline struct cf_spi_slave
*to_cf_spi_slave(struct spi_slave
*slave
)
44 return container_of(slave
, struct cf_spi_slave
, slave
);
47 static void cfspi_init(void)
49 volatile dspi_t
*dspi
= (dspi_t
*) MMAP_DSPI
;
51 cfspi_port_conf(); /* port configuration */
53 dspi
->mcr
= DSPI_MCR_MSTR
| DSPI_MCR_CSIS7
| DSPI_MCR_CSIS6
|
54 DSPI_MCR_CSIS5
| DSPI_MCR_CSIS4
| DSPI_MCR_CSIS3
|
55 DSPI_MCR_CSIS2
| DSPI_MCR_CSIS1
| DSPI_MCR_CSIS0
|
56 DSPI_MCR_CRXF
| DSPI_MCR_CTXF
;
58 /* Default setting in platform configuration */
59 #ifdef CONFIG_SYS_DSPI_CTAR0
60 dspi
->ctar
[0] = CONFIG_SYS_DSPI_CTAR0
;
62 #ifdef CONFIG_SYS_DSPI_CTAR1
63 dspi
->ctar
[1] = CONFIG_SYS_DSPI_CTAR1
;
65 #ifdef CONFIG_SYS_DSPI_CTAR2
66 dspi
->ctar
[2] = CONFIG_SYS_DSPI_CTAR2
;
68 #ifdef CONFIG_SYS_DSPI_CTAR3
69 dspi
->ctar
[3] = CONFIG_SYS_DSPI_CTAR3
;
71 #ifdef CONFIG_SYS_DSPI_CTAR4
72 dspi
->ctar
[4] = CONFIG_SYS_DSPI_CTAR4
;
74 #ifdef CONFIG_SYS_DSPI_CTAR5
75 dspi
->ctar
[5] = CONFIG_SYS_DSPI_CTAR5
;
77 #ifdef CONFIG_SYS_DSPI_CTAR6
78 dspi
->ctar
[6] = CONFIG_SYS_DSPI_CTAR6
;
80 #ifdef CONFIG_SYS_DSPI_CTAR7
81 dspi
->ctar
[7] = CONFIG_SYS_DSPI_CTAR7
;
85 static void cfspi_tx(u32 ctrl
, u16 data
)
87 volatile dspi_t
*dspi
= (dspi_t
*) MMAP_DSPI
;
89 while ((dspi
->sr
& 0x0000F000) >= 4) ;
91 dspi
->tfr
= (ctrl
| data
);
94 static u16
cfspi_rx(void)
96 volatile dspi_t
*dspi
= (dspi_t
*) MMAP_DSPI
;
98 while ((dspi
->sr
& 0x000000F0) == 0) ;
100 return (dspi
->rfr
& 0xFFFF);
103 static int cfspi_xfer(struct spi_slave
*slave
, uint bitlen
, const void *dout
,
104 void *din
, ulong flags
)
106 struct cf_spi_slave
*cfslave
= to_cf_spi_slave(slave
);
107 u16
*spi_rd16
= NULL
, *spi_wr16
= NULL
;
108 u8
*spi_rd
= NULL
, *spi_wr
= NULL
;
110 uint len
= bitlen
>> 3;
112 if (cfslave
->charbit
== 16) {
114 spi_wr16
= (u16
*) dout
;
115 spi_rd16
= (u16
*) din
;
117 spi_wr
= (u8
*) dout
;
121 if ((flags
& SPI_XFER_BEGIN
) == SPI_XFER_BEGIN
)
122 ctrl
|= DSPI_TFR_CONT
;
124 ctrl
= (ctrl
& 0xFF000000) | ((1 << slave
->cs
) << 16);
127 int tmp_len
= len
- 1;
130 if (cfslave
->charbit
== 16)
131 cfspi_tx(ctrl
, *spi_wr16
++);
133 cfspi_tx(ctrl
, *spi_wr
++);
138 cfspi_tx(ctrl
, CONFIG_SPI_IDLE_VAL
);
139 if (cfslave
->charbit
== 16)
140 *spi_rd16
++ = cfspi_rx();
142 *spi_rd
++ = cfspi_rx();
146 len
= 1; /* remaining byte */
149 if ((flags
& SPI_XFER_END
) == SPI_XFER_END
)
150 ctrl
&= ~DSPI_TFR_CONT
;
154 if (cfslave
->charbit
== 16)
155 cfspi_tx(ctrl
, *spi_wr16
);
157 cfspi_tx(ctrl
, *spi_wr
);
162 cfspi_tx(ctrl
, CONFIG_SPI_IDLE_VAL
);
163 if (cfslave
->charbit
== 16)
164 *spi_rd16
= cfspi_rx();
166 *spi_rd
= cfspi_rx();
170 cfspi_tx(ctrl
, CONFIG_SPI_IDLE_VAL
);
177 static struct spi_slave
*cfspi_setup_slave(struct cf_spi_slave
*cfslave
,
181 * bit definition for mode:
182 * bit 31 - 28: Transfer size 3 to 16 bits
183 * 27 - 26: PCS to SCK delay prescaler
184 * 25 - 24: After SCK delay prescaler
185 * 23 - 22: Delay after transfer prescaler
186 * 21 : Allow overwrite for bit 31-22 and bit 20-8
187 * 20 : Double baud rate
188 * 19 - 16: PCS to SCK delay scaler
189 * 15 - 12: After SCK delay scaler
190 * 11 - 8: Delay after transfer scaler
191 * 7 - 0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST
193 volatile dspi_t
*dspi
= (dspi_t
*) MMAP_DSPI
;
194 int prescaler
[] = { 2, 3, 5, 7 };
198 256, 512, 1024, 2048,
199 4096, 8192, 16384, 32768
201 int i
, j
, pbrcnt
, brcnt
, diff
, tmp
, dbr
= 0;
202 int best_i
, best_j
, bestmatch
= 0x7FFFFFFF, baud_speed
;
205 tmp
= (prescaler
[3] * scaler
[15]);
206 /* Maximum and minimum baudrate it can handle */
207 if ((cfslave
->baudrate
> (gd
->bus_clk
>> 1)) ||
208 (cfslave
->baudrate
< (gd
->bus_clk
/ tmp
))) {
209 printf("Exceed baudrate limitation: Max %d - Min %d\n",
210 (int)(gd
->bus_clk
>> 1), (int)(gd
->bus_clk
/ tmp
));
214 /* Activate Double Baud when it exceed 1/4 the bus clk */
215 if ((CONFIG_SYS_DSPI_CTAR0
& DSPI_CTAR_DBR
) ||
216 (cfslave
->baudrate
> (gd
->bus_clk
/ (prescaler
[0] * scaler
[0])))) {
217 bus_setup
|= DSPI_CTAR_DBR
;
222 bus_setup
|= DSPI_CTAR_CPOL
;
224 bus_setup
|= DSPI_CTAR_CPHA
;
225 if (mode
& SPI_LSB_FIRST
)
226 bus_setup
|= DSPI_CTAR_LSBFE
;
228 /* Overwrite default value set in platform configuration file */
229 if (mode
& SPI_MODE_MOD
) {
231 if ((mode
& 0xF0000000) == 0)
233 dspi
->ctar
[cfslave
->slave
.bus
] & 0x78000000;
235 bus_setup
|= ((mode
& 0xF0000000) >> 1);
238 * Check to see if it is enabled by default in platform
239 * config, or manual setting passed by mode parameter
241 if (mode
& SPI_DBLRATE
) {
242 bus_setup
|= DSPI_CTAR_DBR
;
245 bus_setup
|= (mode
& 0x0FC00000) >> 4; /* PSCSCK, PASC, PDT */
246 bus_setup
|= (mode
& 0x000FFF00) >> 4; /* CSSCK, ASC, DT */
248 bus_setup
|= (dspi
->ctar
[cfslave
->slave
.bus
] & 0x78FCFFF0);
251 ((dspi
->ctar
[cfslave
->slave
.bus
] & 0x78000000) ==
252 0x78000000) ? 16 : 8;
254 pbrcnt
= sizeof(prescaler
) / sizeof(int);
255 brcnt
= sizeof(scaler
) / sizeof(int);
257 /* baudrate calculation - to closer value, may not be exact match */
258 for (best_i
= 0, best_j
= 0, i
= 0; i
< pbrcnt
; i
++) {
259 baud_speed
= gd
->bus_clk
/ prescaler
[i
];
260 for (j
= 0; j
< brcnt
; j
++) {
261 tmp
= (baud_speed
/ scaler
[j
]) * (1 + dbr
);
263 if (tmp
> cfslave
->baudrate
)
264 diff
= tmp
- cfslave
->baudrate
;
266 diff
= cfslave
->baudrate
- tmp
;
268 if (diff
< bestmatch
) {
275 bus_setup
|= (DSPI_CTAR_PBR(best_i
) | DSPI_CTAR_BR(best_j
));
276 dspi
->ctar
[cfslave
->slave
.bus
] = bus_setup
;
278 return &cfslave
->slave
;
280 #endif /* CONFIG_CF_DSPI */
282 #ifdef CONFIG_CMD_SPI
283 int spi_cs_is_valid(unsigned int bus
, unsigned int cs
)
285 if (((cs
>= 0) && (cs
< 8)) && ((bus
>= 0) && (bus
< 8)))
291 void spi_init_f(void)
295 void spi_init_r(void)
304 struct spi_slave
*spi_setup_slave(unsigned int bus
, unsigned int cs
,
305 unsigned int max_hz
, unsigned int mode
)
307 struct cf_spi_slave
*cfslave
;
309 if (!spi_cs_is_valid(bus
, cs
))
312 cfslave
= spi_alloc_slave(struct cf_spi_slave
, bus
, cs
);
316 cfslave
->baudrate
= max_hz
;
319 return cfspi_setup_slave(cfslave
, mode
);
322 void spi_free_slave(struct spi_slave
*slave
)
324 struct cf_spi_slave
*cfslave
= to_cf_spi_slave(slave
);
329 int spi_claim_bus(struct spi_slave
*slave
)
331 return cfspi_claim_bus(slave
->bus
, slave
->cs
);
334 void spi_release_bus(struct spi_slave
*slave
)
336 cfspi_release_bus(slave
->bus
, slave
->cs
);
339 int spi_xfer(struct spi_slave
*slave
, unsigned int bitlen
, const void *dout
,
340 void *din
, unsigned long flags
)
342 return cfspi_xfer(slave
, bitlen
, dout
, din
, flags
);
344 #endif /* CONFIG_CMD_SPI */