2 * LPC32xx SSP interface (SPI mode)
4 * (C) Copyright 2014 DENX Software Engineering GmbH
5 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <linux/compat.h>
15 #include <asm/arch/clk.h>
17 /* SSP chip registers */
31 /* CR1 register defines */
32 #define SSP_CR1_SSP_ENABLE 0x0002
34 /* SR register defines */
35 #define SSP_SR_TNF 0x0002
36 /* SSP status RX FIFO not empty bit */
37 #define SSP_SR_RNE 0x0004
39 /* lpc32xx spi slave */
40 struct lpc32xx_spi_slave
{
41 struct spi_slave slave
;
42 struct ssp_regs
*regs
;
45 static inline struct lpc32xx_spi_slave
*to_lpc32xx_spi_slave(
46 struct spi_slave
*slave
)
48 return container_of(slave
, struct lpc32xx_spi_slave
, slave
);
51 /* spi_init is called during boot when CONFIG_CMD_SPI is defined */
55 * nothing to do: clocking was enabled in lpc32xx_ssp_enable()
56 * and configuration will be done in spi_setup_slave()
60 /* the following is called in sequence by do_spi_xfer() */
62 struct spi_slave
*spi_setup_slave(uint bus
, uint cs
, uint max_hz
, uint mode
)
64 struct lpc32xx_spi_slave
*lslave
;
66 /* we only set up SSP0 for now, so ignore bus */
68 if (mode
& SPI_3WIRE
) {
69 pr_err("3-wire mode not supported");
73 if (mode
& SPI_SLAVE
) {
74 pr_err("slave mode not supported\n");
78 if (mode
& SPI_PREAMBLE
) {
79 pr_err("preamble byte skipping not supported\n");
83 lslave
= spi_alloc_slave(struct lpc32xx_spi_slave
, bus
, cs
);
85 printf("SPI_error: Fail to allocate lpc32xx_spi_slave\n");
89 lslave
->regs
= (struct ssp_regs
*)SSP0_BASE
;
92 * 8 bit frame, SPI fmt, 500kbps -> clock divider is 26.
93 * Set SCR to 0 and CPSDVSR to 26.
96 writel(0x7, &lslave
->regs
->cr0
); /* 8-bit chunks, SPI, 1 clk/bit */
97 writel(26, &lslave
->regs
->cpsr
); /* SSP clock = HCLK/26 = 500kbps */
98 writel(0, &lslave
->regs
->imsc
); /* do not raise any interrupts */
99 writel(0, &lslave
->regs
->icr
); /* clear any pending interrupt */
100 writel(0, &lslave
->regs
->dmacr
); /* do not do DMAs */
101 writel(SSP_CR1_SSP_ENABLE
, &lslave
->regs
->cr1
); /* enable SSP0 */
102 return &lslave
->slave
;
105 void spi_free_slave(struct spi_slave
*slave
)
107 struct lpc32xx_spi_slave
*lslave
= to_lpc32xx_spi_slave(slave
);
109 debug("(lpc32xx) spi_free_slave: 0x%08x\n", (u32
)lslave
);
113 int spi_claim_bus(struct spi_slave
*slave
)
115 /* only one bus and slave so far, always available */
119 int spi_xfer(struct spi_slave
*slave
, unsigned int bitlen
,
120 const void *dout
, void *din
, unsigned long flags
)
122 struct lpc32xx_spi_slave
*lslave
= to_lpc32xx_spi_slave(slave
);
123 int bytelen
= bitlen
>> 3;
128 start_time
= get_timer(0);
129 while ((idx_out
< bytelen
) || (idx_in
< bytelen
)) {
130 int status
= readl(&lslave
->regs
->sr
);
131 if ((idx_out
< bytelen
) && (status
& SSP_SR_TNF
))
132 writel(((u8
*)dout
)[idx_out
++], &lslave
->regs
->data
);
133 if ((idx_in
< bytelen
) && (status
& status
& SSP_SR_RNE
))
134 ((u8
*)din
)[idx_in
++] = readl(&lslave
->regs
->data
);
135 if (get_timer(start_time
) >= CONFIG_LPC32XX_SSP_TIMEOUT
)
141 void spi_release_bus(struct spi_slave
*slave
)