2 * (C) Copyright Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0
12 #include <asm/arch/clock.h>
13 #include <asm/arch/cru_rk3368.h>
14 #include <asm/arch/hardware.h>
15 #include <linux/err.h>
17 static void rk3368_pll_enter_slow_mode(struct rk3368_cru
*cru
)
19 struct rk3368_pll
*pll
;
22 for (i
= 0; i
< 6; i
++) {
24 rk_clrreg(&pll
->con3
, PLL_MODE_MASK
);
28 static int rk3368_sysreset_request(struct udevice
*dev
, enum sysreset_t type
)
30 struct rk3368_cru
*cru
= rockchip_get_cru();
36 rk3368_pll_enter_slow_mode(cru
);
37 rk_clrsetreg(&cru
->glb_rst_con
, PMU_GLB_SRST_CTRL_MASK
,
38 PMU_RST_BY_SND_GLB_SRST
<< PMU_GLB_SRST_CTRL_SHIFT
);
39 writel(0xeca8, &cru
->glb_srst_snd_val
);
42 rk3368_pll_enter_slow_mode(cru
);
43 rk_clrsetreg(&cru
->glb_rst_con
, PMU_GLB_SRST_CTRL_MASK
,
44 PMU_RST_BY_FST_GLB_SRST
<< PMU_GLB_SRST_CTRL_SHIFT
);
45 writel(0xfdb9, &cru
->glb_srst_fst_val
);
48 return -EPROTONOSUPPORT
;
54 static struct sysreset_ops rk3368_sysreset
= {
55 .request
= rk3368_sysreset_request
,
58 U_BOOT_DRIVER(sysreset_rk3368
) = {
59 .name
= "rk3368_sysreset",
60 .id
= UCLASS_SYSRESET
,
61 .ops
= &rk3368_sysreset
,