2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0
12 #include <asm/arch/clock.h>
13 #include <asm/arch/cru_rk3328.h>
14 #include <asm/arch/hardware.h>
15 #include <linux/err.h>
17 int rockchip_sysreset_request(struct udevice
*dev
, enum sysreset_t type
)
19 struct sysreset_reg
*offset
= dev_get_priv(dev
);
20 unsigned long cru_base
= (unsigned long)rockchip_get_cru();
22 if (IS_ERR_VALUE(cru_base
))
27 writel(0xeca8, cru_base
+ offset
->glb_srst_snd_value
);
30 writel(0xfdb9, cru_base
+ offset
->glb_srst_fst_value
);
33 return -EPROTONOSUPPORT
;
39 static struct sysreset_ops rockchip_sysreset
= {
40 .request
= rockchip_sysreset_request
,
43 U_BOOT_DRIVER(sysreset_rockchip
) = {
44 .name
= "rockchip_sysreset",
45 .id
= UCLASS_SYSRESET
,
46 .ops
= &rockchip_sysreset
,