2 * Andestech ATCPIT100 timer driver
5 * Rick Chen, NDS32 Software Engineering, rick@andestech.com
7 * SPDX-License-Identifier: GPL-2.0+
15 DECLARE_GLOBAL_DATA_PTR
;
17 #define REG32_TMR(x) (*(u32 *) ((plat->regs) + (x>>2)))
20 * Definition of register offsets
23 /* ID and Revision Register */
26 /* Configuration Register */
29 /* Interrupt Enable Register */
31 #define CH_INT_EN(c , i) ((1<<i)<<(4*c))
33 /* Interrupt Status Register */
35 #define CH_INT_STA(c , i) ((1<<i)<<(4*c))
37 /* Channel Enable Register */
39 #define CH_TMR_EN(c , t) ((1<<t)<<(4*c))
41 /* Ch n Control REgister */
42 #define CH_CTL(n) (0x20+0x10*n)
43 /* Channel clock source , bit 3 , 0:External clock , 1:APB clock */
44 #define APB_CLK (1<<3)
45 /* Channel mode , bit 0~2 */
51 #define CH_REL(n) (0x24+0x10*n)
52 #define CH_CNT(n) (0x28+0x10*n)
54 struct atctmr_timer_regs
{
55 u32 id_rev
; /* 0x00 */
56 u32 reservd
[3]; /* 0x04 ~ 0x0c */
58 u32 int_en
; /* 0x14 */
59 u32 int_st
; /* 0x18 */
61 u32 ch0_ctrl
; /* 0x20 */
62 u32 ch0_reload
; /* 0x24 */
63 u32 ch0_cntr
; /* 0x28 */
64 u32 reservd1
; /* 0x2c */
65 u32 ch1_ctrl
; /* 0x30 */
66 u32 ch1_reload
; /* 0x34 */
67 u32 int_mask
; /* 0x38 */
70 struct atcpit_timer_platdata
{
74 static int atcpit_timer_get_count(struct udevice
*dev
, u64
*count
)
76 struct atcpit_timer_platdata
*plat
= dev_get_platdata(dev
);
78 val
= ~(REG32_TMR(CH_CNT(1))+0xffffffff);
79 *count
= timer_conv_64(val
);
83 static int atcpit_timer_probe(struct udevice
*dev
)
85 struct atcpit_timer_platdata
*plat
= dev_get_platdata(dev
);
86 REG32_TMR(CH_REL(1)) = 0xffffffff;
87 REG32_TMR(CH_CTL(1)) = APB_CLK
|TMR_32
;
88 REG32_TMR(CH_EN
) |= CH_TMR_EN(1 , 0);
92 static int atcpit_timer_ofdata_to_platdata(struct udevice
*dev
)
94 struct atcpit_timer_platdata
*plat
= dev_get_platdata(dev
);
95 plat
->regs
= map_physmem(devfdt_get_addr(dev
) , 0x100 , MAP_NOCACHE
);
99 static const struct timer_ops atcpit_timer_ops
= {
100 .get_count
= atcpit_timer_get_count
,
103 static const struct udevice_id atcpit_timer_ids
[] = {
104 { .compatible
= "andestech,atcpit100" },
108 U_BOOT_DRIVER(atcpit100_timer
) = {
109 .name
= "atcpit100_timer",
111 .of_match
= atcpit_timer_ids
,
112 .ofdata_to_platdata
= atcpit_timer_ofdata_to_platdata
,
113 .platdata_auto_alloc_size
= sizeof(struct atcpit_timer_platdata
),
114 .probe
= atcpit_timer_probe
,
115 .ops
= &atcpit_timer_ops
,
116 .flags
= DM_FLAG_PRE_RELOC
,