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[thirdparty/linux.git] / drivers / usb / cdns3 / gadget.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Cadence USBSS DRD Driver - gadget side.
4 *
5 * Copyright (C) 2018-2019 Cadence Design Systems.
6 * Copyright (C) 2017-2018 NXP
7 *
8 * Authors: Pawel Jez <pjez@cadence.com>,
9 * Pawel Laszczak <pawell@cadence.com>
10 * Peter Chen <peter.chen@nxp.com>
11 */
12
13 /*
14 * Work around 1:
15 * At some situations, the controller may get stale data address in TRB
16 * at below sequences:
17 * 1. Controller read TRB includes data address
18 * 2. Software updates TRBs includes data address and Cycle bit
19 * 3. Controller read TRB which includes Cycle bit
20 * 4. DMA run with stale data address
21 *
22 * To fix this problem, driver needs to make the first TRB in TD as invalid.
23 * After preparing all TRBs driver needs to check the position of DMA and
24 * if the DMA point to the first just added TRB and doorbell is 1,
25 * then driver must defer making this TRB as valid. This TRB will be make
26 * as valid during adding next TRB only if DMA is stopped or at TRBERR
27 * interrupt.
28 *
29 * Issue has been fixed in DEV_VER_V3 version of controller.
30 *
31 * Work around 2:
32 * Controller for OUT endpoints has shared on-chip buffers for all incoming
33 * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
34 * in correct order. If the first packet in the buffer will not be handled,
35 * then the following packets directed for other endpoints and functions
36 * will be blocked.
37 * Additionally the packets directed to one endpoint can block entire on-chip
38 * buffers. In this case transfer to other endpoints also will blocked.
39 *
40 * To resolve this issue after raising the descriptor missing interrupt
41 * driver prepares internal usb_request object and use it to arm DMA transfer.
42 *
43 * The problematic situation was observed in case when endpoint has been enabled
44 * but no usb_request were queued. Driver try detects such endpoints and will
45 * use this workaround only for these endpoint.
46 *
47 * Driver use limited number of buffer. This number can be set by macro
48 * CDNS3_WA2_NUM_BUFFERS.
49 *
50 * Such blocking situation was observed on ACM gadget. For this function
51 * host send OUT data packet but ACM function is not prepared for this packet.
52 * It's cause that buffer placed in on chip memory block transfer to other
53 * endpoints.
54 *
55 * Issue has been fixed in DEV_VER_V2 version of controller.
56 *
57 */
58
59 #include <linux/dma-mapping.h>
60 #include <linux/usb/gadget.h>
61 #include <linux/module.h>
62 #include <linux/iopoll.h>
63
64 #include "core.h"
65 #include "gadget-export.h"
66 #include "gadget.h"
67 #include "trace.h"
68 #include "drd.h"
69
70 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
71 struct usb_request *request,
72 gfp_t gfp_flags);
73
74 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
75 struct usb_request *request);
76
77 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
78 struct usb_request *request);
79
80 /**
81 * cdns3_clear_register_bit - clear bit in given register.
82 * @ptr: address of device controller register to be read and changed
83 * @mask: bits requested to clar
84 */
85 void cdns3_clear_register_bit(void __iomem *ptr, u32 mask)
86 {
87 mask = readl(ptr) & ~mask;
88 writel(mask, ptr);
89 }
90
91 /**
92 * cdns3_set_register_bit - set bit in given register.
93 * @ptr: address of device controller register to be read and changed
94 * @mask: bits requested to set
95 */
96 void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
97 {
98 mask = readl(ptr) | mask;
99 writel(mask, ptr);
100 }
101
102 /**
103 * cdns3_ep_addr_to_index - Macro converts endpoint address to
104 * index of endpoint object in cdns3_device.eps[] container
105 * @ep_addr: endpoint address for which endpoint object is required
106 *
107 */
108 u8 cdns3_ep_addr_to_index(u8 ep_addr)
109 {
110 return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
111 }
112
113 static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
114 struct cdns3_endpoint *priv_ep)
115 {
116 int dma_index;
117
118 dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
119
120 return dma_index / TRB_SIZE;
121 }
122
123 /**
124 * cdns3_next_request - returns next request from list
125 * @list: list containing requests
126 *
127 * Returns request or NULL if no requests in list
128 */
129 struct usb_request *cdns3_next_request(struct list_head *list)
130 {
131 return list_first_entry_or_null(list, struct usb_request, list);
132 }
133
134 /**
135 * cdns3_next_align_buf - returns next buffer from list
136 * @list: list containing buffers
137 *
138 * Returns buffer or NULL if no buffers in list
139 */
140 struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
141 {
142 return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
143 }
144
145 /**
146 * cdns3_next_priv_request - returns next request from list
147 * @list: list containing requests
148 *
149 * Returns request or NULL if no requests in list
150 */
151 struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
152 {
153 return list_first_entry_or_null(list, struct cdns3_request, list);
154 }
155
156 /**
157 * select_ep - selects endpoint
158 * @priv_dev: extended gadget object
159 * @ep: endpoint address
160 */
161 void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
162 {
163 if (priv_dev->selected_ep == ep)
164 return;
165
166 priv_dev->selected_ep = ep;
167 writel(ep, &priv_dev->regs->ep_sel);
168 }
169
170 /**
171 * cdns3_get_tdl - gets current tdl for selected endpoint.
172 * @priv_dev: extended gadget object
173 *
174 * Before calling this function the appropriate endpoint must
175 * be selected by means of cdns3_select_ep function.
176 */
177 static int cdns3_get_tdl(struct cdns3_device *priv_dev)
178 {
179 if (priv_dev->dev_ver < DEV_VER_V3)
180 return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
181 else
182 return readl(&priv_dev->regs->ep_tdl);
183 }
184
185 dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
186 struct cdns3_trb *trb)
187 {
188 u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
189
190 return priv_ep->trb_pool_dma + offset;
191 }
192
193 int cdns3_ring_size(struct cdns3_endpoint *priv_ep)
194 {
195 switch (priv_ep->type) {
196 case USB_ENDPOINT_XFER_ISOC:
197 return TRB_ISO_RING_SIZE;
198 case USB_ENDPOINT_XFER_CONTROL:
199 return TRB_CTRL_RING_SIZE;
200 default:
201 if (priv_ep->use_streams)
202 return TRB_STREAM_RING_SIZE;
203 else
204 return TRB_RING_SIZE;
205 }
206 }
207
208 static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
209 {
210 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
211
212 if (priv_ep->trb_pool) {
213 dma_free_coherent(priv_dev->sysdev,
214 cdns3_ring_size(priv_ep),
215 priv_ep->trb_pool, priv_ep->trb_pool_dma);
216 priv_ep->trb_pool = NULL;
217 }
218 }
219
220 /**
221 * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
222 * @priv_ep: endpoint object
223 *
224 * Function will return 0 on success or -ENOMEM on allocation error
225 */
226 int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
227 {
228 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
229 int ring_size = cdns3_ring_size(priv_ep);
230 int num_trbs = ring_size / TRB_SIZE;
231 struct cdns3_trb *link_trb;
232
233 if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size)
234 cdns3_free_trb_pool(priv_ep);
235
236 if (!priv_ep->trb_pool) {
237 priv_ep->trb_pool = dma_alloc_coherent(priv_dev->sysdev,
238 ring_size,
239 &priv_ep->trb_pool_dma,
240 GFP_DMA32 | GFP_ATOMIC);
241 if (!priv_ep->trb_pool)
242 return -ENOMEM;
243
244 priv_ep->alloc_ring_size = ring_size;
245 memset(priv_ep->trb_pool, 0, ring_size);
246 }
247
248 priv_ep->num_trbs = num_trbs;
249
250 if (!priv_ep->num)
251 return 0;
252
253 /* Initialize the last TRB as Link TRB */
254 link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
255
256 if (priv_ep->use_streams) {
257 /*
258 * For stream capable endpoints driver use single correct TRB.
259 * The last trb has zeroed cycle bit
260 */
261 link_trb->control = 0;
262 } else {
263 link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma);
264 link_trb->control = TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE;
265 }
266 return 0;
267 }
268
269 /**
270 * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
271 * @priv_ep: endpoint object
272 *
273 * Endpoint must be selected before call to this function
274 */
275 static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
276 {
277 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
278 int val;
279
280 trace_cdns3_halt(priv_ep, 1, 1);
281
282 writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
283 &priv_dev->regs->ep_cmd);
284
285 /* wait for DFLUSH cleared */
286 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
287 !(val & EP_CMD_DFLUSH), 1, 1000);
288 priv_ep->flags |= EP_STALLED;
289 priv_ep->flags &= ~EP_STALL_PENDING;
290 }
291
292 /**
293 * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
294 * @priv_dev: extended gadget object
295 */
296 void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
297 {
298 writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
299
300 cdns3_allow_enable_l1(priv_dev, 0);
301 priv_dev->hw_configured_flag = 0;
302 priv_dev->onchip_used_size = 0;
303 priv_dev->out_mem_is_allocated = 0;
304 priv_dev->wait_for_setup = 0;
305 priv_dev->using_streams = 0;
306 }
307
308 /**
309 * cdns3_ep_inc_trb - increment a trb index.
310 * @index: Pointer to the TRB index to increment.
311 * @cs: Cycle state
312 * @trb_in_seg: number of TRBs in segment
313 *
314 * The index should never point to the link TRB. After incrementing,
315 * if it is point to the link TRB, wrap around to the beginning and revert
316 * cycle state bit The
317 * link TRB is always at the last TRB entry.
318 */
319 static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
320 {
321 (*index)++;
322 if (*index == (trb_in_seg - 1)) {
323 *index = 0;
324 *cs ^= 1;
325 }
326 }
327
328 /**
329 * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
330 * @priv_ep: The endpoint whose enqueue pointer we're incrementing
331 */
332 static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
333 {
334 priv_ep->free_trbs--;
335 cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
336 }
337
338 /**
339 * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
340 * @priv_ep: The endpoint whose dequeue pointer we're incrementing
341 */
342 static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
343 {
344 priv_ep->free_trbs++;
345 cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
346 }
347
348 void cdns3_move_deq_to_next_trb(struct cdns3_request *priv_req)
349 {
350 struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
351 int current_trb = priv_req->start_trb;
352
353 while (current_trb != priv_req->end_trb) {
354 cdns3_ep_inc_deq(priv_ep);
355 current_trb = priv_ep->dequeue;
356 }
357
358 cdns3_ep_inc_deq(priv_ep);
359 }
360
361 /**
362 * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
363 * @priv_dev: Extended gadget object
364 * @enable: Enable/disable permit to transition to L1.
365 *
366 * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
367 * then controller answer with ACK handshake.
368 * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
369 * then controller answer with NYET handshake.
370 */
371 void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
372 {
373 if (enable)
374 writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
375 else
376 writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
377 }
378
379 enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
380 {
381 u32 reg;
382
383 reg = readl(&priv_dev->regs->usb_sts);
384
385 if (DEV_SUPERSPEED(reg))
386 return USB_SPEED_SUPER;
387 else if (DEV_HIGHSPEED(reg))
388 return USB_SPEED_HIGH;
389 else if (DEV_FULLSPEED(reg))
390 return USB_SPEED_FULL;
391 else if (DEV_LOWSPEED(reg))
392 return USB_SPEED_LOW;
393 return USB_SPEED_UNKNOWN;
394 }
395
396 /**
397 * cdns3_start_all_request - add to ring all request not started
398 * @priv_dev: Extended gadget object
399 * @priv_ep: The endpoint for whom request will be started.
400 *
401 * Returns return ENOMEM if transfer ring i not enough TRBs to start
402 * all requests.
403 */
404 static int cdns3_start_all_request(struct cdns3_device *priv_dev,
405 struct cdns3_endpoint *priv_ep)
406 {
407 struct usb_request *request;
408 int ret = 0;
409 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
410
411 /*
412 * If the last pending transfer is INTERNAL
413 * OR streams are enabled for this endpoint
414 * do NOT start new transfer till the last one is pending
415 */
416 if (!pending_empty) {
417 struct cdns3_request *priv_req;
418
419 request = cdns3_next_request(&priv_ep->pending_req_list);
420 priv_req = to_cdns3_request(request);
421 if ((priv_req->flags & REQUEST_INTERNAL) ||
422 (priv_ep->flags & EP_TDLCHK_EN) ||
423 priv_ep->use_streams) {
424 trace_printk("Blocking external request\n");
425 return ret;
426 }
427 }
428
429 while (!list_empty(&priv_ep->deferred_req_list)) {
430 request = cdns3_next_request(&priv_ep->deferred_req_list);
431
432 if (!priv_ep->use_streams) {
433 ret = cdns3_ep_run_transfer(priv_ep, request);
434 } else {
435 priv_ep->stream_sg_idx = 0;
436 ret = cdns3_ep_run_stream_transfer(priv_ep, request);
437 }
438 if (ret)
439 return ret;
440
441 list_del(&request->list);
442 list_add_tail(&request->list,
443 &priv_ep->pending_req_list);
444 if (request->stream_id != 0 || (priv_ep->flags & EP_TDLCHK_EN))
445 break;
446 }
447
448 priv_ep->flags &= ~EP_RING_FULL;
449 return ret;
450 }
451
452 /*
453 * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
454 * driver try to detect whether endpoint need additional internal
455 * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
456 * if before first DESCMISS interrupt the DMA will be armed.
457 */
458 #define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
459 if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
460 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
461 (reg) |= EP_STS_EN_DESCMISEN; \
462 } } while (0)
463
464 /**
465 * cdns3_wa2_descmiss_copy_data copy data from internal requests to
466 * request queued by class driver.
467 * @priv_ep: extended endpoint object
468 * @request: request object
469 */
470 static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
471 struct usb_request *request)
472 {
473 struct usb_request *descmiss_req;
474 struct cdns3_request *descmiss_priv_req;
475
476 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
477 int chunk_end;
478 int length;
479
480 descmiss_priv_req =
481 cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
482 descmiss_req = &descmiss_priv_req->request;
483
484 /* driver can't touch pending request */
485 if (descmiss_priv_req->flags & REQUEST_PENDING)
486 break;
487
488 chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
489 length = request->actual + descmiss_req->actual;
490
491 request->status = descmiss_req->status;
492
493 if (length <= request->length) {
494 memcpy(&((u8 *)request->buf)[request->actual],
495 descmiss_req->buf,
496 descmiss_req->actual);
497 request->actual = length;
498 } else {
499 /* It should never occures */
500 request->status = -ENOMEM;
501 }
502
503 list_del_init(&descmiss_priv_req->list);
504
505 kfree(descmiss_req->buf);
506 cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
507 --priv_ep->wa2_counter;
508
509 if (!chunk_end)
510 break;
511 }
512 }
513
514 struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
515 struct cdns3_endpoint *priv_ep,
516 struct cdns3_request *priv_req)
517 {
518 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
519 priv_req->flags & REQUEST_INTERNAL) {
520 struct usb_request *req;
521
522 req = cdns3_next_request(&priv_ep->deferred_req_list);
523
524 priv_ep->descmis_req = NULL;
525
526 if (!req)
527 return NULL;
528
529 /* unmap the gadget request before copying data */
530 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req,
531 priv_ep->dir);
532
533 cdns3_wa2_descmiss_copy_data(priv_ep, req);
534 if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
535 req->length != req->actual) {
536 /* wait for next part of transfer */
537 /* re-map the gadget request buffer*/
538 usb_gadget_map_request_by_dev(priv_dev->sysdev, req,
539 usb_endpoint_dir_in(priv_ep->endpoint.desc));
540 return NULL;
541 }
542
543 if (req->status == -EINPROGRESS)
544 req->status = 0;
545
546 list_del_init(&req->list);
547 cdns3_start_all_request(priv_dev, priv_ep);
548 return req;
549 }
550
551 return &priv_req->request;
552 }
553
554 int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
555 struct cdns3_endpoint *priv_ep,
556 struct cdns3_request *priv_req)
557 {
558 int deferred = 0;
559
560 /*
561 * If transfer was queued before DESCMISS appear than we
562 * can disable handling of DESCMISS interrupt. Driver assumes that it
563 * can disable special treatment for this endpoint.
564 */
565 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
566 u32 reg;
567
568 cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
569 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
570 reg = readl(&priv_dev->regs->ep_sts_en);
571 reg &= ~EP_STS_EN_DESCMISEN;
572 trace_cdns3_wa2(priv_ep, "workaround disabled\n");
573 writel(reg, &priv_dev->regs->ep_sts_en);
574 }
575
576 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
577 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
578 u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
579
580 /*
581 * DESCMISS transfer has been finished, so data will be
582 * directly copied from internal allocated usb_request
583 * objects.
584 */
585 if (pending_empty && !descmiss_empty &&
586 !(priv_req->flags & REQUEST_INTERNAL)) {
587 cdns3_wa2_descmiss_copy_data(priv_ep,
588 &priv_req->request);
589
590 trace_cdns3_wa2(priv_ep, "get internal stored data");
591
592 list_add_tail(&priv_req->request.list,
593 &priv_ep->pending_req_list);
594 cdns3_gadget_giveback(priv_ep, priv_req,
595 priv_req->request.status);
596
597 /*
598 * Intentionally driver returns positive value as
599 * correct value. It informs that transfer has
600 * been finished.
601 */
602 return EINPROGRESS;
603 }
604
605 /*
606 * Driver will wait for completion DESCMISS transfer,
607 * before starts new, not DESCMISS transfer.
608 */
609 if (!pending_empty && !descmiss_empty) {
610 trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
611 deferred = 1;
612 }
613
614 if (priv_req->flags & REQUEST_INTERNAL)
615 list_add_tail(&priv_req->list,
616 &priv_ep->wa2_descmiss_req_list);
617 }
618
619 return deferred;
620 }
621
622 static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
623 {
624 struct cdns3_request *priv_req;
625
626 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
627 u8 chain;
628
629 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
630 chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
631
632 trace_cdns3_wa2(priv_ep, "removes eldest request");
633
634 kfree(priv_req->request.buf);
635 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
636 &priv_req->request);
637 list_del_init(&priv_req->list);
638 --priv_ep->wa2_counter;
639
640 if (!chain)
641 break;
642 }
643 }
644
645 /**
646 * cdns3_wa2_descmissing_packet - handles descriptor missing event.
647 * @priv_dev: extended gadget object
648 *
649 * This function is used only for WA2. For more information see Work around 2
650 * description.
651 */
652 static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
653 {
654 struct cdns3_request *priv_req;
655 struct usb_request *request;
656 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
657
658 /* check for pending transfer */
659 if (!pending_empty) {
660 trace_cdns3_wa2(priv_ep, "Ignoring Descriptor missing IRQ\n");
661 return;
662 }
663
664 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
665 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
666 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
667 }
668
669 trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
670
671 if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS) {
672 trace_cdns3_wa2(priv_ep, "WA2 overflow\n");
673 cdns3_wa2_remove_old_request(priv_ep);
674 }
675
676 request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
677 GFP_ATOMIC);
678 if (!request)
679 goto err;
680
681 priv_req = to_cdns3_request(request);
682 priv_req->flags |= REQUEST_INTERNAL;
683
684 /* if this field is still assigned it indicate that transfer related
685 * with this request has not been finished yet. Driver in this
686 * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
687 * flag to previous one. It will indicate that current request is
688 * part of the previous one.
689 */
690 if (priv_ep->descmis_req)
691 priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
692
693 priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
694 GFP_ATOMIC);
695 priv_ep->wa2_counter++;
696
697 if (!priv_req->request.buf) {
698 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
699 goto err;
700 }
701
702 priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
703 priv_ep->descmis_req = priv_req;
704
705 __cdns3_gadget_ep_queue(&priv_ep->endpoint,
706 &priv_ep->descmis_req->request,
707 GFP_ATOMIC);
708
709 return;
710
711 err:
712 dev_err(priv_ep->cdns3_dev->dev,
713 "Failed: No sufficient memory for DESCMIS\n");
714 }
715
716 static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev)
717 {
718 u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
719
720 if (tdl) {
721 u16 reset_val = EP_CMD_TDL_MAX + 1 - tdl;
722
723 writel(EP_CMD_TDL_SET(reset_val) | EP_CMD_STDL,
724 &priv_dev->regs->ep_cmd);
725 }
726 }
727
728 static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev)
729 {
730 u32 ep_sts_reg;
731
732 /* select EP0-out */
733 cdns3_select_ep(priv_dev, 0);
734
735 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
736
737 if (EP_STS_OUTQ_VAL(ep_sts_reg)) {
738 u32 outq_ep_num = EP_STS_OUTQ_NO(ep_sts_reg);
739 struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num];
740
741 if ((outq_ep->flags & EP_ENABLED) && !(outq_ep->use_streams) &&
742 outq_ep->type != USB_ENDPOINT_XFER_ISOC && outq_ep_num) {
743 u8 pending_empty = list_empty(&outq_ep->pending_req_list);
744
745 if ((outq_ep->flags & EP_QUIRK_EXTRA_BUF_DET) ||
746 (outq_ep->flags & EP_QUIRK_EXTRA_BUF_EN) ||
747 !pending_empty) {
748 } else {
749 u32 ep_sts_en_reg;
750 u32 ep_cmd_reg;
751
752 cdns3_select_ep(priv_dev, outq_ep->num |
753 outq_ep->dir);
754 ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
755 ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
756
757 outq_ep->flags |= EP_TDLCHK_EN;
758 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
759 EP_CFG_TDL_CHK);
760
761 cdns3_wa2_enable_detection(priv_dev, outq_ep,
762 ep_sts_en_reg);
763 writel(ep_sts_en_reg,
764 &priv_dev->regs->ep_sts_en);
765 /* reset tdl value to zero */
766 cdns3_wa2_reset_tdl(priv_dev);
767 /*
768 * Memory barrier - Reset tdl before ringing the
769 * doorbell.
770 */
771 wmb();
772 if (EP_CMD_DRDY & ep_cmd_reg) {
773 trace_cdns3_wa2(outq_ep, "Enabling WA2 skipping doorbell\n");
774
775 } else {
776 trace_cdns3_wa2(outq_ep, "Enabling WA2 ringing doorbell\n");
777 /*
778 * ring doorbell to generate DESCMIS irq
779 */
780 writel(EP_CMD_DRDY,
781 &priv_dev->regs->ep_cmd);
782 }
783 }
784 }
785 }
786 }
787
788 /**
789 * cdns3_gadget_giveback - call struct usb_request's ->complete callback
790 * @priv_ep: The endpoint to whom the request belongs to
791 * @priv_req: The request we're giving back
792 * @status: completion code for the request
793 *
794 * Must be called with controller's lock held and interrupts disabled. This
795 * function will unmap @req and call its ->complete() callback to notify upper
796 * layers that it has completed.
797 */
798 void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
799 struct cdns3_request *priv_req,
800 int status)
801 {
802 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
803 struct usb_request *request = &priv_req->request;
804
805 list_del_init(&request->list);
806
807 if (request->status == -EINPROGRESS)
808 request->status = status;
809
810 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request,
811 priv_ep->dir);
812
813 if ((priv_req->flags & REQUEST_UNALIGNED) &&
814 priv_ep->dir == USB_DIR_OUT && !request->status)
815 memcpy(request->buf, priv_req->aligned_buf->buf,
816 request->length);
817
818 priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
819 trace_cdns3_gadget_giveback(priv_req);
820
821 if (priv_dev->dev_ver < DEV_VER_V2) {
822 request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
823 priv_req);
824 if (!request)
825 return;
826 }
827
828 if (request->complete) {
829 spin_unlock(&priv_dev->lock);
830 usb_gadget_giveback_request(&priv_ep->endpoint,
831 request);
832 spin_lock(&priv_dev->lock);
833 }
834
835 if (request->buf == priv_dev->zlp_buf)
836 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
837 }
838
839 void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
840 {
841 /* Work around for stale data address in TRB*/
842 if (priv_ep->wa1_set) {
843 trace_cdns3_wa1(priv_ep, "restore cycle bit");
844
845 priv_ep->wa1_set = 0;
846 priv_ep->wa1_trb_index = 0xFFFF;
847 if (priv_ep->wa1_cycle_bit) {
848 priv_ep->wa1_trb->control =
849 priv_ep->wa1_trb->control | 0x1;
850 } else {
851 priv_ep->wa1_trb->control =
852 priv_ep->wa1_trb->control & ~0x1;
853 }
854 }
855 }
856
857 static void cdns3_free_aligned_request_buf(struct work_struct *work)
858 {
859 struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
860 aligned_buf_wq);
861 struct cdns3_aligned_buf *buf, *tmp;
862 unsigned long flags;
863
864 spin_lock_irqsave(&priv_dev->lock, flags);
865
866 list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
867 if (!buf->in_use) {
868 list_del(&buf->list);
869
870 /*
871 * Re-enable interrupts to free DMA capable memory.
872 * Driver can't free this memory with disabled
873 * interrupts.
874 */
875 spin_unlock_irqrestore(&priv_dev->lock, flags);
876 dma_free_coherent(priv_dev->sysdev, buf->size,
877 buf->buf, buf->dma);
878 kfree(buf);
879 spin_lock_irqsave(&priv_dev->lock, flags);
880 }
881 }
882
883 spin_unlock_irqrestore(&priv_dev->lock, flags);
884 }
885
886 static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
887 {
888 struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
889 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
890 struct cdns3_aligned_buf *buf;
891
892 /* check if buffer is aligned to 8. */
893 if (!((uintptr_t)priv_req->request.buf & 0x7))
894 return 0;
895
896 buf = priv_req->aligned_buf;
897
898 if (!buf || priv_req->request.length > buf->size) {
899 buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
900 if (!buf)
901 return -ENOMEM;
902
903 buf->size = priv_req->request.length;
904
905 buf->buf = dma_alloc_coherent(priv_dev->sysdev,
906 buf->size,
907 &buf->dma,
908 GFP_ATOMIC);
909 if (!buf->buf) {
910 kfree(buf);
911 return -ENOMEM;
912 }
913
914 if (priv_req->aligned_buf) {
915 trace_cdns3_free_aligned_request(priv_req);
916 priv_req->aligned_buf->in_use = 0;
917 queue_work(system_freezable_wq,
918 &priv_dev->aligned_buf_wq);
919 }
920
921 buf->in_use = 1;
922 priv_req->aligned_buf = buf;
923
924 list_add_tail(&buf->list,
925 &priv_dev->aligned_buf_list);
926 }
927
928 if (priv_ep->dir == USB_DIR_IN) {
929 memcpy(buf->buf, priv_req->request.buf,
930 priv_req->request.length);
931 }
932
933 priv_req->flags |= REQUEST_UNALIGNED;
934 trace_cdns3_prepare_aligned_request(priv_req);
935
936 return 0;
937 }
938
939 static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
940 struct cdns3_trb *trb)
941 {
942 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
943
944 if (!priv_ep->wa1_set) {
945 u32 doorbell;
946
947 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
948
949 if (doorbell) {
950 priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
951 priv_ep->wa1_set = 1;
952 priv_ep->wa1_trb = trb;
953 priv_ep->wa1_trb_index = priv_ep->enqueue;
954 trace_cdns3_wa1(priv_ep, "set guard");
955 return 0;
956 }
957 }
958 return 1;
959 }
960
961 static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
962 struct cdns3_endpoint *priv_ep)
963 {
964 int dma_index;
965 u32 doorbell;
966
967 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
968 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
969
970 if (!doorbell || dma_index != priv_ep->wa1_trb_index)
971 cdns3_wa1_restore_cycle_bit(priv_ep);
972 }
973
974 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
975 struct usb_request *request)
976 {
977 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
978 struct cdns3_request *priv_req;
979 struct cdns3_trb *trb;
980 dma_addr_t trb_dma;
981 int address;
982 u32 control;
983 u32 length;
984 u32 tdl;
985 unsigned int sg_idx = priv_ep->stream_sg_idx;
986
987 priv_req = to_cdns3_request(request);
988 address = priv_ep->endpoint.desc->bEndpointAddress;
989
990 priv_ep->flags |= EP_PENDING_REQUEST;
991
992 /* must allocate buffer aligned to 8 */
993 if (priv_req->flags & REQUEST_UNALIGNED)
994 trb_dma = priv_req->aligned_buf->dma;
995 else
996 trb_dma = request->dma;
997
998 /* For stream capable endpoints driver use only single TD. */
999 trb = priv_ep->trb_pool + priv_ep->enqueue;
1000 priv_req->start_trb = priv_ep->enqueue;
1001 priv_req->end_trb = priv_req->start_trb;
1002 priv_req->trb = trb;
1003
1004 cdns3_select_ep(priv_ep->cdns3_dev, address);
1005
1006 control = TRB_TYPE(TRB_NORMAL) | TRB_CYCLE |
1007 TRB_STREAM_ID(priv_req->request.stream_id) | TRB_ISP;
1008
1009 if (!request->num_sgs) {
1010 trb->buffer = TRB_BUFFER(trb_dma);
1011 length = request->length;
1012 } else {
1013 trb->buffer = TRB_BUFFER(request->sg[sg_idx].dma_address);
1014 length = request->sg[sg_idx].length;
1015 }
1016
1017 tdl = DIV_ROUND_UP(length, priv_ep->endpoint.maxpacket);
1018
1019 trb->length = TRB_BURST_LEN(16 /*priv_ep->trb_burst_size*/) |
1020 TRB_LEN(length);
1021
1022 /*
1023 * For DEV_VER_V2 controller version we have enabled
1024 * USB_CONF2_EN_TDL_TRB in DMULT configuration.
1025 * This enables TDL calculation based on TRB, hence setting TDL in TRB.
1026 */
1027 if (priv_dev->dev_ver >= DEV_VER_V2) {
1028 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1029 trb->length |= TRB_TDL_SS_SIZE(tdl);
1030 }
1031 priv_req->flags |= REQUEST_PENDING;
1032
1033 trb->control = control;
1034
1035 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1036
1037 /*
1038 * Memory barrier - Cycle Bit must be set before trb->length and
1039 * trb->buffer fields.
1040 */
1041 wmb();
1042
1043 /* always first element */
1044 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma),
1045 &priv_dev->regs->ep_traddr);
1046
1047 if (!(priv_ep->flags & EP_STALLED)) {
1048 trace_cdns3_ring(priv_ep);
1049 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1050 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1051
1052 priv_ep->prime_flag = false;
1053
1054 /*
1055 * Controller version DEV_VER_V2 tdl calculation
1056 * is based on TRB
1057 */
1058
1059 if (priv_dev->dev_ver < DEV_VER_V2)
1060 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1061 &priv_dev->regs->ep_cmd);
1062 else if (priv_dev->dev_ver > DEV_VER_V2)
1063 writel(tdl, &priv_dev->regs->ep_tdl);
1064
1065 priv_ep->last_stream_id = priv_req->request.stream_id;
1066 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1067 writel(EP_CMD_ERDY_SID(priv_req->request.stream_id) |
1068 EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
1069
1070 trace_cdns3_doorbell_epx(priv_ep->name,
1071 readl(&priv_dev->regs->ep_traddr));
1072 }
1073
1074 /* WORKAROUND for transition to L0 */
1075 __cdns3_gadget_wakeup(priv_dev);
1076
1077 return 0;
1078 }
1079
1080 /**
1081 * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
1082 * @priv_ep: endpoint object
1083 *
1084 * Returns zero on success or negative value on failure
1085 */
1086 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
1087 struct usb_request *request)
1088 {
1089 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1090 struct cdns3_request *priv_req;
1091 struct cdns3_trb *trb;
1092 dma_addr_t trb_dma;
1093 u32 togle_pcs = 1;
1094 int sg_iter = 0;
1095 int num_trb;
1096 int address;
1097 u32 control;
1098 int pcs;
1099 u16 total_tdl = 0;
1100
1101 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
1102 num_trb = priv_ep->interval;
1103 else
1104 num_trb = request->num_sgs ? request->num_sgs : 1;
1105
1106 if (num_trb > priv_ep->free_trbs) {
1107 priv_ep->flags |= EP_RING_FULL;
1108 return -ENOBUFS;
1109 }
1110
1111 priv_req = to_cdns3_request(request);
1112 address = priv_ep->endpoint.desc->bEndpointAddress;
1113
1114 priv_ep->flags |= EP_PENDING_REQUEST;
1115
1116 /* must allocate buffer aligned to 8 */
1117 if (priv_req->flags & REQUEST_UNALIGNED)
1118 trb_dma = priv_req->aligned_buf->dma;
1119 else
1120 trb_dma = request->dma;
1121
1122 trb = priv_ep->trb_pool + priv_ep->enqueue;
1123 priv_req->start_trb = priv_ep->enqueue;
1124 priv_req->trb = trb;
1125
1126 cdns3_select_ep(priv_ep->cdns3_dev, address);
1127
1128 /* prepare ring */
1129 if ((priv_ep->enqueue + num_trb) >= (priv_ep->num_trbs - 1)) {
1130 struct cdns3_trb *link_trb;
1131 int doorbell, dma_index;
1132 u32 ch_bit = 0;
1133
1134 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1135 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1136
1137 /* Driver can't update LINK TRB if it is current processed. */
1138 if (doorbell && dma_index == priv_ep->num_trbs - 1) {
1139 priv_ep->flags |= EP_DEFERRED_DRDY;
1140 return -ENOBUFS;
1141 }
1142
1143 /*updating C bt in Link TRB before starting DMA*/
1144 link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
1145 /*
1146 * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
1147 * that DMA stuck at the LINK TRB.
1148 * On the other hand, removing TRB_CHAIN for longer TRs for
1149 * epXout cause that DMA stuck after handling LINK TRB.
1150 * To eliminate this strange behavioral driver set TRB_CHAIN
1151 * bit only for TR size > 2.
1152 */
1153 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
1154 TRBS_PER_SEGMENT > 2)
1155 ch_bit = TRB_CHAIN;
1156
1157 link_trb->control = ((priv_ep->pcs) ? TRB_CYCLE : 0) |
1158 TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit;
1159 }
1160
1161 if (priv_dev->dev_ver <= DEV_VER_V2)
1162 togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
1163
1164 /* set incorrect Cycle Bit for first trb*/
1165 control = priv_ep->pcs ? 0 : TRB_CYCLE;
1166
1167 do {
1168 u32 length;
1169 u16 td_size = 0;
1170
1171 /* fill TRB */
1172 control |= TRB_TYPE(TRB_NORMAL);
1173 trb->buffer = TRB_BUFFER(request->num_sgs == 0
1174 ? trb_dma : request->sg[sg_iter].dma_address);
1175
1176 if (likely(!request->num_sgs))
1177 length = request->length;
1178 else
1179 length = request->sg[sg_iter].length;
1180
1181 if (likely(priv_dev->dev_ver >= DEV_VER_V2))
1182 td_size = DIV_ROUND_UP(length,
1183 priv_ep->endpoint.maxpacket);
1184 else if (priv_ep->flags & EP_TDLCHK_EN)
1185 total_tdl += DIV_ROUND_UP(length,
1186 priv_ep->endpoint.maxpacket);
1187
1188 trb->length = TRB_BURST_LEN(priv_ep->trb_burst_size) |
1189 TRB_LEN(length);
1190 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1191 trb->length |= TRB_TDL_SS_SIZE(td_size);
1192 else
1193 control |= TRB_TDL_HS_SIZE(td_size);
1194
1195 pcs = priv_ep->pcs ? TRB_CYCLE : 0;
1196
1197 /*
1198 * first trb should be prepared as last to avoid processing
1199 * transfer to early
1200 */
1201 if (sg_iter != 0)
1202 control |= pcs;
1203
1204 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir) {
1205 control |= TRB_IOC | TRB_ISP;
1206 } else {
1207 /* for last element in TD or in SG list */
1208 if (sg_iter == (num_trb - 1) && sg_iter != 0)
1209 control |= pcs | TRB_IOC | TRB_ISP;
1210 }
1211
1212 if (sg_iter)
1213 trb->control = control;
1214 else
1215 priv_req->trb->control = control;
1216
1217 control = 0;
1218 ++sg_iter;
1219 priv_req->end_trb = priv_ep->enqueue;
1220 cdns3_ep_inc_enq(priv_ep);
1221 trb = priv_ep->trb_pool + priv_ep->enqueue;
1222 } while (sg_iter < num_trb);
1223
1224 trb = priv_req->trb;
1225
1226 priv_req->flags |= REQUEST_PENDING;
1227
1228 if (sg_iter == 1)
1229 trb->control |= TRB_IOC | TRB_ISP;
1230
1231 if (priv_dev->dev_ver < DEV_VER_V2 &&
1232 (priv_ep->flags & EP_TDLCHK_EN)) {
1233 u16 tdl = total_tdl;
1234 u16 old_tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
1235
1236 if (tdl > EP_CMD_TDL_MAX) {
1237 tdl = EP_CMD_TDL_MAX;
1238 priv_ep->pending_tdl = total_tdl - EP_CMD_TDL_MAX;
1239 }
1240
1241 if (old_tdl < tdl) {
1242 tdl -= old_tdl;
1243 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1244 &priv_dev->regs->ep_cmd);
1245 }
1246 }
1247
1248 /*
1249 * Memory barrier - cycle bit must be set before other filds in trb.
1250 */
1251 wmb();
1252
1253 /* give the TD to the consumer*/
1254 if (togle_pcs)
1255 trb->control = trb->control ^ 1;
1256
1257 if (priv_dev->dev_ver <= DEV_VER_V2)
1258 cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
1259
1260 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1261
1262 /*
1263 * Memory barrier - Cycle Bit must be set before trb->length and
1264 * trb->buffer fields.
1265 */
1266 wmb();
1267
1268 /*
1269 * For DMULT mode we can set address to transfer ring only once after
1270 * enabling endpoint.
1271 */
1272 if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
1273 /*
1274 * Until SW is not ready to handle the OUT transfer the ISO OUT
1275 * Endpoint should be disabled (EP_CFG.ENABLE = 0).
1276 * EP_CFG_ENABLE must be set before updating ep_traddr.
1277 */
1278 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir &&
1279 !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
1280 priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
1281 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
1282 EP_CFG_ENABLE);
1283 }
1284
1285 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
1286 priv_req->start_trb * TRB_SIZE),
1287 &priv_dev->regs->ep_traddr);
1288
1289 priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
1290 }
1291
1292 if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
1293 trace_cdns3_ring(priv_ep);
1294 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1295 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1296 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1297 trace_cdns3_doorbell_epx(priv_ep->name,
1298 readl(&priv_dev->regs->ep_traddr));
1299 }
1300
1301 /* WORKAROUND for transition to L0 */
1302 __cdns3_gadget_wakeup(priv_dev);
1303
1304 return 0;
1305 }
1306
1307 void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
1308 {
1309 struct cdns3_endpoint *priv_ep;
1310 struct usb_ep *ep;
1311 int val;
1312
1313 if (priv_dev->hw_configured_flag)
1314 return;
1315
1316 writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
1317 writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd);
1318
1319 cdns3_set_register_bit(&priv_dev->regs->usb_conf,
1320 USB_CONF_U1EN | USB_CONF_U2EN);
1321
1322 /* wait until configuration set */
1323 readl_poll_timeout_atomic(&priv_dev->regs->usb_sts, val,
1324 val & USB_STS_CFGSTS_MASK, 1, 100);
1325
1326 priv_dev->hw_configured_flag = 1;
1327
1328 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1329 if (ep->enabled) {
1330 priv_ep = ep_to_cdns3_ep(ep);
1331 cdns3_start_all_request(priv_dev, priv_ep);
1332 }
1333 }
1334 }
1335
1336 /**
1337 * cdns3_request_handled - check whether request has been handled by DMA
1338 *
1339 * @priv_ep: extended endpoint object.
1340 * @priv_req: request object for checking
1341 *
1342 * Endpoint must be selected before invoking this function.
1343 *
1344 * Returns false if request has not been handled by DMA, else returns true.
1345 *
1346 * SR - start ring
1347 * ER - end ring
1348 * DQ = priv_ep->dequeue - dequeue position
1349 * EQ = priv_ep->enqueue - enqueue position
1350 * ST = priv_req->start_trb - index of first TRB in transfer ring
1351 * ET = priv_req->end_trb - index of last TRB in transfer ring
1352 * CI = current_index - index of processed TRB by DMA.
1353 *
1354 * As first step, function checks if cycle bit for priv_req->start_trb is
1355 * correct.
1356 *
1357 * some rules:
1358 * 1. priv_ep->dequeue never exceed current_index.
1359 * 2 priv_ep->enqueue never exceed priv_ep->dequeue
1360 * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1361 * and priv_ep->free_trbs is zero.
1362 * This case indicate that TR is full.
1363 *
1364 * Then We can split recognition into two parts:
1365 * Case 1 - priv_ep->dequeue < current_index
1366 * SR ... EQ ... DQ ... CI ... ER
1367 * SR ... DQ ... CI ... EQ ... ER
1368 *
1369 * Request has been handled by DMA if ST and ET is between DQ and CI.
1370 *
1371 * Case 2 - priv_ep->dequeue > current_index
1372 * This situation take place when CI go through the LINK TRB at the end of
1373 * transfer ring.
1374 * SR ... CI ... EQ ... DQ ... ER
1375 *
1376 * Request has been handled by DMA if ET is less then CI or
1377 * ET is greater or equal DQ.
1378 */
1379 static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep,
1380 struct cdns3_request *priv_req)
1381 {
1382 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1383 struct cdns3_trb *trb;
1384 int current_index = 0;
1385 int handled = 0;
1386 int doorbell;
1387
1388 current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1389 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1390
1391 trb = &priv_ep->trb_pool[priv_req->start_trb];
1392
1393 if ((trb->control & TRB_CYCLE) != priv_ep->ccs)
1394 goto finish;
1395
1396 if (doorbell == 1 && current_index == priv_ep->dequeue)
1397 goto finish;
1398
1399 /* The corner case for TRBS_PER_SEGMENT equal 2). */
1400 if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1401 handled = 1;
1402 goto finish;
1403 }
1404
1405 if (priv_ep->enqueue == priv_ep->dequeue &&
1406 priv_ep->free_trbs == 0) {
1407 handled = 1;
1408 } else if (priv_ep->dequeue < current_index) {
1409 if ((current_index == (priv_ep->num_trbs - 1)) &&
1410 !priv_ep->dequeue)
1411 goto finish;
1412
1413 if (priv_req->end_trb >= priv_ep->dequeue &&
1414 priv_req->end_trb < current_index)
1415 handled = 1;
1416 } else if (priv_ep->dequeue > current_index) {
1417 if (priv_req->end_trb < current_index ||
1418 priv_req->end_trb >= priv_ep->dequeue)
1419 handled = 1;
1420 }
1421
1422 finish:
1423 trace_cdns3_request_handled(priv_req, current_index, handled);
1424
1425 return handled;
1426 }
1427
1428 static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
1429 struct cdns3_endpoint *priv_ep)
1430 {
1431 struct cdns3_request *priv_req;
1432 struct usb_request *request;
1433 struct cdns3_trb *trb;
1434
1435 while (!list_empty(&priv_ep->pending_req_list)) {
1436 request = cdns3_next_request(&priv_ep->pending_req_list);
1437 priv_req = to_cdns3_request(request);
1438
1439 trb = priv_ep->trb_pool + priv_ep->dequeue;
1440
1441 /* Request was dequeued and TRB was changed to TRB_LINK. */
1442 if (TRB_FIELD_TO_TYPE(trb->control) == TRB_LINK) {
1443 trace_cdns3_complete_trb(priv_ep, trb);
1444 cdns3_move_deq_to_next_trb(priv_req);
1445 }
1446
1447 if (!request->stream_id) {
1448 /* Re-select endpoint. It could be changed by other CPU
1449 * during handling usb_gadget_giveback_request.
1450 */
1451 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1452
1453 if (!cdns3_request_handled(priv_ep, priv_req))
1454 goto prepare_next_td;
1455
1456 trb = priv_ep->trb_pool + priv_ep->dequeue;
1457 trace_cdns3_complete_trb(priv_ep, trb);
1458
1459 if (trb != priv_req->trb)
1460 dev_warn(priv_dev->dev,
1461 "request_trb=0x%p, queue_trb=0x%p\n",
1462 priv_req->trb, trb);
1463
1464 request->actual = TRB_LEN(le32_to_cpu(trb->length));
1465 cdns3_move_deq_to_next_trb(priv_req);
1466 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1467
1468 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
1469 TRBS_PER_SEGMENT == 2)
1470 break;
1471 } else {
1472 /* Re-select endpoint. It could be changed by other CPU
1473 * during handling usb_gadget_giveback_request.
1474 */
1475 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1476
1477 trb = priv_ep->trb_pool;
1478 trace_cdns3_complete_trb(priv_ep, trb);
1479
1480 if (trb != priv_req->trb)
1481 dev_warn(priv_dev->dev,
1482 "request_trb=0x%p, queue_trb=0x%p\n",
1483 priv_req->trb, trb);
1484
1485 request->actual += TRB_LEN(le32_to_cpu(trb->length));
1486
1487 if (!request->num_sgs ||
1488 (request->num_sgs == (priv_ep->stream_sg_idx + 1))) {
1489 priv_ep->stream_sg_idx = 0;
1490 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1491 } else {
1492 priv_ep->stream_sg_idx++;
1493 cdns3_ep_run_stream_transfer(priv_ep, request);
1494 }
1495 break;
1496 }
1497 }
1498 priv_ep->flags &= ~EP_PENDING_REQUEST;
1499
1500 prepare_next_td:
1501 if (!(priv_ep->flags & EP_STALLED) &&
1502 !(priv_ep->flags & EP_STALL_PENDING))
1503 cdns3_start_all_request(priv_dev, priv_ep);
1504 }
1505
1506 void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
1507 {
1508 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1509
1510 cdns3_wa1_restore_cycle_bit(priv_ep);
1511
1512 if (rearm) {
1513 trace_cdns3_ring(priv_ep);
1514
1515 /* Cycle Bit must be updated before arming DMA. */
1516 wmb();
1517 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1518
1519 __cdns3_gadget_wakeup(priv_dev);
1520
1521 trace_cdns3_doorbell_epx(priv_ep->name,
1522 readl(&priv_dev->regs->ep_traddr));
1523 }
1524 }
1525
1526 static void cdns3_reprogram_tdl(struct cdns3_endpoint *priv_ep)
1527 {
1528 u16 tdl = priv_ep->pending_tdl;
1529 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1530
1531 if (tdl > EP_CMD_TDL_MAX) {
1532 tdl = EP_CMD_TDL_MAX;
1533 priv_ep->pending_tdl -= EP_CMD_TDL_MAX;
1534 } else {
1535 priv_ep->pending_tdl = 0;
1536 }
1537
1538 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL, &priv_dev->regs->ep_cmd);
1539 }
1540
1541 /**
1542 * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1543 * @priv_ep: endpoint object
1544 *
1545 * Returns 0
1546 */
1547 static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
1548 {
1549 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1550 u32 ep_sts_reg;
1551 struct usb_request *deferred_request;
1552 struct usb_request *pending_request;
1553 u32 tdl = 0;
1554
1555 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1556
1557 trace_cdns3_epx_irq(priv_dev, priv_ep);
1558
1559 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
1560 writel(ep_sts_reg, &priv_dev->regs->ep_sts);
1561
1562 if ((ep_sts_reg & EP_STS_PRIME) && priv_ep->use_streams) {
1563 bool dbusy = !!(ep_sts_reg & EP_STS_DBUSY);
1564
1565 tdl = cdns3_get_tdl(priv_dev);
1566
1567 /*
1568 * Continue the previous transfer:
1569 * There is some racing between ERDY and PRIME. The device send
1570 * ERDY and almost in the same time Host send PRIME. It cause
1571 * that host ignore the ERDY packet and driver has to send it
1572 * again.
1573 */
1574 if (tdl && (dbusy | !EP_STS_BUFFEMPTY(ep_sts_reg) |
1575 EP_STS_HOSTPP(ep_sts_reg))) {
1576 writel(EP_CMD_ERDY |
1577 EP_CMD_ERDY_SID(priv_ep->last_stream_id),
1578 &priv_dev->regs->ep_cmd);
1579 ep_sts_reg &= ~(EP_STS_MD_EXIT | EP_STS_IOC);
1580 } else {
1581 priv_ep->prime_flag = true;
1582
1583 pending_request = cdns3_next_request(&priv_ep->pending_req_list);
1584 deferred_request = cdns3_next_request(&priv_ep->deferred_req_list);
1585
1586 if (deferred_request && !pending_request) {
1587 cdns3_start_all_request(priv_dev, priv_ep);
1588 }
1589 }
1590 }
1591
1592 if (ep_sts_reg & EP_STS_TRBERR) {
1593 if (priv_ep->flags & EP_STALL_PENDING &&
1594 !(ep_sts_reg & EP_STS_DESCMIS &&
1595 priv_dev->dev_ver < DEV_VER_V2)) {
1596 cdns3_ep_stall_flush(priv_ep);
1597 }
1598
1599 /*
1600 * For isochronous transfer driver completes request on
1601 * IOC or on TRBERR. IOC appears only when device receive
1602 * OUT data packet. If host disable stream or lost some packet
1603 * then the only way to finish all queued transfer is to do it
1604 * on TRBERR event.
1605 */
1606 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
1607 !priv_ep->wa1_set) {
1608 if (!priv_ep->dir) {
1609 u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1610
1611 ep_cfg &= ~EP_CFG_ENABLE;
1612 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1613 priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
1614 }
1615 cdns3_transfer_completed(priv_dev, priv_ep);
1616 } else if (!(priv_ep->flags & EP_STALLED) &&
1617 !(priv_ep->flags & EP_STALL_PENDING)) {
1618 if (priv_ep->flags & EP_DEFERRED_DRDY) {
1619 priv_ep->flags &= ~EP_DEFERRED_DRDY;
1620 cdns3_start_all_request(priv_dev, priv_ep);
1621 } else {
1622 cdns3_rearm_transfer(priv_ep,
1623 priv_ep->wa1_set);
1624 }
1625 }
1626 }
1627
1628 if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP) ||
1629 (ep_sts_reg & EP_STS_IOT)) {
1630 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
1631 if (ep_sts_reg & EP_STS_ISP)
1632 priv_ep->flags |= EP_QUIRK_END_TRANSFER;
1633 else
1634 priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
1635 }
1636
1637 if (!priv_ep->use_streams) {
1638 if ((ep_sts_reg & EP_STS_IOC) ||
1639 (ep_sts_reg & EP_STS_ISP)) {
1640 cdns3_transfer_completed(priv_dev, priv_ep);
1641 } else if ((priv_ep->flags & EP_TDLCHK_EN) &
1642 priv_ep->pending_tdl) {
1643 /* handle IOT with pending tdl */
1644 cdns3_reprogram_tdl(priv_ep);
1645 }
1646 } else if (priv_ep->dir == USB_DIR_OUT) {
1647 priv_ep->ep_sts_pending |= ep_sts_reg;
1648 } else if (ep_sts_reg & EP_STS_IOT) {
1649 cdns3_transfer_completed(priv_dev, priv_ep);
1650 }
1651 }
1652
1653 /*
1654 * MD_EXIT interrupt sets when stream capable endpoint exits
1655 * from MOVE DATA state of Bulk IN/OUT stream protocol state machine
1656 */
1657 if (priv_ep->dir == USB_DIR_OUT && (ep_sts_reg & EP_STS_MD_EXIT) &&
1658 (priv_ep->ep_sts_pending & EP_STS_IOT) && priv_ep->use_streams) {
1659 priv_ep->ep_sts_pending = 0;
1660 cdns3_transfer_completed(priv_dev, priv_ep);
1661 }
1662
1663 /*
1664 * WA2: this condition should only be meet when
1665 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1666 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1667 * In other cases this interrupt will be disabled.
1668 */
1669 if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
1670 !(priv_ep->flags & EP_STALLED))
1671 cdns3_wa2_descmissing_packet(priv_ep);
1672
1673 return 0;
1674 }
1675
1676 static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
1677 {
1678 if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect) {
1679 spin_unlock(&priv_dev->lock);
1680 priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
1681 spin_lock(&priv_dev->lock);
1682 }
1683 }
1684
1685 /**
1686 * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1687 * @priv_dev: extended gadget object
1688 * @usb_ists: bitmap representation of device's reported interrupts
1689 * (usb_ists register value)
1690 */
1691 static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
1692 u32 usb_ists)
1693 {
1694 int speed = 0;
1695
1696 trace_cdns3_usb_irq(priv_dev, usb_ists);
1697 if (usb_ists & USB_ISTS_L1ENTI) {
1698 /*
1699 * WORKAROUND: CDNS3 controller has issue with hardware resuming
1700 * from L1. To fix it, if any DMA transfer is pending driver
1701 * must starts driving resume signal immediately.
1702 */
1703 if (readl(&priv_dev->regs->drbl))
1704 __cdns3_gadget_wakeup(priv_dev);
1705 }
1706
1707 /* Connection detected */
1708 if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
1709 speed = cdns3_get_speed(priv_dev);
1710 priv_dev->gadget.speed = speed;
1711 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
1712 cdns3_ep0_config(priv_dev);
1713 }
1714
1715 /* Disconnection detected */
1716 if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
1717 cdns3_disconnect_gadget(priv_dev);
1718 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
1719 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
1720 cdns3_hw_reset_eps_config(priv_dev);
1721 }
1722
1723 if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
1724 if (priv_dev->gadget_driver &&
1725 priv_dev->gadget_driver->suspend) {
1726 spin_unlock(&priv_dev->lock);
1727 priv_dev->gadget_driver->suspend(&priv_dev->gadget);
1728 spin_lock(&priv_dev->lock);
1729 }
1730 }
1731
1732 if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
1733 if (priv_dev->gadget_driver &&
1734 priv_dev->gadget_driver->resume) {
1735 spin_unlock(&priv_dev->lock);
1736 priv_dev->gadget_driver->resume(&priv_dev->gadget);
1737 spin_lock(&priv_dev->lock);
1738 }
1739 }
1740
1741 /* reset*/
1742 if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
1743 if (priv_dev->gadget_driver) {
1744 spin_unlock(&priv_dev->lock);
1745 usb_gadget_udc_reset(&priv_dev->gadget,
1746 priv_dev->gadget_driver);
1747 spin_lock(&priv_dev->lock);
1748
1749 /*read again to check the actual speed*/
1750 speed = cdns3_get_speed(priv_dev);
1751 priv_dev->gadget.speed = speed;
1752 cdns3_hw_reset_eps_config(priv_dev);
1753 cdns3_ep0_config(priv_dev);
1754 }
1755 }
1756 }
1757
1758 /**
1759 * cdns3_device_irq_handler- interrupt handler for device part of controller
1760 *
1761 * @irq: irq number for cdns3 core device
1762 * @data: structure of cdns3
1763 *
1764 * Returns IRQ_HANDLED or IRQ_NONE
1765 */
1766 static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
1767 {
1768 struct cdns3_device *priv_dev = data;
1769 irqreturn_t ret = IRQ_NONE;
1770 u32 reg;
1771
1772 /* check USB device interrupt */
1773 reg = readl(&priv_dev->regs->usb_ists);
1774 if (reg) {
1775 /* After masking interrupts the new interrupts won't be
1776 * reported in usb_ists/ep_ists. In order to not lose some
1777 * of them driver disables only detected interrupts.
1778 * They will be enabled ASAP after clearing source of
1779 * interrupt. This an unusual behavior only applies to
1780 * usb_ists register.
1781 */
1782 reg = ~reg & readl(&priv_dev->regs->usb_ien);
1783 /* mask deferred interrupt. */
1784 writel(reg, &priv_dev->regs->usb_ien);
1785 ret = IRQ_WAKE_THREAD;
1786 }
1787
1788 /* check endpoint interrupt */
1789 reg = readl(&priv_dev->regs->ep_ists);
1790 if (reg) {
1791 writel(0, &priv_dev->regs->ep_ien);
1792 ret = IRQ_WAKE_THREAD;
1793 }
1794
1795 return ret;
1796 }
1797
1798 /**
1799 * cdns3_device_thread_irq_handler- interrupt handler for device part
1800 * of controller
1801 *
1802 * @irq: irq number for cdns3 core device
1803 * @data: structure of cdns3
1804 *
1805 * Returns IRQ_HANDLED or IRQ_NONE
1806 */
1807 static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
1808 {
1809 struct cdns3_device *priv_dev = data;
1810 irqreturn_t ret = IRQ_NONE;
1811 unsigned long flags;
1812 int bit;
1813 u32 reg;
1814
1815 spin_lock_irqsave(&priv_dev->lock, flags);
1816
1817 reg = readl(&priv_dev->regs->usb_ists);
1818 if (reg) {
1819 writel(reg, &priv_dev->regs->usb_ists);
1820 writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
1821 cdns3_check_usb_interrupt_proceed(priv_dev, reg);
1822 ret = IRQ_HANDLED;
1823 }
1824
1825 reg = readl(&priv_dev->regs->ep_ists);
1826
1827 /* handle default endpoint OUT */
1828 if (reg & EP_ISTS_EP_OUT0) {
1829 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
1830 ret = IRQ_HANDLED;
1831 }
1832
1833 /* handle default endpoint IN */
1834 if (reg & EP_ISTS_EP_IN0) {
1835 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
1836 ret = IRQ_HANDLED;
1837 }
1838
1839 /* check if interrupt from non default endpoint, if no exit */
1840 reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
1841 if (!reg)
1842 goto irqend;
1843
1844 for_each_set_bit(bit, (unsigned long *)&reg,
1845 sizeof(u32) * BITS_PER_BYTE) {
1846 cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
1847 ret = IRQ_HANDLED;
1848 }
1849
1850 if (priv_dev->dev_ver < DEV_VER_V2 && priv_dev->using_streams)
1851 cdns3_wa2_check_outq_status(priv_dev);
1852
1853 irqend:
1854 writel(~0, &priv_dev->regs->ep_ien);
1855 spin_unlock_irqrestore(&priv_dev->lock, flags);
1856
1857 return ret;
1858 }
1859
1860 /**
1861 * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
1862 *
1863 * The real reservation will occur during write to EP_CFG register,
1864 * this function is used to check if the 'size' reservation is allowed.
1865 *
1866 * @priv_dev: extended gadget object
1867 * @size: the size (KB) for EP would like to allocate
1868 * @is_in: endpoint direction
1869 *
1870 * Return 0 if the required size can met or negative value on failure
1871 */
1872 static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
1873 int size, int is_in)
1874 {
1875 int remained;
1876
1877 /* 2KB are reserved for EP0*/
1878 remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
1879
1880 if (is_in) {
1881 if (remained < size)
1882 return -EPERM;
1883
1884 priv_dev->onchip_used_size += size;
1885 } else {
1886 int required;
1887
1888 /**
1889 * ALL OUT EPs are shared the same chunk onchip memory, so
1890 * driver checks if it already has assigned enough buffers
1891 */
1892 if (priv_dev->out_mem_is_allocated >= size)
1893 return 0;
1894
1895 required = size - priv_dev->out_mem_is_allocated;
1896
1897 if (required > remained)
1898 return -EPERM;
1899
1900 priv_dev->out_mem_is_allocated += required;
1901 priv_dev->onchip_used_size += required;
1902 }
1903
1904 return 0;
1905 }
1906
1907 void cdns3_stream_ep_reconfig(struct cdns3_device *priv_dev,
1908 struct cdns3_endpoint *priv_ep)
1909 {
1910 if (!priv_ep->use_streams || priv_dev->gadget.speed < USB_SPEED_SUPER)
1911 return;
1912
1913 if (priv_dev->dev_ver >= DEV_VER_V3) {
1914 u32 mask = BIT(priv_ep->num + (priv_ep->dir ? 16 : 0));
1915
1916 /*
1917 * Stream capable endpoints are handled by using ep_tdl
1918 * register. Other endpoints use TDL from TRB feature.
1919 */
1920 cdns3_clear_register_bit(&priv_dev->regs->tdl_from_trb, mask);
1921 }
1922
1923 /* Enable Stream Bit TDL chk and SID chk */
1924 cdns3_set_register_bit(&priv_dev->regs->ep_cfg, EP_CFG_STREAM_EN |
1925 EP_CFG_TDL_CHK | EP_CFG_SID_CHK);
1926 }
1927
1928 void cdns3_configure_dmult(struct cdns3_device *priv_dev,
1929 struct cdns3_endpoint *priv_ep)
1930 {
1931 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
1932
1933 /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
1934 if (priv_dev->dev_ver <= DEV_VER_V2)
1935 writel(USB_CONF_DMULT, &regs->usb_conf);
1936
1937 if (priv_dev->dev_ver == DEV_VER_V2)
1938 writel(USB_CONF2_EN_TDL_TRB, &regs->usb_conf2);
1939
1940 if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
1941 u32 mask;
1942
1943 if (priv_ep->dir)
1944 mask = BIT(priv_ep->num + 16);
1945 else
1946 mask = BIT(priv_ep->num);
1947
1948 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1949 cdns3_set_register_bit(&regs->tdl_from_trb, mask);
1950 cdns3_set_register_bit(&regs->tdl_beh, mask);
1951 cdns3_set_register_bit(&regs->tdl_beh2, mask);
1952 cdns3_set_register_bit(&regs->dma_adv_td, mask);
1953 }
1954
1955 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
1956 cdns3_set_register_bit(&regs->tdl_from_trb, mask);
1957
1958 cdns3_set_register_bit(&regs->dtrans, mask);
1959 }
1960 }
1961
1962 /**
1963 * cdns3_ep_config Configure hardware endpoint
1964 * @priv_ep: extended endpoint object
1965 */
1966 void cdns3_ep_config(struct cdns3_endpoint *priv_ep)
1967 {
1968 bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
1969 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1970 u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
1971 u32 max_packet_size = 0;
1972 u8 maxburst = 0;
1973 u32 ep_cfg = 0;
1974 u8 buffering;
1975 u8 mult = 0;
1976 int ret;
1977
1978 buffering = CDNS3_EP_BUF_SIZE - 1;
1979
1980 cdns3_configure_dmult(priv_dev, priv_ep);
1981
1982 switch (priv_ep->type) {
1983 case USB_ENDPOINT_XFER_INT:
1984 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
1985
1986 if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
1987 priv_dev->dev_ver > DEV_VER_V2)
1988 ep_cfg |= EP_CFG_TDL_CHK;
1989 break;
1990 case USB_ENDPOINT_XFER_BULK:
1991 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
1992
1993 if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
1994 priv_dev->dev_ver > DEV_VER_V2)
1995 ep_cfg |= EP_CFG_TDL_CHK;
1996 break;
1997 default:
1998 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
1999 mult = CDNS3_EP_ISO_HS_MULT - 1;
2000 buffering = mult + 1;
2001 }
2002
2003 switch (priv_dev->gadget.speed) {
2004 case USB_SPEED_FULL:
2005 max_packet_size = is_iso_ep ? 1023 : 64;
2006 break;
2007 case USB_SPEED_HIGH:
2008 max_packet_size = is_iso_ep ? 1024 : 512;
2009 break;
2010 case USB_SPEED_SUPER:
2011 /* It's limitation that driver assumes in driver. */
2012 mult = 0;
2013 max_packet_size = 1024;
2014 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2015 maxburst = CDNS3_EP_ISO_SS_BURST - 1;
2016 buffering = (mult + 1) *
2017 (maxburst + 1);
2018
2019 if (priv_ep->interval > 1)
2020 buffering++;
2021 } else {
2022 maxburst = CDNS3_EP_BUF_SIZE - 1;
2023 }
2024 break;
2025 default:
2026 /* all other speed are not supported */
2027 return;
2028 }
2029
2030 if (max_packet_size == 1024)
2031 priv_ep->trb_burst_size = 128;
2032 else if (max_packet_size >= 512)
2033 priv_ep->trb_burst_size = 64;
2034 else
2035 priv_ep->trb_burst_size = 16;
2036
2037 ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
2038 !!priv_ep->dir);
2039 if (ret) {
2040 dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
2041 return;
2042 }
2043
2044 ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
2045 EP_CFG_MULT(mult) |
2046 EP_CFG_BUFFERING(buffering) |
2047 EP_CFG_MAXBURST(maxburst);
2048
2049 cdns3_select_ep(priv_dev, bEndpointAddress);
2050 writel(ep_cfg, &priv_dev->regs->ep_cfg);
2051
2052 dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
2053 priv_ep->name, ep_cfg);
2054 }
2055
2056 /* Find correct direction for HW endpoint according to description */
2057 static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
2058 struct cdns3_endpoint *priv_ep)
2059 {
2060 return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
2061 (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
2062 }
2063
2064 static struct
2065 cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
2066 struct usb_endpoint_descriptor *desc)
2067 {
2068 struct usb_ep *ep;
2069 struct cdns3_endpoint *priv_ep;
2070
2071 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2072 unsigned long num;
2073 int ret;
2074 /* ep name pattern likes epXin or epXout */
2075 char c[2] = {ep->name[2], '\0'};
2076
2077 ret = kstrtoul(c, 10, &num);
2078 if (ret)
2079 return ERR_PTR(ret);
2080
2081 priv_ep = ep_to_cdns3_ep(ep);
2082 if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
2083 if (!(priv_ep->flags & EP_CLAIMED)) {
2084 priv_ep->num = num;
2085 return priv_ep;
2086 }
2087 }
2088 }
2089
2090 return ERR_PTR(-ENOENT);
2091 }
2092
2093 /*
2094 * Cadence IP has one limitation that all endpoints must be configured
2095 * (Type & MaxPacketSize) before setting configuration through hardware
2096 * register, it means we can't change endpoints configuration after
2097 * set_configuration.
2098 *
2099 * This function set EP_CLAIMED flag which is added when the gadget driver
2100 * uses usb_ep_autoconfig to configure specific endpoint;
2101 * When the udc driver receives set_configurion request,
2102 * it goes through all claimed endpoints, and configure all endpoints
2103 * accordingly.
2104 *
2105 * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
2106 * ep_cfg register which can be changed after set_configuration, and do
2107 * some software operation accordingly.
2108 */
2109 static struct
2110 usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
2111 struct usb_endpoint_descriptor *desc,
2112 struct usb_ss_ep_comp_descriptor *comp_desc)
2113 {
2114 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2115 struct cdns3_endpoint *priv_ep;
2116 unsigned long flags;
2117
2118 priv_ep = cdns3_find_available_ep(priv_dev, desc);
2119 if (IS_ERR(priv_ep)) {
2120 dev_err(priv_dev->dev, "no available ep\n");
2121 return NULL;
2122 }
2123
2124 dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
2125
2126 spin_lock_irqsave(&priv_dev->lock, flags);
2127 priv_ep->endpoint.desc = desc;
2128 priv_ep->dir = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
2129 priv_ep->type = usb_endpoint_type(desc);
2130 priv_ep->flags |= EP_CLAIMED;
2131 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2132
2133 spin_unlock_irqrestore(&priv_dev->lock, flags);
2134 return &priv_ep->endpoint;
2135 }
2136
2137 /**
2138 * cdns3_gadget_ep_alloc_request Allocates request
2139 * @ep: endpoint object associated with request
2140 * @gfp_flags: gfp flags
2141 *
2142 * Returns allocated request address, NULL on allocation error
2143 */
2144 struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
2145 gfp_t gfp_flags)
2146 {
2147 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2148 struct cdns3_request *priv_req;
2149
2150 priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
2151 if (!priv_req)
2152 return NULL;
2153
2154 priv_req->priv_ep = priv_ep;
2155
2156 trace_cdns3_alloc_request(priv_req);
2157 return &priv_req->request;
2158 }
2159
2160 /**
2161 * cdns3_gadget_ep_free_request Free memory occupied by request
2162 * @ep: endpoint object associated with request
2163 * @request: request to free memory
2164 */
2165 void cdns3_gadget_ep_free_request(struct usb_ep *ep,
2166 struct usb_request *request)
2167 {
2168 struct cdns3_request *priv_req = to_cdns3_request(request);
2169
2170 if (priv_req->aligned_buf)
2171 priv_req->aligned_buf->in_use = 0;
2172
2173 trace_cdns3_free_request(priv_req);
2174 kfree(priv_req);
2175 }
2176
2177 /**
2178 * cdns3_gadget_ep_enable Enable endpoint
2179 * @ep: endpoint object
2180 * @desc: endpoint descriptor
2181 *
2182 * Returns 0 on success, error code elsewhere
2183 */
2184 static int cdns3_gadget_ep_enable(struct usb_ep *ep,
2185 const struct usb_endpoint_descriptor *desc)
2186 {
2187 struct cdns3_endpoint *priv_ep;
2188 struct cdns3_device *priv_dev;
2189 const struct usb_ss_ep_comp_descriptor *comp_desc;
2190 u32 reg = EP_STS_EN_TRBERREN;
2191 u32 bEndpointAddress;
2192 unsigned long flags;
2193 int enable = 1;
2194 int ret;
2195 int val;
2196
2197 priv_ep = ep_to_cdns3_ep(ep);
2198 priv_dev = priv_ep->cdns3_dev;
2199 comp_desc = priv_ep->endpoint.comp_desc;
2200
2201 if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
2202 dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
2203 return -EINVAL;
2204 }
2205
2206 if (!desc->wMaxPacketSize) {
2207 dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
2208 return -EINVAL;
2209 }
2210
2211 if (dev_WARN_ONCE(priv_dev->dev, priv_ep->flags & EP_ENABLED,
2212 "%s is already enabled\n", priv_ep->name))
2213 return 0;
2214
2215 spin_lock_irqsave(&priv_dev->lock, flags);
2216
2217 priv_ep->endpoint.desc = desc;
2218 priv_ep->type = usb_endpoint_type(desc);
2219 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2220
2221 if (priv_ep->interval > ISO_MAX_INTERVAL &&
2222 priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2223 dev_err(priv_dev->dev, "Driver is limited to %d period\n",
2224 ISO_MAX_INTERVAL);
2225
2226 ret = -EINVAL;
2227 goto exit;
2228 }
2229
2230 bEndpointAddress = priv_ep->num | priv_ep->dir;
2231 cdns3_select_ep(priv_dev, bEndpointAddress);
2232
2233 if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
2234 /*
2235 * Enable stream support (SS mode) related interrupts
2236 * in EP_STS_EN Register
2237 */
2238 if (priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2239 reg |= EP_STS_EN_IOTEN | EP_STS_EN_PRIMEEEN |
2240 EP_STS_EN_SIDERREN | EP_STS_EN_MD_EXITEN |
2241 EP_STS_EN_STREAMREN;
2242 priv_ep->use_streams = true;
2243 cdns3_stream_ep_reconfig(priv_dev, priv_ep);
2244 priv_dev->using_streams |= true;
2245 }
2246 }
2247
2248 ret = cdns3_allocate_trb_pool(priv_ep);
2249
2250 if (ret)
2251 goto exit;
2252
2253 bEndpointAddress = priv_ep->num | priv_ep->dir;
2254 cdns3_select_ep(priv_dev, bEndpointAddress);
2255
2256 trace_cdns3_gadget_ep_enable(priv_ep);
2257
2258 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2259
2260 ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2261 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2262 1, 1000);
2263
2264 if (unlikely(ret)) {
2265 cdns3_free_trb_pool(priv_ep);
2266 ret = -EINVAL;
2267 goto exit;
2268 }
2269
2270 /* enable interrupt for selected endpoint */
2271 cdns3_set_register_bit(&priv_dev->regs->ep_ien,
2272 BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
2273
2274 if (priv_dev->dev_ver < DEV_VER_V2)
2275 cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
2276
2277 writel(reg, &priv_dev->regs->ep_sts_en);
2278
2279 /*
2280 * For some versions of controller at some point during ISO OUT traffic
2281 * DMA reads Transfer Ring for the EP which has never got doorbell.
2282 * This issue was detected only on simulation, but to avoid this issue
2283 * driver add protection against it. To fix it driver enable ISO OUT
2284 * endpoint before setting DRBL. This special treatment of ISO OUT
2285 * endpoints are recommended by controller specification.
2286 */
2287 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2288 enable = 0;
2289
2290 if (enable)
2291 cdns3_set_register_bit(&priv_dev->regs->ep_cfg, EP_CFG_ENABLE);
2292
2293 ep->desc = desc;
2294 priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
2295 EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
2296 priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
2297 priv_ep->wa1_set = 0;
2298 priv_ep->enqueue = 0;
2299 priv_ep->dequeue = 0;
2300 reg = readl(&priv_dev->regs->ep_sts);
2301 priv_ep->pcs = !!EP_STS_CCS(reg);
2302 priv_ep->ccs = !!EP_STS_CCS(reg);
2303 /* one TRB is reserved for link TRB used in DMULT mode*/
2304 priv_ep->free_trbs = priv_ep->num_trbs - 1;
2305 exit:
2306 spin_unlock_irqrestore(&priv_dev->lock, flags);
2307
2308 return ret;
2309 }
2310
2311 /**
2312 * cdns3_gadget_ep_disable Disable endpoint
2313 * @ep: endpoint object
2314 *
2315 * Returns 0 on success, error code elsewhere
2316 */
2317 static int cdns3_gadget_ep_disable(struct usb_ep *ep)
2318 {
2319 struct cdns3_endpoint *priv_ep;
2320 struct cdns3_request *priv_req;
2321 struct cdns3_device *priv_dev;
2322 struct usb_request *request;
2323 unsigned long flags;
2324 int ret = 0;
2325 u32 ep_cfg;
2326 int val;
2327
2328 if (!ep) {
2329 pr_err("usbss: invalid parameters\n");
2330 return -EINVAL;
2331 }
2332
2333 priv_ep = ep_to_cdns3_ep(ep);
2334 priv_dev = priv_ep->cdns3_dev;
2335
2336 if (dev_WARN_ONCE(priv_dev->dev, !(priv_ep->flags & EP_ENABLED),
2337 "%s is already disabled\n", priv_ep->name))
2338 return 0;
2339
2340 spin_lock_irqsave(&priv_dev->lock, flags);
2341
2342 trace_cdns3_gadget_ep_disable(priv_ep);
2343
2344 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2345
2346 ep_cfg = readl(&priv_dev->regs->ep_cfg);
2347 ep_cfg &= ~EP_CFG_ENABLE;
2348 writel(ep_cfg, &priv_dev->regs->ep_cfg);
2349
2350 /**
2351 * Driver needs some time before resetting endpoint.
2352 * It need waits for clearing DBUSY bit or for timeout expired.
2353 * 10us is enough time for controller to stop transfer.
2354 */
2355 readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
2356 !(val & EP_STS_DBUSY), 1, 10);
2357 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2358
2359 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2360 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2361 1, 1000);
2362 if (unlikely(ret))
2363 dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
2364 priv_ep->name);
2365
2366 while (!list_empty(&priv_ep->pending_req_list)) {
2367 request = cdns3_next_request(&priv_ep->pending_req_list);
2368
2369 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2370 -ESHUTDOWN);
2371 }
2372
2373 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
2374 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
2375
2376 kfree(priv_req->request.buf);
2377 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
2378 &priv_req->request);
2379 list_del_init(&priv_req->list);
2380 --priv_ep->wa2_counter;
2381 }
2382
2383 while (!list_empty(&priv_ep->deferred_req_list)) {
2384 request = cdns3_next_request(&priv_ep->deferred_req_list);
2385
2386 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2387 -ESHUTDOWN);
2388 }
2389
2390 priv_ep->descmis_req = NULL;
2391
2392 ep->desc = NULL;
2393 priv_ep->flags &= ~EP_ENABLED;
2394 priv_ep->use_streams = false;
2395
2396 spin_unlock_irqrestore(&priv_dev->lock, flags);
2397
2398 return ret;
2399 }
2400
2401 /**
2402 * cdns3_gadget_ep_queue Transfer data on endpoint
2403 * @ep: endpoint object
2404 * @request: request object
2405 * @gfp_flags: gfp flags
2406 *
2407 * Returns 0 on success, error code elsewhere
2408 */
2409 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
2410 struct usb_request *request,
2411 gfp_t gfp_flags)
2412 {
2413 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2414 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2415 struct cdns3_request *priv_req;
2416 int ret = 0;
2417
2418 request->actual = 0;
2419 request->status = -EINPROGRESS;
2420 priv_req = to_cdns3_request(request);
2421 trace_cdns3_ep_queue(priv_req);
2422
2423 if (priv_dev->dev_ver < DEV_VER_V2) {
2424 ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
2425 priv_req);
2426
2427 if (ret == EINPROGRESS)
2428 return 0;
2429 }
2430
2431 ret = cdns3_prepare_aligned_request_buf(priv_req);
2432 if (ret < 0)
2433 return ret;
2434
2435 ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request,
2436 usb_endpoint_dir_in(ep->desc));
2437 if (ret)
2438 return ret;
2439
2440 list_add_tail(&request->list, &priv_ep->deferred_req_list);
2441
2442 /*
2443 * For stream capable endpoint if prime irq flag is set then only start
2444 * request.
2445 * If hardware endpoint configuration has not been set yet then
2446 * just queue request in deferred list. Transfer will be started in
2447 * cdns3_set_hw_configuration.
2448 */
2449 if (!request->stream_id) {
2450 if (priv_dev->hw_configured_flag &&
2451 !(priv_ep->flags & EP_STALLED) &&
2452 !(priv_ep->flags & EP_STALL_PENDING))
2453 cdns3_start_all_request(priv_dev, priv_ep);
2454 } else {
2455 if (priv_dev->hw_configured_flag && priv_ep->prime_flag)
2456 cdns3_start_all_request(priv_dev, priv_ep);
2457 }
2458
2459 return 0;
2460 }
2461
2462 static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
2463 gfp_t gfp_flags)
2464 {
2465 struct usb_request *zlp_request;
2466 struct cdns3_endpoint *priv_ep;
2467 struct cdns3_device *priv_dev;
2468 unsigned long flags;
2469 int ret;
2470
2471 if (!request || !ep)
2472 return -EINVAL;
2473
2474 priv_ep = ep_to_cdns3_ep(ep);
2475 priv_dev = priv_ep->cdns3_dev;
2476
2477 spin_lock_irqsave(&priv_dev->lock, flags);
2478
2479 ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
2480
2481 if (ret == 0 && request->zero && request->length &&
2482 (request->length % ep->maxpacket == 0)) {
2483 struct cdns3_request *priv_req;
2484
2485 zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
2486 zlp_request->buf = priv_dev->zlp_buf;
2487 zlp_request->length = 0;
2488
2489 priv_req = to_cdns3_request(zlp_request);
2490 priv_req->flags |= REQUEST_ZLP;
2491
2492 dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
2493 priv_ep->name);
2494 ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
2495 }
2496
2497 spin_unlock_irqrestore(&priv_dev->lock, flags);
2498 return ret;
2499 }
2500
2501 /**
2502 * cdns3_gadget_ep_dequeue Remove request from transfer queue
2503 * @ep: endpoint object associated with request
2504 * @request: request object
2505 *
2506 * Returns 0 on success, error code elsewhere
2507 */
2508 int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
2509 struct usb_request *request)
2510 {
2511 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2512 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2513 struct usb_request *req, *req_temp;
2514 struct cdns3_request *priv_req;
2515 struct cdns3_trb *link_trb;
2516 u8 req_on_hw_ring = 0;
2517 unsigned long flags;
2518 int ret = 0;
2519
2520 if (!ep || !request || !ep->desc)
2521 return -EINVAL;
2522
2523 spin_lock_irqsave(&priv_dev->lock, flags);
2524
2525 priv_req = to_cdns3_request(request);
2526
2527 trace_cdns3_ep_dequeue(priv_req);
2528
2529 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2530
2531 list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2532 list) {
2533 if (request == req) {
2534 req_on_hw_ring = 1;
2535 goto found;
2536 }
2537 }
2538
2539 list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
2540 list) {
2541 if (request == req)
2542 goto found;
2543 }
2544
2545 goto not_found;
2546
2547 found:
2548 link_trb = priv_req->trb;
2549
2550 /* Update ring only if removed request is on pending_req_list list */
2551 if (req_on_hw_ring) {
2552 link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma +
2553 ((priv_req->end_trb + 1) * TRB_SIZE));
2554 link_trb->control = (link_trb->control & TRB_CYCLE) |
2555 TRB_TYPE(TRB_LINK) | TRB_CHAIN;
2556
2557 if (priv_ep->wa1_trb == priv_req->trb)
2558 cdns3_wa1_restore_cycle_bit(priv_ep);
2559 }
2560
2561 cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2562
2563 not_found:
2564 spin_unlock_irqrestore(&priv_dev->lock, flags);
2565 return ret;
2566 }
2567
2568 /**
2569 * __cdns3_gadget_ep_set_halt Sets stall on selected endpoint
2570 * Should be called after acquiring spin_lock and selecting ep
2571 * @ep: endpoint object to set stall on.
2572 */
2573 void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
2574 {
2575 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2576
2577 trace_cdns3_halt(priv_ep, 1, 0);
2578
2579 if (!(priv_ep->flags & EP_STALLED)) {
2580 u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
2581
2582 if (!(ep_sts_reg & EP_STS_DBUSY))
2583 cdns3_ep_stall_flush(priv_ep);
2584 else
2585 priv_ep->flags |= EP_STALL_PENDING;
2586 }
2587 }
2588
2589 /**
2590 * __cdns3_gadget_ep_clear_halt Clears stall on selected endpoint
2591 * Should be called after acquiring spin_lock and selecting ep
2592 * @ep: endpoint object to clear stall on
2593 */
2594 int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
2595 {
2596 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2597 struct usb_request *request;
2598 struct cdns3_request *priv_req;
2599 struct cdns3_trb *trb = NULL;
2600 int ret;
2601 int val;
2602
2603 trace_cdns3_halt(priv_ep, 0, 0);
2604
2605 request = cdns3_next_request(&priv_ep->pending_req_list);
2606 if (request) {
2607 priv_req = to_cdns3_request(request);
2608 trb = priv_req->trb;
2609 if (trb)
2610 trb->control = trb->control ^ TRB_CYCLE;
2611 }
2612
2613 writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2614
2615 /* wait for EPRST cleared */
2616 ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2617 !(val & EP_CMD_EPRST), 1, 100);
2618 if (ret)
2619 return -EINVAL;
2620
2621 priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
2622
2623 if (request) {
2624 if (trb)
2625 trb->control = trb->control ^ TRB_CYCLE;
2626 cdns3_rearm_transfer(priv_ep, 1);
2627 }
2628
2629 cdns3_start_all_request(priv_dev, priv_ep);
2630 return ret;
2631 }
2632
2633 /**
2634 * cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint
2635 * @ep: endpoint object to set/clear stall on
2636 * @value: 1 for set stall, 0 for clear stall
2637 *
2638 * Returns 0 on success, error code elsewhere
2639 */
2640 int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
2641 {
2642 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2643 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2644 unsigned long flags;
2645 int ret = 0;
2646
2647 if (!(priv_ep->flags & EP_ENABLED))
2648 return -EPERM;
2649
2650 spin_lock_irqsave(&priv_dev->lock, flags);
2651
2652 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2653
2654 if (!value) {
2655 priv_ep->flags &= ~EP_WEDGE;
2656 ret = __cdns3_gadget_ep_clear_halt(priv_ep);
2657 } else {
2658 __cdns3_gadget_ep_set_halt(priv_ep);
2659 }
2660
2661 spin_unlock_irqrestore(&priv_dev->lock, flags);
2662
2663 return ret;
2664 }
2665
2666 extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
2667
2668 static const struct usb_ep_ops cdns3_gadget_ep_ops = {
2669 .enable = cdns3_gadget_ep_enable,
2670 .disable = cdns3_gadget_ep_disable,
2671 .alloc_request = cdns3_gadget_ep_alloc_request,
2672 .free_request = cdns3_gadget_ep_free_request,
2673 .queue = cdns3_gadget_ep_queue,
2674 .dequeue = cdns3_gadget_ep_dequeue,
2675 .set_halt = cdns3_gadget_ep_set_halt,
2676 .set_wedge = cdns3_gadget_ep_set_wedge,
2677 };
2678
2679 /**
2680 * cdns3_gadget_get_frame Returns number of actual ITP frame
2681 * @gadget: gadget object
2682 *
2683 * Returns number of actual ITP frame
2684 */
2685 static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
2686 {
2687 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2688
2689 return readl(&priv_dev->regs->usb_itpn);
2690 }
2691
2692 int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
2693 {
2694 enum usb_device_speed speed;
2695
2696 speed = cdns3_get_speed(priv_dev);
2697
2698 if (speed >= USB_SPEED_SUPER)
2699 return 0;
2700
2701 /* Start driving resume signaling to indicate remote wakeup. */
2702 writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
2703
2704 return 0;
2705 }
2706
2707 static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
2708 {
2709 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2710 unsigned long flags;
2711 int ret = 0;
2712
2713 spin_lock_irqsave(&priv_dev->lock, flags);
2714 ret = __cdns3_gadget_wakeup(priv_dev);
2715 spin_unlock_irqrestore(&priv_dev->lock, flags);
2716 return ret;
2717 }
2718
2719 static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
2720 int is_selfpowered)
2721 {
2722 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2723 unsigned long flags;
2724
2725 spin_lock_irqsave(&priv_dev->lock, flags);
2726 priv_dev->is_selfpowered = !!is_selfpowered;
2727 spin_unlock_irqrestore(&priv_dev->lock, flags);
2728 return 0;
2729 }
2730
2731 static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
2732 {
2733 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2734
2735 if (is_on)
2736 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2737 else
2738 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2739
2740 return 0;
2741 }
2742
2743 static void cdns3_gadget_config(struct cdns3_device *priv_dev)
2744 {
2745 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2746 u32 reg;
2747
2748 cdns3_ep0_config(priv_dev);
2749
2750 /* enable interrupts for endpoint 0 (in and out) */
2751 writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, &regs->ep_ien);
2752
2753 /*
2754 * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2755 * revision of controller.
2756 */
2757 if (priv_dev->dev_ver == DEV_VER_TI_V1) {
2758 reg = readl(&regs->dbg_link1);
2759
2760 reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
2761 reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2762 DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
2763 writel(reg, &regs->dbg_link1);
2764 }
2765
2766 /*
2767 * By default some platforms has set protected access to memory.
2768 * This cause problem with cache, so driver restore non-secure
2769 * access to memory.
2770 */
2771 reg = readl(&regs->dma_axi_ctrl);
2772 reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
2773 DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
2774 writel(reg, &regs->dma_axi_ctrl);
2775
2776 /* enable generic interrupt*/
2777 writel(USB_IEN_INIT, &regs->usb_ien);
2778 writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
2779
2780 cdns3_configure_dmult(priv_dev, NULL);
2781 }
2782
2783 /**
2784 * cdns3_gadget_udc_start Gadget start
2785 * @gadget: gadget object
2786 * @driver: driver which operates on this gadget
2787 *
2788 * Returns 0 on success, error code elsewhere
2789 */
2790 static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
2791 struct usb_gadget_driver *driver)
2792 {
2793 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2794 unsigned long flags;
2795 enum usb_device_speed max_speed = driver->max_speed;
2796
2797 spin_lock_irqsave(&priv_dev->lock, flags);
2798 priv_dev->gadget_driver = driver;
2799
2800 /* limit speed if necessary */
2801 max_speed = min(driver->max_speed, gadget->max_speed);
2802
2803 switch (max_speed) {
2804 case USB_SPEED_FULL:
2805 writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
2806 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2807 break;
2808 case USB_SPEED_HIGH:
2809 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2810 break;
2811 case USB_SPEED_SUPER:
2812 break;
2813 default:
2814 dev_err(priv_dev->dev,
2815 "invalid maximum_speed parameter %d\n",
2816 max_speed);
2817 /* fall through */
2818 case USB_SPEED_UNKNOWN:
2819 /* default to superspeed */
2820 max_speed = USB_SPEED_SUPER;
2821 break;
2822 }
2823
2824 cdns3_gadget_config(priv_dev);
2825 spin_unlock_irqrestore(&priv_dev->lock, flags);
2826 return 0;
2827 }
2828
2829 /**
2830 * cdns3_gadget_udc_stop Stops gadget
2831 * @gadget: gadget object
2832 *
2833 * Returns 0
2834 */
2835 static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
2836 {
2837 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2838 struct cdns3_endpoint *priv_ep;
2839 u32 bEndpointAddress;
2840 struct usb_ep *ep;
2841 int val;
2842
2843 priv_dev->gadget_driver = NULL;
2844
2845 priv_dev->onchip_used_size = 0;
2846 priv_dev->out_mem_is_allocated = 0;
2847 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2848
2849 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2850 priv_ep = ep_to_cdns3_ep(ep);
2851 bEndpointAddress = priv_ep->num | priv_ep->dir;
2852 cdns3_select_ep(priv_dev, bEndpointAddress);
2853 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2854 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2855 !(val & EP_CMD_EPRST), 1, 100);
2856
2857 priv_ep->flags &= ~EP_CLAIMED;
2858 }
2859
2860 /* disable interrupt for device */
2861 writel(0, &priv_dev->regs->usb_ien);
2862 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2863
2864 return 0;
2865 }
2866
2867 static const struct usb_gadget_ops cdns3_gadget_ops = {
2868 .get_frame = cdns3_gadget_get_frame,
2869 .wakeup = cdns3_gadget_wakeup,
2870 .set_selfpowered = cdns3_gadget_set_selfpowered,
2871 .pullup = cdns3_gadget_pullup,
2872 .udc_start = cdns3_gadget_udc_start,
2873 .udc_stop = cdns3_gadget_udc_stop,
2874 .match_ep = cdns3_gadget_match_ep,
2875 };
2876
2877 static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
2878 {
2879 int i;
2880
2881 /* ep0 OUT point to ep0 IN. */
2882 priv_dev->eps[16] = NULL;
2883
2884 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
2885 if (priv_dev->eps[i]) {
2886 cdns3_free_trb_pool(priv_dev->eps[i]);
2887 devm_kfree(priv_dev->dev, priv_dev->eps[i]);
2888 }
2889 }
2890
2891 /**
2892 * cdns3_init_eps Initializes software endpoints of gadget
2893 * @cdns3: extended gadget object
2894 *
2895 * Returns 0 on success, error code elsewhere
2896 */
2897 static int cdns3_init_eps(struct cdns3_device *priv_dev)
2898 {
2899 u32 ep_enabled_reg, iso_ep_reg;
2900 struct cdns3_endpoint *priv_ep;
2901 int ep_dir, ep_number;
2902 u32 ep_mask;
2903 int ret = 0;
2904 int i;
2905
2906 /* Read it from USB_CAP3 to USB_CAP5 */
2907 ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
2908 iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
2909
2910 dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
2911
2912 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
2913 ep_dir = i >> 4; /* i div 16 */
2914 ep_number = i & 0xF; /* i % 16 */
2915 ep_mask = BIT(i);
2916
2917 if (!(ep_enabled_reg & ep_mask))
2918 continue;
2919
2920 if (ep_dir && !ep_number) {
2921 priv_dev->eps[i] = priv_dev->eps[0];
2922 continue;
2923 }
2924
2925 priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
2926 GFP_KERNEL);
2927 if (!priv_ep)
2928 goto err;
2929
2930 /* set parent of endpoint object */
2931 priv_ep->cdns3_dev = priv_dev;
2932 priv_dev->eps[i] = priv_ep;
2933 priv_ep->num = ep_number;
2934 priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
2935
2936 if (!ep_number) {
2937 ret = cdns3_init_ep0(priv_dev, priv_ep);
2938 if (ret) {
2939 dev_err(priv_dev->dev, "Failed to init ep0\n");
2940 goto err;
2941 }
2942 } else {
2943 snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
2944 ep_number, !!ep_dir ? "in" : "out");
2945 priv_ep->endpoint.name = priv_ep->name;
2946
2947 usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
2948 CDNS3_EP_MAX_PACKET_LIMIT);
2949 priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
2950 priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
2951 if (ep_dir)
2952 priv_ep->endpoint.caps.dir_in = 1;
2953 else
2954 priv_ep->endpoint.caps.dir_out = 1;
2955
2956 if (iso_ep_reg & ep_mask)
2957 priv_ep->endpoint.caps.type_iso = 1;
2958
2959 priv_ep->endpoint.caps.type_bulk = 1;
2960 priv_ep->endpoint.caps.type_int = 1;
2961
2962 list_add_tail(&priv_ep->endpoint.ep_list,
2963 &priv_dev->gadget.ep_list);
2964 }
2965
2966 priv_ep->flags = 0;
2967
2968 dev_info(priv_dev->dev, "Initialized %s support: %s %s\n",
2969 priv_ep->name,
2970 priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
2971 priv_ep->endpoint.caps.type_iso ? "ISO" : "");
2972
2973 INIT_LIST_HEAD(&priv_ep->pending_req_list);
2974 INIT_LIST_HEAD(&priv_ep->deferred_req_list);
2975 INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
2976 }
2977
2978 return 0;
2979 err:
2980 cdns3_free_all_eps(priv_dev);
2981 return -ENOMEM;
2982 }
2983
2984 void cdns3_gadget_exit(struct cdns3 *cdns)
2985 {
2986 struct cdns3_device *priv_dev;
2987
2988 priv_dev = cdns->gadget_dev;
2989
2990 devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
2991
2992 pm_runtime_mark_last_busy(cdns->dev);
2993 pm_runtime_put_autosuspend(cdns->dev);
2994
2995 usb_del_gadget_udc(&priv_dev->gadget);
2996
2997 cdns3_free_all_eps(priv_dev);
2998
2999 while (!list_empty(&priv_dev->aligned_buf_list)) {
3000 struct cdns3_aligned_buf *buf;
3001
3002 buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
3003 dma_free_coherent(priv_dev->sysdev, buf->size,
3004 buf->buf,
3005 buf->dma);
3006
3007 list_del(&buf->list);
3008 kfree(buf);
3009 }
3010
3011 dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3012 priv_dev->setup_dma);
3013
3014 kfree(priv_dev->zlp_buf);
3015 kfree(priv_dev);
3016 cdns->gadget_dev = NULL;
3017 cdns3_drd_switch_gadget(cdns, 0);
3018 }
3019
3020 static int cdns3_gadget_start(struct cdns3 *cdns)
3021 {
3022 struct cdns3_device *priv_dev;
3023 u32 max_speed;
3024 int ret;
3025
3026 priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
3027 if (!priv_dev)
3028 return -ENOMEM;
3029
3030 cdns->gadget_dev = priv_dev;
3031 priv_dev->sysdev = cdns->dev;
3032 priv_dev->dev = cdns->dev;
3033 priv_dev->regs = cdns->dev_regs;
3034
3035 device_property_read_u16(priv_dev->dev, "cdns,on-chip-buff-size",
3036 &priv_dev->onchip_buffers);
3037
3038 if (priv_dev->onchip_buffers <= 0) {
3039 u32 reg = readl(&priv_dev->regs->usb_cap2);
3040
3041 priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
3042 }
3043
3044 if (!priv_dev->onchip_buffers)
3045 priv_dev->onchip_buffers = 256;
3046
3047 max_speed = usb_get_maximum_speed(cdns->dev);
3048
3049 /* Check the maximum_speed parameter */
3050 switch (max_speed) {
3051 case USB_SPEED_FULL:
3052 case USB_SPEED_HIGH:
3053 case USB_SPEED_SUPER:
3054 break;
3055 default:
3056 dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
3057 max_speed);
3058 /* fall through */
3059 case USB_SPEED_UNKNOWN:
3060 /* default to superspeed */
3061 max_speed = USB_SPEED_SUPER;
3062 break;
3063 }
3064
3065 /* fill gadget fields */
3066 priv_dev->gadget.max_speed = max_speed;
3067 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3068 priv_dev->gadget.ops = &cdns3_gadget_ops;
3069 priv_dev->gadget.name = "usb-ss-gadget";
3070 priv_dev->gadget.sg_supported = 1;
3071 priv_dev->gadget.quirk_avoids_skb_reserve = 1;
3072
3073 spin_lock_init(&priv_dev->lock);
3074 INIT_WORK(&priv_dev->pending_status_wq,
3075 cdns3_pending_setup_status_handler);
3076
3077 INIT_WORK(&priv_dev->aligned_buf_wq,
3078 cdns3_free_aligned_request_buf);
3079
3080 /* initialize endpoint container */
3081 INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
3082 INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
3083
3084 ret = cdns3_init_eps(priv_dev);
3085 if (ret) {
3086 dev_err(priv_dev->dev, "Failed to create endpoints\n");
3087 goto err1;
3088 }
3089
3090 /* allocate memory for setup packet buffer */
3091 priv_dev->setup_buf = dma_alloc_coherent(priv_dev->sysdev, 8,
3092 &priv_dev->setup_dma, GFP_DMA);
3093 if (!priv_dev->setup_buf) {
3094 ret = -ENOMEM;
3095 goto err2;
3096 }
3097
3098 priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
3099
3100 dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
3101 readl(&priv_dev->regs->usb_cap6));
3102 dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
3103 readl(&priv_dev->regs->usb_cap1));
3104 dev_dbg(priv_dev->dev, "On-Chip memory configuration: %08x\n",
3105 readl(&priv_dev->regs->usb_cap2));
3106
3107 priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
3108
3109 priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
3110 if (!priv_dev->zlp_buf) {
3111 ret = -ENOMEM;
3112 goto err3;
3113 }
3114
3115 /* add USB gadget device */
3116 ret = usb_add_gadget_udc(priv_dev->dev, &priv_dev->gadget);
3117 if (ret < 0) {
3118 dev_err(priv_dev->dev,
3119 "Failed to register USB device controller\n");
3120 goto err4;
3121 }
3122
3123 return 0;
3124 err4:
3125 kfree(priv_dev->zlp_buf);
3126 err3:
3127 dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3128 priv_dev->setup_dma);
3129 err2:
3130 cdns3_free_all_eps(priv_dev);
3131 err1:
3132 cdns->gadget_dev = NULL;
3133 return ret;
3134 }
3135
3136 static int __cdns3_gadget_init(struct cdns3 *cdns)
3137 {
3138 int ret = 0;
3139
3140 /* Ensure 32-bit DMA Mask in case we switched back from Host mode */
3141 ret = dma_set_mask_and_coherent(cdns->dev, DMA_BIT_MASK(32));
3142 if (ret) {
3143 dev_err(cdns->dev, "Failed to set dma mask: %d\n", ret);
3144 return ret;
3145 }
3146
3147 cdns3_drd_switch_gadget(cdns, 1);
3148 pm_runtime_get_sync(cdns->dev);
3149
3150 ret = cdns3_gadget_start(cdns);
3151 if (ret)
3152 return ret;
3153
3154 /*
3155 * Because interrupt line can be shared with other components in
3156 * driver it can't use IRQF_ONESHOT flag here.
3157 */
3158 ret = devm_request_threaded_irq(cdns->dev, cdns->dev_irq,
3159 cdns3_device_irq_handler,
3160 cdns3_device_thread_irq_handler,
3161 IRQF_SHARED, dev_name(cdns->dev),
3162 cdns->gadget_dev);
3163
3164 if (ret)
3165 goto err0;
3166
3167 return 0;
3168 err0:
3169 cdns3_gadget_exit(cdns);
3170 return ret;
3171 }
3172
3173 static int cdns3_gadget_suspend(struct cdns3 *cdns, bool do_wakeup)
3174 {
3175 struct cdns3_device *priv_dev = cdns->gadget_dev;
3176
3177 cdns3_disconnect_gadget(priv_dev);
3178
3179 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3180 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
3181 cdns3_hw_reset_eps_config(priv_dev);
3182
3183 /* disable interrupt for device */
3184 writel(0, &priv_dev->regs->usb_ien);
3185
3186 return 0;
3187 }
3188
3189 static int cdns3_gadget_resume(struct cdns3 *cdns, bool hibernated)
3190 {
3191 struct cdns3_device *priv_dev = cdns->gadget_dev;
3192
3193 if (!priv_dev->gadget_driver)
3194 return 0;
3195
3196 cdns3_gadget_config(priv_dev);
3197
3198 return 0;
3199 }
3200
3201 /**
3202 * cdns3_gadget_init - initialize device structure
3203 *
3204 * cdns: cdns3 instance
3205 *
3206 * This function initializes the gadget.
3207 */
3208 int cdns3_gadget_init(struct cdns3 *cdns)
3209 {
3210 struct cdns3_role_driver *rdrv;
3211
3212 rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
3213 if (!rdrv)
3214 return -ENOMEM;
3215
3216 rdrv->start = __cdns3_gadget_init;
3217 rdrv->stop = cdns3_gadget_exit;
3218 rdrv->suspend = cdns3_gadget_suspend;
3219 rdrv->resume = cdns3_gadget_resume;
3220 rdrv->state = CDNS3_ROLE_STATE_INACTIVE;
3221 rdrv->name = "gadget";
3222 cdns->roles[USB_ROLE_DEVICE] = rdrv;
3223
3224 return 0;
3225 }