drivers/usb/eth/smsc95xx.c

   1 /*
   2  * Copyright (c) 2015 Google, Inc
   3  * Copyright (c) 2011 The Chromium OS Authors.
   4  * Copyright (C) 2009 NVIDIA, Corporation
   5  * Copyright (C) 2007-2008 SMSC (Steve Glendinning)
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <dm.h>
  12 #include <errno.h>
  13 #include <malloc.h>
  14 #include <usb.h>
  15 #include <asm/unaligned.h>
  16 #include <linux/mii.h>
  17 #include "usb_ether.h"
  18
  19 /* SMSC LAN95xx based USB 2.0 Ethernet Devices */
  20
  21 /* LED defines */
  22 #define LED_GPIO_CFG                    (0x24)
  23 #define LED_GPIO_CFG_SPD_LED            (0x01000000)
  24 #define LED_GPIO_CFG_LNK_LED            (0x00100000)
  25 #define LED_GPIO_CFG_FDX_LED            (0x00010000)
  26
  27 /* Tx command words */
  28 #define TX_CMD_A_FIRST_SEG_             0x00002000
  29 #define TX_CMD_A_LAST_SEG_              0x00001000
  30
  31 /* Rx status word */
  32 #define RX_STS_FL_                      0x3FFF0000      /* Frame Length */
  33 #define RX_STS_ES_                      0x00008000      /* Error Summary */
  34
  35 /* SCSRs */
  36 #define ID_REV                          0x00
  37
  38 #define INT_STS                         0x08
  39
  40 #define TX_CFG                          0x10
  41 #define TX_CFG_ON_                      0x00000004
  42
  43 #define HW_CFG                          0x14
  44 #define HW_CFG_BIR_                     0x00001000
  45 #define HW_CFG_RXDOFF_                  0x00000600
  46 #define HW_CFG_MEF_                     0x00000020
  47 #define HW_CFG_BCE_                     0x00000002
  48 #define HW_CFG_LRST_                    0x00000008
  49
  50 #define PM_CTRL                         0x20
  51 #define PM_CTL_PHY_RST_                 0x00000010
  52
  53 #define AFC_CFG                         0x2C
  54
  55 /*
  56  * Hi watermark = 15.5Kb (~10 mtu pkts)
  57  * low watermark = 3k (~2 mtu pkts)
  58  * backpressure duration = ~ 350us
  59  * Apply FC on any frame.
  60  */
  61 #define AFC_CFG_DEFAULT                 0x00F830A1
  62
  63 #define E2P_CMD                         0x30
  64 #define E2P_CMD_BUSY_                   0x80000000
  65 #define E2P_CMD_READ_                   0x00000000
  66 #define E2P_CMD_TIMEOUT_                0x00000400
  67 #define E2P_CMD_LOADED_                 0x00000200
  68 #define E2P_CMD_ADDR_                   0x000001FF
  69
  70 #define E2P_DATA                        0x34
  71
  72 #define BURST_CAP                       0x38
  73
  74 #define INT_EP_CTL                      0x68
  75 #define INT_EP_CTL_PHY_INT_             0x00008000
  76
  77 #define BULK_IN_DLY                     0x6C
  78
  79 /* MAC CSRs */
  80 #define MAC_CR                          0x100
  81 #define MAC_CR_MCPAS_                   0x00080000
  82 #define MAC_CR_PRMS_                    0x00040000
  83 #define MAC_CR_HPFILT_                  0x00002000
  84 #define MAC_CR_TXEN_                    0x00000008
  85 #define MAC_CR_RXEN_                    0x00000004
  86
  87 #define ADDRH                           0x104
  88
  89 #define ADDRL                           0x108
  90
  91 #define MII_ADDR                        0x114
  92 #define MII_WRITE_                      0x02
  93 #define MII_BUSY_                       0x01
  94 #define MII_READ_                       0x00 /* ~of MII Write bit */
  95
  96 #define MII_DATA                        0x118
  97
  98 #define FLOW                            0x11C
  99
 100 #define VLAN1                           0x120
 101
 102 #define COE_CR                          0x130
 103 #define Tx_COE_EN_                      0x00010000
 104 #define Rx_COE_EN_                      0x00000001
 105
 106 /* Vendor-specific PHY Definitions */
 107 #define PHY_INT_SRC                     29
 108
 109 #define PHY_INT_MASK                    30
 110 #define PHY_INT_MASK_ANEG_COMP_         ((u16)0x0040)
 111 #define PHY_INT_MASK_LINK_DOWN_         ((u16)0x0010)
 112 #define PHY_INT_MASK_DEFAULT_           (PHY_INT_MASK_ANEG_COMP_ | \
 113                                          PHY_INT_MASK_LINK_DOWN_)
 114
 115 /* USB Vendor Requests */
 116 #define USB_VENDOR_REQUEST_WRITE_REGISTER       0xA0
 117 #define USB_VENDOR_REQUEST_READ_REGISTER        0xA1
 118
 119 /* Some extra defines */
 120 #define HS_USB_PKT_SIZE                 512
 121 #define FS_USB_PKT_SIZE                 64
 122 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
 123 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
 124 #define DEFAULT_BULK_IN_DELAY           0x00002000
 125 #define MAX_SINGLE_PACKET_SIZE          2048
 126 #define EEPROM_MAC_OFFSET               0x01
 127 #define SMSC95XX_INTERNAL_PHY_ID        1
 128 #define ETH_P_8021Q     0x8100          /* 802.1Q VLAN Extended Header  */
 129
 130 /* local defines */
 131 #define SMSC95XX_BASE_NAME "sms"
 132 #define USB_CTRL_SET_TIMEOUT 5000
 133 #define USB_CTRL_GET_TIMEOUT 5000
 134 #define USB_BULK_SEND_TIMEOUT 5000
 135 #define USB_BULK_RECV_TIMEOUT 5000
 136
 137 #define RX_URB_SIZE 2048
 138 #define PHY_CONNECT_TIMEOUT 5000
 139
 140 #define TURBO_MODE
 141
 142 #ifndef CONFIG_DM_ETH
 143 /* local vars */
 144 static int curr_eth_dev; /* index for name of next device detected */
 145 #endif
 146
 147 /* driver private */
 148 struct smsc95xx_private {
 149 #ifdef CONFIG_DM_ETH
 150         struct ueth_data ueth;
 151 #endif
 152         size_t rx_urb_size;  /* maximum USB URB size */
 153         u32 mac_cr;  /* MAC control register value */
 154         int have_hwaddr;  /* 1 if we have a hardware MAC address */
 155 };
 156
 157 /*
 158  * Smsc95xx infrastructure commands
 159  */
 160 static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data)
 161 {
 162         int len;
 163         ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
 164
 165         cpu_to_le32s(&data);
 166         tmpbuf[0] = data;
 167
 168         len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
 169                               USB_VENDOR_REQUEST_WRITE_REGISTER,
 170                               USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 171                               0, index, tmpbuf, sizeof(data),
 172                               USB_CTRL_SET_TIMEOUT);
 173         if (len != sizeof(data)) {
 174                 debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
 175                       index, data, len);
 176                 return -EIO;
 177         }
 178         return 0;
 179 }
 180
 181 static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data)
 182 {
 183         int len;
 184         ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
 185
 186         len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
 187                               USB_VENDOR_REQUEST_READ_REGISTER,
 188                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 189                               0, index, tmpbuf, sizeof(data),
 190                               USB_CTRL_GET_TIMEOUT);
 191         *data = tmpbuf[0];
 192         if (len != sizeof(data)) {
 193                 debug("smsc95xx_read_reg failed: index=%d, len=%d",
 194                       index, len);
 195                 return -EIO;
 196         }
 197
 198         le32_to_cpus(data);
 199         return 0;
 200 }
 201
 202 /* Loop until the read is completed with timeout */
 203 static int smsc95xx_phy_wait_not_busy(struct usb_device *udev)
 204 {
 205         unsigned long start_time = get_timer(0);
 206         u32 val;
 207
 208         do {
 209                 smsc95xx_read_reg(udev, MII_ADDR, &val);
 210                 if (!(val & MII_BUSY_))
 211                         return 0;
 212         } while (get_timer(start_time) < 1000);
 213
 214         return -ETIMEDOUT;
 215 }
 216
 217 static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx)
 218 {
 219         u32 val, addr;
 220
 221         /* confirm MII not busy */
 222         if (smsc95xx_phy_wait_not_busy(udev)) {
 223                 debug("MII is busy in smsc95xx_mdio_read\n");
 224                 return -ETIMEDOUT;
 225         }
 226
 227         /* set the address, index & direction (read from PHY) */
 228         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
 229         smsc95xx_write_reg(udev, MII_ADDR, addr);
 230
 231         if (smsc95xx_phy_wait_not_busy(udev)) {
 232                 debug("Timed out reading MII reg %02X\n", idx);
 233                 return -ETIMEDOUT;
 234         }
 235
 236         smsc95xx_read_reg(udev, MII_DATA, &val);
 237
 238         return (u16)(val & 0xFFFF);
 239 }
 240
 241 static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx,
 242                                 int regval)
 243 {
 244         u32 val, addr;
 245
 246         /* confirm MII not busy */
 247         if (smsc95xx_phy_wait_not_busy(udev)) {
 248                 debug("MII is busy in smsc95xx_mdio_write\n");
 249                 return;
 250         }
 251
 252         val = regval;
 253         smsc95xx_write_reg(udev, MII_DATA, val);
 254
 255         /* set the address, index & direction (write to PHY) */
 256         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
 257         smsc95xx_write_reg(udev, MII_ADDR, addr);
 258
 259         if (smsc95xx_phy_wait_not_busy(udev))
 260                 debug("Timed out writing MII reg %02X\n", idx);
 261 }
 262
 263 static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev)
 264 {
 265         unsigned long start_time = get_timer(0);
 266         u32 val;
 267
 268         do {
 269                 smsc95xx_read_reg(udev, E2P_CMD, &val);
 270                 if (!(val & E2P_CMD_BUSY_))
 271                         return 0;
 272                 udelay(40);
 273         } while (get_timer(start_time) < 1 * 1000 * 1000);
 274
 275         debug("EEPROM is busy\n");
 276         return -ETIMEDOUT;
 277 }
 278
 279 static int smsc95xx_wait_eeprom(struct usb_device *udev)
 280 {
 281         unsigned long start_time = get_timer(0);
 282         u32 val;
 283
 284         do {
 285                 smsc95xx_read_reg(udev, E2P_CMD, &val);
 286                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
 287                         break;
 288                 udelay(40);
 289         } while (get_timer(start_time) < 1 * 1000 * 1000);
 290
 291         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
 292                 debug("EEPROM read operation timeout\n");
 293                 return -ETIMEDOUT;
 294         }
 295         return 0;
 296 }
 297
 298 static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length,
 299                                 u8 *data)
 300 {
 301         u32 val;
 302         int i, ret;
 303
 304         ret = smsc95xx_eeprom_confirm_not_busy(udev);
 305         if (ret)
 306                 return ret;
 307
 308         for (i = 0; i < length; i++) {
 309                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
 310                 smsc95xx_write_reg(udev, E2P_CMD, val);
 311
 312                 ret = smsc95xx_wait_eeprom(udev);
 313                 if (ret < 0)
 314                         return ret;
 315
 316                 smsc95xx_read_reg(udev, E2P_DATA, &val);
 317                 data[i] = val & 0xFF;
 318                 offset++;
 319         }
 320         return 0;
 321 }
 322
 323 /*
 324  * mii_nway_restart - restart NWay (autonegotiation) for this interface
 325  *
 326  * Returns 0 on success, negative on error.
 327  */
 328 static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev)
 329 {
 330         int bmcr;
 331         int r = -1;
 332
 333         /* if autoneg is off, it's an error */
 334         bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR);
 335
 336         if (bmcr & BMCR_ANENABLE) {
 337                 bmcr |= BMCR_ANRESTART;
 338                 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr);
 339                 r = 0;
 340         }
 341         return r;
 342 }
 343
 344 static int smsc95xx_phy_initialize(struct usb_device *udev,
 345                                    struct ueth_data *dev)
 346 {
 347         smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET);
 348         smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE,
 349                             ADVERTISE_ALL | ADVERTISE_CSMA |
 350                             ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 351
 352         /* read to clear */
 353         smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC);
 354
 355         smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK,
 356                             PHY_INT_MASK_DEFAULT_);
 357         mii_nway_restart(udev, dev);
 358
 359         debug("phy initialised succesfully\n");
 360         return 0;
 361 }
 362
 363 static int smsc95xx_init_mac_address(unsigned char *enetaddr,
 364                                      struct usb_device *udev)
 365 {
 366         int ret;
 367
 368         /* try reading mac address from EEPROM */
 369         ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr);
 370         if (ret)
 371                 return ret;
 372
 373         if (is_valid_ethaddr(enetaddr)) {
 374                 /* eeprom values are valid so use them */
 375                 debug("MAC address read from EEPROM\n");
 376                 return 0;
 377         }
 378
 379         /*
 380          * No eeprom, or eeprom values are invalid. Generating a random MAC
 381          * address is not safe. Just return an error.
 382          */
 383         debug("Invalid MAC address read from EEPROM\n");
 384
 385         return -ENXIO;
 386 }
 387
 388 static int smsc95xx_write_hwaddr_common(struct usb_device *udev,
 389                                         struct smsc95xx_private *priv,
 390                                         unsigned char *enetaddr)
 391 {
 392         u32 addr_lo = __get_unaligned_le32(&enetaddr[0]);
 393         u32 addr_hi = __get_unaligned_le16(&enetaddr[4]);
 394         int ret;
 395
 396         /* set hardware address */
 397         debug("** %s()\n", __func__);
 398         ret = smsc95xx_write_reg(udev, ADDRL, addr_lo);
 399         if (ret < 0)
 400                 return ret;
 401
 402         ret = smsc95xx_write_reg(udev, ADDRH, addr_hi);
 403         if (ret < 0)
 404                 return ret;
 405
 406         debug("MAC %pM\n", enetaddr);
 407         priv->have_hwaddr = 1;
 408
 409         return 0;
 410 }
 411
 412 /* Enable or disable Tx & Rx checksum offload engines */
 413 static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum,
 414                               int use_rx_csum)
 415 {
 416         u32 read_buf;
 417         int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf);
 418         if (ret < 0)
 419                 return ret;
 420
 421         if (use_tx_csum)
 422                 read_buf |= Tx_COE_EN_;
 423         else
 424                 read_buf &= ~Tx_COE_EN_;
 425
 426         if (use_rx_csum)
 427                 read_buf |= Rx_COE_EN_;
 428         else
 429                 read_buf &= ~Rx_COE_EN_;
 430
 431         ret = smsc95xx_write_reg(udev, COE_CR, read_buf);
 432         if (ret < 0)
 433                 return ret;
 434
 435         debug("COE_CR = 0x%08x\n", read_buf);
 436         return 0;
 437 }
 438
 439 static void smsc95xx_set_multicast(struct smsc95xx_private *priv)
 440 {
 441         /* No multicast in u-boot */
 442         priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 443 }
 444
 445 /* starts the TX path */
 446 static void smsc95xx_start_tx_path(struct usb_device *udev,
 447                                    struct smsc95xx_private *priv)
 448 {
 449         u32 reg_val;
 450
 451         /* Enable Tx at MAC */
 452         priv->mac_cr |= MAC_CR_TXEN_;
 453
 454         smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
 455
 456         /* Enable Tx at SCSRs */
 457         reg_val = TX_CFG_ON_;
 458         smsc95xx_write_reg(udev, TX_CFG, reg_val);
 459 }
 460
 461 /* Starts the Receive path */
 462 static void smsc95xx_start_rx_path(struct usb_device *udev,
 463                                    struct smsc95xx_private *priv)
 464 {
 465         priv->mac_cr |= MAC_CR_RXEN_;
 466         smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
 467 }
 468
 469 static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev,
 470                                 struct smsc95xx_private *priv,
 471                                 unsigned char *enetaddr)
 472 {
 473         int ret;
 474         u32 write_buf;
 475         u32 read_buf;
 476         u32 burst_cap;
 477         int timeout;
 478 #define TIMEOUT_RESOLUTION 50   /* ms */
 479         int link_detected;
 480
 481         debug("** %s()\n", __func__);
 482         dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */
 483
 484         write_buf = HW_CFG_LRST_;
 485         ret = smsc95xx_write_reg(udev, HW_CFG, write_buf);
 486         if (ret < 0)
 487                 return ret;
 488
 489         timeout = 0;
 490         do {
 491                 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
 492                 if (ret < 0)
 493                         return ret;
 494                 udelay(10 * 1000);
 495                 timeout++;
 496         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
 497
 498         if (timeout >= 100) {
 499                 debug("timeout waiting for completion of Lite Reset\n");
 500                 return -ETIMEDOUT;
 501         }
 502
 503         write_buf = PM_CTL_PHY_RST_;
 504         ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf);
 505         if (ret < 0)
 506                 return ret;
 507
 508         timeout = 0;
 509         do {
 510                 ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf);
 511                 if (ret < 0)
 512                         return ret;
 513                 udelay(10 * 1000);
 514                 timeout++;
 515         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
 516         if (timeout >= 100) {
 517                 debug("timeout waiting for PHY Reset\n");
 518                 return -ETIMEDOUT;
 519         }
 520         if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) ==
 521                         0)
 522                 priv->have_hwaddr = 1;
 523         if (!priv->have_hwaddr) {
 524                 puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n");
 525                 return -EADDRNOTAVAIL;
 526         }
 527         ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr);
 528         if (ret < 0)
 529                 return ret;
 530
 531         ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
 532         if (ret < 0)
 533                 return ret;
 534         debug("Read Value from HW_CFG : 0x%08x\n", read_buf);
 535
 536         read_buf |= HW_CFG_BIR_;
 537         ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
 538         if (ret < 0)
 539                 return ret;
 540
 541         ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
 542         if (ret < 0)
 543                 return ret;
 544         debug("Read Value from HW_CFG after writing "
 545                 "HW_CFG_BIR_: 0x%08x\n", read_buf);
 546
 547 #ifdef TURBO_MODE
 548         if (dev->pusb_dev->speed == USB_SPEED_HIGH) {
 549                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
 550                 priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
 551         } else {
 552                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
 553                 priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
 554         }
 555 #else
 556         burst_cap = 0;
 557         priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
 558 #endif
 559         debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size);
 560
 561         ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap);
 562         if (ret < 0)
 563                 return ret;
 564
 565         ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf);
 566         if (ret < 0)
 567                 return ret;
 568         debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf);
 569
 570         read_buf = DEFAULT_BULK_IN_DELAY;
 571         ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf);
 572         if (ret < 0)
 573                 return ret;
 574
 575         ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf);
 576         if (ret < 0)
 577                 return ret;
 578         debug("Read Value from BULK_IN_DLY after writing: "
 579                         "0x%08x\n", read_buf);
 580
 581         ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
 582         if (ret < 0)
 583                 return ret;
 584         debug("Read Value from HW_CFG: 0x%08x\n", read_buf);
 585
 586 #ifdef TURBO_MODE
 587         read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
 588 #endif
 589         read_buf &= ~HW_CFG_RXDOFF_;
 590
 591 #define NET_IP_ALIGN 0
 592         read_buf |= NET_IP_ALIGN << 9;
 593
 594         ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
 595         if (ret < 0)
 596                 return ret;
 597
 598         ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
 599         if (ret < 0)
 600                 return ret;
 601         debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
 602
 603         write_buf = 0xFFFFFFFF;
 604         ret = smsc95xx_write_reg(udev, INT_STS, write_buf);
 605         if (ret < 0)
 606                 return ret;
 607
 608         ret = smsc95xx_read_reg(udev, ID_REV, &read_buf);
 609         if (ret < 0)
 610                 return ret;
 611         debug("ID_REV = 0x%08x\n", read_buf);
 612
 613         /* Configure GPIO pins as LED outputs */
 614         write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
 615                 LED_GPIO_CFG_FDX_LED;
 616         ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf);
 617         if (ret < 0)
 618                 return ret;
 619         debug("LED_GPIO_CFG set\n");
 620
 621         /* Init Tx */
 622         write_buf = 0;
 623         ret = smsc95xx_write_reg(udev, FLOW, write_buf);
 624         if (ret < 0)
 625                 return ret;
 626
 627         read_buf = AFC_CFG_DEFAULT;
 628         ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf);
 629         if (ret < 0)
 630                 return ret;
 631
 632         ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr);
 633         if (ret < 0)
 634                 return ret;
 635
 636         /* Init Rx. Set Vlan */
 637         write_buf = (u32)ETH_P_8021Q;
 638         ret = smsc95xx_write_reg(udev, VLAN1, write_buf);
 639         if (ret < 0)
 640                 return ret;
 641
 642         /* Disable checksum offload engines */
 643         ret = smsc95xx_set_csums(udev, 0, 0);
 644         if (ret < 0) {
 645                 debug("Failed to set csum offload: %d\n", ret);
 646                 return ret;
 647         }
 648         smsc95xx_set_multicast(priv);
 649
 650         ret = smsc95xx_phy_initialize(udev, dev);
 651         if (ret < 0)
 652                 return ret;
 653         ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf);
 654         if (ret < 0)
 655                 return ret;
 656
 657         /* enable PHY interrupts */
 658         read_buf |= INT_EP_CTL_PHY_INT_;
 659
 660         ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf);
 661         if (ret < 0)
 662                 return ret;
 663
 664         smsc95xx_start_tx_path(udev, priv);
 665         smsc95xx_start_rx_path(udev, priv);
 666
 667         timeout = 0;
 668         do {
 669                 link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR)
 670                         & BMSR_LSTATUS;
 671                 if (!link_detected) {
 672                         if (timeout == 0)
 673                                 printf("Waiting for Ethernet connection... ");
 674                         udelay(TIMEOUT_RESOLUTION * 1000);
 675                         timeout += TIMEOUT_RESOLUTION;
 676                 }
 677         } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
 678         if (link_detected) {
 679                 if (timeout != 0)
 680                         printf("done.\n");
 681         } else {
 682                 printf("unable to connect.\n");
 683                 return -EIO;
 684         }
 685         return 0;
 686 }
 687
 688 static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length)
 689 {
 690         int err;
 691         int actual_len;
 692         u32 tx_cmd_a;
 693         u32 tx_cmd_b;
 694         ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
 695                                  PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
 696
 697         debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
 698         if (length > PKTSIZE)
 699                 return -ENOSPC;
 700
 701         tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
 702         tx_cmd_b = (u32)length;
 703         cpu_to_le32s(&tx_cmd_a);
 704         cpu_to_le32s(&tx_cmd_b);
 705
 706         /* prepend cmd_a and cmd_b */
 707         memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
 708         memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
 709         memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
 710                length);
 711         err = usb_bulk_msg(dev->pusb_dev,
 712                                 usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
 713                                 (void *)msg,
 714                                 length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
 715                                 &actual_len,
 716                                 USB_BULK_SEND_TIMEOUT);
 717         debug("Tx: len = %u, actual = %u, err = %d\n",
 718               length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
 719               actual_len, err);
 720
 721         return err;
 722 }
 723
 724 #ifndef CONFIG_DM_ETH
 725 /*
 726  * Smsc95xx callbacks
 727  */
 728 static int smsc95xx_init(struct eth_device *eth, bd_t *bd)
 729 {
 730         struct ueth_data *dev = (struct ueth_data *)eth->priv;
 731         struct usb_device *udev = dev->pusb_dev;
 732         struct smsc95xx_private *priv =
 733                 (struct smsc95xx_private *)dev->dev_priv;
 734
 735         return smsc95xx_init_common(udev, dev, priv, eth->enetaddr);
 736 }
 737
 738 static int smsc95xx_send(struct eth_device *eth, void *packet, int length)
 739 {
 740         struct ueth_data *dev = (struct ueth_data *)eth->priv;
 741
 742         return smsc95xx_send_common(dev, packet, length);
 743 }
 744
 745 static int smsc95xx_recv(struct eth_device *eth)
 746 {
 747         struct ueth_data *dev = (struct ueth_data *)eth->priv;
 748         DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE);
 749         unsigned char *buf_ptr;
 750         int err;
 751         int actual_len;
 752         u32 packet_len;
 753         int cur_buf_align;
 754
 755         debug("** %s()\n", __func__);
 756         err = usb_bulk_msg(dev->pusb_dev,
 757                            usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
 758                            (void *)recv_buf, RX_URB_SIZE, &actual_len,
 759                            USB_BULK_RECV_TIMEOUT);
 760         debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE,
 761               actual_len, err);
 762         if (err != 0) {
 763                 debug("Rx: failed to receive\n");
 764                 return -err;
 765         }
 766         if (actual_len > RX_URB_SIZE) {
 767                 debug("Rx: received too many bytes %d\n", actual_len);
 768                 return -ENOSPC;
 769         }
 770
 771         buf_ptr = recv_buf;
 772         while (actual_len > 0) {
 773                 /*
 774                  * 1st 4 bytes contain the length of the actual data plus error
 775                  * info. Extract data length.
 776                  */
 777                 if (actual_len < sizeof(packet_len)) {
 778                         debug("Rx: incomplete packet length\n");
 779                         return -EIO;
 780                 }
 781                 memcpy(&packet_len, buf_ptr, sizeof(packet_len));
 782                 le32_to_cpus(&packet_len);
 783                 if (packet_len & RX_STS_ES_) {
 784                         debug("Rx: Error header=%#x", packet_len);
 785                         return -EIO;
 786                 }
 787                 packet_len = ((packet_len & RX_STS_FL_) >> 16);
 788
 789                 if (packet_len > actual_len - sizeof(packet_len)) {
 790                         debug("Rx: too large packet: %d\n", packet_len);
 791                         return -EIO;
 792                 }
 793
 794                 /* Notify net stack */
 795                 net_process_received_packet(buf_ptr + sizeof(packet_len),
 796                                             packet_len - 4);
 797
 798                 /* Adjust for next iteration */
 799                 actual_len -= sizeof(packet_len) + packet_len;
 800                 buf_ptr += sizeof(packet_len) + packet_len;
 801                 cur_buf_align = (int)buf_ptr - (int)recv_buf;
 802
 803                 if (cur_buf_align & 0x03) {
 804                         int align = 4 - (cur_buf_align & 0x03);
 805
 806                         actual_len -= align;
 807                         buf_ptr += align;
 808                 }
 809         }
 810         return err;
 811 }
 812
 813 static void smsc95xx_halt(struct eth_device *eth)
 814 {
 815         debug("** %s()\n", __func__);
 816 }
 817
 818 static int smsc95xx_write_hwaddr(struct eth_device *eth)
 819 {
 820         struct ueth_data *dev = eth->priv;
 821         struct usb_device *udev = dev->pusb_dev;
 822         struct smsc95xx_private *priv = dev->dev_priv;
 823
 824         return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr);
 825 }
 826
 827 /*
 828  * SMSC probing functions
 829  */
 830 void smsc95xx_eth_before_probe(void)
 831 {
 832         curr_eth_dev = 0;
 833 }
 834
 835 struct smsc95xx_dongle {
 836         unsigned short vendor;
 837         unsigned short product;
 838 };
 839
 840 static const struct smsc95xx_dongle smsc95xx_dongles[] = {
 841         { 0x0424, 0xec00 },     /* LAN9512/LAN9514 Ethernet */
 842         { 0x0424, 0x9500 },     /* LAN9500 Ethernet */
 843         { 0x0424, 0x9730 },     /* LAN9730 Ethernet (HSIC) */
 844         { 0x0424, 0x9900 },     /* SMSC9500 USB Ethernet Device (SAL10) */
 845         { 0x0424, 0x9e00 },     /* LAN9500A Ethernet */
 846         { 0x0000, 0x0000 }      /* END - Do not remove */
 847 };
 848
 849 /* Probe to see if a new device is actually an SMSC device */
 850 int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,
 851                       struct ueth_data *ss)
 852 {
 853         struct usb_interface *iface;
 854         struct usb_interface_descriptor *iface_desc;
 855         int i;
 856
 857         /* let's examine the device now */
 858         iface = &dev->config.if_desc[ifnum];
 859         iface_desc = &dev->config.if_desc[ifnum].desc;
 860
 861         for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) {
 862                 if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor &&
 863                     dev->descriptor.idProduct == smsc95xx_dongles[i].product)
 864                         /* Found a supported dongle */
 865                         break;
 866         }
 867         if (smsc95xx_dongles[i].vendor == 0)
 868                 return 0;
 869
 870         /* At this point, we know we've got a live one */
 871         debug("\n\nUSB Ethernet device detected\n");
 872         memset(ss, '\0', sizeof(struct ueth_data));
 873
 874         /* Initialize the ueth_data structure with some useful info */
 875         ss->ifnum = ifnum;
 876         ss->pusb_dev = dev;
 877         ss->subclass = iface_desc->bInterfaceSubClass;
 878         ss->protocol = iface_desc->bInterfaceProtocol;
 879
 880         /*
 881          * We are expecting a minimum of 3 endpoints - in, out (bulk), and int.
 882          * We will ignore any others.
 883          */
 884         for (i = 0; i < iface_desc->bNumEndpoints; i++) {
 885                 /* is it an BULK endpoint? */
 886                 if ((iface->ep_desc[i].bmAttributes &
 887                      USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
 888                         if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN)
 889                                 ss->ep_in =
 890                                         iface->ep_desc[i].bEndpointAddress &
 891                                         USB_ENDPOINT_NUMBER_MASK;
 892                         else
 893                                 ss->ep_out =
 894                                         iface->ep_desc[i].bEndpointAddress &
 895                                         USB_ENDPOINT_NUMBER_MASK;
 896                 }
 897
 898                 /* is it an interrupt endpoint? */
 899                 if ((iface->ep_desc[i].bmAttributes &
 900                     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
 901                         ss->ep_int = iface->ep_desc[i].bEndpointAddress &
 902                                 USB_ENDPOINT_NUMBER_MASK;
 903                         ss->irqinterval = iface->ep_desc[i].bInterval;
 904                 }
 905         }
 906         debug("Endpoints In %d Out %d Int %d\n",
 907                   ss->ep_in, ss->ep_out, ss->ep_int);
 908
 909         /* Do some basic sanity checks, and bail if we find a problem */
 910         if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
 911             !ss->ep_in || !ss->ep_out || !ss->ep_int) {
 912                 debug("Problems with device\n");
 913                 return 0;
 914         }
 915         dev->privptr = (void *)ss;
 916
 917         /* alloc driver private */
 918         ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private));
 919         if (!ss->dev_priv)
 920                 return 0;
 921
 922         return 1;
 923 }
 924
 925 int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
 926                                 struct eth_device *eth)
 927 {
 928         debug("** %s()\n", __func__);
 929         if (!eth) {
 930                 debug("%s: missing parameter.\n", __func__);
 931                 return 0;
 932         }
 933         sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++);
 934         eth->init = smsc95xx_init;
 935         eth->send = smsc95xx_send;
 936         eth->recv = smsc95xx_recv;
 937         eth->halt = smsc95xx_halt;
 938         eth->write_hwaddr = smsc95xx_write_hwaddr;
 939         eth->priv = ss;
 940         return 1;
 941 }
 942 #endif /* !CONFIG_DM_ETH */
 943
 944 #ifdef CONFIG_DM_ETH
 945 static int smsc95xx_eth_start(struct udevice *dev)
 946 {
 947         struct usb_device *udev = dev_get_parentdata(dev);
 948         struct smsc95xx_private *priv = dev_get_priv(dev);
 949         struct eth_pdata *pdata = dev_get_platdata(dev);
 950
 951         /* Driver-model Ethernet ensures we have this */
 952         priv->have_hwaddr = 1;
 953
 954         return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr);
 955 }
 956
 957 void smsc95xx_eth_stop(struct udevice *dev)
 958 {
 959         debug("** %s()\n", __func__);
 960 }
 961
 962 int smsc95xx_eth_send(struct udevice *dev, void *packet, int length)
 963 {
 964         struct smsc95xx_private *priv = dev_get_priv(dev);
 965
 966         return smsc95xx_send_common(&priv->ueth, packet, length);
 967 }
 968
 969 int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 970 {
 971         struct smsc95xx_private *priv = dev_get_priv(dev);
 972         struct ueth_data *ueth = &priv->ueth;
 973         uint8_t *ptr;
 974         int ret, len;
 975         u32 packet_len;
 976
 977         len = usb_ether_get_rx_bytes(ueth, &ptr);
 978         debug("%s: first try, len=%d\n", __func__, len);
 979         if (!len) {
 980                 if (!(flags & ETH_RECV_CHECK_DEVICE))
 981                         return -EAGAIN;
 982                 ret = usb_ether_receive(ueth, RX_URB_SIZE);
 983                 if (ret == -EAGAIN)
 984                         return ret;
 985
 986                 len = usb_ether_get_rx_bytes(ueth, &ptr);
 987                 debug("%s: second try, len=%d\n", __func__, len);
 988         }
 989
 990         /*
 991          * 1st 4 bytes contain the length of the actual data plus error info.
 992          * Extract data length.
 993          */
 994         if (len < sizeof(packet_len)) {
 995                 debug("Rx: incomplete packet length\n");
 996                 goto err;
 997         }
 998         memcpy(&packet_len, ptr, sizeof(packet_len));
 999         le32_to_cpus(&packet_len);
1000         if (packet_len & RX_STS_ES_) {
1001                 debug("Rx: Error header=%#x", packet_len);
1002                 goto err;
1003         }
1004         packet_len = ((packet_len & RX_STS_FL_) >> 16);
1005
1006         if (packet_len > len - sizeof(packet_len)) {
1007                 debug("Rx: too large packet: %d\n", packet_len);
1008                 goto err;
1009         }
1010
1011         *packetp = ptr + sizeof(packet_len);
1012         return packet_len;
1013
1014 err:
1015         usb_ether_advance_rxbuf(ueth, -1);
1016         return -EINVAL;
1017 }
1018
1019 static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
1020 {
1021         struct smsc95xx_private *priv = dev_get_priv(dev);
1022
1023         packet_len = ALIGN(packet_len, 4);
1024         usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
1025
1026         return 0;
1027 }
1028
1029 int smsc95xx_write_hwaddr(struct udevice *dev)
1030 {
1031         struct usb_device *udev = dev_get_parentdata(dev);
1032         struct eth_pdata *pdata = dev_get_platdata(dev);
1033         struct smsc95xx_private *priv = dev_get_priv(dev);
1034
1035         return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr);
1036 }
1037
1038 static int smsc95xx_eth_probe(struct udevice *dev)
1039 {
1040         struct smsc95xx_private *priv = dev_get_priv(dev);
1041         struct ueth_data *ueth = &priv->ueth;
1042
1043         return usb_ether_register(dev, ueth, RX_URB_SIZE);
1044 }
1045
1046 static const struct eth_ops smsc95xx_eth_ops = {
1047         .start  = smsc95xx_eth_start,
1048         .send   = smsc95xx_eth_send,
1049         .recv   = smsc95xx_eth_recv,
1050         .free_pkt = smsc95xx_free_pkt,
1051         .stop   = smsc95xx_eth_stop,
1052         .write_hwaddr = smsc95xx_write_hwaddr,
1053 };
1054
1055 U_BOOT_DRIVER(smsc95xx_eth) = {
1056         .name   = "smsc95xx_eth",
1057         .id     = UCLASS_ETH,
1058         .probe = smsc95xx_eth_probe,
1059         .ops    = &smsc95xx_eth_ops,
1060         .priv_auto_alloc_size = sizeof(struct smsc95xx_private),
1061         .platdata_auto_alloc_size = sizeof(struct eth_pdata),
1062 };
1063
1064 static const struct usb_device_id smsc95xx_eth_id_table[] = {
1065         { USB_DEVICE(0x05ac, 0x1402) },
1066         { USB_DEVICE(0x0424, 0xec00) }, /* LAN9512/LAN9514 Ethernet */
1067         { USB_DEVICE(0x0424, 0x9500) }, /* LAN9500 Ethernet */
1068         { USB_DEVICE(0x0424, 0x9730) }, /* LAN9730 Ethernet (HSIC) */
1069         { USB_DEVICE(0x0424, 0x9900) }, /* SMSC9500 USB Ethernet (SAL10) */
1070         { USB_DEVICE(0x0424, 0x9e00) }, /* LAN9500A Ethernet */
1071         { }             /* Terminating entry */
1072 };
1073
1074 U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table);
1075 #endif