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[thirdparty/u-boot.git] / drivers / usb / gadget / mv_udc.c
1 /*
2 * Copyright 2011, Marvell Semiconductor Inc.
3 * Lei Wen <leiwen@marvell.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 *
7 * Back ported to the 8xx platform (from the 8260 platform) by
8 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
9 */
10
11 #include <common.h>
12 #include <command.h>
13 #include <config.h>
14 #include <net.h>
15 #include <malloc.h>
16 #include <asm/io.h>
17 #include <linux/types.h>
18 #include <usb/mv_udc.h>
19
20 #if CONFIG_USB_MAX_CONTROLLER_COUNT > 1
21 #error This driver only supports one single controller.
22 #endif
23
24 /*
25 * Check if the system has too long cachelines. If the cachelines are
26 * longer then 128b, the driver will not be able flush/invalidate data
27 * cache over separate QH entries. We use 128b because one QH entry is
28 * 64b long and there are always two QH list entries for each endpoint.
29 */
30 #if ARCH_DMA_MINALIGN > 128
31 #error This driver can not work on systems with caches longer than 128b
32 #endif
33
34 #ifndef DEBUG
35 #define DBG(x...) do {} while (0)
36 #else
37 #define DBG(x...) printf(x)
38 static const char *reqname(unsigned r)
39 {
40 switch (r) {
41 case USB_REQ_GET_STATUS: return "GET_STATUS";
42 case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE";
43 case USB_REQ_SET_FEATURE: return "SET_FEATURE";
44 case USB_REQ_SET_ADDRESS: return "SET_ADDRESS";
45 case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR";
46 case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR";
47 case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION";
48 case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION";
49 case USB_REQ_GET_INTERFACE: return "GET_INTERFACE";
50 case USB_REQ_SET_INTERFACE: return "SET_INTERFACE";
51 default: return "*UNKNOWN*";
52 }
53 }
54 #endif
55
56 static struct usb_endpoint_descriptor ep0_out_desc = {
57 .bLength = sizeof(struct usb_endpoint_descriptor),
58 .bDescriptorType = USB_DT_ENDPOINT,
59 .bEndpointAddress = 0,
60 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
61 };
62
63 static struct usb_endpoint_descriptor ep0_in_desc = {
64 .bLength = sizeof(struct usb_endpoint_descriptor),
65 .bDescriptorType = USB_DT_ENDPOINT,
66 .bEndpointAddress = USB_DIR_IN,
67 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
68 };
69
70 static int mv_pullup(struct usb_gadget *gadget, int is_on);
71 static int mv_ep_enable(struct usb_ep *ep,
72 const struct usb_endpoint_descriptor *desc);
73 static int mv_ep_disable(struct usb_ep *ep);
74 static int mv_ep_queue(struct usb_ep *ep,
75 struct usb_request *req, gfp_t gfp_flags);
76 static struct usb_request *
77 mv_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags);
78 static void mv_ep_free_request(struct usb_ep *ep, struct usb_request *_req);
79
80 static struct usb_gadget_ops mv_udc_ops = {
81 .pullup = mv_pullup,
82 };
83
84 static struct usb_ep_ops mv_ep_ops = {
85 .enable = mv_ep_enable,
86 .disable = mv_ep_disable,
87 .queue = mv_ep_queue,
88 .alloc_request = mv_ep_alloc_request,
89 .free_request = mv_ep_free_request,
90 };
91
92 /* Init values for USB endpoints. */
93 static const struct usb_ep mv_ep_init[2] = {
94 [0] = { /* EP 0 */
95 .maxpacket = 64,
96 .name = "ep0",
97 .ops = &mv_ep_ops,
98 },
99 [1] = { /* EP 1..n */
100 .maxpacket = 512,
101 .name = "ep-",
102 .ops = &mv_ep_ops,
103 },
104 };
105
106 static struct mv_drv controller = {
107 .gadget = {
108 .name = "mv_udc",
109 .ops = &mv_udc_ops,
110 },
111 };
112
113 /**
114 * mv_get_qh() - return queue head for endpoint
115 * @ep_num: Endpoint number
116 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
117 *
118 * This function returns the QH associated with particular endpoint
119 * and it's direction.
120 */
121 static struct ept_queue_head *mv_get_qh(int ep_num, int dir_in)
122 {
123 return &controller.epts[(ep_num * 2) + dir_in];
124 }
125
126 /**
127 * mv_get_qtd() - return queue item for endpoint
128 * @ep_num: Endpoint number
129 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
130 *
131 * This function returns the QH associated with particular endpoint
132 * and it's direction.
133 */
134 static struct ept_queue_item *mv_get_qtd(int ep_num, int dir_in)
135 {
136 return controller.items[(ep_num * 2) + dir_in];
137 }
138
139 /**
140 * mv_flush_qh - flush cache over queue head
141 * @ep_num: Endpoint number
142 *
143 * This function flushes cache over QH for particular endpoint.
144 */
145 static void mv_flush_qh(int ep_num)
146 {
147 struct ept_queue_head *head = mv_get_qh(ep_num, 0);
148 const uint32_t start = (uint32_t)head;
149 const uint32_t end = start + 2 * sizeof(*head);
150
151 flush_dcache_range(start, end);
152 }
153
154 /**
155 * mv_invalidate_qh - invalidate cache over queue head
156 * @ep_num: Endpoint number
157 *
158 * This function invalidates cache over QH for particular endpoint.
159 */
160 static void mv_invalidate_qh(int ep_num)
161 {
162 struct ept_queue_head *head = mv_get_qh(ep_num, 0);
163 uint32_t start = (uint32_t)head;
164 uint32_t end = start + 2 * sizeof(*head);
165
166 invalidate_dcache_range(start, end);
167 }
168
169 /**
170 * mv_flush_qtd - flush cache over queue item
171 * @ep_num: Endpoint number
172 *
173 * This function flushes cache over qTD pair for particular endpoint.
174 */
175 static void mv_flush_qtd(int ep_num)
176 {
177 struct ept_queue_item *item = mv_get_qtd(ep_num, 0);
178 const uint32_t start = (uint32_t)item;
179 const uint32_t end_raw = start + 2 * sizeof(*item);
180 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN);
181
182 flush_dcache_range(start, end);
183 }
184
185 /**
186 * mv_invalidate_qtd - invalidate cache over queue item
187 * @ep_num: Endpoint number
188 *
189 * This function invalidates cache over qTD pair for particular endpoint.
190 */
191 static void mv_invalidate_qtd(int ep_num)
192 {
193 struct ept_queue_item *item = mv_get_qtd(ep_num, 0);
194 const uint32_t start = (uint32_t)item;
195 const uint32_t end_raw = start + 2 * sizeof(*item);
196 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN);
197
198 invalidate_dcache_range(start, end);
199 }
200
201 static struct usb_request *
202 mv_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
203 {
204 struct mv_ep *mv_ep = container_of(ep, struct mv_ep, ep);
205 return &mv_ep->req;
206 }
207
208 static void mv_ep_free_request(struct usb_ep *ep, struct usb_request *_req)
209 {
210 return;
211 }
212
213 static void ep_enable(int num, int in)
214 {
215 struct ept_queue_head *head;
216 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
217 unsigned n;
218 head = mv_get_qh(num, in);
219
220 n = readl(&udc->epctrl[num]);
221 if (in)
222 n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK);
223 else
224 n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
225
226 if (num != 0) {
227 head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE) | CONFIG_ZLT;
228 mv_flush_qh(num);
229 }
230 writel(n, &udc->epctrl[num]);
231 }
232
233 static int mv_ep_enable(struct usb_ep *ep,
234 const struct usb_endpoint_descriptor *desc)
235 {
236 struct mv_ep *mv_ep = container_of(ep, struct mv_ep, ep);
237 int num, in;
238 num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
239 in = (desc->bEndpointAddress & USB_DIR_IN) != 0;
240 ep_enable(num, in);
241 mv_ep->desc = desc;
242 return 0;
243 }
244
245 static int mv_ep_disable(struct usb_ep *ep)
246 {
247 return 0;
248 }
249
250 static int mv_bounce(struct mv_ep *ep)
251 {
252 uint32_t addr = (uint32_t)ep->req.buf;
253 uint32_t ba;
254
255 /* Input buffer address is not aligned. */
256 if (addr & (ARCH_DMA_MINALIGN - 1))
257 goto align;
258
259 /* Input buffer length is not aligned. */
260 if (ep->req.length & (ARCH_DMA_MINALIGN - 1))
261 goto align;
262
263 /* The buffer is well aligned, only flush cache. */
264 ep->b_len = ep->req.length;
265 ep->b_buf = ep->req.buf;
266 goto flush;
267
268 align:
269 /* Use internal buffer for small payloads. */
270 if (ep->req.length <= 64) {
271 ep->b_len = 64;
272 ep->b_buf = ep->b_fast;
273 } else {
274 ep->b_len = roundup(ep->req.length, ARCH_DMA_MINALIGN);
275 ep->b_buf = memalign(ARCH_DMA_MINALIGN, ep->b_len);
276 if (!ep->b_buf)
277 return -ENOMEM;
278 }
279
280 memcpy(ep->b_buf, ep->req.buf, ep->req.length);
281
282 flush:
283 ba = (uint32_t)ep->b_buf;
284 flush_dcache_range(ba, ba + ep->b_len);
285
286 return 0;
287 }
288
289 static void mv_debounce(struct mv_ep *ep)
290 {
291 uint32_t addr = (uint32_t)ep->req.buf;
292 uint32_t ba = (uint32_t)ep->b_buf;
293
294 invalidate_dcache_range(ba, ba + ep->b_len);
295
296 /* Input buffer address is not aligned. */
297 if (addr & (ARCH_DMA_MINALIGN - 1))
298 goto copy;
299
300 /* Input buffer length is not aligned. */
301 if (ep->req.length & (ARCH_DMA_MINALIGN - 1))
302 goto copy;
303
304 /* The buffer is well aligned, only invalidate cache. */
305 return;
306
307 copy:
308 memcpy(ep->req.buf, ep->b_buf, ep->req.length);
309
310 /* Large payloads use allocated buffer, free it. */
311 if (ep->req.length > 64)
312 free(ep->b_buf);
313 }
314
315 static int mv_ep_queue(struct usb_ep *ep,
316 struct usb_request *req, gfp_t gfp_flags)
317 {
318 struct mv_ep *mv_ep = container_of(ep, struct mv_ep, ep);
319 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
320 struct ept_queue_item *item;
321 struct ept_queue_head *head;
322 int bit, num, len, in, ret;
323 num = mv_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
324 in = (mv_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
325 item = mv_get_qtd(num, in);
326 head = mv_get_qh(num, in);
327 len = req->length;
328
329 ret = mv_bounce(mv_ep);
330 if (ret)
331 return ret;
332
333 item->next = TERMINATE;
334 item->info = INFO_BYTES(len) | INFO_IOC | INFO_ACTIVE;
335 item->page0 = (uint32_t)mv_ep->b_buf;
336 item->page1 = ((uint32_t)mv_ep->b_buf & 0xfffff000) + 0x1000;
337
338 head->next = (unsigned) item;
339 head->info = 0;
340
341 DBG("ept%d %s queue len %x, buffer %p\n",
342 num, in ? "in" : "out", len, mv_ep->b_buf);
343
344 if (in)
345 bit = EPT_TX(num);
346 else
347 bit = EPT_RX(num);
348
349 mv_flush_qh(num);
350 mv_flush_qtd(num);
351
352 writel(bit, &udc->epprime);
353
354 return 0;
355 }
356
357 static void handle_ep_complete(struct mv_ep *ep)
358 {
359 struct ept_queue_item *item;
360 int num, in, len;
361 num = ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
362 in = (ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
363 if (num == 0)
364 ep->desc = &ep0_out_desc;
365 item = mv_get_qtd(num, in);
366 mv_invalidate_qtd(num);
367
368 if (item->info & 0xff)
369 printf("EP%d/%s FAIL nfo=%x pg0=%x\n",
370 num, in ? "in" : "out", item->info, item->page0);
371
372 len = (item->info >> 16) & 0x7fff;
373
374 mv_debounce(ep);
375
376 ep->req.length -= len;
377 DBG("ept%d %s complete %x\n",
378 num, in ? "in" : "out", len);
379 ep->req.complete(&ep->ep, &ep->req);
380 if (num == 0) {
381 ep->req.length = 0;
382 usb_ep_queue(&ep->ep, &ep->req, 0);
383 ep->desc = &ep0_in_desc;
384 }
385 }
386
387 #define SETUP(type, request) (((type) << 8) | (request))
388
389 static void handle_setup(void)
390 {
391 struct usb_request *req = &controller.ep[0].req;
392 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
393 struct ept_queue_head *head;
394 struct usb_ctrlrequest r;
395 int status = 0;
396 int num, in, _num, _in, i;
397 char *buf;
398 head = mv_get_qh(0, 0); /* EP0 OUT */
399
400 mv_invalidate_qh(0);
401 memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
402 writel(EPT_RX(0), &udc->epstat);
403 DBG("handle setup %s, %x, %x index %x value %x\n", reqname(r.bRequest),
404 r.bRequestType, r.bRequest, r.wIndex, r.wValue);
405
406 switch (SETUP(r.bRequestType, r.bRequest)) {
407 case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE):
408 _num = r.wIndex & 15;
409 _in = !!(r.wIndex & 0x80);
410
411 if ((r.wValue == 0) && (r.wLength == 0)) {
412 req->length = 0;
413 for (i = 0; i < NUM_ENDPOINTS; i++) {
414 if (!controller.ep[i].desc)
415 continue;
416 num = controller.ep[i].desc->bEndpointAddress
417 & USB_ENDPOINT_NUMBER_MASK;
418 in = (controller.ep[i].desc->bEndpointAddress
419 & USB_DIR_IN) != 0;
420 if ((num == _num) && (in == _in)) {
421 ep_enable(num, in);
422 usb_ep_queue(controller.gadget.ep0,
423 req, 0);
424 break;
425 }
426 }
427 }
428 return;
429
430 case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS):
431 /*
432 * write address delayed (will take effect
433 * after the next IN txn)
434 */
435 writel((r.wValue << 25) | (1 << 24), &udc->devaddr);
436 req->length = 0;
437 usb_ep_queue(controller.gadget.ep0, req, 0);
438 return;
439
440 case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS):
441 req->length = 2;
442 buf = (char *)req->buf;
443 buf[0] = 1 << USB_DEVICE_SELF_POWERED;
444 buf[1] = 0;
445 usb_ep_queue(controller.gadget.ep0, req, 0);
446 return;
447 }
448 /* pass request up to the gadget driver */
449 if (controller.driver)
450 status = controller.driver->setup(&controller.gadget, &r);
451 else
452 status = -ENODEV;
453
454 if (!status)
455 return;
456 DBG("STALL reqname %s type %x value %x, index %x\n",
457 reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex);
458 writel((1<<16) | (1 << 0), &udc->epctrl[0]);
459 }
460
461 static void stop_activity(void)
462 {
463 int i, num, in;
464 struct ept_queue_head *head;
465 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
466 writel(readl(&udc->epcomp), &udc->epcomp);
467 writel(readl(&udc->epstat), &udc->epstat);
468 writel(0xffffffff, &udc->epflush);
469
470 /* error out any pending reqs */
471 for (i = 0; i < NUM_ENDPOINTS; i++) {
472 if (i != 0)
473 writel(0, &udc->epctrl[i]);
474 if (controller.ep[i].desc) {
475 num = controller.ep[i].desc->bEndpointAddress
476 & USB_ENDPOINT_NUMBER_MASK;
477 in = (controller.ep[i].desc->bEndpointAddress
478 & USB_DIR_IN) != 0;
479 head = mv_get_qh(num, in);
480 head->info = INFO_ACTIVE;
481 mv_flush_qh(num);
482 }
483 }
484 }
485
486 void udc_irq(void)
487 {
488 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
489 unsigned n = readl(&udc->usbsts);
490 writel(n, &udc->usbsts);
491 int bit, i, num, in;
492
493 n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI);
494 if (n == 0)
495 return;
496
497 if (n & STS_URI) {
498 DBG("-- reset --\n");
499 stop_activity();
500 }
501 if (n & STS_SLI)
502 DBG("-- suspend --\n");
503
504 if (n & STS_PCI) {
505 DBG("-- portchange --\n");
506 bit = (readl(&udc->portsc) >> 26) & 3;
507 if (bit == 2) {
508 controller.gadget.speed = USB_SPEED_HIGH;
509 for (i = 1; i < NUM_ENDPOINTS && n; i++)
510 if (controller.ep[i].desc)
511 controller.ep[i].ep.maxpacket = 512;
512 } else {
513 controller.gadget.speed = USB_SPEED_FULL;
514 }
515 }
516
517 if (n & STS_UEI)
518 printf("<UEI %x>\n", readl(&udc->epcomp));
519
520 if ((n & STS_UI) || (n & STS_UEI)) {
521 n = readl(&udc->epstat);
522 if (n & EPT_RX(0))
523 handle_setup();
524
525 n = readl(&udc->epcomp);
526 if (n != 0)
527 writel(n, &udc->epcomp);
528
529 for (i = 0; i < NUM_ENDPOINTS && n; i++) {
530 if (controller.ep[i].desc) {
531 num = controller.ep[i].desc->bEndpointAddress
532 & USB_ENDPOINT_NUMBER_MASK;
533 in = (controller.ep[i].desc->bEndpointAddress
534 & USB_DIR_IN) != 0;
535 bit = (in) ? EPT_TX(num) : EPT_RX(num);
536 if (n & bit)
537 handle_ep_complete(&controller.ep[i]);
538 }
539 }
540 }
541 }
542
543 int usb_gadget_handle_interrupts(void)
544 {
545 u32 value;
546 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
547
548 value = readl(&udc->usbsts);
549 if (value)
550 udc_irq();
551
552 return value;
553 }
554
555 static int mv_pullup(struct usb_gadget *gadget, int is_on)
556 {
557 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
558 if (is_on) {
559 /* RESET */
560 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd);
561 udelay(200);
562
563 writel((unsigned)controller.epts, &udc->epinitaddr);
564
565 /* select DEVICE mode */
566 writel(USBMODE_DEVICE, &udc->usbmode);
567
568 writel(0xffffffff, &udc->epflush);
569
570 /* Turn on the USB connection by enabling the pullup resistor */
571 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RUN, &udc->usbcmd);
572 } else {
573 stop_activity();
574 writel(USBCMD_FS2, &udc->usbcmd);
575 udelay(800);
576 if (controller.driver)
577 controller.driver->disconnect(gadget);
578 }
579
580 return 0;
581 }
582
583 void udc_disconnect(void)
584 {
585 struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
586 /* disable pullup */
587 stop_activity();
588 writel(USBCMD_FS2, &udc->usbcmd);
589 udelay(800);
590 if (controller.driver)
591 controller.driver->disconnect(&controller.gadget);
592 }
593
594 static int mvudc_probe(void)
595 {
596 struct ept_queue_head *head;
597 uint8_t *imem;
598 int i;
599
600 const int num = 2 * NUM_ENDPOINTS;
601
602 const int eplist_min_align = 4096;
603 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN);
604 const int eplist_raw_sz = num * sizeof(struct ept_queue_head);
605 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN);
606
607 const int ilist_align = roundup(ARCH_DMA_MINALIGN, 32);
608 const int ilist_ent_raw_sz = 2 * sizeof(struct ept_queue_item);
609 const int ilist_ent_sz = roundup(ilist_ent_raw_sz, ARCH_DMA_MINALIGN);
610 const int ilist_sz = NUM_ENDPOINTS * ilist_ent_sz;
611
612 /* The QH list must be aligned to 4096 bytes. */
613 controller.epts = memalign(eplist_align, eplist_sz);
614 if (!controller.epts)
615 return -ENOMEM;
616 memset(controller.epts, 0, eplist_sz);
617
618 /*
619 * Each qTD item must be 32-byte aligned, each qTD touple must be
620 * cacheline aligned. There are two qTD items for each endpoint and
621 * only one of them is used for the endpoint at time, so we can group
622 * them together.
623 */
624 controller.items_mem = memalign(ilist_align, ilist_sz);
625 if (!controller.items_mem) {
626 free(controller.epts);
627 return -ENOMEM;
628 }
629
630 for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
631 /*
632 * Configure QH for each endpoint. The structure of the QH list
633 * is such that each two subsequent fields, N and N+1 where N is
634 * even, in the QH list represent QH for one endpoint. The Nth
635 * entry represents OUT configuration and the N+1th entry does
636 * represent IN configuration of the endpoint.
637 */
638 head = controller.epts + i;
639 if (i < 2)
640 head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE)
641 | CONFIG_ZLT | CONFIG_IOS;
642 else
643 head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE)
644 | CONFIG_ZLT;
645 head->next = TERMINATE;
646 head->info = 0;
647
648 imem = controller.items_mem + ((i >> 1) * ilist_ent_sz);
649 if (i & 1)
650 imem += sizeof(struct ept_queue_item);
651
652 controller.items[i] = (struct ept_queue_item *)imem;
653
654 if (i & 1) {
655 mv_flush_qh(i - 1);
656 mv_flush_qtd(i - 1);
657 }
658 }
659
660 INIT_LIST_HEAD(&controller.gadget.ep_list);
661
662 /* Init EP 0 */
663 memcpy(&controller.ep[0].ep, &mv_ep_init[0], sizeof(*mv_ep_init));
664 controller.ep[0].desc = &ep0_in_desc;
665 controller.gadget.ep0 = &controller.ep[0].ep;
666 INIT_LIST_HEAD(&controller.gadget.ep0->ep_list);
667
668 /* Init EP 1..n */
669 for (i = 1; i < NUM_ENDPOINTS; i++) {
670 memcpy(&controller.ep[i].ep, &mv_ep_init[1],
671 sizeof(*mv_ep_init));
672 list_add_tail(&controller.ep[i].ep.ep_list,
673 &controller.gadget.ep_list);
674 }
675
676 return 0;
677 }
678
679 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
680 {
681 struct mv_udc *udc;
682 int ret;
683
684 if (!driver)
685 return -EINVAL;
686 if (!driver->bind || !driver->setup || !driver->disconnect)
687 return -EINVAL;
688 if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
689 return -EINVAL;
690
691 ret = usb_lowlevel_init(0, (void **)&controller.ctrl);
692 if (ret)
693 return ret;
694
695 ret = mvudc_probe();
696 if (!ret) {
697 udc = (struct mv_udc *)controller.ctrl->hcor;
698
699 /* select ULPI phy */
700 writel(PTS(PTS_ENABLE) | PFSC, &udc->portsc);
701 }
702
703 ret = driver->bind(&controller.gadget);
704 if (ret) {
705 DBG("driver->bind() returned %d\n", ret);
706 return ret;
707 }
708 controller.driver = driver;
709
710 return 0;
711 }
712
713 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
714 {
715 return 0;
716 }