drivers/usb/host/ehci-exynos.c

   1 /*
   2  * SAMSUNG EXYNOS USB HOST EHCI Controller
   3  *
   4  * Copyright (C) 2012 Samsung Electronics Co.Ltd
   5  *      Vivek Gautam <gautam.vivek@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20  * MA 02110-1301 USA
  21  */
  22
  23 #include <common.h>
  24 #include <fdtdec.h>
  25 #include <libfdt.h>
  26 #include <malloc.h>
  27 #include <usb.h>
  28 #include <asm/arch/cpu.h>
  29 #include <asm/arch/ehci.h>
  30 #include <asm/arch/system.h>
  31 #include <asm/arch/power.h>
  32 #include <asm-generic/errno.h>
  33 #include <linux/compat.h>
  34 #include "ehci.h"
  35
  36 /* Declare global data pointer */
  37 DECLARE_GLOBAL_DATA_PTR;
  38
  39 /**
  40  * Contains pointers to register base addresses
  41  * for the usb controller.
  42  */
  43 struct exynos_ehci {
  44         struct exynos_usb_phy *usb;
  45         unsigned int *hcd;
  46 };
  47
  48 static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
  49 {
  50         unsigned int node;
  51         int depth;
  52
  53         node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_EHCI);
  54         if (node <= 0) {
  55                 debug("EHCI: Can't get device node for ehci\n");
  56                 return -ENODEV;
  57         }
  58
  59         /*
  60          * Get the base address for EHCI controller from the device node
  61          */
  62         exynos->hcd = (unsigned int *)fdtdec_get_addr(blob, node, "reg");
  63         if (exynos->hcd == NULL) {
  64                 debug("Can't get the EHCI register address\n");
  65                 return -ENXIO;
  66         }
  67
  68         depth = 0;
  69         node = fdtdec_next_compatible_subnode(blob, node,
  70                                         COMPAT_SAMSUNG_EXYNOS_USB_PHY, &depth);
  71         if (node <= 0) {
  72                 debug("EHCI: Can't get device node for usb-phy controller\n");
  73                 return -ENODEV;
  74         }
  75
  76         /*
  77          * Get the base address for usbphy from the device node
  78          */
  79         exynos->usb = (struct exynos_usb_phy *)fdtdec_get_addr(blob, node,
  80                                                                 "reg");
  81         if (exynos->usb == NULL) {
  82                 debug("Can't get the usbphy register address\n");
  83                 return -ENXIO;
  84         }
  85
  86         return 0;
  87 }
  88
  89 /* Setup the EHCI host controller. */
  90 static void setup_usb_phy(struct exynos_usb_phy *usb)
  91 {
  92         set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
  93
  94         set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN);
  95
  96         clrbits_le32(&usb->usbphyctrl0,
  97                         HOST_CTRL0_FSEL_MASK |
  98                         HOST_CTRL0_COMMONON_N |
  99                         /* HOST Phy setting */
 100                         HOST_CTRL0_PHYSWRST |
 101                         HOST_CTRL0_PHYSWRSTALL |
 102                         HOST_CTRL0_SIDDQ |
 103                         HOST_CTRL0_FORCESUSPEND |
 104                         HOST_CTRL0_FORCESLEEP);
 105
 106         setbits_le32(&usb->usbphyctrl0,
 107                         /* Setting up the ref freq */
 108                         (CLK_24MHZ << 16) |
 109                         /* HOST Phy setting */
 110                         HOST_CTRL0_LINKSWRST |
 111                         HOST_CTRL0_UTMISWRST);
 112         udelay(10);
 113         clrbits_le32(&usb->usbphyctrl0,
 114                         HOST_CTRL0_LINKSWRST |
 115                         HOST_CTRL0_UTMISWRST);
 116         udelay(20);
 117
 118         /* EHCI Ctrl setting */
 119         setbits_le32(&usb->ehcictrl,
 120                         EHCICTRL_ENAINCRXALIGN |
 121                         EHCICTRL_ENAINCR4 |
 122                         EHCICTRL_ENAINCR8 |
 123                         EHCICTRL_ENAINCR16);
 124 }
 125
 126 /* Reset the EHCI host controller. */
 127 static void reset_usb_phy(struct exynos_usb_phy *usb)
 128 {
 129         /* HOST_PHY reset */
 130         setbits_le32(&usb->usbphyctrl0,
 131                         HOST_CTRL0_PHYSWRST |
 132                         HOST_CTRL0_PHYSWRSTALL |
 133                         HOST_CTRL0_SIDDQ |
 134                         HOST_CTRL0_FORCESUSPEND |
 135                         HOST_CTRL0_FORCESLEEP);
 136
 137         set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
 138 }
 139
 140 /*
 141  * EHCI-initialization
 142  * Create the appropriate control structures to manage
 143  * a new EHCI host controller.
 144  */
 145 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 146 {
 147         struct exynos_ehci *exynos = NULL;
 148
 149         exynos = (struct exynos_ehci *)
 150                         kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
 151         if (!exynos) {
 152                 debug("failed to allocate exynos ehci context\n");
 153                 return -ENOMEM;
 154         }
 155
 156         exynos_usb_parse_dt(gd->fdt_blob, exynos);
 157
 158         setup_usb_phy(exynos->usb);
 159
 160         *hccr = (struct ehci_hccr *)(exynos->hcd);
 161         *hcor = (struct ehci_hcor *)((uint32_t) *hccr
 162                                 + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 163
 164         debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n",
 165                 (uint32_t)*hccr, (uint32_t)*hcor,
 166                 (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 167
 168         kfree(exynos);
 169
 170         return 0;
 171 }
 172
 173 /*
 174  * Destroy the appropriate control structures corresponding
 175  * the EHCI host controller.
 176  */
 177 int ehci_hcd_stop(int index)
 178 {
 179         struct exynos_ehci *exynos = NULL;
 180
 181         exynos = (struct exynos_ehci *)
 182                         kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
 183         if (!exynos) {
 184                 debug("failed to allocate exynos ehci context\n");
 185                 return -ENOMEM;
 186         }
 187
 188         exynos_usb_parse_dt(gd->fdt_blob, exynos);
 189
 190         reset_usb_phy(exynos->usb);
 191
 192         kfree(exynos);
 193
 194         return 0;
 195 }