2 * SAMSUNG EXYNOS USB HOST EHCI Controller
4 * Copyright (C) 2012 Samsung Electronics Co.Ltd
5 * Vivek Gautam <gautam.vivek@samsung.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
25 #include <asm/arch/cpu.h>
26 #include <asm/arch/ehci.h>
27 #include <asm/arch/system.h>
28 #include <asm/arch/power.h>
31 /* Setup the EHCI host controller. */
32 static void setup_usb_phy(struct exynos_usb_phy
*usb
)
34 set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN
);
36 set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN
);
38 clrbits_le32(&usb
->usbphyctrl0
,
39 HOST_CTRL0_FSEL_MASK
|
40 HOST_CTRL0_COMMONON_N
|
41 /* HOST Phy setting */
43 HOST_CTRL0_PHYSWRSTALL
|
45 HOST_CTRL0_FORCESUSPEND
|
46 HOST_CTRL0_FORCESLEEP
);
48 setbits_le32(&usb
->usbphyctrl0
,
49 /* Setting up the ref freq */
51 /* HOST Phy setting */
52 HOST_CTRL0_LINKSWRST
|
53 HOST_CTRL0_UTMISWRST
);
55 clrbits_le32(&usb
->usbphyctrl0
,
56 HOST_CTRL0_LINKSWRST
|
57 HOST_CTRL0_UTMISWRST
);
60 /* EHCI Ctrl setting */
61 setbits_le32(&usb
->ehcictrl
,
62 EHCICTRL_ENAINCRXALIGN
|
68 /* Reset the EHCI host controller. */
69 static void reset_usb_phy(struct exynos_usb_phy
*usb
)
72 setbits_le32(&usb
->usbphyctrl0
,
74 HOST_CTRL0_PHYSWRSTALL
|
76 HOST_CTRL0_FORCESUSPEND
|
77 HOST_CTRL0_FORCESLEEP
);
79 set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE
);
84 * Create the appropriate control structures to manage
85 * a new EHCI host controller.
87 int ehci_hcd_init(int index
, struct ehci_hccr
**hccr
, struct ehci_hcor
**hcor
)
89 struct exynos_usb_phy
*usb
;
91 usb
= (struct exynos_usb_phy
*)samsung_get_base_usb_phy();
94 *hccr
= (struct ehci_hccr
*)samsung_get_base_usb_ehci();
95 *hcor
= (struct ehci_hcor
*)((uint32_t) *hccr
96 + HC_LENGTH(ehci_readl(&(*hccr
)->cr_capbase
)));
98 debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n",
99 (uint32_t)*hccr
, (uint32_t)*hcor
,
100 (uint32_t)HC_LENGTH(ehci_readl(&(*hccr
)->cr_capbase
)));
106 * Destroy the appropriate control structures corresponding
107 * the EHCI host controller.
109 int ehci_hcd_stop(int index
)
111 struct exynos_usb_phy
*usb
;
113 usb
= (struct exynos_usb_phy
*)samsung_get_base_usb_phy();