2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
4 * Interrupt support is added. Now, it has been tested
5 * on ULI1575 chip and works well with USB keyboard.
8 * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
11 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
13 * Note: Much of this code has been derived from Linux 2.4
14 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15 * (C) Copyright 2000-2002 David Brownell
17 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18 * ebenard@eukrea.com - based on s3c24x0's driver
20 * SPDX-License-Identifier: GPL-2.0+
24 * 1 - Read doc/README.generic_usb_ohci
25 * 2 - this driver is intended for use with USB Mass Storage Devices
26 * (BBB) and USB keyboard. There is NO support for Isochronous pipes!
27 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
28 * to activate workaround for bug #41 or this driver will NOT work!
32 #include <asm/byteorder.h>
36 #if defined(CONFIG_PCI_OHCI)
38 #if !defined(CONFIG_PCI_OHCI_DEVNO)
39 #define CONFIG_PCI_OHCI_DEVNO 0
49 #ifdef CONFIG_AT91RM9200
50 #include <asm/arch/hardware.h> /* needed for AT91_USB_HOST_BASE */
53 #if defined(CONFIG_CPU_ARM920T) || \
54 defined(CONFIG_PCI_OHCI) || \
55 defined(CONFIG_SYS_OHCI_USE_NPS)
56 # define OHCI_USE_NPS /* force NoPowerSwitching mode */
59 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
62 #undef OHCI_FILL_TRACE
64 /* For initializing controller (mask in an HCFS mode too) */
65 #define OHCI_CONTROL_INIT \
66 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
68 #ifdef CONFIG_PCI_OHCI
69 static struct pci_device_id ohci_pci_ids
[] = {
70 {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
71 {0x1033, 0x0035}, /* NEC PCI OHCI module ids */
72 {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */
73 /* Please add supported PCI OHCI controller ids here */
78 #ifdef CONFIG_PCI_EHCI_DEVNO
79 static struct pci_device_id ehci_pci_ids
[] = {
80 {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */
81 /* Please add supported PCI EHCI controller ids here */
87 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
89 #define dbg(format, arg...) do {} while (0)
91 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
93 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
95 #define info(format, arg...) do {} while (0)
98 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
99 # define m16_swap(x) cpu_to_be16(x)
100 # define m32_swap(x) cpu_to_be32(x)
102 # define m16_swap(x) cpu_to_le16(x)
103 # define m32_swap(x) cpu_to_le32(x)
104 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
106 /* We really should do proper cache flushing everywhere */
107 #define flush_dcache_buffer(addr, size) \
108 flush_dcache_range((unsigned long)(addr), \
109 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
110 #define invalidate_dcache_buffer(addr, size) \
111 invalidate_dcache_range((unsigned long)(addr), \
112 ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
114 /* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
115 #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
116 #define flush_dcache_td(addr) flush_dcache_buffer(addr, 16)
117 #define flush_dcache_iso_td(addr) flush_dcache_buffer(addr, 32)
118 #define flush_dcache_hcca(addr) flush_dcache_buffer(addr, 256)
119 #define invalidate_dcache_ed(addr) invalidate_dcache_buffer(addr, 16)
120 #define invalidate_dcache_td(addr) invalidate_dcache_buffer(addr, 16)
121 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
122 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
126 * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
127 * them around when building for older boards not yet converted to the dm
128 * just in case (to avoid regressions), for dm this turns them into nops.
130 #define ohci_mdelay(x)
132 #define ohci_mdelay(x) mdelay(x)
135 #ifndef CONFIG_DM_USB
138 /* this must be aligned to a 256 byte boundary */
139 struct ohci_hcca ghcca
[1];
142 /* mapping of the OHCI CC status to error codes */
143 static int cc_to_error
[16] = {
145 /* CRC Error */ USB_ST_CRC_ERR
,
146 /* Bit Stuff */ USB_ST_BIT_ERR
,
147 /* Data Togg */ USB_ST_CRC_ERR
,
148 /* Stall */ USB_ST_STALLED
,
150 /* PIDCheck */ USB_ST_BIT_ERR
,
151 /* UnExpPID */ USB_ST_BIT_ERR
,
152 /* DataOver */ USB_ST_BUF_ERR
,
153 /* DataUnder */ USB_ST_BUF_ERR
,
156 /* BufferOver */ USB_ST_BUF_ERR
,
157 /* BuffUnder */ USB_ST_BUF_ERR
,
162 static const char *cc_to_string
[16] = {
164 "CRC: Last data packet from endpoint contained a CRC error.",
165 "BITSTUFFING: Last data packet from endpoint contained a bit " \
166 "stuffing violation",
167 "DATATOGGLEMISMATCH: Last packet from endpoint had data toggle PID\n" \
168 "that did not match the expected value.",
169 "STALL: TD was moved to the Done Queue because the endpoint returned" \
171 "DEVICENOTRESPONDING: Device did not respond to token (IN) or did\n" \
172 "not provide a handshake (OUT)",
173 "PIDCHECKFAILURE: Check bits on PID from endpoint failed on data PID\n"\
174 "(IN) or handshake (OUT)",
175 "UNEXPECTEDPID: Receive PID was not valid when encountered or PID\n" \
176 "value is not defined.",
177 "DATAOVERRUN: The amount of data returned by the endpoint exceeded\n" \
178 "either the size of the maximum data packet allowed\n" \
179 "from the endpoint (found in MaximumPacketSize field\n" \
180 "of ED) or the remaining buffer size.",
181 "DATAUNDERRUN: The endpoint returned less than MaximumPacketSize\n" \
182 "and that amount was not sufficient to fill the\n" \
186 "BUFFEROVERRUN: During an IN, HC received data from endpoint faster\n" \
187 "than it could be written to system memory",
188 "BUFFERUNDERRUN: During an OUT, HC could not retrieve data from\n" \
189 "system memory fast enough to keep up with data USB " \
191 "NOT ACCESSED: This code is set by software before the TD is placed" \
192 "on a list to be processed by the HC.(1)",
193 "NOT ACCESSED: This code is set by software before the TD is placed" \
194 "on a list to be processed by the HC.(2)",
197 static inline u32
roothub_a(struct ohci
*hc
)
198 { return ohci_readl(&hc
->regs
->roothub
.a
); }
199 static inline u32
roothub_b(struct ohci
*hc
)
200 { return ohci_readl(&hc
->regs
->roothub
.b
); }
201 static inline u32
roothub_status(struct ohci
*hc
)
202 { return ohci_readl(&hc
->regs
->roothub
.status
); }
203 static inline u32
roothub_portstatus(struct ohci
*hc
, int i
)
204 { return ohci_readl(&hc
->regs
->roothub
.portstatus
[i
]); }
206 /* forward declaration */
207 static int hc_interrupt(ohci_t
*ohci
);
208 static void td_submit_job(ohci_t
*ohci
, struct usb_device
*dev
,
209 unsigned long pipe
, void *buffer
, int transfer_len
,
210 struct devrequest
*setup
, urb_priv_t
*urb
,
212 static int ep_link(ohci_t
* ohci
, ed_t
* ed
);
213 static int ep_unlink(ohci_t
* ohci
, ed_t
* ed
);
214 static ed_t
*ep_add_ed(ohci_dev_t
*ohci_dev
, struct usb_device
*usb_dev
,
215 unsigned long pipe
, int interval
, int load
);
217 /*-------------------------------------------------------------------------*/
220 static struct td
*td_alloc(ohci_dev_t
*ohci_dev
, struct usb_device
*usb_dev
)
226 for (i
= 0; i
< NUM_TD
; i
++)
228 if (ohci_dev
->tds
[i
].usb_dev
== NULL
)
230 td
= &ohci_dev
->tds
[i
];
231 td
->usb_dev
= usb_dev
;
239 static inline void ed_free(struct ed
*ed
)
244 /*-------------------------------------------------------------------------*
245 * URB support functions
246 *-------------------------------------------------------------------------*/
248 /* free HCD-private data associated with this URB */
250 static void urb_free_priv(urb_priv_t
*urb
)
256 last
= urb
->length
- 1;
258 for (i
= 0; i
<= last
; i
++) {
269 /*-------------------------------------------------------------------------*/
272 static int sohci_get_current_frame_number(ohci_t
*ohci
);
274 /* debug| print the main components of an URB
275 * small: 0) header + data packets 1) just header */
277 static void pkt_print(ohci_t
*ohci
, urb_priv_t
*purb
, struct usb_device
*dev
,
278 unsigned long pipe
, void *buffer
, int transfer_len
,
279 struct devrequest
*setup
, char *str
, int small
)
281 dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
283 sohci_get_current_frame_number(ohci
),
284 usb_pipedevice(pipe
),
285 usb_pipeendpoint(pipe
),
286 usb_pipeout(pipe
)? 'O': 'I',
287 usb_pipetype(pipe
) < 2 ? \
288 (usb_pipeint(pipe
)? "INTR": "ISOC"): \
289 (usb_pipecontrol(pipe
)? "CTRL": "BULK"),
290 (purb
? purb
->actual_length
: 0),
291 transfer_len
, dev
->status
);
292 #ifdef OHCI_VERBOSE_DEBUG
296 if (usb_pipecontrol(pipe
)) {
297 printf(__FILE__
": cmd(8):");
298 for (i
= 0; i
< 8 ; i
++)
299 printf(" %02x", ((__u8
*) setup
) [i
]);
302 if (transfer_len
> 0 && buffer
) {
303 printf(__FILE__
": data(%d/%d):",
304 (purb
? purb
->actual_length
: 0),
306 len
= usb_pipeout(pipe
)? transfer_len
:
307 (purb
? purb
->actual_length
: 0);
308 for (i
= 0; i
< 16 && i
< len
; i
++)
309 printf(" %02x", ((__u8
*) buffer
) [i
]);
310 printf("%s\n", i
< len
? "...": "");
316 /* just for debugging; prints non-empty branches of the int ed tree
317 * inclusive iso eds */
318 void ep_print_int_eds(ohci_t
*ohci
, char *str
)
322 for (i
= 0; i
< 32; i
++) {
324 ed_p
= &(ohci
->hcca
->int_table
[i
]);
327 invalidate_dcache_ed(ed_p
);
328 printf(__FILE__
": %s branch int %2d(%2x):", str
, i
, i
);
329 while (*ed_p
!= 0 && j
--) {
330 ed_t
*ed
= (ed_t
*)m32_swap(ed_p
);
331 invalidate_dcache_ed(ed
);
332 printf(" ed: %4x;", ed
->hwINFO
);
333 ed_p
= &ed
->hwNextED
;
339 static void ohci_dump_intr_mask(char *label
, __u32 mask
)
341 dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
344 (mask
& OHCI_INTR_MIE
) ? " MIE" : "",
345 (mask
& OHCI_INTR_OC
) ? " OC" : "",
346 (mask
& OHCI_INTR_RHSC
) ? " RHSC" : "",
347 (mask
& OHCI_INTR_FNO
) ? " FNO" : "",
348 (mask
& OHCI_INTR_UE
) ? " UE" : "",
349 (mask
& OHCI_INTR_RD
) ? " RD" : "",
350 (mask
& OHCI_INTR_SF
) ? " SF" : "",
351 (mask
& OHCI_INTR_WDH
) ? " WDH" : "",
352 (mask
& OHCI_INTR_SO
) ? " SO" : ""
356 static void maybe_print_eds(char *label
, __u32 value
)
358 ed_t
*edp
= (ed_t
*)value
;
361 dbg("%s %08x", label
, value
);
362 invalidate_dcache_ed(edp
);
363 dbg("%08x", edp
->hwINFO
);
364 dbg("%08x", edp
->hwTailP
);
365 dbg("%08x", edp
->hwHeadP
);
366 dbg("%08x", edp
->hwNextED
);
370 static char *hcfs2string(int state
)
373 case OHCI_USB_RESET
: return "reset";
374 case OHCI_USB_RESUME
: return "resume";
375 case OHCI_USB_OPER
: return "operational";
376 case OHCI_USB_SUSPEND
: return "suspend";
381 /* dump control and status registers */
382 static void ohci_dump_status(ohci_t
*controller
)
384 struct ohci_regs
*regs
= controller
->regs
;
387 temp
= ohci_readl(®s
->revision
) & 0xff;
389 dbg("spec %d.%d", (temp
>> 4), (temp
& 0x0f));
391 temp
= ohci_readl(®s
->control
);
392 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp
,
393 (temp
& OHCI_CTRL_RWE
) ? " RWE" : "",
394 (temp
& OHCI_CTRL_RWC
) ? " RWC" : "",
395 (temp
& OHCI_CTRL_IR
) ? " IR" : "",
396 hcfs2string(temp
& OHCI_CTRL_HCFS
),
397 (temp
& OHCI_CTRL_BLE
) ? " BLE" : "",
398 (temp
& OHCI_CTRL_CLE
) ? " CLE" : "",
399 (temp
& OHCI_CTRL_IE
) ? " IE" : "",
400 (temp
& OHCI_CTRL_PLE
) ? " PLE" : "",
401 temp
& OHCI_CTRL_CBSR
404 temp
= ohci_readl(®s
->cmdstatus
);
405 dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp
,
406 (temp
& OHCI_SOC
) >> 16,
407 (temp
& OHCI_OCR
) ? " OCR" : "",
408 (temp
& OHCI_BLF
) ? " BLF" : "",
409 (temp
& OHCI_CLF
) ? " CLF" : "",
410 (temp
& OHCI_HCR
) ? " HCR" : ""
413 ohci_dump_intr_mask("intrstatus", ohci_readl(®s
->intrstatus
));
414 ohci_dump_intr_mask("intrenable", ohci_readl(®s
->intrenable
));
416 maybe_print_eds("ed_periodcurrent",
417 ohci_readl(®s
->ed_periodcurrent
));
419 maybe_print_eds("ed_controlhead", ohci_readl(®s
->ed_controlhead
));
420 maybe_print_eds("ed_controlcurrent",
421 ohci_readl(®s
->ed_controlcurrent
));
423 maybe_print_eds("ed_bulkhead", ohci_readl(®s
->ed_bulkhead
));
424 maybe_print_eds("ed_bulkcurrent", ohci_readl(®s
->ed_bulkcurrent
));
426 maybe_print_eds("donehead", ohci_readl(®s
->donehead
));
429 static void ohci_dump_roothub(ohci_t
*controller
, int verbose
)
433 temp
= roothub_a(controller
);
434 ndp
= (temp
& RH_A_NDP
);
435 #ifdef CONFIG_AT91C_PQFP_UHPBUG
436 ndp
= (ndp
== 2) ? 1:0;
439 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp
,
440 ((temp
& RH_A_POTPGT
) >> 24) & 0xff,
441 (temp
& RH_A_NOCP
) ? " NOCP" : "",
442 (temp
& RH_A_OCPM
) ? " OCPM" : "",
443 (temp
& RH_A_DT
) ? " DT" : "",
444 (temp
& RH_A_NPS
) ? " NPS" : "",
445 (temp
& RH_A_PSM
) ? " PSM" : "",
448 temp
= roothub_b(controller
);
449 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
451 (temp
& RH_B_PPCM
) >> 16,
454 temp
= roothub_status(controller
);
455 dbg("roothub.status: %08x%s%s%s%s%s%s",
457 (temp
& RH_HS_CRWE
) ? " CRWE" : "",
458 (temp
& RH_HS_OCIC
) ? " OCIC" : "",
459 (temp
& RH_HS_LPSC
) ? " LPSC" : "",
460 (temp
& RH_HS_DRWE
) ? " DRWE" : "",
461 (temp
& RH_HS_OCI
) ? " OCI" : "",
462 (temp
& RH_HS_LPS
) ? " LPS" : ""
466 for (i
= 0; i
< ndp
; i
++) {
467 temp
= roothub_portstatus(controller
, i
);
468 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
471 (temp
& RH_PS_PRSC
) ? " PRSC" : "",
472 (temp
& RH_PS_OCIC
) ? " OCIC" : "",
473 (temp
& RH_PS_PSSC
) ? " PSSC" : "",
474 (temp
& RH_PS_PESC
) ? " PESC" : "",
475 (temp
& RH_PS_CSC
) ? " CSC" : "",
477 (temp
& RH_PS_LSDA
) ? " LSDA" : "",
478 (temp
& RH_PS_PPS
) ? " PPS" : "",
479 (temp
& RH_PS_PRS
) ? " PRS" : "",
480 (temp
& RH_PS_POCI
) ? " POCI" : "",
481 (temp
& RH_PS_PSS
) ? " PSS" : "",
483 (temp
& RH_PS_PES
) ? " PES" : "",
484 (temp
& RH_PS_CCS
) ? " CCS" : ""
489 static void ohci_dump(ohci_t
*controller
, int verbose
)
491 dbg("OHCI controller usb-%s state", controller
->slot_name
);
493 /* dumps some of the state we know about */
494 ohci_dump_status(controller
);
496 ep_print_int_eds(controller
, "hcca");
497 invalidate_dcache_hcca(controller
->hcca
);
498 dbg("hcca frame #%04x", controller
->hcca
->frame_no
);
499 ohci_dump_roothub(controller
, 1);
503 /*-------------------------------------------------------------------------*
504 * Interface functions (URB)
505 *-------------------------------------------------------------------------*/
507 /* get a transfer request */
509 int sohci_submit_job(ohci_t
*ohci
, ohci_dev_t
*ohci_dev
, urb_priv_t
*urb
,
510 struct devrequest
*setup
)
513 urb_priv_t
*purb_priv
= urb
;
515 struct usb_device
*dev
= urb
->dev
;
516 unsigned long pipe
= urb
->pipe
;
517 void *buffer
= urb
->transfer_buffer
;
518 int transfer_len
= urb
->transfer_buffer_length
;
519 int interval
= urb
->interval
;
521 /* when controller's hung, permit only roothub cleanup attempts
522 * such as powering down ports */
523 if (ohci
->disabled
) {
524 err("sohci_submit_job: EPIPE");
528 /* we're about to begin a new transaction here so mark the
532 /* every endpoint has a ed, locate and fill it */
533 ed
= ep_add_ed(ohci_dev
, dev
, pipe
, interval
, 1);
535 err("sohci_submit_job: ENOMEM");
539 /* for the private part of the URB we need the number of TDs (size) */
540 switch (usb_pipetype(pipe
)) {
541 case PIPE_BULK
: /* one TD for every 4096 Byte */
542 size
= (transfer_len
- 1) / 4096 + 1;
544 case PIPE_CONTROL
:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
545 size
= (transfer_len
== 0)? 2:
546 (transfer_len
- 1) / 4096 + 3;
548 case PIPE_INTERRUPT
: /* 1 TD */
555 if (size
>= (N_URB_TD
- 1)) {
556 err("need %d TDs, only have %d", size
, N_URB_TD
);
559 purb_priv
->pipe
= pipe
;
561 /* fill the private part of the URB */
562 purb_priv
->length
= size
;
564 purb_priv
->actual_length
= 0;
566 /* allocate the TDs */
567 /* note that td[0] was allocated in ep_add_ed */
568 for (i
= 0; i
< size
; i
++) {
569 purb_priv
->td
[i
] = td_alloc(ohci_dev
, dev
);
570 if (!purb_priv
->td
[i
]) {
571 purb_priv
->length
= i
;
572 urb_free_priv(purb_priv
);
573 err("sohci_submit_job: ENOMEM");
578 if (ed
->state
== ED_NEW
|| (ed
->state
& ED_DEL
)) {
579 urb_free_priv(purb_priv
);
580 err("sohci_submit_job: EINVAL");
584 /* link the ed into a chain if is not already */
585 if (ed
->state
!= ED_OPER
)
588 /* fill the TDs and link it to the ed */
589 td_submit_job(ohci
, dev
, pipe
, buffer
, transfer_len
,
590 setup
, purb_priv
, interval
);
595 /*-------------------------------------------------------------------------*/
598 /* tell us the current USB frame number */
599 static int sohci_get_current_frame_number(ohci_t
*ohci
)
601 invalidate_dcache_hcca(ohci
->hcca
);
602 return m16_swap(ohci
->hcca
->frame_no
);
606 /*-------------------------------------------------------------------------*
607 * ED handling functions
608 *-------------------------------------------------------------------------*/
610 /* search for the right branch to insert an interrupt ed into the int tree
611 * do some load ballancing;
612 * returns the branch and
613 * sets the interval to interval = 2^integer (ld (interval)) */
615 static int ep_int_ballance(ohci_t
*ohci
, int interval
, int load
)
619 /* search for the least loaded interrupt endpoint
620 * branch of all 32 branches
622 for (i
= 0; i
< 32; i
++)
623 if (ohci
->ohci_int_load
[branch
] > ohci
->ohci_int_load
[i
])
626 branch
= branch
% interval
;
627 for (i
= branch
; i
< 32; i
+= interval
)
628 ohci
->ohci_int_load
[i
] += load
;
633 /*-------------------------------------------------------------------------*/
635 /* 2^int( ld (inter)) */
637 static int ep_2_n_interval(int inter
)
640 for (i
= 0; ((inter
>> i
) > 1) && (i
< 5); i
++);
644 /*-------------------------------------------------------------------------*/
646 /* the int tree is a binary tree
647 * in order to process it sequentially the indexes of the branches have to
648 * be mapped the mapping reverses the bits of a word of num_bits length */
649 static int ep_rev(int num_bits
, int word
)
653 for (i
= 0; i
< num_bits
; i
++)
654 wout
|= (((word
>> i
) & 1) << (num_bits
- i
- 1));
658 /*-------------------------------------------------------------------------*
659 * ED handling functions
660 *-------------------------------------------------------------------------*/
662 /* link an ed into one of the HC chains */
664 static int ep_link(ohci_t
*ohci
, ed_t
*edi
)
666 volatile ed_t
*ed
= edi
;
675 ed
->int_interval
= 0;
681 if (ohci
->ed_controltail
== NULL
)
682 ohci_writel((uintptr_t)ed
, &ohci
->regs
->ed_controlhead
);
684 ohci
->ed_controltail
->hwNextED
=
685 m32_swap((unsigned long)ed
);
687 ed
->ed_prev
= ohci
->ed_controltail
;
688 if (!ohci
->ed_controltail
&& !ohci
->ed_rm_list
[0] &&
689 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
690 ohci
->hc_control
|= OHCI_CTRL_CLE
;
691 ohci_writel(ohci
->hc_control
, &ohci
->regs
->control
);
693 ohci
->ed_controltail
= edi
;
699 if (ohci
->ed_bulktail
== NULL
)
700 ohci_writel((uintptr_t)ed
, &ohci
->regs
->ed_bulkhead
);
702 ohci
->ed_bulktail
->hwNextED
=
703 m32_swap((unsigned long)ed
);
705 ed
->ed_prev
= ohci
->ed_bulktail
;
706 if (!ohci
->ed_bulktail
&& !ohci
->ed_rm_list
[0] &&
707 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
708 ohci
->hc_control
|= OHCI_CTRL_BLE
;
709 ohci_writel(ohci
->hc_control
, &ohci
->regs
->control
);
711 ohci
->ed_bulktail
= edi
;
716 interval
= ep_2_n_interval(ed
->int_period
);
717 ed
->int_interval
= interval
;
718 int_branch
= ep_int_ballance(ohci
, interval
, load
);
719 ed
->int_branch
= int_branch
;
721 for (i
= 0; i
< ep_rev(6, interval
); i
+= inter
) {
723 for (ed_p
= &(ohci
->hcca
->int_table
[\
724 ep_rev(5, i
) + int_branch
]);
726 (((ed_t
*)ed_p
)->int_interval
>= interval
);
727 ed_p
= &(((ed_t
*)ed_p
)->hwNextED
))
729 ((ed_t
*)ed_p
)->int_interval
);
730 ed
->hwNextED
= *ed_p
;
732 *ed_p
= m32_swap((unsigned long)ed
);
733 flush_dcache_hcca(ohci
->hcca
);
740 /*-------------------------------------------------------------------------*/
742 /* scan the periodic table to find and unlink this ED */
743 static void periodic_unlink(struct ohci
*ohci
, volatile struct ed
*ed
,
744 unsigned index
, unsigned period
)
746 __maybe_unused
unsigned long aligned_ed_p
;
748 for (; index
< NUM_INTS
; index
+= period
) {
749 __u32
*ed_p
= &ohci
->hcca
->int_table
[index
];
751 /* ED might have been unlinked through another path */
753 if (((struct ed
*)(uintptr_t)
754 m32_swap((unsigned long)ed_p
)) == ed
) {
755 *ed_p
= ed
->hwNextED
;
756 aligned_ed_p
= (unsigned long)ed_p
;
757 aligned_ed_p
&= ~(ARCH_DMA_MINALIGN
- 1);
758 flush_dcache_range(aligned_ed_p
,
759 aligned_ed_p
+ ARCH_DMA_MINALIGN
);
762 ed_p
= &(((struct ed
*)(uintptr_t)
763 m32_swap((unsigned long)ed_p
))->hwNextED
);
768 /* unlink an ed from one of the HC chains.
769 * just the link to the ed is unlinked.
770 * the link from the ed still points to another operational ed or 0
771 * so the HC can eventually finish the processing of the unlinked ed */
773 static int ep_unlink(ohci_t
*ohci
, ed_t
*edi
)
775 volatile ed_t
*ed
= edi
;
778 ed
->hwINFO
|= m32_swap(OHCI_ED_SKIP
);
783 if (ed
->ed_prev
== NULL
) {
785 ohci
->hc_control
&= ~OHCI_CTRL_CLE
;
786 ohci_writel(ohci
->hc_control
,
787 &ohci
->regs
->control
);
789 ohci_writel(m32_swap(*((__u32
*)&ed
->hwNextED
)),
790 &ohci
->regs
->ed_controlhead
);
792 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
793 flush_dcache_ed(ed
->ed_prev
);
795 if (ohci
->ed_controltail
== ed
) {
796 ohci
->ed_controltail
= ed
->ed_prev
;
798 ((ed_t
*)(uintptr_t)m32_swap(
799 *((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
804 if (ed
->ed_prev
== NULL
) {
806 ohci
->hc_control
&= ~OHCI_CTRL_BLE
;
807 ohci_writel(ohci
->hc_control
,
808 &ohci
->regs
->control
);
810 ohci_writel(m32_swap(*((__u32
*)&ed
->hwNextED
)),
811 &ohci
->regs
->ed_bulkhead
);
813 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
814 flush_dcache_ed(ed
->ed_prev
);
816 if (ohci
->ed_bulktail
== ed
) {
817 ohci
->ed_bulktail
= ed
->ed_prev
;
819 ((ed_t
*)(uintptr_t)m32_swap(
820 *((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
825 periodic_unlink(ohci
, ed
, 0, 1);
826 for (i
= ed
->int_branch
; i
< 32; i
+= ed
->int_interval
)
827 ohci
->ohci_int_load
[i
] -= ed
->int_load
;
830 ed
->state
= ED_UNLINK
;
834 /*-------------------------------------------------------------------------*/
836 /* add/reinit an endpoint; this should be done once at the
837 * usb_set_configuration command, but the USB stack is a little bit
838 * stateless so we do it at every transaction if the state of the ed
839 * is ED_NEW then a dummy td is added and the state is changed to
840 * ED_UNLINK in all other cases the state is left unchanged the ed
841 * info fields are setted anyway even though most of them should not
844 static ed_t
*ep_add_ed(ohci_dev_t
*ohci_dev
, struct usb_device
*usb_dev
,
845 unsigned long pipe
, int interval
, int load
)
851 ed
= ed_ret
= &ohci_dev
->ed
[(usb_pipeendpoint(pipe
) << 1) |
852 (usb_pipecontrol(pipe
)? 0: usb_pipeout(pipe
))];
854 if ((ed
->state
& ED_DEL
) || (ed
->state
& ED_URB_DEL
)) {
855 err("ep_add_ed: pending delete");
856 /* pending delete request */
860 if (ed
->state
== ED_NEW
) {
861 /* dummy td; end of td list for ed */
862 td
= td_alloc(ohci_dev
, usb_dev
);
863 ed
->hwTailP
= m32_swap((unsigned long)td
);
864 ed
->hwHeadP
= ed
->hwTailP
;
865 ed
->state
= ED_UNLINK
;
866 ed
->type
= usb_pipetype(pipe
);
870 ed
->hwINFO
= m32_swap(usb_pipedevice(pipe
)
871 | usb_pipeendpoint(pipe
) << 7
872 | (usb_pipeisoc(pipe
)? 0x8000: 0)
873 | (usb_pipecontrol(pipe
)? 0: \
874 (usb_pipeout(pipe
)? 0x800: 0x1000))
875 | (usb_dev
->speed
== USB_SPEED_LOW
) << 13
876 | usb_maxpacket(usb_dev
, pipe
) << 16);
878 if (ed
->type
== PIPE_INTERRUPT
&& ed
->state
== ED_UNLINK
) {
879 ed
->int_period
= interval
;
888 /*-------------------------------------------------------------------------*
889 * TD handling functions
890 *-------------------------------------------------------------------------*/
892 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
894 static void td_fill(ohci_t
*ohci
, unsigned int info
,
896 struct usb_device
*dev
, int index
, urb_priv_t
*urb_priv
)
898 volatile td_t
*td
, *td_pt
;
899 #ifdef OHCI_FILL_TRACE
903 if (index
> urb_priv
->length
) {
904 err("index > length");
907 /* use this td as the next dummy */
908 td_pt
= urb_priv
->td
[index
];
910 flush_dcache_td(td_pt
);
912 /* fill the old dummy TD */
913 td
= urb_priv
->td
[index
] =
915 (m32_swap(urb_priv
->ed
->hwTailP
) & ~0xf);
917 td
->ed
= urb_priv
->ed
;
918 td
->next_dl_td
= NULL
;
920 td
->data
= (uintptr_t)data
;
921 #ifdef OHCI_FILL_TRACE
922 if (usb_pipebulk(urb_priv
->pipe
) && usb_pipeout(urb_priv
->pipe
)) {
923 for (i
= 0; i
< len
; i
++)
924 printf("td->data[%d] %#2x ", i
, ((unsigned char *)td
->data
)[i
]);
931 td
->hwINFO
= m32_swap(info
);
932 td
->hwCBP
= m32_swap((unsigned long)data
);
934 td
->hwBE
= m32_swap((unsigned long)(data
+ len
- 1));
938 td
->hwNextTD
= m32_swap((unsigned long)td_pt
);
941 /* append to queue */
942 td
->ed
->hwTailP
= td
->hwNextTD
;
943 flush_dcache_ed(td
->ed
);
946 /*-------------------------------------------------------------------------*/
948 /* prepare all TDs of a transfer */
950 static void td_submit_job(ohci_t
*ohci
, struct usb_device
*dev
,
951 unsigned long pipe
, void *buffer
, int transfer_len
,
952 struct devrequest
*setup
, urb_priv_t
*urb
,
955 int data_len
= transfer_len
;
959 unsigned int toggle
= 0;
961 flush_dcache_buffer(buffer
, data_len
);
963 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
964 * bits for resetting */
965 if (usb_gettoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
))) {
966 toggle
= TD_T_TOGGLE
;
969 usb_settoggle(dev
, usb_pipeendpoint(pipe
),
970 usb_pipeout(pipe
), 1);
978 switch (usb_pipetype(pipe
)) {
980 info
= usb_pipeout(pipe
)?
981 TD_CC
| TD_DP_OUT
: TD_CC
| TD_DP_IN
;
982 while (data_len
> 4096) {
983 td_fill(ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
),
984 data
, 4096, dev
, cnt
, urb
);
985 data
+= 4096; data_len
-= 4096; cnt
++;
987 info
= usb_pipeout(pipe
)?
988 TD_CC
| TD_DP_OUT
: TD_CC
| TD_R
| TD_DP_IN
;
989 td_fill(ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
), data
,
990 data_len
, dev
, cnt
, urb
);
993 if (!ohci
->sleeping
) {
994 /* start bulk list */
995 ohci_writel(OHCI_BLF
, &ohci
->regs
->cmdstatus
);
1001 info
= TD_CC
| TD_DP_SETUP
| TD_T_DATA0
;
1002 flush_dcache_buffer(setup
, 8);
1003 td_fill(ohci
, info
, setup
, 8, dev
, cnt
++, urb
);
1005 /* Optional Data phase */
1007 info
= usb_pipeout(pipe
)?
1008 TD_CC
| TD_R
| TD_DP_OUT
| TD_T_DATA1
:
1009 TD_CC
| TD_R
| TD_DP_IN
| TD_T_DATA1
;
1010 /* NOTE: mishandles transfers >8K, some >4K */
1011 td_fill(ohci
, info
, data
, data_len
, dev
, cnt
++, urb
);
1015 info
= (usb_pipeout(pipe
) || data_len
== 0) ?
1016 TD_CC
| TD_DP_IN
| TD_T_DATA1
:
1017 TD_CC
| TD_DP_OUT
| TD_T_DATA1
;
1018 td_fill(ohci
, info
, data
, 0, dev
, cnt
++, urb
);
1020 if (!ohci
->sleeping
) {
1021 /* start Control list */
1022 ohci_writel(OHCI_CLF
, &ohci
->regs
->cmdstatus
);
1026 case PIPE_INTERRUPT
:
1027 info
= usb_pipeout(urb
->pipe
)?
1028 TD_CC
| TD_DP_OUT
| toggle
:
1029 TD_CC
| TD_R
| TD_DP_IN
| toggle
;
1030 td_fill(ohci
, info
, data
, data_len
, dev
, cnt
++, urb
);
1033 if (urb
->length
!= cnt
)
1034 dbg("TD LENGTH %d != CNT %d", urb
->length
, cnt
);
1037 /*-------------------------------------------------------------------------*
1038 * Done List handling functions
1039 *-------------------------------------------------------------------------*/
1041 /* calculate the transfer length and update the urb */
1043 static void dl_transfer_length(td_t
*td
)
1046 urb_priv_t
*lurb_priv
= td
->ed
->purb
;
1048 tdBE
= m32_swap(td
->hwBE
);
1049 tdCBP
= m32_swap(td
->hwCBP
);
1051 if (!(usb_pipecontrol(lurb_priv
->pipe
) &&
1052 ((td
->index
== 0) || (td
->index
== lurb_priv
->length
- 1)))) {
1055 lurb_priv
->actual_length
+= tdBE
- td
->data
+ 1;
1057 lurb_priv
->actual_length
+= tdCBP
- td
->data
;
1062 /*-------------------------------------------------------------------------*/
1063 static void check_status(td_t
*td_list
)
1065 urb_priv_t
*lurb_priv
= td_list
->ed
->purb
;
1066 int urb_len
= lurb_priv
->length
;
1067 __u32
*phwHeadP
= &td_list
->ed
->hwHeadP
;
1070 cc
= TD_CC_GET(m32_swap(td_list
->hwINFO
));
1072 err(" USB-error: %s (%x)", cc_to_string
[cc
], cc
);
1074 invalidate_dcache_ed(td_list
->ed
);
1075 if (*phwHeadP
& m32_swap(0x1)) {
1077 ((td_list
->index
+ 1) < urb_len
)) {
1079 (lurb_priv
->td
[urb_len
- 1]->hwNextTD
&\
1080 m32_swap(0xfffffff0)) |
1081 (*phwHeadP
& m32_swap(0x2));
1083 lurb_priv
->td_cnt
+= urb_len
-
1086 *phwHeadP
&= m32_swap(0xfffffff2);
1087 flush_dcache_ed(td_list
->ed
);
1092 /* replies to the request have to be on a FIFO basis so
1093 * we reverse the reversed done-list */
1094 static td_t
*dl_reverse_done_list(ohci_t
*ohci
)
1096 uintptr_t td_list_hc
;
1097 td_t
*td_rev
= NULL
;
1098 td_t
*td_list
= NULL
;
1100 invalidate_dcache_hcca(ohci
->hcca
);
1101 td_list_hc
= m32_swap(ohci
->hcca
->done_head
) & 0xfffffff0;
1102 ohci
->hcca
->done_head
= 0;
1103 flush_dcache_hcca(ohci
->hcca
);
1105 while (td_list_hc
) {
1106 td_list
= (td_t
*)td_list_hc
;
1107 invalidate_dcache_td(td_list
);
1108 check_status(td_list
);
1109 td_list
->next_dl_td
= td_rev
;
1111 td_list_hc
= m32_swap(td_list
->hwNextTD
) & 0xfffffff0;
1116 /*-------------------------------------------------------------------------*/
1117 /*-------------------------------------------------------------------------*/
1119 static void finish_urb(ohci_t
*ohci
, urb_priv_t
*urb
, int status
)
1121 if ((status
& (ED_OPER
| ED_UNLINK
)) && (urb
->state
!= URB_DEL
))
1124 dbg("finish_urb: strange.., ED state %x, \n", status
);
1128 * Used to take back a TD from the host controller. This would normally be
1129 * called from within dl_done_list, however it may be called directly if the
1130 * HC no longer sees the TD and it has not appeared on the donelist (after
1131 * two frames). This bug has been observed on ZF Micro systems.
1133 static int takeback_td(ohci_t
*ohci
, td_t
*td_list
)
1139 urb_priv_t
*lurb_priv
;
1140 __u32 tdINFO
, edHeadP
, edTailP
;
1142 invalidate_dcache_td(td_list
);
1143 tdINFO
= m32_swap(td_list
->hwINFO
);
1146 lurb_priv
= ed
->purb
;
1148 dl_transfer_length(td_list
);
1150 lurb_priv
->td_cnt
++;
1152 /* error code of transfer */
1153 cc
= TD_CC_GET(tdINFO
);
1155 err("USB-error: %s (%x)", cc_to_string
[cc
], cc
);
1156 stat
= cc_to_error
[cc
];
1159 /* see if this done list makes for all TD's of current URB,
1160 * and mark the URB finished if so */
1161 if (lurb_priv
->td_cnt
== lurb_priv
->length
)
1162 finish_urb(ohci
, lurb_priv
, ed
->state
);
1164 dbg("dl_done_list: processing TD %x, len %x\n",
1165 lurb_priv
->td_cnt
, lurb_priv
->length
);
1167 if (ed
->state
!= ED_NEW
&& (!usb_pipeint(lurb_priv
->pipe
))) {
1168 invalidate_dcache_ed(ed
);
1169 edHeadP
= m32_swap(ed
->hwHeadP
) & 0xfffffff0;
1170 edTailP
= m32_swap(ed
->hwTailP
);
1172 /* unlink eds if they are not busy */
1173 if ((edHeadP
== edTailP
) && (ed
->state
== ED_OPER
))
1174 ep_unlink(ohci
, ed
);
1179 static int dl_done_list(ohci_t
*ohci
)
1182 td_t
*td_list
= dl_reverse_done_list(ohci
);
1185 td_t
*td_next
= td_list
->next_dl_td
;
1186 stat
= takeback_td(ohci
, td_list
);
1192 /*-------------------------------------------------------------------------*
1194 *-------------------------------------------------------------------------*/
1196 #include <usbroothubdes.h>
1198 /* Hub class-specific descriptor is constructed dynamically */
1200 /*-------------------------------------------------------------------------*/
1202 #define OK(x) len = (x); break
1204 #define WR_RH_STAT(x) {info("WR:status %#8x", (x)); ohci_writel((x), \
1205 &ohci->regs->roothub.status); }
1206 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, \
1207 (x)); ohci_writel((x), &ohci->regs->roothub.portstatus[wIndex-1]); }
1209 #define WR_RH_STAT(x) ohci_writel((x), &ohci->regs->roothub.status)
1210 #define WR_RH_PORTSTAT(x) ohci_writel((x), \
1211 &ohci->regs->roothub.portstatus[wIndex-1])
1213 #define RD_RH_STAT roothub_status(ohci)
1214 #define RD_RH_PORTSTAT roothub_portstatus(ohci, wIndex-1)
1216 /* request to virtual root hub */
1218 int rh_check_port_status(ohci_t
*controller
)
1224 temp
= roothub_a(controller
);
1225 ndp
= (temp
& RH_A_NDP
);
1226 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1227 ndp
= (ndp
== 2) ? 1:0;
1229 for (i
= 0; i
< ndp
; i
++) {
1230 temp
= roothub_portstatus(controller
, i
);
1231 /* check for a device disconnect */
1232 if (((temp
& (RH_PS_PESC
| RH_PS_CSC
)) ==
1233 (RH_PS_PESC
| RH_PS_CSC
)) &&
1234 ((temp
& RH_PS_CCS
) == 0)) {
1242 static int ohci_submit_rh_msg(ohci_t
*ohci
, struct usb_device
*dev
,
1243 unsigned long pipe
, void *buffer
, int transfer_len
,
1244 struct devrequest
*cmd
)
1246 void *data
= buffer
;
1247 int leni
= transfer_len
;
1254 ALLOC_ALIGN_BUFFER(__u8
, databuf
, 16, sizeof(u32
));
1257 pkt_print(ohci
, NULL
, dev
, pipe
, buffer
, transfer_len
,
1258 cmd
, "SUB(rh)", usb_pipein(pipe
));
1262 if (usb_pipeint(pipe
)) {
1263 info("Root-Hub submit IRQ: NOT implemented");
1267 bmRType_bReq
= cmd
->requesttype
| (cmd
->request
<< 8);
1268 wValue
= le16_to_cpu(cmd
->value
);
1269 wIndex
= le16_to_cpu(cmd
->index
);
1270 wLength
= le16_to_cpu(cmd
->length
);
1272 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1273 dev
->devnum
, 8, bmRType_bReq
, wValue
, wIndex
, wLength
);
1275 switch (bmRType_bReq
) {
1276 /* Request Destination:
1277 without flags: Device,
1278 RH_INTERFACE: interface,
1279 RH_ENDPOINT: endpoint,
1280 RH_CLASS means HUB here,
1281 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1285 *(u16
*)databuf
= cpu_to_le16(1);
1287 case RH_GET_STATUS
| RH_INTERFACE
:
1288 *(u16
*)databuf
= cpu_to_le16(0);
1290 case RH_GET_STATUS
| RH_ENDPOINT
:
1291 *(u16
*)databuf
= cpu_to_le16(0);
1293 case RH_GET_STATUS
| RH_CLASS
:
1294 *(u32
*)databuf
= cpu_to_le32(
1295 RD_RH_STAT
& ~(RH_HS_CRWE
| RH_HS_DRWE
));
1297 case RH_GET_STATUS
| RH_OTHER
| RH_CLASS
:
1298 *(u32
*)databuf
= cpu_to_le32(RD_RH_PORTSTAT
);
1301 case RH_CLEAR_FEATURE
| RH_ENDPOINT
:
1303 case (RH_ENDPOINT_STALL
):
1308 case RH_CLEAR_FEATURE
| RH_CLASS
:
1310 case RH_C_HUB_LOCAL_POWER
:
1312 case (RH_C_HUB_OVER_CURRENT
):
1313 WR_RH_STAT(RH_HS_OCIC
);
1318 case RH_CLEAR_FEATURE
| RH_OTHER
| RH_CLASS
:
1320 case (RH_PORT_ENABLE
): WR_RH_PORTSTAT(RH_PS_CCS
); OK(0);
1321 case (RH_PORT_SUSPEND
): WR_RH_PORTSTAT(RH_PS_POCI
); OK(0);
1322 case (RH_PORT_POWER
): WR_RH_PORTSTAT(RH_PS_LSDA
); OK(0);
1323 case (RH_C_PORT_CONNECTION
): WR_RH_PORTSTAT(RH_PS_CSC
); OK(0);
1324 case (RH_C_PORT_ENABLE
): WR_RH_PORTSTAT(RH_PS_PESC
); OK(0);
1325 case (RH_C_PORT_SUSPEND
): WR_RH_PORTSTAT(RH_PS_PSSC
); OK(0);
1326 case (RH_C_PORT_OVER_CURRENT
):WR_RH_PORTSTAT(RH_PS_OCIC
); OK(0);
1327 case (RH_C_PORT_RESET
): WR_RH_PORTSTAT(RH_PS_PRSC
); OK(0);
1331 case RH_SET_FEATURE
| RH_OTHER
| RH_CLASS
:
1333 case (RH_PORT_SUSPEND
):
1334 WR_RH_PORTSTAT(RH_PS_PSS
); OK(0);
1335 case (RH_PORT_RESET
): /* BUG IN HUP CODE *********/
1336 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1337 WR_RH_PORTSTAT(RH_PS_PRS
);
1339 case (RH_PORT_POWER
):
1340 WR_RH_PORTSTAT(RH_PS_PPS
);
1342 case (RH_PORT_ENABLE
): /* BUG IN HUP CODE *********/
1343 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1344 WR_RH_PORTSTAT(RH_PS_PES
);
1349 case RH_SET_ADDRESS
:
1350 ohci
->rh
.devnum
= wValue
;
1353 case RH_GET_DESCRIPTOR
:
1354 switch ((wValue
& 0xff00) >> 8) {
1355 case (0x01): /* device descriptor */
1356 len
= min_t(unsigned int,
1359 sizeof(root_hub_dev_des
),
1361 databuf
= root_hub_dev_des
; OK(len
);
1362 case (0x02): /* configuration descriptor */
1363 len
= min_t(unsigned int,
1366 sizeof(root_hub_config_des
),
1368 databuf
= root_hub_config_des
; OK(len
);
1369 case (0x03): /* string descriptors */
1370 if (wValue
== 0x0300) {
1371 len
= min_t(unsigned int,
1374 sizeof(root_hub_str_index0
),
1376 databuf
= root_hub_str_index0
;
1379 if (wValue
== 0x0301) {
1380 len
= min_t(unsigned int,
1383 sizeof(root_hub_str_index1
),
1385 databuf
= root_hub_str_index1
;
1389 stat
= USB_ST_STALLED
;
1393 case RH_GET_DESCRIPTOR
| RH_CLASS
:
1395 __u32 temp
= roothub_a(ohci
);
1397 databuf
[0] = 9; /* min length; */
1399 databuf
[2] = temp
& RH_A_NDP
;
1400 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1401 databuf
[2] = (databuf
[2] == 2) ? 1 : 0;
1404 if (temp
& RH_A_PSM
) /* per-port power switching? */
1406 if (temp
& RH_A_NOCP
) /* no overcurrent reporting? */
1408 else if (temp
& RH_A_OCPM
)/* per-port overcurrent reporting? */
1412 databuf
[5] = (temp
& RH_A_POTPGT
) >> 24;
1414 temp
= roothub_b(ohci
);
1415 databuf
[7] = temp
& RH_B_DR
;
1416 if (databuf
[2] < 7) {
1420 databuf
[8] = (temp
& RH_B_DR
) >> 8;
1421 databuf
[10] = databuf
[9] = 0xff;
1424 len
= min_t(unsigned int, leni
,
1425 min_t(unsigned int, databuf
[0], wLength
));
1429 case RH_GET_CONFIGURATION
:
1433 case RH_SET_CONFIGURATION
:
1434 WR_RH_STAT(0x10000);
1438 dbg("unsupported root hub command");
1439 stat
= USB_ST_STALLED
;
1443 ohci_dump_roothub(ohci
, 1);
1448 len
= min_t(int, len
, leni
);
1449 if (data
!= databuf
)
1450 memcpy(data
, databuf
, len
);
1455 pkt_print(ohci
, NULL
, dev
, pipe
, buffer
,
1456 transfer_len
, cmd
, "RET(rh)", 0/*usb_pipein(pipe)*/);
1464 /*-------------------------------------------------------------------------*/
1466 static ohci_dev_t
*ohci_get_ohci_dev(ohci_t
*ohci
, int devnum
, int intr
)
1471 return &ohci
->ohci_dev
;
1473 /* First see if we already have an ohci_dev for this dev. */
1474 for (i
= 0; i
< NUM_INT_DEVS
; i
++) {
1475 if (ohci
->int_dev
[i
].devnum
== devnum
)
1476 return &ohci
->int_dev
[i
];
1479 /* If not then find a free one. */
1480 for (i
= 0; i
< NUM_INT_DEVS
; i
++) {
1481 if (ohci
->int_dev
[i
].devnum
== -1) {
1482 ohci
->int_dev
[i
].devnum
= devnum
;
1483 return &ohci
->int_dev
[i
];
1487 printf("ohci: Error out of ohci_devs for interrupt endpoints\n");
1491 /* common code for handling submit messages - used for all but root hub */
1493 static urb_priv_t
*ohci_alloc_urb(struct usb_device
*dev
, unsigned long pipe
,
1494 void *buffer
, int transfer_len
, int interval
)
1498 urb
= calloc(1, sizeof(urb_priv_t
));
1500 printf("ohci: Error out of memory allocating urb\n");
1506 urb
->transfer_buffer
= buffer
;
1507 urb
->transfer_buffer_length
= transfer_len
;
1508 urb
->interval
= interval
;
1513 static int submit_common_msg(ohci_t
*ohci
, struct usb_device
*dev
,
1514 unsigned long pipe
, void *buffer
, int transfer_len
,
1515 struct devrequest
*setup
, int interval
)
1518 int maxsize
= usb_maxpacket(dev
, pipe
);
1521 ohci_dev_t
*ohci_dev
;
1523 urb
= ohci_alloc_urb(dev
, pipe
, buffer
, transfer_len
, interval
);
1528 urb
->actual_length
= 0;
1529 pkt_print(ohci
, urb
, dev
, pipe
, buffer
, transfer_len
,
1530 setup
, "SUB", usb_pipein(pipe
));
1535 err("submit_common_message: pipesize for pipe %lx is zero",
1540 ohci_dev
= ohci_get_ohci_dev(ohci
, dev
->devnum
, usb_pipeint(pipe
));
1544 if (sohci_submit_job(ohci
, ohci_dev
, urb
, setup
) < 0) {
1545 err("sohci_submit_job failed");
1551 /* ohci_dump_status(ohci); */
1554 timeout
= USB_TIMEOUT_MS(pipe
);
1556 /* wait for it to complete */
1558 /* check whether the controller is done */
1559 stat
= hc_interrupt(ohci
);
1561 stat
= USB_ST_CRC_ERR
;
1565 /* NOTE: since we are not interrupt driven in U-Boot and always
1566 * handle only one URB at a time, we cannot assume the
1567 * transaction finished on the first successful return from
1568 * hc_interrupt().. unless the flag for current URB is set,
1569 * meaning that all TD's to/from device got actually
1570 * transferred and processed. If the current URB is not
1571 * finished we need to re-iterate this loop so as
1572 * hc_interrupt() gets called again as there needs to be some
1573 * more TD's to process still */
1574 if ((stat
>= 0) && (stat
!= 0xff) && (urb
->finished
)) {
1575 /* 0xff is returned for an SF-interrupt */
1585 if (!usb_pipeint(pipe
))
1586 err("CTL:TIMEOUT ");
1587 dbg("submit_common_msg: TO status %x\n", stat
);
1589 stat
= USB_ST_CRC_ERR
;
1595 dev
->act_len
= urb
->actual_length
;
1597 if (usb_pipein(pipe
) && dev
->status
== 0 && dev
->act_len
)
1598 invalidate_dcache_buffer(buffer
, dev
->act_len
);
1601 pkt_print(ohci
, urb
, dev
, pipe
, buffer
, transfer_len
,
1602 setup
, "RET(ctlr)", usb_pipein(pipe
));
1610 #define MAX_INT_QUEUESIZE 8
1615 urb_priv_t
*urb
[MAX_INT_QUEUESIZE
];
1618 static struct int_queue
*_ohci_create_int_queue(ohci_t
*ohci
,
1619 struct usb_device
*udev
, unsigned long pipe
, int queuesize
,
1620 int elementsize
, void *buffer
, int interval
)
1622 struct int_queue
*queue
;
1623 ohci_dev_t
*ohci_dev
;
1626 if (queuesize
> MAX_INT_QUEUESIZE
)
1629 ohci_dev
= ohci_get_ohci_dev(ohci
, udev
->devnum
, 1);
1633 queue
= malloc(sizeof(*queue
));
1635 printf("ohci: Error out of memory allocating int queue\n");
1639 for (i
= 0; i
< queuesize
; i
++) {
1640 queue
->urb
[i
] = ohci_alloc_urb(udev
, pipe
,
1641 buffer
+ i
* elementsize
,
1642 elementsize
, interval
);
1646 if (sohci_submit_job(ohci
, ohci_dev
, queue
->urb
[i
], NULL
)) {
1647 printf("ohci: Error submitting int queue job\n");
1648 urb_free_priv(queue
->urb
[i
]);
1653 /* We did not succeed in submitting even 1 urb */
1658 queue
->queuesize
= i
;
1659 queue
->curr_urb
= 0;
1664 static void *_ohci_poll_int_queue(ohci_t
*ohci
, struct usb_device
*udev
,
1665 struct int_queue
*queue
)
1667 if (queue
->curr_urb
== queue
->queuesize
)
1668 return NULL
; /* Queue depleted */
1670 if (hc_interrupt(ohci
) < 0)
1673 if (queue
->urb
[queue
->curr_urb
]->finished
) {
1674 void *ret
= queue
->urb
[queue
->curr_urb
]->transfer_buffer
;
1682 static int _ohci_destroy_int_queue(ohci_t
*ohci
, struct usb_device
*dev
,
1683 struct int_queue
*queue
)
1687 for (i
= 0; i
< queue
->queuesize
; i
++)
1688 urb_free_priv(queue
->urb
[i
]);
1695 #ifndef CONFIG_DM_USB
1696 /* submit routines called from usb.c */
1697 int submit_bulk_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1700 info("submit_bulk_msg");
1701 return submit_common_msg(&gohci
, dev
, pipe
, buffer
, transfer_len
,
1705 int submit_int_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1706 int transfer_len
, int interval
)
1708 info("submit_int_msg");
1709 return submit_common_msg(&gohci
, dev
, pipe
, buffer
, transfer_len
, NULL
,
1713 struct int_queue
*create_int_queue(struct usb_device
*dev
,
1714 unsigned long pipe
, int queuesize
, int elementsize
,
1715 void *buffer
, int interval
)
1717 return _ohci_create_int_queue(&gohci
, dev
, pipe
, queuesize
,
1718 elementsize
, buffer
, interval
);
1721 void *poll_int_queue(struct usb_device
*dev
, struct int_queue
*queue
)
1723 return _ohci_poll_int_queue(&gohci
, dev
, queue
);
1726 int destroy_int_queue(struct usb_device
*dev
, struct int_queue
*queue
)
1728 return _ohci_destroy_int_queue(&gohci
, dev
, queue
);
1732 static int _ohci_submit_control_msg(ohci_t
*ohci
, struct usb_device
*dev
,
1733 unsigned long pipe
, void *buffer
, int transfer_len
,
1734 struct devrequest
*setup
)
1736 int maxsize
= usb_maxpacket(dev
, pipe
);
1738 info("submit_control_msg");
1740 pkt_print(ohci
, NULL
, dev
, pipe
, buffer
, transfer_len
,
1741 setup
, "SUB", usb_pipein(pipe
));
1746 err("submit_control_message: pipesize for pipe %lx is zero",
1750 if (((pipe
>> 8) & 0x7f) == ohci
->rh
.devnum
) {
1752 /* root hub - redirect */
1753 return ohci_submit_rh_msg(ohci
, dev
, pipe
, buffer
,
1754 transfer_len
, setup
);
1757 return submit_common_msg(ohci
, dev
, pipe
, buffer
, transfer_len
,
1761 /*-------------------------------------------------------------------------*
1763 *-------------------------------------------------------------------------*/
1765 /* reset the HC and BUS */
1767 static int hc_reset(ohci_t
*ohci
)
1769 #ifdef CONFIG_PCI_EHCI_DEVNO
1773 int smm_timeout
= 50; /* 0,5 sec */
1775 dbg("%s\n", __FUNCTION__
);
1777 #ifdef CONFIG_PCI_EHCI_DEVNO
1779 * Some multi-function controllers (e.g. ISP1562) allow root hub
1780 * resetting via EHCI registers only.
1782 pdev
= pci_find_devices(ehci_pci_ids
, CONFIG_PCI_EHCI_DEVNO
);
1787 pci_read_config_dword(pdev
, PCI_BASE_ADDRESS_0
, &base
);
1788 base
+= EHCI_USBCMD_OFF
;
1789 ohci_writel(ohci_readl(base
) | EHCI_USBCMD_HCRESET
, base
);
1791 while (ohci_readl(base
) & EHCI_USBCMD_HCRESET
) {
1792 if (timeout
-- <= 0) {
1793 printf("USB RootHub reset timed out!");
1799 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO
);
1801 if (ohci_readl(&ohci
->regs
->control
) & OHCI_CTRL_IR
) {
1802 /* SMM owns the HC, request ownership */
1803 ohci_writel(OHCI_OCR
, &ohci
->regs
->cmdstatus
);
1804 info("USB HC TakeOver from SMM");
1805 while (ohci_readl(&ohci
->regs
->control
) & OHCI_CTRL_IR
) {
1807 if (--smm_timeout
== 0) {
1808 err("USB HC TakeOver failed!");
1814 /* Disable HC interrupts */
1815 ohci_writel(OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
1817 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1819 ohci_readl(&ohci
->regs
->control
));
1821 /* Reset USB (needed by some controllers) */
1822 ohci
->hc_control
= 0;
1823 ohci_writel(ohci
->hc_control
, &ohci
->regs
->control
);
1825 /* HC Reset requires max 10 us delay */
1826 ohci_writel(OHCI_HCR
, &ohci
->regs
->cmdstatus
);
1827 while ((ohci_readl(&ohci
->regs
->cmdstatus
) & OHCI_HCR
) != 0) {
1828 if (--timeout
== 0) {
1829 err("USB HC reset timed out!");
1837 /*-------------------------------------------------------------------------*/
1839 /* Start an OHCI controller, set the BUS operational
1841 * connect the virtual root hub */
1843 static int hc_start(ohci_t
*ohci
)
1846 unsigned int fminterval
;
1850 for (i
= 0; i
< NUM_INT_DEVS
; i
++)
1851 ohci
->int_dev
[i
].devnum
= -1;
1853 /* Tell the controller where the control and bulk lists are
1854 * The lists are empty now. */
1856 ohci_writel(0, &ohci
->regs
->ed_controlhead
);
1857 ohci_writel(0, &ohci
->regs
->ed_bulkhead
);
1859 ohci_writel((uintptr_t)ohci
->hcca
,
1860 &ohci
->regs
->hcca
); /* reset clears this */
1862 fminterval
= 0x2edf;
1863 ohci_writel((fminterval
* 9) / 10, &ohci
->regs
->periodicstart
);
1864 fminterval
|= ((((fminterval
- 210) * 6) / 7) << 16);
1865 ohci_writel(fminterval
, &ohci
->regs
->fminterval
);
1866 ohci_writel(0x628, &ohci
->regs
->lsthresh
);
1868 /* start controller operations */
1869 ohci
->hc_control
= OHCI_CONTROL_INIT
| OHCI_USB_OPER
;
1871 ohci_writel(ohci
->hc_control
, &ohci
->regs
->control
);
1873 /* disable all interrupts */
1874 mask
= (OHCI_INTR_SO
| OHCI_INTR_WDH
| OHCI_INTR_SF
| OHCI_INTR_RD
|
1875 OHCI_INTR_UE
| OHCI_INTR_FNO
| OHCI_INTR_RHSC
|
1876 OHCI_INTR_OC
| OHCI_INTR_MIE
);
1877 ohci_writel(mask
, &ohci
->regs
->intrdisable
);
1878 /* clear all interrupts */
1879 mask
&= ~OHCI_INTR_MIE
;
1880 ohci_writel(mask
, &ohci
->regs
->intrstatus
);
1881 /* Choose the interrupts we care about now - but w/o MIE */
1882 mask
= OHCI_INTR_RHSC
| OHCI_INTR_UE
| OHCI_INTR_WDH
| OHCI_INTR_SO
;
1883 ohci_writel(mask
, &ohci
->regs
->intrenable
);
1886 /* required for AMD-756 and some Mac platforms */
1887 ohci_writel((roothub_a(ohci
) | RH_A_NPS
) & ~RH_A_PSM
,
1888 &ohci
->regs
->roothub
.a
);
1889 ohci_writel(RH_HS_LPSC
, &ohci
->regs
->roothub
.status
);
1890 #endif /* OHCI_USE_NPS */
1892 /* connect the virtual root hub */
1893 ohci
->rh
.devnum
= 0;
1898 /*-------------------------------------------------------------------------*/
1900 /* an interrupt happens */
1902 static int hc_interrupt(ohci_t
*ohci
)
1904 struct ohci_regs
*regs
= ohci
->regs
;
1908 invalidate_dcache_hcca(ohci
->hcca
);
1910 if ((ohci
->hcca
->done_head
!= 0) &&
1911 !(m32_swap(ohci
->hcca
->done_head
) & 0x01)) {
1912 ints
= OHCI_INTR_WDH
;
1914 ints
= ohci_readl(®s
->intrstatus
);
1915 if (ints
== ~(u32
)0) {
1917 err("%s device removed!", ohci
->slot_name
);
1920 ints
&= ohci_readl(®s
->intrenable
);
1922 dbg("hc_interrupt: returning..\n");
1928 /* dbg("Interrupt: %x frame: %x", ints,
1929 le16_to_cpu(ohci->hcca->frame_no)); */
1931 if (ints
& OHCI_INTR_RHSC
)
1934 if (ints
& OHCI_INTR_UE
) {
1936 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1938 /* e.g. due to PCI Master/Target Abort */
1945 /* FIXME: be optimistic, hope that bug won't repeat often. */
1946 /* Make some non-interrupt context restart the controller. */
1947 /* Count and limit the retries though; either hardware or */
1948 /* software errors can go forever... */
1953 if (ints
& OHCI_INTR_WDH
) {
1955 ohci_writel(OHCI_INTR_WDH
, ®s
->intrdisable
);
1956 (void)ohci_readl(®s
->intrdisable
); /* flush */
1957 stat
= dl_done_list(ohci
);
1958 ohci_writel(OHCI_INTR_WDH
, ®s
->intrenable
);
1959 (void)ohci_readl(®s
->intrdisable
); /* flush */
1962 if (ints
& OHCI_INTR_SO
) {
1963 dbg("USB Schedule overrun\n");
1964 ohci_writel(OHCI_INTR_SO
, ®s
->intrenable
);
1968 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1969 if (ints
& OHCI_INTR_SF
) {
1970 unsigned int frame
= m16_swap(ohci
->hcca
->frame_no
) & 1;
1972 ohci_writel(OHCI_INTR_SF
, ®s
->intrdisable
);
1973 if (ohci
->ed_rm_list
[frame
] != NULL
)
1974 ohci_writel(OHCI_INTR_SF
, ®s
->intrenable
);
1978 ohci_writel(ints
, ®s
->intrstatus
);
1982 /*-------------------------------------------------------------------------*/
1984 #ifndef CONFIG_DM_USB
1986 /*-------------------------------------------------------------------------*/
1988 /* De-allocate all resources.. */
1990 static void hc_release_ohci(ohci_t
*ohci
)
1992 dbg("USB HC release ohci usb-%s", ohci
->slot_name
);
1994 if (!ohci
->disabled
)
1998 /*-------------------------------------------------------------------------*/
2001 * low level initalisation routine, called from usb.c
2003 static char ohci_inited
= 0;
2005 int usb_lowlevel_init(int index
, enum usb_init_type init
, void **controller
)
2007 #ifdef CONFIG_PCI_OHCI
2011 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2012 /* cpu dependant init */
2017 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2018 /* board dependant init */
2019 if (board_usb_init(index
, USB_INIT_HOST
))
2022 memset(&gohci
, 0, sizeof(ohci_t
));
2024 /* align the storage */
2025 if ((__u32
)&ghcca
[0] & 0xff) {
2026 err("HCCA not aligned!!");
2029 gohci
.hcca
= &ghcca
[0];
2030 info("aligned ghcca %p", gohci
.hcca
);
2031 memset(gohci
.hcca
, 0, sizeof(struct ohci_hcca
));
2036 #ifdef CONFIG_PCI_OHCI
2037 pdev
= pci_find_devices(ohci_pci_ids
, CONFIG_PCI_OHCI_DEVNO
);
2042 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &vid
);
2043 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &did
);
2044 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
2045 vid
, did
, (pdev
>> 16) & 0xff,
2046 (pdev
>> 11) & 0x1f, (pdev
>> 8) & 0x7);
2047 pci_read_config_dword(pdev
, PCI_BASE_ADDRESS_0
, &base
);
2048 printf("OHCI regs address 0x%08x\n", base
);
2049 gohci
.regs
= (struct ohci_regs
*)base
;
2053 gohci
.regs
= (struct ohci_regs
*)CONFIG_SYS_USB_OHCI_REGS_BASE
;
2057 gohci
.slot_name
= CONFIG_SYS_USB_OHCI_SLOT_NAME
;
2059 if (hc_reset (&gohci
) < 0) {
2060 hc_release_ohci (&gohci
);
2061 err ("can't reset usb-%s", gohci
.slot_name
);
2062 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2063 /* board dependant cleanup */
2064 board_usb_cleanup(index
, USB_INIT_HOST
);
2067 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2068 /* cpu dependant cleanup */
2069 usb_cpu_init_fail();
2074 if (hc_start(&gohci
) < 0) {
2075 err("can't start usb-%s", gohci
.slot_name
);
2076 hc_release_ohci(&gohci
);
2077 /* Initialization failed */
2078 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2079 /* board dependant cleanup */
2083 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2084 /* cpu dependant cleanup */
2091 ohci_dump(&gohci
, 1);
2099 int usb_lowlevel_stop(int index
)
2101 /* this gets called really early - before the controller has */
2102 /* even been initialized! */
2105 /* TODO release any interrupts, etc. */
2106 /* call hc_release_ohci() here ? */
2109 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2110 /* board dependant cleanup */
2111 if (usb_board_stop())
2115 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2116 /* cpu dependant cleanup */
2120 /* This driver is no longer initialised. It needs a new low-level
2121 * init (board/cpu) before it can be used again. */
2126 int submit_control_msg(struct usb_device
*dev
, unsigned long pipe
,
2127 void *buffer
, int transfer_len
, struct devrequest
*setup
)
2129 return _ohci_submit_control_msg(&gohci
, dev
, pipe
, buffer
,
2130 transfer_len
, setup
);
2134 #ifdef CONFIG_DM_USB
2135 static int ohci_submit_control_msg(struct udevice
*dev
, struct usb_device
*udev
,
2136 unsigned long pipe
, void *buffer
, int length
,
2137 struct devrequest
*setup
)
2139 ohci_t
*ohci
= dev_get_priv(usb_get_bus(dev
));
2141 return _ohci_submit_control_msg(ohci
, udev
, pipe
, buffer
,
2145 static int ohci_submit_bulk_msg(struct udevice
*dev
, struct usb_device
*udev
,
2146 unsigned long pipe
, void *buffer
, int length
)
2148 ohci_t
*ohci
= dev_get_priv(usb_get_bus(dev
));
2150 return submit_common_msg(ohci
, udev
, pipe
, buffer
, length
, NULL
, 0);
2153 static int ohci_submit_int_msg(struct udevice
*dev
, struct usb_device
*udev
,
2154 unsigned long pipe
, void *buffer
, int length
,
2157 ohci_t
*ohci
= dev_get_priv(usb_get_bus(dev
));
2159 return submit_common_msg(ohci
, udev
, pipe
, buffer
, length
,
2163 static struct int_queue
*ohci_create_int_queue(struct udevice
*dev
,
2164 struct usb_device
*udev
, unsigned long pipe
, int queuesize
,
2165 int elementsize
, void *buffer
, int interval
)
2167 ohci_t
*ohci
= dev_get_priv(usb_get_bus(dev
));
2169 return _ohci_create_int_queue(ohci
, udev
, pipe
, queuesize
, elementsize
,
2173 static void *ohci_poll_int_queue(struct udevice
*dev
, struct usb_device
*udev
,
2174 struct int_queue
*queue
)
2176 ohci_t
*ohci
= dev_get_priv(usb_get_bus(dev
));
2178 return _ohci_poll_int_queue(ohci
, udev
, queue
);
2181 static int ohci_destroy_int_queue(struct udevice
*dev
, struct usb_device
*udev
,
2182 struct int_queue
*queue
)
2184 ohci_t
*ohci
= dev_get_priv(usb_get_bus(dev
));
2186 return _ohci_destroy_int_queue(ohci
, udev
, queue
);
2189 int ohci_register(struct udevice
*dev
, struct ohci_regs
*regs
)
2191 struct usb_bus_priv
*priv
= dev_get_uclass_priv(dev
);
2192 ohci_t
*ohci
= dev_get_priv(dev
);
2195 priv
->desc_before_addr
= true;
2198 ohci
->hcca
= memalign(256, sizeof(struct ohci_hcca
));
2201 memset(ohci
->hcca
, 0, sizeof(struct ohci_hcca
));
2202 flush_dcache_hcca(ohci
->hcca
);
2204 if (hc_reset(ohci
) < 0)
2207 if (hc_start(ohci
) < 0)
2210 reg
= ohci_readl(®s
->revision
);
2211 printf("USB OHCI %x.%x\n", (reg
>> 4) & 0xf, reg
& 0xf);
2216 int ohci_deregister(struct udevice
*dev
)
2218 ohci_t
*ohci
= dev_get_priv(dev
);
2220 if (hc_reset(ohci
) < 0)
2228 struct dm_usb_ops ohci_usb_ops
= {
2229 .control
= ohci_submit_control_msg
,
2230 .bulk
= ohci_submit_bulk_msg
,
2231 .interrupt
= ohci_submit_int_msg
,
2232 .create_int_queue
= ohci_create_int_queue
,
2233 .poll_int_queue
= ohci_poll_int_queue
,
2234 .destroy_int_queue
= ohci_destroy_int_queue
,