2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
4 * Interrupt support is added. Now, it has been tested
5 * on ULI1575 chip and works well with USB keyboard.
8 * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
11 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
13 * Note: Much of this code has been derived from Linux 2.4
14 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15 * (C) Copyright 2000-2002 David Brownell
17 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18 * ebenard@eukrea.com - based on s3c24x0's driver
20 * See file CREDITS for list of people who contributed to this
23 * This program is free software; you can redistribute it and/or
24 * modify it under the terms of the GNU General Public License as
25 * published by the Free Software Foundation; either version 2 of
26 * the License, or (at your option) any later version.
28 * This program is distributed in the hope that it will be useful,
29 * but WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 * GNU General Public License for more details.
33 * You should have received a copy of the GNU General Public License
34 * along with this program; if not, write to the Free Software
35 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
41 * 1 - Read doc/README.generic_usb_ohci
42 * 2 - this driver is intended for use with USB Mass Storage Devices
43 * (BBB) and USB keyboard. There is NO support for Isochronous pipes!
44 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
45 * to activate workaround for bug #41 or this driver will NOT work!
49 #include <asm/byteorder.h>
51 #if defined(CONFIG_PCI_OHCI)
53 #if !defined(CONFIG_PCI_OHCI_DEVNO)
54 #define CONFIG_PCI_OHCI_DEVNO 0
63 #ifdef CONFIG_AT91RM9200
64 #include <asm/arch/hardware.h> /* needed for AT91_USB_HOST_BASE */
67 #if defined(CONFIG_ARM920T) || \
68 defined(CONFIG_S3C2400) || \
69 defined(CONFIG_S3C2410) || \
70 defined(CONFIG_S3C6400) || \
71 defined(CONFIG_440EP) || \
72 defined(CONFIG_PCI_OHCI) || \
73 defined(CONFIG_MPC5200) || \
74 defined(CONFIG_SYS_OHCI_USE_NPS)
75 # define OHCI_USE_NPS /* force NoPowerSwitching mode */
78 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
81 #undef OHCI_FILL_TRACE
83 /* For initializing controller (mask in an HCFS mode too) */
84 #define OHCI_CONTROL_INIT \
85 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
88 * e.g. PCI controllers need this
90 #ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
91 # define readl(a) __swap_32(*((volatile u32 *)(a)))
92 # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
94 # define readl(a) (*((volatile u32 *)(a)))
95 # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
96 #endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
98 #define min_t(type, x, y) \
99 ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
101 #ifdef CONFIG_PCI_OHCI
102 static struct pci_device_id ohci_pci_ids
[] = {
103 {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
104 {0x1033, 0x0035}, /* NEC PCI OHCI module ids */
105 {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */
106 /* Please add supported PCI OHCI controller ids here */
111 #ifdef CONFIG_PCI_EHCI_DEVNO
112 static struct pci_device_id ehci_pci_ids
[] = {
113 {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */
114 /* Please add supported PCI EHCI controller ids here */
120 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
122 #define dbg(format, arg...) do {} while (0)
124 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
126 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
128 #define info(format, arg...) do {} while (0)
131 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
132 # define m16_swap(x) cpu_to_be16(x)
133 # define m32_swap(x) cpu_to_be32(x)
135 # define m16_swap(x) cpu_to_le16(x)
136 # define m32_swap(x) cpu_to_le32(x)
137 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
141 /* this must be aligned to a 256 byte boundary */
142 struct ohci_hcca ghcca
[1];
143 /* a pointer to the aligned storage */
144 struct ohci_hcca
*phcca
;
145 /* this allocates EDs for all possible endpoints */
146 struct ohci_device ohci_dev
;
147 /* device which was disconnected */
148 struct usb_device
*devgone
;
150 static inline u32
roothub_a(struct ohci
*hc
)
151 { return readl(&hc
->regs
->roothub
.a
); }
152 static inline u32
roothub_b(struct ohci
*hc
)
153 { return readl(&hc
->regs
->roothub
.b
); }
154 static inline u32
roothub_status(struct ohci
*hc
)
155 { return readl(&hc
->regs
->roothub
.status
); }
156 static inline u32
roothub_portstatus(struct ohci
*hc
, int i
)
157 { return readl(&hc
->regs
->roothub
.portstatus
[i
]); }
159 /* forward declaration */
160 static int hc_interrupt(void);
161 static void td_submit_job(struct usb_device
*dev
, unsigned long pipe
,
162 void *buffer
, int transfer_len
,
163 struct devrequest
*setup
, urb_priv_t
*urb
,
166 /*-------------------------------------------------------------------------*
167 * URB support functions
168 *-------------------------------------------------------------------------*/
170 /* free HCD-private data associated with this URB */
172 static void urb_free_priv(urb_priv_t
*urb
)
178 last
= urb
->length
- 1;
180 for (i
= 0; i
<= last
; i
++) {
191 /*-------------------------------------------------------------------------*/
194 static int sohci_get_current_frame_number(struct usb_device
*dev
);
196 /* debug| print the main components of an URB
197 * small: 0) header + data packets 1) just header */
199 static void pkt_print(urb_priv_t
*purb
, struct usb_device
*dev
,
200 unsigned long pipe
, void *buffer
, int transfer_len
,
201 struct devrequest
*setup
, char *str
, int small
)
203 dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
205 sohci_get_current_frame_number(dev
),
206 usb_pipedevice(pipe
),
207 usb_pipeendpoint(pipe
),
208 usb_pipeout(pipe
)? 'O': 'I',
209 usb_pipetype(pipe
) < 2 ? \
210 (usb_pipeint(pipe
)? "INTR": "ISOC"): \
211 (usb_pipecontrol(pipe
)? "CTRL": "BULK"),
212 (purb
? purb
->actual_length
: 0),
213 transfer_len
, dev
->status
);
214 #ifdef OHCI_VERBOSE_DEBUG
218 if (usb_pipecontrol(pipe
)) {
219 printf(__FILE__
": cmd(8):");
220 for (i
= 0; i
< 8 ; i
++)
221 printf(" %02x", ((__u8
*) setup
) [i
]);
224 if (transfer_len
> 0 && buffer
) {
225 printf(__FILE__
": data(%d/%d):",
226 (purb
? purb
->actual_length
: 0),
228 len
= usb_pipeout(pipe
)? transfer_len
:
229 (purb
? purb
->actual_length
: 0);
230 for (i
= 0; i
< 16 && i
< len
; i
++)
231 printf(" %02x", ((__u8
*) buffer
) [i
]);
232 printf("%s\n", i
< len
? "...": "");
238 /* just for debugging; prints non-empty branches of the int ed tree
239 * inclusive iso eds */
240 void ep_print_int_eds(ohci_t
*ohci
, char *str
)
244 for (i
= 0; i
< 32; i
++) {
246 ed_p
= &(ohci
->hcca
->int_table
[i
]);
249 printf(__FILE__
": %s branch int %2d(%2x):", str
, i
, i
);
250 while (*ed_p
!= 0 && j
--) {
251 ed_t
*ed
= (ed_t
*)m32_swap(ed_p
);
252 printf(" ed: %4x;", ed
->hwINFO
);
253 ed_p
= &ed
->hwNextED
;
259 static void ohci_dump_intr_mask(char *label
, __u32 mask
)
261 dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
264 (mask
& OHCI_INTR_MIE
) ? " MIE" : "",
265 (mask
& OHCI_INTR_OC
) ? " OC" : "",
266 (mask
& OHCI_INTR_RHSC
) ? " RHSC" : "",
267 (mask
& OHCI_INTR_FNO
) ? " FNO" : "",
268 (mask
& OHCI_INTR_UE
) ? " UE" : "",
269 (mask
& OHCI_INTR_RD
) ? " RD" : "",
270 (mask
& OHCI_INTR_SF
) ? " SF" : "",
271 (mask
& OHCI_INTR_WDH
) ? " WDH" : "",
272 (mask
& OHCI_INTR_SO
) ? " SO" : ""
276 static void maybe_print_eds(char *label
, __u32 value
)
278 ed_t
*edp
= (ed_t
*)value
;
281 dbg("%s %08x", label
, value
);
282 dbg("%08x", edp
->hwINFO
);
283 dbg("%08x", edp
->hwTailP
);
284 dbg("%08x", edp
->hwHeadP
);
285 dbg("%08x", edp
->hwNextED
);
289 static char *hcfs2string(int state
)
292 case OHCI_USB_RESET
: return "reset";
293 case OHCI_USB_RESUME
: return "resume";
294 case OHCI_USB_OPER
: return "operational";
295 case OHCI_USB_SUSPEND
: return "suspend";
300 /* dump control and status registers */
301 static void ohci_dump_status(ohci_t
*controller
)
303 struct ohci_regs
*regs
= controller
->regs
;
306 temp
= readl(®s
->revision
) & 0xff;
308 dbg("spec %d.%d", (temp
>> 4), (temp
& 0x0f));
310 temp
= readl(®s
->control
);
311 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp
,
312 (temp
& OHCI_CTRL_RWE
) ? " RWE" : "",
313 (temp
& OHCI_CTRL_RWC
) ? " RWC" : "",
314 (temp
& OHCI_CTRL_IR
) ? " IR" : "",
315 hcfs2string(temp
& OHCI_CTRL_HCFS
),
316 (temp
& OHCI_CTRL_BLE
) ? " BLE" : "",
317 (temp
& OHCI_CTRL_CLE
) ? " CLE" : "",
318 (temp
& OHCI_CTRL_IE
) ? " IE" : "",
319 (temp
& OHCI_CTRL_PLE
) ? " PLE" : "",
320 temp
& OHCI_CTRL_CBSR
323 temp
= readl(®s
->cmdstatus
);
324 dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp
,
325 (temp
& OHCI_SOC
) >> 16,
326 (temp
& OHCI_OCR
) ? " OCR" : "",
327 (temp
& OHCI_BLF
) ? " BLF" : "",
328 (temp
& OHCI_CLF
) ? " CLF" : "",
329 (temp
& OHCI_HCR
) ? " HCR" : ""
332 ohci_dump_intr_mask("intrstatus", readl(®s
->intrstatus
));
333 ohci_dump_intr_mask("intrenable", readl(®s
->intrenable
));
335 maybe_print_eds("ed_periodcurrent", readl(®s
->ed_periodcurrent
));
337 maybe_print_eds("ed_controlhead", readl(®s
->ed_controlhead
));
338 maybe_print_eds("ed_controlcurrent", readl(®s
->ed_controlcurrent
));
340 maybe_print_eds("ed_bulkhead", readl(®s
->ed_bulkhead
));
341 maybe_print_eds("ed_bulkcurrent", readl(®s
->ed_bulkcurrent
));
343 maybe_print_eds("donehead", readl(®s
->donehead
));
346 static void ohci_dump_roothub(ohci_t
*controller
, int verbose
)
350 temp
= roothub_a(controller
);
351 ndp
= (temp
& RH_A_NDP
);
352 #ifdef CONFIG_AT91C_PQFP_UHPBUG
353 ndp
= (ndp
== 2) ? 1:0;
356 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp
,
357 ((temp
& RH_A_POTPGT
) >> 24) & 0xff,
358 (temp
& RH_A_NOCP
) ? " NOCP" : "",
359 (temp
& RH_A_OCPM
) ? " OCPM" : "",
360 (temp
& RH_A_DT
) ? " DT" : "",
361 (temp
& RH_A_NPS
) ? " NPS" : "",
362 (temp
& RH_A_PSM
) ? " PSM" : "",
365 temp
= roothub_b(controller
);
366 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
368 (temp
& RH_B_PPCM
) >> 16,
371 temp
= roothub_status(controller
);
372 dbg("roothub.status: %08x%s%s%s%s%s%s",
374 (temp
& RH_HS_CRWE
) ? " CRWE" : "",
375 (temp
& RH_HS_OCIC
) ? " OCIC" : "",
376 (temp
& RH_HS_LPSC
) ? " LPSC" : "",
377 (temp
& RH_HS_DRWE
) ? " DRWE" : "",
378 (temp
& RH_HS_OCI
) ? " OCI" : "",
379 (temp
& RH_HS_LPS
) ? " LPS" : ""
383 for (i
= 0; i
< ndp
; i
++) {
384 temp
= roothub_portstatus(controller
, i
);
385 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
388 (temp
& RH_PS_PRSC
) ? " PRSC" : "",
389 (temp
& RH_PS_OCIC
) ? " OCIC" : "",
390 (temp
& RH_PS_PSSC
) ? " PSSC" : "",
391 (temp
& RH_PS_PESC
) ? " PESC" : "",
392 (temp
& RH_PS_CSC
) ? " CSC" : "",
394 (temp
& RH_PS_LSDA
) ? " LSDA" : "",
395 (temp
& RH_PS_PPS
) ? " PPS" : "",
396 (temp
& RH_PS_PRS
) ? " PRS" : "",
397 (temp
& RH_PS_POCI
) ? " POCI" : "",
398 (temp
& RH_PS_PSS
) ? " PSS" : "",
400 (temp
& RH_PS_PES
) ? " PES" : "",
401 (temp
& RH_PS_CCS
) ? " CCS" : ""
406 static void ohci_dump(ohci_t
*controller
, int verbose
)
408 dbg("OHCI controller usb-%s state", controller
->slot_name
);
410 /* dumps some of the state we know about */
411 ohci_dump_status(controller
);
413 ep_print_int_eds(controller
, "hcca");
414 dbg("hcca frame #%04x", controller
->hcca
->frame_no
);
415 ohci_dump_roothub(controller
, 1);
419 /*-------------------------------------------------------------------------*
420 * Interface functions (URB)
421 *-------------------------------------------------------------------------*/
423 /* get a transfer request */
425 int sohci_submit_job(urb_priv_t
*urb
, struct devrequest
*setup
)
429 urb_priv_t
*purb_priv
= urb
;
431 struct usb_device
*dev
= urb
->dev
;
432 unsigned long pipe
= urb
->pipe
;
433 void *buffer
= urb
->transfer_buffer
;
434 int transfer_len
= urb
->transfer_buffer_length
;
435 int interval
= urb
->interval
;
439 /* when controller's hung, permit only roothub cleanup attempts
440 * such as powering down ports */
441 if (ohci
->disabled
) {
442 err("sohci_submit_job: EPIPE");
446 /* we're about to begin a new transaction here so mark the
450 /* every endpoint has a ed, locate and fill it */
451 ed
= ep_add_ed(dev
, pipe
, interval
, 1);
453 err("sohci_submit_job: ENOMEM");
457 /* for the private part of the URB we need the number of TDs (size) */
458 switch (usb_pipetype(pipe
)) {
459 case PIPE_BULK
: /* one TD for every 4096 Byte */
460 size
= (transfer_len
- 1) / 4096 + 1;
462 case PIPE_CONTROL
:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
463 size
= (transfer_len
== 0)? 2:
464 (transfer_len
- 1) / 4096 + 3;
466 case PIPE_INTERRUPT
: /* 1 TD */
473 if (size
>= (N_URB_TD
- 1)) {
474 err("need %d TDs, only have %d", size
, N_URB_TD
);
477 purb_priv
->pipe
= pipe
;
479 /* fill the private part of the URB */
480 purb_priv
->length
= size
;
482 purb_priv
->actual_length
= 0;
484 /* allocate the TDs */
485 /* note that td[0] was allocated in ep_add_ed */
486 for (i
= 0; i
< size
; i
++) {
487 purb_priv
->td
[i
] = td_alloc(dev
);
488 if (!purb_priv
->td
[i
]) {
489 purb_priv
->length
= i
;
490 urb_free_priv(purb_priv
);
491 err("sohci_submit_job: ENOMEM");
496 if (ed
->state
== ED_NEW
|| (ed
->state
& ED_DEL
)) {
497 urb_free_priv(purb_priv
);
498 err("sohci_submit_job: EINVAL");
502 /* link the ed into a chain if is not already */
503 if (ed
->state
!= ED_OPER
)
506 /* fill the TDs and link it to the ed */
507 td_submit_job(dev
, pipe
, buffer
, transfer_len
,
508 setup
, purb_priv
, interval
);
513 static inline int sohci_return_job(struct ohci
*hc
, urb_priv_t
*urb
)
515 struct ohci_regs
*regs
= hc
->regs
;
517 switch (usb_pipetype(urb
->pipe
)) {
519 /* implicitly requeued */
520 if (urb
->dev
->irq_handle
&&
521 (urb
->dev
->irq_act_len
= urb
->actual_length
)) {
522 writel(OHCI_INTR_WDH
, ®s
->intrenable
);
523 readl(®s
->intrenable
); /* PCI posting flush */
524 urb
->dev
->irq_handle(urb
->dev
);
525 writel(OHCI_INTR_WDH
, ®s
->intrdisable
);
526 readl(®s
->intrdisable
); /* PCI posting flush */
528 urb
->actual_length
= 0;
532 urb
->transfer_buffer
,
533 urb
->transfer_buffer_length
,
547 /*-------------------------------------------------------------------------*/
550 /* tell us the current USB frame number */
552 static int sohci_get_current_frame_number(struct usb_device
*usb_dev
)
554 ohci_t
*ohci
= &gohci
;
556 return m16_swap(ohci
->hcca
->frame_no
);
560 /*-------------------------------------------------------------------------*
561 * ED handling functions
562 *-------------------------------------------------------------------------*/
564 /* search for the right branch to insert an interrupt ed into the int tree
565 * do some load ballancing;
566 * returns the branch and
567 * sets the interval to interval = 2^integer (ld (interval)) */
569 static int ep_int_ballance(ohci_t
*ohci
, int interval
, int load
)
573 /* search for the least loaded interrupt endpoint
574 * branch of all 32 branches
576 for (i
= 0; i
< 32; i
++)
577 if (ohci
->ohci_int_load
[branch
] > ohci
->ohci_int_load
[i
])
580 branch
= branch
% interval
;
581 for (i
= branch
; i
< 32; i
+= interval
)
582 ohci
->ohci_int_load
[i
] += load
;
587 /*-------------------------------------------------------------------------*/
589 /* 2^int( ld (inter)) */
591 static int ep_2_n_interval(int inter
)
594 for (i
= 0; ((inter
>> i
) > 1) && (i
< 5); i
++);
598 /*-------------------------------------------------------------------------*/
600 /* the int tree is a binary tree
601 * in order to process it sequentially the indexes of the branches have to
602 * be mapped the mapping reverses the bits of a word of num_bits length */
603 static int ep_rev(int num_bits
, int word
)
607 for (i
= 0; i
< num_bits
; i
++)
608 wout
|= (((word
>> i
) & 1) << (num_bits
- i
- 1));
612 /*-------------------------------------------------------------------------*
613 * ED handling functions
614 *-------------------------------------------------------------------------*/
616 /* link an ed into one of the HC chains */
618 static int ep_link(ohci_t
*ohci
, ed_t
*edi
)
620 volatile ed_t
*ed
= edi
;
629 ed
->int_interval
= 0;
634 if (ohci
->ed_controltail
== NULL
)
635 writel(ed
, &ohci
->regs
->ed_controlhead
);
637 ohci
->ed_controltail
->hwNextED
=
638 m32_swap((unsigned long)ed
);
640 ed
->ed_prev
= ohci
->ed_controltail
;
641 if (!ohci
->ed_controltail
&& !ohci
->ed_rm_list
[0] &&
642 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
643 ohci
->hc_control
|= OHCI_CTRL_CLE
;
644 writel(ohci
->hc_control
, &ohci
->regs
->control
);
646 ohci
->ed_controltail
= edi
;
651 if (ohci
->ed_bulktail
== NULL
)
652 writel(ed
, &ohci
->regs
->ed_bulkhead
);
654 ohci
->ed_bulktail
->hwNextED
=
655 m32_swap((unsigned long)ed
);
657 ed
->ed_prev
= ohci
->ed_bulktail
;
658 if (!ohci
->ed_bulktail
&& !ohci
->ed_rm_list
[0] &&
659 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
660 ohci
->hc_control
|= OHCI_CTRL_BLE
;
661 writel(ohci
->hc_control
, &ohci
->regs
->control
);
663 ohci
->ed_bulktail
= edi
;
668 interval
= ep_2_n_interval(ed
->int_period
);
669 ed
->int_interval
= interval
;
670 int_branch
= ep_int_ballance(ohci
, interval
, load
);
671 ed
->int_branch
= int_branch
;
673 for (i
= 0; i
< ep_rev(6, interval
); i
+= inter
) {
675 for (ed_p
= &(ohci
->hcca
->int_table
[\
676 ep_rev(5, i
) + int_branch
]);
678 (((ed_t
*)ed_p
)->int_interval
>= interval
);
679 ed_p
= &(((ed_t
*)ed_p
)->hwNextED
))
681 ((ed_t
*)ed_p
)->int_interval
);
682 ed
->hwNextED
= *ed_p
;
683 *ed_p
= m32_swap((unsigned long)ed
);
690 /*-------------------------------------------------------------------------*/
692 /* scan the periodic table to find and unlink this ED */
693 static void periodic_unlink(struct ohci
*ohci
, volatile struct ed
*ed
,
694 unsigned index
, unsigned period
)
696 for (; index
< NUM_INTS
; index
+= period
) {
697 __u32
*ed_p
= &ohci
->hcca
->int_table
[index
];
699 /* ED might have been unlinked through another path */
702 m32_swap((unsigned long)ed_p
)) == ed
) {
703 *ed_p
= ed
->hwNextED
;
706 ed_p
= &(((struct ed
*)
707 m32_swap((unsigned long)ed_p
))->hwNextED
);
712 /* unlink an ed from one of the HC chains.
713 * just the link to the ed is unlinked.
714 * the link from the ed still points to another operational ed or 0
715 * so the HC can eventually finish the processing of the unlinked ed */
717 static int ep_unlink(ohci_t
*ohci
, ed_t
*edi
)
719 volatile ed_t
*ed
= edi
;
722 ed
->hwINFO
|= m32_swap(OHCI_ED_SKIP
);
726 if (ed
->ed_prev
== NULL
) {
728 ohci
->hc_control
&= ~OHCI_CTRL_CLE
;
729 writel(ohci
->hc_control
, &ohci
->regs
->control
);
731 writel(m32_swap(*((__u32
*)&ed
->hwNextED
)),
732 &ohci
->regs
->ed_controlhead
);
734 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
736 if (ohci
->ed_controltail
== ed
) {
737 ohci
->ed_controltail
= ed
->ed_prev
;
740 *((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
745 if (ed
->ed_prev
== NULL
) {
747 ohci
->hc_control
&= ~OHCI_CTRL_BLE
;
748 writel(ohci
->hc_control
, &ohci
->regs
->control
);
750 writel(m32_swap(*((__u32
*)&ed
->hwNextED
)),
751 &ohci
->regs
->ed_bulkhead
);
753 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
755 if (ohci
->ed_bulktail
== ed
) {
756 ohci
->ed_bulktail
= ed
->ed_prev
;
759 *((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
764 periodic_unlink(ohci
, ed
, 0, 1);
765 for (i
= ed
->int_branch
; i
< 32; i
+= ed
->int_interval
)
766 ohci
->ohci_int_load
[i
] -= ed
->int_load
;
769 ed
->state
= ED_UNLINK
;
773 /*-------------------------------------------------------------------------*/
775 /* add/reinit an endpoint; this should be done once at the
776 * usb_set_configuration command, but the USB stack is a little bit
777 * stateless so we do it at every transaction if the state of the ed
778 * is ED_NEW then a dummy td is added and the state is changed to
779 * ED_UNLINK in all other cases the state is left unchanged the ed
780 * info fields are setted anyway even though most of them should not
783 static ed_t
*ep_add_ed(struct usb_device
*usb_dev
, unsigned long pipe
,
784 int interval
, int load
)
790 ed
= ed_ret
= &ohci_dev
.ed
[(usb_pipeendpoint(pipe
) << 1) |
791 (usb_pipecontrol(pipe
)? 0: usb_pipeout(pipe
))];
793 if ((ed
->state
& ED_DEL
) || (ed
->state
& ED_URB_DEL
)) {
794 err("ep_add_ed: pending delete");
795 /* pending delete request */
799 if (ed
->state
== ED_NEW
) {
800 /* dummy td; end of td list for ed */
801 td
= td_alloc(usb_dev
);
802 ed
->hwTailP
= m32_swap((unsigned long)td
);
803 ed
->hwHeadP
= ed
->hwTailP
;
804 ed
->state
= ED_UNLINK
;
805 ed
->type
= usb_pipetype(pipe
);
809 ed
->hwINFO
= m32_swap(usb_pipedevice(pipe
)
810 | usb_pipeendpoint(pipe
) << 7
811 | (usb_pipeisoc(pipe
)? 0x8000: 0)
812 | (usb_pipecontrol(pipe
)? 0: \
813 (usb_pipeout(pipe
)? 0x800: 0x1000))
814 | usb_pipeslow(pipe
) << 13
815 | usb_maxpacket(usb_dev
, pipe
) << 16);
817 if (ed
->type
== PIPE_INTERRUPT
&& ed
->state
== ED_UNLINK
) {
818 ed
->int_period
= interval
;
825 /*-------------------------------------------------------------------------*
826 * TD handling functions
827 *-------------------------------------------------------------------------*/
829 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
831 static void td_fill(ohci_t
*ohci
, unsigned int info
,
833 struct usb_device
*dev
, int index
, urb_priv_t
*urb_priv
)
835 volatile td_t
*td
, *td_pt
;
836 #ifdef OHCI_FILL_TRACE
840 if (index
> urb_priv
->length
) {
841 err("index > length");
844 /* use this td as the next dummy */
845 td_pt
= urb_priv
->td
[index
];
848 /* fill the old dummy TD */
849 td
= urb_priv
->td
[index
] =
850 (td_t
*)(m32_swap(urb_priv
->ed
->hwTailP
) & ~0xf);
852 td
->ed
= urb_priv
->ed
;
853 td
->next_dl_td
= NULL
;
855 td
->data
= (__u32
)data
;
856 #ifdef OHCI_FILL_TRACE
857 if (usb_pipebulk(urb_priv
->pipe
) && usb_pipeout(urb_priv
->pipe
)) {
858 for (i
= 0; i
< len
; i
++)
859 printf("td->data[%d] %#2x ", i
, ((unsigned char *)td
->data
)[i
]);
866 td
->hwINFO
= m32_swap(info
);
867 td
->hwCBP
= m32_swap((unsigned long)data
);
869 td
->hwBE
= m32_swap((unsigned long)(data
+ len
- 1));
873 td
->hwNextTD
= m32_swap((unsigned long)td_pt
);
875 /* append to queue */
876 td
->ed
->hwTailP
= td
->hwNextTD
;
879 /*-------------------------------------------------------------------------*/
881 /* prepare all TDs of a transfer */
883 static void td_submit_job(struct usb_device
*dev
, unsigned long pipe
,
884 void *buffer
, int transfer_len
,
885 struct devrequest
*setup
, urb_priv_t
*urb
,
888 ohci_t
*ohci
= &gohci
;
889 int data_len
= transfer_len
;
893 unsigned int toggle
= 0;
895 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
896 * bits for reseting */
897 if (usb_gettoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
))) {
898 toggle
= TD_T_TOGGLE
;
901 usb_settoggle(dev
, usb_pipeendpoint(pipe
),
902 usb_pipeout(pipe
), 1);
910 switch (usb_pipetype(pipe
)) {
912 info
= usb_pipeout(pipe
)?
913 TD_CC
| TD_DP_OUT
: TD_CC
| TD_DP_IN
;
914 while (data_len
> 4096) {
915 td_fill(ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
),
916 data
, 4096, dev
, cnt
, urb
);
917 data
+= 4096; data_len
-= 4096; cnt
++;
919 info
= usb_pipeout(pipe
)?
920 TD_CC
| TD_DP_OUT
: TD_CC
| TD_R
| TD_DP_IN
;
921 td_fill(ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
), data
,
922 data_len
, dev
, cnt
, urb
);
925 if (!ohci
->sleeping
) {
926 /* start bulk list */
927 writel(OHCI_BLF
, &ohci
->regs
->cmdstatus
);
933 info
= TD_CC
| TD_DP_SETUP
| TD_T_DATA0
;
934 td_fill(ohci
, info
, setup
, 8, dev
, cnt
++, urb
);
936 /* Optional Data phase */
938 info
= usb_pipeout(pipe
)?
939 TD_CC
| TD_R
| TD_DP_OUT
| TD_T_DATA1
:
940 TD_CC
| TD_R
| TD_DP_IN
| TD_T_DATA1
;
941 /* NOTE: mishandles transfers >8K, some >4K */
942 td_fill(ohci
, info
, data
, data_len
, dev
, cnt
++, urb
);
946 info
= usb_pipeout(pipe
)?
947 TD_CC
| TD_DP_IN
| TD_T_DATA1
:
948 TD_CC
| TD_DP_OUT
| TD_T_DATA1
;
949 td_fill(ohci
, info
, data
, 0, dev
, cnt
++, urb
);
951 if (!ohci
->sleeping
) {
952 /* start Control list */
953 writel(OHCI_CLF
, &ohci
->regs
->cmdstatus
);
958 info
= usb_pipeout(urb
->pipe
)?
959 TD_CC
| TD_DP_OUT
| toggle
:
960 TD_CC
| TD_R
| TD_DP_IN
| toggle
;
961 td_fill(ohci
, info
, data
, data_len
, dev
, cnt
++, urb
);
964 if (urb
->length
!= cnt
)
965 dbg("TD LENGTH %d != CNT %d", urb
->length
, cnt
);
968 /*-------------------------------------------------------------------------*
969 * Done List handling functions
970 *-------------------------------------------------------------------------*/
972 /* calculate the transfer length and update the urb */
974 static void dl_transfer_length(td_t
*td
)
976 __u32 tdINFO
, tdBE
, tdCBP
;
977 urb_priv_t
*lurb_priv
= td
->ed
->purb
;
979 tdINFO
= m32_swap(td
->hwINFO
);
980 tdBE
= m32_swap(td
->hwBE
);
981 tdCBP
= m32_swap(td
->hwCBP
);
983 if (!(usb_pipecontrol(lurb_priv
->pipe
) &&
984 ((td
->index
== 0) || (td
->index
== lurb_priv
->length
- 1)))) {
987 lurb_priv
->actual_length
+= tdBE
- td
->data
+ 1;
989 lurb_priv
->actual_length
+= tdCBP
- td
->data
;
994 /*-------------------------------------------------------------------------*/
995 static void check_status(td_t
*td_list
)
997 urb_priv_t
*lurb_priv
= td_list
->ed
->purb
;
998 int urb_len
= lurb_priv
->length
;
999 __u32
*phwHeadP
= &td_list
->ed
->hwHeadP
;
1002 cc
= TD_CC_GET(m32_swap(td_list
->hwINFO
));
1004 err(" USB-error: %s (%x)", cc_to_string
[cc
], cc
);
1006 if (*phwHeadP
& m32_swap(0x1)) {
1008 ((td_list
->index
+ 1) < urb_len
)) {
1010 (lurb_priv
->td
[urb_len
- 1]->hwNextTD
&\
1011 m32_swap(0xfffffff0)) |
1012 (*phwHeadP
& m32_swap(0x2));
1014 lurb_priv
->td_cnt
+= urb_len
-
1017 *phwHeadP
&= m32_swap(0xfffffff2);
1019 #ifdef CONFIG_MPC5200
1020 td_list
->hwNextTD
= 0;
1025 /* replies to the request have to be on a FIFO basis so
1026 * we reverse the reversed done-list */
1027 static td_t
*dl_reverse_done_list(ohci_t
*ohci
)
1030 td_t
*td_rev
= NULL
;
1031 td_t
*td_list
= NULL
;
1033 td_list_hc
= m32_swap(ohci
->hcca
->done_head
) & 0xfffffff0;
1034 ohci
->hcca
->done_head
= 0;
1036 while (td_list_hc
) {
1037 td_list
= (td_t
*)td_list_hc
;
1038 check_status(td_list
);
1039 td_list
->next_dl_td
= td_rev
;
1041 td_list_hc
= m32_swap(td_list
->hwNextTD
) & 0xfffffff0;
1046 /*-------------------------------------------------------------------------*/
1047 /*-------------------------------------------------------------------------*/
1049 static void finish_urb(ohci_t
*ohci
, urb_priv_t
*urb
, int status
)
1051 if ((status
& (ED_OPER
| ED_UNLINK
)) && (urb
->state
!= URB_DEL
))
1052 urb
->finished
= sohci_return_job(ohci
, urb
);
1054 dbg("finish_urb: strange.., ED state %x, \n", status
);
1058 * Used to take back a TD from the host controller. This would normally be
1059 * called from within dl_done_list, however it may be called directly if the
1060 * HC no longer sees the TD and it has not appeared on the donelist (after
1061 * two frames). This bug has been observed on ZF Micro systems.
1063 static int takeback_td(ohci_t
*ohci
, td_t
*td_list
)
1069 urb_priv_t
*lurb_priv
;
1070 __u32 tdINFO
, edHeadP
, edTailP
;
1072 tdINFO
= m32_swap(td_list
->hwINFO
);
1075 lurb_priv
= ed
->purb
;
1077 dl_transfer_length(td_list
);
1079 lurb_priv
->td_cnt
++;
1081 /* error code of transfer */
1082 cc
= TD_CC_GET(tdINFO
);
1084 err("USB-error: %s (%x)", cc_to_string
[cc
], cc
);
1085 stat
= cc_to_error
[cc
];
1088 /* see if this done list makes for all TD's of current URB,
1089 * and mark the URB finished if so */
1090 if (lurb_priv
->td_cnt
== lurb_priv
->length
)
1091 finish_urb(ohci
, lurb_priv
, ed
->state
);
1093 dbg("dl_done_list: processing TD %x, len %x\n",
1094 lurb_priv
->td_cnt
, lurb_priv
->length
);
1096 if (ed
->state
!= ED_NEW
&& (!usb_pipeint(lurb_priv
->pipe
))) {
1097 edHeadP
= m32_swap(ed
->hwHeadP
) & 0xfffffff0;
1098 edTailP
= m32_swap(ed
->hwTailP
);
1100 /* unlink eds if they are not busy */
1101 if ((edHeadP
== edTailP
) && (ed
->state
== ED_OPER
))
1102 ep_unlink(ohci
, ed
);
1107 static int dl_done_list(ohci_t
*ohci
)
1110 td_t
*td_list
= dl_reverse_done_list(ohci
);
1113 td_t
*td_next
= td_list
->next_dl_td
;
1114 stat
= takeback_td(ohci
, td_list
);
1120 /*-------------------------------------------------------------------------*
1122 *-------------------------------------------------------------------------*/
1124 /* Device descriptor */
1125 static __u8 root_hub_dev_des
[] =
1127 0x12, /* __u8 bLength; */
1128 0x01, /* __u8 bDescriptorType; Device */
1129 0x10, /* __u16 bcdUSB; v1.1 */
1131 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
1132 0x00, /* __u8 bDeviceSubClass; */
1133 0x00, /* __u8 bDeviceProtocol; */
1134 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
1135 0x00, /* __u16 idVendor; */
1137 0x00, /* __u16 idProduct; */
1139 0x00, /* __u16 bcdDevice; */
1141 0x00, /* __u8 iManufacturer; */
1142 0x01, /* __u8 iProduct; */
1143 0x00, /* __u8 iSerialNumber; */
1144 0x01 /* __u8 bNumConfigurations; */
1147 /* Configuration descriptor */
1148 static __u8 root_hub_config_des
[] =
1150 0x09, /* __u8 bLength; */
1151 0x02, /* __u8 bDescriptorType; Configuration */
1152 0x19, /* __u16 wTotalLength; */
1154 0x01, /* __u8 bNumInterfaces; */
1155 0x01, /* __u8 bConfigurationValue; */
1156 0x00, /* __u8 iConfiguration; */
1157 0x40, /* __u8 bmAttributes;
1158 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1159 0x00, /* __u8 MaxPower; */
1162 0x09, /* __u8 if_bLength; */
1163 0x04, /* __u8 if_bDescriptorType; Interface */
1164 0x00, /* __u8 if_bInterfaceNumber; */
1165 0x00, /* __u8 if_bAlternateSetting; */
1166 0x01, /* __u8 if_bNumEndpoints; */
1167 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
1168 0x00, /* __u8 if_bInterfaceSubClass; */
1169 0x00, /* __u8 if_bInterfaceProtocol; */
1170 0x00, /* __u8 if_iInterface; */
1173 0x07, /* __u8 ep_bLength; */
1174 0x05, /* __u8 ep_bDescriptorType; Endpoint */
1175 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
1176 0x03, /* __u8 ep_bmAttributes; Interrupt */
1177 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1179 0xff /* __u8 ep_bInterval; 255 ms */
1182 static unsigned char root_hub_str_index0
[] =
1184 0x04, /* __u8 bLength; */
1185 0x03, /* __u8 bDescriptorType; String-descriptor */
1186 0x09, /* __u8 lang ID */
1187 0x04, /* __u8 lang ID */
1190 static unsigned char root_hub_str_index1
[] =
1192 28, /* __u8 bLength; */
1193 0x03, /* __u8 bDescriptorType; String-descriptor */
1194 'O', /* __u8 Unicode */
1195 0, /* __u8 Unicode */
1196 'H', /* __u8 Unicode */
1197 0, /* __u8 Unicode */
1198 'C', /* __u8 Unicode */
1199 0, /* __u8 Unicode */
1200 'I', /* __u8 Unicode */
1201 0, /* __u8 Unicode */
1202 ' ', /* __u8 Unicode */
1203 0, /* __u8 Unicode */
1204 'R', /* __u8 Unicode */
1205 0, /* __u8 Unicode */
1206 'o', /* __u8 Unicode */
1207 0, /* __u8 Unicode */
1208 'o', /* __u8 Unicode */
1209 0, /* __u8 Unicode */
1210 't', /* __u8 Unicode */
1211 0, /* __u8 Unicode */
1212 ' ', /* __u8 Unicode */
1213 0, /* __u8 Unicode */
1214 'H', /* __u8 Unicode */
1215 0, /* __u8 Unicode */
1216 'u', /* __u8 Unicode */
1217 0, /* __u8 Unicode */
1218 'b', /* __u8 Unicode */
1219 0, /* __u8 Unicode */
1222 /* Hub class-specific descriptor is constructed dynamically */
1224 /*-------------------------------------------------------------------------*/
1226 #define OK(x) len = (x); break
1228 #define WR_RH_STAT(x) {info("WR:status %#8x", (x)); writel((x), \
1229 &gohci.regs->roothub.status); }
1230 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, \
1231 (x)); writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
1233 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
1234 #define WR_RH_PORTSTAT(x) writel((x), \
1235 &gohci.regs->roothub.portstatus[wIndex-1])
1237 #define RD_RH_STAT roothub_status(&gohci)
1238 #define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
1240 /* request to virtual root hub */
1242 int rh_check_port_status(ohci_t
*controller
)
1248 temp
= roothub_a(controller
);
1249 ndp
= (temp
& RH_A_NDP
);
1250 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1251 ndp
= (ndp
== 2) ? 1:0;
1253 for (i
= 0; i
< ndp
; i
++) {
1254 temp
= roothub_portstatus(controller
, i
);
1255 /* check for a device disconnect */
1256 if (((temp
& (RH_PS_PESC
| RH_PS_CSC
)) ==
1257 (RH_PS_PESC
| RH_PS_CSC
)) &&
1258 ((temp
& RH_PS_CCS
) == 0)) {
1266 static int ohci_submit_rh_msg(struct usb_device
*dev
, unsigned long pipe
,
1267 void *buffer
, int transfer_len
, struct devrequest
*cmd
)
1269 void *data
= buffer
;
1270 int leni
= transfer_len
;
1274 __u8
*data_buf
= (__u8
*)datab
;
1281 pkt_print(NULL
, dev
, pipe
, buffer
, transfer_len
,
1282 cmd
, "SUB(rh)", usb_pipein(pipe
));
1286 if (usb_pipeint(pipe
)) {
1287 info("Root-Hub submit IRQ: NOT implemented");
1291 bmRType_bReq
= cmd
->requesttype
| (cmd
->request
<< 8);
1292 wValue
= le16_to_cpu(cmd
->value
);
1293 wIndex
= le16_to_cpu(cmd
->index
);
1294 wLength
= le16_to_cpu(cmd
->length
);
1296 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1297 dev
->devnum
, 8, bmRType_bReq
, wValue
, wIndex
, wLength
);
1299 switch (bmRType_bReq
) {
1300 /* Request Destination:
1301 without flags: Device,
1302 RH_INTERFACE: interface,
1303 RH_ENDPOINT: endpoint,
1304 RH_CLASS means HUB here,
1305 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1309 *(__u16
*) data_buf
= cpu_to_le16(1);
1311 case RH_GET_STATUS
| RH_INTERFACE
:
1312 *(__u16
*) data_buf
= cpu_to_le16(0);
1314 case RH_GET_STATUS
| RH_ENDPOINT
:
1315 *(__u16
*) data_buf
= cpu_to_le16(0);
1317 case RH_GET_STATUS
| RH_CLASS
:
1318 *(__u32
*) data_buf
= cpu_to_le32(
1319 RD_RH_STAT
& ~(RH_HS_CRWE
| RH_HS_DRWE
));
1321 case RH_GET_STATUS
| RH_OTHER
| RH_CLASS
:
1322 *(__u32
*) data_buf
= cpu_to_le32(RD_RH_PORTSTAT
);
1325 case RH_CLEAR_FEATURE
| RH_ENDPOINT
:
1327 case (RH_ENDPOINT_STALL
):
1332 case RH_CLEAR_FEATURE
| RH_CLASS
:
1334 case RH_C_HUB_LOCAL_POWER
:
1336 case (RH_C_HUB_OVER_CURRENT
):
1337 WR_RH_STAT(RH_HS_OCIC
);
1342 case RH_CLEAR_FEATURE
| RH_OTHER
| RH_CLASS
:
1344 case (RH_PORT_ENABLE
): WR_RH_PORTSTAT(RH_PS_CCS
); OK(0);
1345 case (RH_PORT_SUSPEND
): WR_RH_PORTSTAT(RH_PS_POCI
); OK(0);
1346 case (RH_PORT_POWER
): WR_RH_PORTSTAT(RH_PS_LSDA
); OK(0);
1347 case (RH_C_PORT_CONNECTION
): WR_RH_PORTSTAT(RH_PS_CSC
); OK(0);
1348 case (RH_C_PORT_ENABLE
): WR_RH_PORTSTAT(RH_PS_PESC
); OK(0);
1349 case (RH_C_PORT_SUSPEND
): WR_RH_PORTSTAT(RH_PS_PSSC
); OK(0);
1350 case (RH_C_PORT_OVER_CURRENT
):WR_RH_PORTSTAT(RH_PS_OCIC
); OK(0);
1351 case (RH_C_PORT_RESET
): WR_RH_PORTSTAT(RH_PS_PRSC
); OK(0);
1355 case RH_SET_FEATURE
| RH_OTHER
| RH_CLASS
:
1357 case (RH_PORT_SUSPEND
):
1358 WR_RH_PORTSTAT(RH_PS_PSS
); OK(0);
1359 case (RH_PORT_RESET
): /* BUG IN HUP CODE *********/
1360 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1361 WR_RH_PORTSTAT(RH_PS_PRS
);
1363 case (RH_PORT_POWER
):
1364 WR_RH_PORTSTAT(RH_PS_PPS
);
1367 case (RH_PORT_ENABLE
): /* BUG IN HUP CODE *********/
1368 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1369 WR_RH_PORTSTAT(RH_PS_PES
);
1374 case RH_SET_ADDRESS
:
1375 gohci
.rh
.devnum
= wValue
;
1378 case RH_GET_DESCRIPTOR
:
1379 switch ((wValue
& 0xff00) >> 8) {
1380 case (0x01): /* device descriptor */
1381 len
= min_t(unsigned int,
1384 sizeof(root_hub_dev_des
),
1386 data_buf
= root_hub_dev_des
; OK(len
);
1387 case (0x02): /* configuration descriptor */
1388 len
= min_t(unsigned int,
1391 sizeof(root_hub_config_des
),
1393 data_buf
= root_hub_config_des
; OK(len
);
1394 case (0x03): /* string descriptors */
1395 if (wValue
== 0x0300) {
1396 len
= min_t(unsigned int,
1399 sizeof(root_hub_str_index0
),
1401 data_buf
= root_hub_str_index0
;
1404 if (wValue
== 0x0301) {
1405 len
= min_t(unsigned int,
1408 sizeof(root_hub_str_index1
),
1410 data_buf
= root_hub_str_index1
;
1414 stat
= USB_ST_STALLED
;
1418 case RH_GET_DESCRIPTOR
| RH_CLASS
:
1420 __u32 temp
= roothub_a(&gohci
);
1422 data_buf
[0] = 9; /* min length; */
1423 data_buf
[1] = 0x29;
1424 data_buf
[2] = temp
& RH_A_NDP
;
1425 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1426 data_buf
[2] = (data_buf
[2] == 2) ? 1:0;
1429 if (temp
& RH_A_PSM
) /* per-port power switching? */
1430 data_buf
[3] |= 0x1;
1431 if (temp
& RH_A_NOCP
) /* no overcurrent reporting? */
1432 data_buf
[3] |= 0x10;
1433 else if (temp
& RH_A_OCPM
)/* per-port overcurrent reporting? */
1434 data_buf
[3] |= 0x8;
1436 /* corresponds to data_buf[4-7] */
1438 data_buf
[5] = (temp
& RH_A_POTPGT
) >> 24;
1439 temp
= roothub_b(&gohci
);
1440 data_buf
[7] = temp
& RH_B_DR
;
1441 if (data_buf
[2] < 7) {
1442 data_buf
[8] = 0xff;
1445 data_buf
[8] = (temp
& RH_B_DR
) >> 8;
1446 data_buf
[10] = data_buf
[9] = 0xff;
1449 len
= min_t(unsigned int, leni
,
1450 min_t(unsigned int, data_buf
[0], wLength
));
1454 case RH_GET_CONFIGURATION
: *(__u8
*) data_buf
= 0x01; OK(1);
1456 case RH_SET_CONFIGURATION
: WR_RH_STAT(0x10000); OK(0);
1459 dbg("unsupported root hub command");
1460 stat
= USB_ST_STALLED
;
1464 ohci_dump_roothub(&gohci
, 1);
1469 len
= min_t(int, len
, leni
);
1470 if (data
!= data_buf
)
1471 memcpy(data
, data_buf
, len
);
1476 pkt_print(NULL
, dev
, pipe
, buffer
,
1477 transfer_len
, cmd
, "RET(rh)", 0/*usb_pipein(pipe)*/);
1485 /*-------------------------------------------------------------------------*/
1487 /* common code for handling submit messages - used for all but root hub */
1489 int submit_common_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1490 int transfer_len
, struct devrequest
*setup
, int interval
)
1493 int maxsize
= usb_maxpacket(dev
, pipe
);
1497 urb
= malloc(sizeof(urb_priv_t
));
1498 memset(urb
, 0, sizeof(urb_priv_t
));
1502 urb
->transfer_buffer
= buffer
;
1503 urb
->transfer_buffer_length
= transfer_len
;
1504 urb
->interval
= interval
;
1506 /* device pulled? Shortcut the action. */
1507 if (devgone
== dev
) {
1508 dev
->status
= USB_ST_CRC_ERR
;
1513 urb
->actual_length
= 0;
1514 pkt_print(urb
, dev
, pipe
, buffer
, transfer_len
,
1515 setup
, "SUB", usb_pipein(pipe
));
1520 err("submit_common_message: pipesize for pipe %lx is zero",
1525 if (sohci_submit_job(urb
, setup
) < 0) {
1526 err("sohci_submit_job failed");
1532 /* ohci_dump_status(&gohci); */
1535 /* allow more time for a BULK device to react - some are slow */
1536 #define BULK_TO 5000 /* timeout in milliseconds */
1537 if (usb_pipebulk(pipe
))
1542 /* wait for it to complete */
1544 /* check whether the controller is done */
1545 stat
= hc_interrupt();
1547 stat
= USB_ST_CRC_ERR
;
1551 /* NOTE: since we are not interrupt driven in U-Boot and always
1552 * handle only one URB at a time, we cannot assume the
1553 * transaction finished on the first successful return from
1554 * hc_interrupt().. unless the flag for current URB is set,
1555 * meaning that all TD's to/from device got actually
1556 * transferred and processed. If the current URB is not
1557 * finished we need to re-iterate this loop so as
1558 * hc_interrupt() gets called again as there needs to be some
1559 * more TD's to process still */
1560 if ((stat
>= 0) && (stat
!= 0xff) && (urb
->finished
)) {
1561 /* 0xff is returned for an SF-interrupt */
1571 err("CTL:TIMEOUT ");
1572 dbg("submit_common_msg: TO status %x\n", stat
);
1574 stat
= USB_ST_CRC_ERR
;
1580 dev
->act_len
= transfer_len
;
1583 pkt_print(urb
, dev
, pipe
, buffer
, transfer_len
,
1584 setup
, "RET(ctlr)", usb_pipein(pipe
));
1589 /* free TDs in urb_priv */
1590 if (!usb_pipeint(pipe
))
1595 /* submit routines called from usb.c */
1596 int submit_bulk_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1599 info("submit_bulk_msg");
1600 return submit_common_msg(dev
, pipe
, buffer
, transfer_len
, NULL
, 0);
1603 int submit_control_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1604 int transfer_len
, struct devrequest
*setup
)
1606 int maxsize
= usb_maxpacket(dev
, pipe
);
1608 info("submit_control_msg");
1610 pkt_print(NULL
, dev
, pipe
, buffer
, transfer_len
,
1611 setup
, "SUB", usb_pipein(pipe
));
1616 err("submit_control_message: pipesize for pipe %lx is zero",
1620 if (((pipe
>> 8) & 0x7f) == gohci
.rh
.devnum
) {
1622 /* root hub - redirect */
1623 return ohci_submit_rh_msg(dev
, pipe
, buffer
, transfer_len
,
1627 return submit_common_msg(dev
, pipe
, buffer
, transfer_len
, setup
, 0);
1630 int submit_int_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1631 int transfer_len
, int interval
)
1633 info("submit_int_msg");
1634 return submit_common_msg(dev
, pipe
, buffer
, transfer_len
, NULL
,
1638 /*-------------------------------------------------------------------------*
1640 *-------------------------------------------------------------------------*/
1642 /* reset the HC and BUS */
1644 static int hc_reset(ohci_t
*ohci
)
1646 #ifdef CONFIG_PCI_EHCI_DEVNO
1650 int smm_timeout
= 50; /* 0,5 sec */
1652 dbg("%s\n", __FUNCTION__
);
1654 #ifdef CONFIG_PCI_EHCI_DEVNO
1656 * Some multi-function controllers (e.g. ISP1562) allow root hub
1657 * resetting via EHCI registers only.
1659 pdev
= pci_find_devices(ehci_pci_ids
, CONFIG_PCI_EHCI_DEVNO
);
1664 pci_read_config_dword(pdev
, PCI_BASE_ADDRESS_0
, &base
);
1665 writel(readl(base
+ EHCI_USBCMD_OFF
) | EHCI_USBCMD_HCRESET
,
1666 base
+ EHCI_USBCMD_OFF
);
1668 while (readl(base
+ EHCI_USBCMD_OFF
) & EHCI_USBCMD_HCRESET
) {
1669 if (timeout
-- <= 0) {
1670 printf("USB RootHub reset timed out!");
1676 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO
);
1678 if (readl(&ohci
->regs
->control
) & OHCI_CTRL_IR
) {
1679 /* SMM owns the HC */
1680 writel(OHCI_OCR
, &ohci
->regs
->cmdstatus
);/* request ownership */
1681 info("USB HC TakeOver from SMM");
1682 while (readl(&ohci
->regs
->control
) & OHCI_CTRL_IR
) {
1684 if (--smm_timeout
== 0) {
1685 err("USB HC TakeOver failed!");
1691 /* Disable HC interrupts */
1692 writel(OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
1694 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1696 readl(&ohci
->regs
->control
));
1698 /* Reset USB (needed by some controllers) */
1699 ohci
->hc_control
= 0;
1700 writel(ohci
->hc_control
, &ohci
->regs
->control
);
1702 /* HC Reset requires max 10 us delay */
1703 writel(OHCI_HCR
, &ohci
->regs
->cmdstatus
);
1704 while ((readl(&ohci
->regs
->cmdstatus
) & OHCI_HCR
) != 0) {
1705 if (--timeout
== 0) {
1706 err("USB HC reset timed out!");
1714 /*-------------------------------------------------------------------------*/
1716 /* Start an OHCI controller, set the BUS operational
1718 * connect the virtual root hub */
1720 static int hc_start(ohci_t
*ohci
)
1723 unsigned int fminterval
;
1727 /* Tell the controller where the control and bulk lists are
1728 * The lists are empty now. */
1730 writel(0, &ohci
->regs
->ed_controlhead
);
1731 writel(0, &ohci
->regs
->ed_bulkhead
);
1733 writel((__u32
)ohci
->hcca
, &ohci
->regs
->hcca
); /* a reset clears this */
1735 fminterval
= 0x2edf;
1736 writel((fminterval
* 9) / 10, &ohci
->regs
->periodicstart
);
1737 fminterval
|= ((((fminterval
- 210) * 6) / 7) << 16);
1738 writel(fminterval
, &ohci
->regs
->fminterval
);
1739 writel(0x628, &ohci
->regs
->lsthresh
);
1741 /* start controller operations */
1742 ohci
->hc_control
= OHCI_CONTROL_INIT
| OHCI_USB_OPER
;
1744 writel(ohci
->hc_control
, &ohci
->regs
->control
);
1746 /* disable all interrupts */
1747 mask
= (OHCI_INTR_SO
| OHCI_INTR_WDH
| OHCI_INTR_SF
| OHCI_INTR_RD
|
1748 OHCI_INTR_UE
| OHCI_INTR_FNO
| OHCI_INTR_RHSC
|
1749 OHCI_INTR_OC
| OHCI_INTR_MIE
);
1750 writel(mask
, &ohci
->regs
->intrdisable
);
1751 /* clear all interrupts */
1752 mask
&= ~OHCI_INTR_MIE
;
1753 writel(mask
, &ohci
->regs
->intrstatus
);
1754 /* Choose the interrupts we care about now - but w/o MIE */
1755 mask
= OHCI_INTR_RHSC
| OHCI_INTR_UE
| OHCI_INTR_WDH
| OHCI_INTR_SO
;
1756 writel(mask
, &ohci
->regs
->intrenable
);
1759 /* required for AMD-756 and some Mac platforms */
1760 writel((roothub_a(ohci
) | RH_A_NPS
) & ~RH_A_PSM
,
1761 &ohci
->regs
->roothub
.a
);
1762 writel(RH_HS_LPSC
, &ohci
->regs
->roothub
.status
);
1763 #endif /* OHCI_USE_NPS */
1765 #define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
1766 /* POTPGT delay is bits 24-31, in 2 ms units. */
1767 mdelay((roothub_a(ohci
) >> 23) & 0x1fe);
1769 /* connect the virtual root hub */
1770 ohci
->rh
.devnum
= 0;
1775 /*-------------------------------------------------------------------------*/
1777 /* Poll USB interrupt. */
1778 void usb_event_poll(void)
1783 /* an interrupt happens */
1785 static int hc_interrupt(void)
1787 ohci_t
*ohci
= &gohci
;
1788 struct ohci_regs
*regs
= ohci
->regs
;
1792 if ((ohci
->hcca
->done_head
!= 0) &&
1793 !(m32_swap(ohci
->hcca
->done_head
) & 0x01)) {
1794 ints
= OHCI_INTR_WDH
;
1796 ints
= readl(®s
->intrstatus
);
1797 if (ints
== ~(u32
)0) {
1799 err("%s device removed!", ohci
->slot_name
);
1802 ints
&= readl(®s
->intrenable
);
1804 dbg("hc_interrupt: returning..\n");
1810 /* dbg("Interrupt: %x frame: %x", ints,
1811 le16_to_cpu(ohci->hcca->frame_no)); */
1813 if (ints
& OHCI_INTR_RHSC
)
1816 if (ints
& OHCI_INTR_UE
) {
1818 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1820 /* e.g. due to PCI Master/Target Abort */
1827 /* FIXME: be optimistic, hope that bug won't repeat often. */
1828 /* Make some non-interrupt context restart the controller. */
1829 /* Count and limit the retries though; either hardware or */
1830 /* software errors can go forever... */
1835 if (ints
& OHCI_INTR_WDH
) {
1837 writel(OHCI_INTR_WDH
, ®s
->intrdisable
);
1838 (void)readl(®s
->intrdisable
); /* flush */
1839 stat
= dl_done_list(&gohci
);
1840 writel(OHCI_INTR_WDH
, ®s
->intrenable
);
1841 (void)readl(®s
->intrdisable
); /* flush */
1844 if (ints
& OHCI_INTR_SO
) {
1845 dbg("USB Schedule overrun\n");
1846 writel(OHCI_INTR_SO
, ®s
->intrenable
);
1850 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1851 if (ints
& OHCI_INTR_SF
) {
1852 unsigned int frame
= m16_swap(ohci
->hcca
->frame_no
) & 1;
1854 writel(OHCI_INTR_SF
, ®s
->intrdisable
);
1855 if (ohci
->ed_rm_list
[frame
] != NULL
)
1856 writel(OHCI_INTR_SF
, ®s
->intrenable
);
1860 writel(ints
, ®s
->intrstatus
);
1864 /*-------------------------------------------------------------------------*/
1866 /*-------------------------------------------------------------------------*/
1868 /* De-allocate all resources.. */
1870 static void hc_release_ohci(ohci_t
*ohci
)
1872 dbg("USB HC release ohci usb-%s", ohci
->slot_name
);
1874 if (!ohci
->disabled
)
1878 /*-------------------------------------------------------------------------*/
1881 * low level initalisation routine, called from usb.c
1883 static char ohci_inited
= 0;
1885 int usb_lowlevel_init(void)
1887 #ifdef CONFIG_PCI_OHCI
1891 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1892 /* cpu dependant init */
1897 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1898 /* board dependant init */
1899 if (usb_board_init())
1902 memset(&gohci
, 0, sizeof(ohci_t
));
1904 /* align the storage */
1905 if ((__u32
)&ghcca
[0] & 0xff) {
1906 err("HCCA not aligned!!");
1910 info("aligned ghcca %p", phcca
);
1911 memset(&ohci_dev
, 0, sizeof(struct ohci_device
));
1912 if ((__u32
)&ohci_dev
.ed
[0] & 0x7) {
1913 err("EDs not aligned!!");
1916 memset(gtd
, 0, sizeof(td_t
) * (NUM_TD
+ 1));
1917 if ((__u32
)gtd
& 0x7) {
1918 err("TDs not aligned!!");
1923 memset(phcca
, 0, sizeof(struct ohci_hcca
));
1928 #ifdef CONFIG_PCI_OHCI
1929 pdev
= pci_find_devices(ohci_pci_ids
, CONFIG_PCI_OHCI_DEVNO
);
1934 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &vid
);
1935 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &did
);
1936 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1937 vid
, did
, (pdev
>> 16) & 0xff,
1938 (pdev
>> 11) & 0x1f, (pdev
>> 8) & 0x7);
1939 pci_read_config_dword(pdev
, PCI_BASE_ADDRESS_0
, &base
);
1940 printf("OHCI regs address 0x%08x\n", base
);
1941 gohci
.regs
= (struct ohci_regs
*)base
;
1945 gohci
.regs
= (struct ohci_regs
*)CONFIG_SYS_USB_OHCI_REGS_BASE
;
1949 gohci
.slot_name
= CONFIG_SYS_USB_OHCI_SLOT_NAME
;
1951 if (hc_reset (&gohci
) < 0) {
1952 hc_release_ohci (&gohci
);
1953 err ("can't reset usb-%s", gohci
.slot_name
);
1954 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1955 /* board dependant cleanup */
1956 usb_board_init_fail();
1959 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1960 /* cpu dependant cleanup */
1961 usb_cpu_init_fail();
1966 if (hc_start(&gohci
) < 0) {
1967 err("can't start usb-%s", gohci
.slot_name
);
1968 hc_release_ohci(&gohci
);
1969 /* Initialization failed */
1970 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1971 /* board dependant cleanup */
1975 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1976 /* cpu dependant cleanup */
1983 ohci_dump(&gohci
, 1);
1991 int usb_lowlevel_stop(void)
1993 /* this gets called really early - before the controller has */
1994 /* even been initialized! */
1997 /* TODO release any interrupts, etc. */
1998 /* call hc_release_ohci() here ? */
2001 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
2002 /* board dependant cleanup */
2003 if (usb_board_stop())
2007 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
2008 /* cpu dependant cleanup */
2012 /* This driver is no longer initialised. It needs a new low-level
2013 * init (board/cpu) before it can be used again. */