drivers/usb/musb/am35x.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * am35x.h - TI's AM35x platform specific usb wrapper definitions.
   4  *
   5  * Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
   6  *
   7  * Based on drivers/usb/musb/da8xx.h
   8  *
   9  * Copyright (c) 2010 Texas Instruments Incorporated
  10  */
  11
  12 #ifndef __AM35X_USB_H__
  13 #define __AM35X_USB_H__
  14
  15 #include <asm/arch/am35x_def.h>
  16 #include "musb_core.h"
  17
  18 /* Base address of musb wrapper */
  19 #define AM35X_USB_OTG_BASE      0x5C040000
  20
  21 /* Base address of musb core */
  22 #define AM35X_USB_OTG_CORE_BASE (AM35X_USB_OTG_BASE + 0x400)
  23
  24 /* Timeout for AM35x usb module */
  25 #define AM35X_USB_OTG_TIMEOUT   0x3FFFFFF
  26
  27 /*
  28  * AM35x platform USB wrapper register overlay.
  29  */
  30 struct am35x_usb_regs {
  31         u32     revision;
  32         u32     control;
  33         u32     status;
  34         u32     emulation;
  35         u32     reserved0[1];
  36         u32     autoreq;
  37         u32     srpfixtime;
  38         u32     ep_intsrc;
  39         u32     ep_intsrcset;
  40         u32     ep_intsrcclr;
  41         u32     ep_intmsk;
  42         u32     ep_intmskset;
  43         u32     ep_intmskclr;
  44         u32     ep_intsrcmsked;
  45         u32     reserved1[1];
  46         u32     core_intsrc;
  47         u32     core_intsrcset;
  48         u32     core_intsrcclr;
  49         u32     core_intmsk;
  50         u32     core_intmskset;
  51         u32     core_intmskclr;
  52         u32     core_intsrcmsked;
  53         u32     reserved2[1];
  54         u32     eoi;
  55         u32     mop_sop_en;
  56         u32     reserved3[2];
  57         u32     txmode;
  58         u32     rxmode;
  59         u32     epcount_mode;
  60 };
  61
  62 #define am35x_usb_regs ((struct am35x_usb_regs *)AM35X_USB_OTG_BASE)
  63
  64 /* USB 2.0 PHY Control */
  65 #define DEVCONF2_PHY_GPIOMODE   (1 << 23)
  66 #define DEVCONF2_OTGMODE        (3 << 14)
  67 #define DEVCONF2_SESENDEN       (1 << 13)       /* Vsess_end comparator */
  68 #define DEVCONF2_VBDTCTEN       (1 << 12)       /* Vbus comparator */
  69 #define DEVCONF2_REFFREQ_24MHZ  (2 << 8)
  70 #define DEVCONF2_REFFREQ_26MHZ  (7 << 8)
  71 #define DEVCONF2_REFFREQ_13MHZ  (6 << 8)
  72 #define DEVCONF2_REFFREQ        (0xf << 8)
  73 #define DEVCONF2_PHYCKGD        (1 << 7)
  74 #define DEVCONF2_VBUSSENSE      (1 << 6)
  75 #define DEVCONF2_PHY_PLLON      (1 << 5)        /* override PLL suspend */
  76 #define DEVCONF2_RESET          (1 << 4)
  77 #define DEVCONF2_PHYPWRDN       (1 << 3)
  78 #define DEVCONF2_OTGPWRDN       (1 << 2)
  79 #define DEVCONF2_DATPOL         (1 << 1)
  80
  81 #endif  /* __AM35X_USB_H__ */