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This patch adds USB storage support for the delta board. This is the first
[people/ms/u-boot.git] / drivers / usb_ohci.c
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
3 *
4 * (C) Copyright 2003
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
10 *
11 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
12 * ebenard@eukrea.com - based on s3c24x0's driver
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33 /*
34 * IMPORTANT NOTES
35 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
36 * board or this driver will NOT work!
37 * 2 - this driver is intended for use with USB Mass Storage Devices
38 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
39 * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
40 * to activate workaround for bug #41 or this driver will NOT work!
41 */
42
43 #include <common.h>
44 /* #include <pci.h> no PCI on the S3C24X0 */
45
46 #ifdef CONFIG_USB_OHCI
47
48 #include <asm/arch/hardware.h>
49
50 #include <malloc.h>
51 #include <usb.h>
52 #include "usb_ohci.h"
53
54 /* #define OHCI_USE_NPS /\* force NoPowerSwitching mode *\/ */
55 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
56
57 /* For initializing controller (mask in an HCFS mode too) */
58 #define OHCI_CONTROL_INIT \
59 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
60
61 #define readl(a) (*((vu_long *)(a)))
62 #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
63
64 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
65
66 #undef DEBUG
67 #ifdef DEBUG
68 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
69 #else
70 #define dbg(format, arg...) do {} while(0)
71 #endif /* DEBUG */
72 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
73 #undef SHOW_INFO
74 #ifdef SHOW_INFO
75 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
76 #else
77 #define info(format, arg...) do {} while(0)
78 #endif
79
80 #define m16_swap(x) swap_16(x)
81 #define m32_swap(x) swap_32(x)
82
83 /* global ohci_t */
84 static ohci_t gohci;
85 /* this must be aligned to a 256 byte boundary */
86 struct ohci_hcca ghcca[1];
87 /* a pointer to the aligned storage */
88 struct ohci_hcca *phcca;
89 /* this allocates EDs for all possible endpoints */
90 struct ohci_device ohci_dev;
91 /* urb_priv */
92 urb_priv_t urb_priv;
93 /* RHSC flag */
94 int got_rhsc;
95 /* device which was disconnected */
96 struct usb_device *devgone;
97
98 /*-------------------------------------------------------------------------*/
99
100 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
101 * The erratum (#4) description is incorrect. AMD's workaround waits
102 * till some bits (mostly reserved) are clear; ok for all revs.
103 */
104 #define OHCI_QUIRK_AMD756 0xabcd
105 #define read_roothub(hc, register, mask) ({ \
106 u32 temp = readl (&hc->regs->roothub.register); \
107 if (hc->flags & OHCI_QUIRK_AMD756) \
108 while (temp & mask) \
109 temp = readl (&hc->regs->roothub.register); \
110 temp; })
111
112 static u32 roothub_a (struct ohci *hc)
113 { return read_roothub (hc, a, 0xfc0fe000); }
114 static inline u32 roothub_b (struct ohci *hc)
115 { return readl (&hc->regs->roothub.b); }
116 static inline u32 roothub_status (struct ohci *hc)
117 { return readl (&hc->regs->roothub.status); }
118 static u32 roothub_portstatus (struct ohci *hc, int i)
119 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
120
121
122 /* forward declaration */
123 static int hc_interrupt (void);
124 static void
125 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
126 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
127
128 /*-------------------------------------------------------------------------*
129 * URB support functions
130 *-------------------------------------------------------------------------*/
131
132 /* free HCD-private data associated with this URB */
133
134 static void urb_free_priv (urb_priv_t * urb)
135 {
136 int i;
137 int last;
138 struct td * td;
139
140 last = urb->length - 1;
141 if (last >= 0) {
142 for (i = 0; i <= last; i++) {
143 td = urb->td[i];
144 if (td) {
145 td->usb_dev = NULL;
146 urb->td[i] = NULL;
147 }
148 }
149 }
150 }
151
152 /*-------------------------------------------------------------------------*/
153
154 #ifdef DEBUG
155 static int sohci_get_current_frame_number (struct usb_device * dev);
156
157 /* debug| print the main components of an URB
158 * small: 0) header + data packets 1) just header */
159
160 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
161 int transfer_len, struct devrequest * setup, char * str, int small)
162 {
163 urb_priv_t * purb = &urb_priv;
164
165 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
166 str,
167 sohci_get_current_frame_number (dev),
168 usb_pipedevice (pipe),
169 usb_pipeendpoint (pipe),
170 usb_pipeout (pipe)? 'O': 'I',
171 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
172 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
173 purb->actual_length,
174 transfer_len, dev->status);
175 #ifdef OHCI_VERBOSE_DEBUG
176 if (!small) {
177 int i, len;
178
179 if (usb_pipecontrol (pipe)) {
180 printf (__FILE__ ": cmd(8):");
181 for (i = 0; i < 8 ; i++)
182 printf (" %02x", ((__u8 *) setup) [i]);
183 printf ("\n");
184 }
185 if (transfer_len > 0 && buffer) {
186 printf (__FILE__ ": data(%d/%d):",
187 purb->actual_length,
188 transfer_len);
189 len = usb_pipeout (pipe)?
190 transfer_len: purb->actual_length;
191 for (i = 0; i < 16 && i < len; i++)
192 printf (" %02x", ((__u8 *) buffer) [i]);
193 printf ("%s\n", i < len? "...": "");
194 }
195 }
196 #endif
197 }
198
199 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
200 void ep_print_int_eds (ohci_t *ohci, char * str) {
201 int i, j;
202 __u32 * ed_p;
203 for (i= 0; i < 32; i++) {
204 j = 5;
205 ed_p = &(ohci->hcca->int_table [i]);
206 if (*ed_p == 0)
207 continue;
208 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
209 while (*ed_p != 0 && j--) {
210 ed_t *ed = (ed_t *)m32_swap(ed_p);
211 printf (" ed: %4x;", ed->hwINFO);
212 ed_p = &ed->hwNextED;
213 }
214 printf ("\n");
215 }
216 }
217
218 static void ohci_dump_intr_mask (char *label, __u32 mask)
219 {
220 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
221 label,
222 mask,
223 (mask & OHCI_INTR_MIE) ? " MIE" : "",
224 (mask & OHCI_INTR_OC) ? " OC" : "",
225 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
226 (mask & OHCI_INTR_FNO) ? " FNO" : "",
227 (mask & OHCI_INTR_UE) ? " UE" : "",
228 (mask & OHCI_INTR_RD) ? " RD" : "",
229 (mask & OHCI_INTR_SF) ? " SF" : "",
230 (mask & OHCI_INTR_WDH) ? " WDH" : "",
231 (mask & OHCI_INTR_SO) ? " SO" : ""
232 );
233 }
234
235 static void maybe_print_eds (char *label, __u32 value)
236 {
237 ed_t *edp = (ed_t *)value;
238
239 if (value) {
240 dbg ("%s %08x", label, value);
241 dbg ("%08x", edp->hwINFO);
242 dbg ("%08x", edp->hwTailP);
243 dbg ("%08x", edp->hwHeadP);
244 dbg ("%08x", edp->hwNextED);
245 }
246 }
247
248 static char * hcfs2string (int state)
249 {
250 switch (state) {
251 case OHCI_USB_RESET: return "reset";
252 case OHCI_USB_RESUME: return "resume";
253 case OHCI_USB_OPER: return "operational";
254 case OHCI_USB_SUSPEND: return "suspend";
255 }
256 return "?";
257 }
258
259 /* dump control and status registers */
260 static void ohci_dump_status (ohci_t *controller)
261 {
262 struct ohci_regs *regs = controller->regs;
263 __u32 temp;
264
265 temp = readl (&regs->revision) & 0xff;
266 if (temp != 0x10)
267 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
268
269 temp = readl (&regs->control);
270 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
271 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
272 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
273 (temp & OHCI_CTRL_IR) ? " IR" : "",
274 hcfs2string (temp & OHCI_CTRL_HCFS),
275 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
276 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
277 (temp & OHCI_CTRL_IE) ? " IE" : "",
278 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
279 temp & OHCI_CTRL_CBSR
280 );
281
282 temp = readl (&regs->cmdstatus);
283 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
284 (temp & OHCI_SOC) >> 16,
285 (temp & OHCI_OCR) ? " OCR" : "",
286 (temp & OHCI_BLF) ? " BLF" : "",
287 (temp & OHCI_CLF) ? " CLF" : "",
288 (temp & OHCI_HCR) ? " HCR" : ""
289 );
290
291 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
292 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
293
294 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
295
296 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
297 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
298
299 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
300 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
301
302 maybe_print_eds ("donehead", readl (&regs->donehead));
303 }
304
305 static void ohci_dump_roothub (ohci_t *controller, int verbose)
306 {
307 __u32 temp, ndp, i;
308
309 temp = roothub_a (controller);
310 ndp = (temp & RH_A_NDP);
311 #ifdef CONFIG_AT91C_PQFP_UHPBUG
312 ndp = (ndp == 2) ? 1:0;
313 #endif
314 #if 0 /* def CONFIG_CPU_MONAHANS */
315 data_buf [2] = (data_buf [2] == 2) ? 3:0;
316 #endif
317 if (verbose) {
318 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
319 ((temp & RH_A_POTPGT) >> 24) & 0xff,
320 (temp & RH_A_NOCP) ? " NOCP" : "",
321 (temp & RH_A_OCPM) ? " OCPM" : "",
322 (temp & RH_A_DT) ? " DT" : "",
323 (temp & RH_A_NPS) ? " NPS" : "",
324 (temp & RH_A_PSM) ? " PSM" : "",
325 ndp
326 );
327 temp = roothub_b (controller);
328 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
329 temp,
330 (temp & RH_B_PPCM) >> 16,
331 (temp & RH_B_DR)
332 );
333 temp = roothub_status (controller);
334 dbg ("roothub.status: %08x%s%s%s%s%s%s",
335 temp,
336 (temp & RH_HS_CRWE) ? " CRWE" : "",
337 (temp & RH_HS_OCIC) ? " OCIC" : "",
338 (temp & RH_HS_LPSC) ? " LPSC" : "",
339 (temp & RH_HS_DRWE) ? " DRWE" : "",
340 (temp & RH_HS_OCI) ? " OCI" : "",
341 (temp & RH_HS_LPS) ? " LPS" : ""
342 );
343 }
344
345 for (i = 0; i < ndp; i++) {
346 temp = roothub_portstatus (controller, i);
347 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
348 i,
349 temp,
350 (temp & RH_PS_PRSC) ? " PRSC" : "",
351 (temp & RH_PS_OCIC) ? " OCIC" : "",
352 (temp & RH_PS_PSSC) ? " PSSC" : "",
353 (temp & RH_PS_PESC) ? " PESC" : "",
354 (temp & RH_PS_CSC) ? " CSC" : "",
355
356 (temp & RH_PS_LSDA) ? " LSDA" : "",
357 (temp & RH_PS_PPS) ? " PPS" : "",
358 (temp & RH_PS_PRS) ? " PRS" : "",
359 (temp & RH_PS_POCI) ? " POCI" : "",
360 (temp & RH_PS_PSS) ? " PSS" : "",
361
362 (temp & RH_PS_PES) ? " PES" : "",
363 (temp & RH_PS_CCS) ? " CCS" : ""
364 );
365 }
366 }
367
368 static void ohci_dump (ohci_t *controller, int verbose)
369 {
370 dbg ("OHCI controller usb-%s state", controller->slot_name);
371
372 /* dumps some of the state we know about */
373 ohci_dump_status (controller);
374 if (verbose)
375 ep_print_int_eds (controller, "hcca");
376 dbg ("hcca frame #%04x", controller->hcca->frame_no);
377 ohci_dump_roothub (controller, 1);
378 }
379
380
381 #endif /* DEBUG */
382
383 /*-------------------------------------------------------------------------*
384 * Interface functions (URB)
385 *-------------------------------------------------------------------------*/
386
387 /* get a transfer request */
388
389 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
390 int transfer_len, struct devrequest *setup, int interval)
391 {
392 ohci_t *ohci;
393 ed_t * ed;
394 urb_priv_t *purb_priv;
395 int i, size = 0;
396
397 ohci = &gohci;
398
399 /* when controller's hung, permit only roothub cleanup attempts
400 * such as powering down ports */
401 if (ohci->disabled) {
402 err("sohci_submit_job: EPIPE");
403 return -1;
404 }
405
406 /* every endpoint has a ed, locate and fill it */
407 if (!(ed = ep_add_ed (dev, pipe))) {
408 err("sohci_submit_job: ENOMEM");
409 return -1;
410 }
411
412 /* for the private part of the URB we need the number of TDs (size) */
413 switch (usb_pipetype (pipe)) {
414 case PIPE_BULK: /* one TD for every 4096 Byte */
415 size = (transfer_len - 1) / 4096 + 1;
416 break;
417 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
418 size = (transfer_len == 0)? 2:
419 (transfer_len - 1) / 4096 + 3;
420 break;
421 }
422
423 if (size >= (N_URB_TD - 1)) {
424 err("need %d TDs, only have %d", size, N_URB_TD);
425 return -1;
426 }
427 purb_priv = &urb_priv;
428 purb_priv->pipe = pipe;
429
430 /* fill the private part of the URB */
431 purb_priv->length = size;
432 purb_priv->ed = ed;
433 purb_priv->actual_length = 0;
434
435 /* allocate the TDs */
436 /* note that td[0] was allocated in ep_add_ed */
437 for (i = 0; i < size; i++) {
438 purb_priv->td[i] = td_alloc (dev);
439 if (!purb_priv->td[i]) {
440 purb_priv->length = i;
441 urb_free_priv (purb_priv);
442 err("sohci_submit_job: ENOMEM");
443 return -1;
444 }
445 }
446
447 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
448 urb_free_priv (purb_priv);
449 err("sohci_submit_job: EINVAL");
450 return -1;
451 }
452
453 /* link the ed into a chain if is not already */
454 if (ed->state != ED_OPER)
455 ep_link (ohci, ed);
456
457 /* fill the TDs and link it to the ed */
458 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
459
460 return 0;
461 }
462
463 /*-------------------------------------------------------------------------*/
464
465 #ifdef DEBUG
466 /* tell us the current USB frame number */
467
468 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
469 {
470 ohci_t *ohci = &gohci;
471
472 return m16_swap (ohci->hcca->frame_no);
473 }
474 #endif
475
476 /*-------------------------------------------------------------------------*
477 * ED handling functions
478 *-------------------------------------------------------------------------*/
479
480 /* link an ed into one of the HC chains */
481
482 static int ep_link (ohci_t *ohci, ed_t *edi)
483 {
484 volatile ed_t *ed = edi;
485
486 ed->state = ED_OPER;
487
488 switch (ed->type) {
489 case PIPE_CONTROL:
490 ed->hwNextED = 0;
491 if (ohci->ed_controltail == NULL) {
492 writel (ed, &ohci->regs->ed_controlhead);
493 } else {
494 ohci->ed_controltail->hwNextED = m32_swap (ed);
495 }
496 ed->ed_prev = ohci->ed_controltail;
497 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
498 !ohci->ed_rm_list[1] && !ohci->sleeping) {
499 ohci->hc_control |= OHCI_CTRL_CLE;
500 writel (ohci->hc_control, &ohci->regs->control);
501 }
502 ohci->ed_controltail = edi;
503 break;
504
505 case PIPE_BULK:
506 ed->hwNextED = 0;
507 if (ohci->ed_bulktail == NULL) {
508 writel (ed, &ohci->regs->ed_bulkhead);
509 } else {
510 ohci->ed_bulktail->hwNextED = m32_swap (ed);
511 }
512 ed->ed_prev = ohci->ed_bulktail;
513 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
514 !ohci->ed_rm_list[1] && !ohci->sleeping) {
515 ohci->hc_control |= OHCI_CTRL_BLE;
516 writel (ohci->hc_control, &ohci->regs->control);
517 }
518 ohci->ed_bulktail = edi;
519 break;
520 }
521 return 0;
522 }
523
524 /*-------------------------------------------------------------------------*/
525
526 /* unlink an ed from one of the HC chains.
527 * just the link to the ed is unlinked.
528 * the link from the ed still points to another operational ed or 0
529 * so the HC can eventually finish the processing of the unlinked ed */
530
531 static int ep_unlink (ohci_t *ohci, ed_t *ed)
532 {
533 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
534
535 switch (ed->type) {
536 case PIPE_CONTROL:
537 if (ed->ed_prev == NULL) {
538 if (!ed->hwNextED) {
539 ohci->hc_control &= ~OHCI_CTRL_CLE;
540 writel (ohci->hc_control, &ohci->regs->control);
541 }
542 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
543 } else {
544 ed->ed_prev->hwNextED = ed->hwNextED;
545 }
546 if (ohci->ed_controltail == ed) {
547 ohci->ed_controltail = ed->ed_prev;
548 } else {
549 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
550 }
551 break;
552
553 case PIPE_BULK:
554 if (ed->ed_prev == NULL) {
555 if (!ed->hwNextED) {
556 ohci->hc_control &= ~OHCI_CTRL_BLE;
557 writel (ohci->hc_control, &ohci->regs->control);
558 }
559 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
560 } else {
561 ed->ed_prev->hwNextED = ed->hwNextED;
562 }
563 if (ohci->ed_bulktail == ed) {
564 ohci->ed_bulktail = ed->ed_prev;
565 } else {
566 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
567 }
568 break;
569 }
570 ed->state = ED_UNLINK;
571 return 0;
572 }
573
574
575 /*-------------------------------------------------------------------------*/
576
577 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
578 * but the USB stack is a little bit stateless so we do it at every transaction
579 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
580 * in all other cases the state is left unchanged
581 * the ed info fields are setted anyway even though most of them should not change */
582
583 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
584 {
585 td_t *td;
586 ed_t *ed_ret;
587 volatile ed_t *ed;
588
589 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
590 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
591
592 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
593 err("ep_add_ed: pending delete");
594 /* pending delete request */
595 return NULL;
596 }
597
598 if (ed->state == ED_NEW) {
599 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
600 /* dummy td; end of td list for ed */
601 td = td_alloc (usb_dev);
602 ed->hwTailP = m32_swap (td);
603 ed->hwHeadP = ed->hwTailP;
604 ed->state = ED_UNLINK;
605 ed->type = usb_pipetype (pipe);
606 ohci_dev.ed_cnt++;
607 }
608
609 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
610 | usb_pipeendpoint (pipe) << 7
611 | (usb_pipeisoc (pipe)? 0x8000: 0)
612 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
613 | usb_pipeslow (pipe) << 13
614 | usb_maxpacket (usb_dev, pipe) << 16);
615
616 return ed_ret;
617 }
618
619 /*-------------------------------------------------------------------------*
620 * TD handling functions
621 *-------------------------------------------------------------------------*/
622
623 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
624
625 static void td_fill (ohci_t *ohci, unsigned int info,
626 void *data, int len,
627 struct usb_device *dev, int index, urb_priv_t *urb_priv)
628 {
629 volatile td_t *td, *td_pt;
630 #ifdef OHCI_FILL_TRACE
631 int i;
632 #endif
633
634 if (index > urb_priv->length) {
635 err("index > length");
636 return;
637 }
638 /* use this td as the next dummy */
639 td_pt = urb_priv->td [index];
640 td_pt->hwNextTD = 0;
641
642 /* fill the old dummy TD */
643 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
644
645 td->ed = urb_priv->ed;
646 td->next_dl_td = NULL;
647 td->index = index;
648 td->data = (__u32)data;
649 #ifdef OHCI_FILL_TRACE
650 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
651 for (i = 0; i < len; i++)
652 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
653 printf("\n");
654 }
655 #endif
656 if (!len)
657 data = 0;
658
659 td->hwINFO = m32_swap (info);
660 td->hwCBP = m32_swap (data);
661 if (data)
662 td->hwBE = m32_swap (data + len - 1);
663 else
664 td->hwBE = 0;
665 td->hwNextTD = m32_swap (td_pt);
666 td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
667
668 /* append to queue */
669 td->ed->hwTailP = td->hwNextTD;
670 }
671
672 /*-------------------------------------------------------------------------*/
673
674 /* prepare all TDs of a transfer */
675
676 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
677 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
678 {
679 ohci_t *ohci = &gohci;
680 int data_len = transfer_len;
681 void *data;
682 int cnt = 0;
683 __u32 info = 0;
684 unsigned int toggle = 0;
685
686 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
687 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
688 toggle = TD_T_TOGGLE;
689 } else {
690 toggle = TD_T_DATA0;
691 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
692 }
693 urb->td_cnt = 0;
694 if (data_len)
695 data = buffer;
696 else
697 data = 0;
698
699 switch (usb_pipetype (pipe)) {
700 case PIPE_BULK:
701 info = usb_pipeout (pipe)?
702 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
703 while(data_len > 4096) {
704 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
705 data += 4096; data_len -= 4096; cnt++;
706 }
707 info = usb_pipeout (pipe)?
708 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
709 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
710 cnt++;
711
712 if (!ohci->sleeping)
713 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
714 break;
715
716 case PIPE_CONTROL:
717 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
718 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
719 if (data_len > 0) {
720 info = usb_pipeout (pipe)?
721 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
722 /* NOTE: mishandles transfers >8K, some >4K */
723 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
724 }
725 info = usb_pipeout (pipe)?
726 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
727 td_fill (ohci, info, data, 0, dev, cnt++, urb);
728 if (!ohci->sleeping)
729 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
730 break;
731 }
732 if (urb->length != cnt)
733 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
734 }
735
736 /*-------------------------------------------------------------------------*
737 * Done List handling functions
738 *-------------------------------------------------------------------------*/
739
740
741 /* calculate the transfer length and update the urb */
742
743 static void dl_transfer_length(td_t * td)
744 {
745 __u32 tdINFO, tdBE, tdCBP;
746 urb_priv_t *lurb_priv = &urb_priv;
747
748 tdINFO = m32_swap (td->hwINFO);
749 tdBE = m32_swap (td->hwBE);
750 tdCBP = m32_swap (td->hwCBP);
751
752
753 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
754 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
755 if (tdBE != 0) {
756 if (td->hwCBP == 0)
757 lurb_priv->actual_length += tdBE - td->data + 1;
758 else
759 lurb_priv->actual_length += tdCBP - td->data;
760 }
761 }
762 }
763
764 /*-------------------------------------------------------------------------*/
765
766 /* replies to the request have to be on a FIFO basis so
767 * we reverse the reversed done-list */
768
769 static td_t * dl_reverse_done_list (ohci_t *ohci)
770 {
771 __u32 td_list_hc;
772 td_t *td_rev = NULL;
773 td_t *td_list = NULL;
774 urb_priv_t *lurb_priv = NULL;
775
776 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
777 ohci->hcca->done_head = 0;
778
779 while (td_list_hc) {
780 td_list = (td_t *)td_list_hc;
781
782 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
783 lurb_priv = &urb_priv;
784 dbg(" USB-error/status: %x : %p",
785 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
786 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
787 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
788 td_list->ed->hwHeadP =
789 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
790 (td_list->ed->hwHeadP & m32_swap (0x2));
791 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
792 } else
793 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
794 }
795 }
796
797 td_list->next_dl_td = td_rev;
798 td_rev = td_list;
799 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
800 }
801 return td_list;
802 }
803
804 /*-------------------------------------------------------------------------*/
805
806 /* td done list */
807 static int dl_done_list (ohci_t *ohci, td_t *td_list)
808 {
809 td_t *td_list_next = NULL;
810 ed_t *ed;
811 int cc = 0;
812 int stat = 0;
813 /* urb_t *urb; */
814 urb_priv_t *lurb_priv;
815 __u32 tdINFO, edHeadP, edTailP;
816
817 while (td_list) {
818 td_list_next = td_list->next_dl_td;
819
820 lurb_priv = &urb_priv;
821 tdINFO = m32_swap (td_list->hwINFO);
822
823 ed = td_list->ed;
824
825 dl_transfer_length(td_list);
826
827 /* error code of transfer */
828 cc = TD_CC_GET (tdINFO);
829 if (cc != 0) {
830 dbg("ConditionCode %#x", cc);
831 stat = cc_to_error[cc];
832 }
833
834 if (ed->state != ED_NEW) {
835 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
836 edTailP = m32_swap (ed->hwTailP);
837
838 /* unlink eds if they are not busy */
839 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
840 ep_unlink (ohci, ed);
841 }
842
843 td_list = td_list_next;
844 }
845 return stat;
846 }
847
848 /*-------------------------------------------------------------------------*
849 * Virtual Root Hub
850 *-------------------------------------------------------------------------*/
851
852 /* Device descriptor */
853 static __u8 root_hub_dev_des[] =
854 {
855 0x12, /* __u8 bLength; */
856 0x01, /* __u8 bDescriptorType; Device */
857 0x10, /* __u16 bcdUSB; v1.1 */
858 0x01,
859 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
860 0x00, /* __u8 bDeviceSubClass; */
861 0x00, /* __u8 bDeviceProtocol; */
862 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
863 0x00, /* __u16 idVendor; */
864 0x00,
865 0x00, /* __u16 idProduct; */
866 0x00,
867 0x00, /* __u16 bcdDevice; */
868 0x00,
869 0x00, /* __u8 iManufacturer; */
870 0x01, /* __u8 iProduct; */
871 0x00, /* __u8 iSerialNumber; */
872 0x01 /* __u8 bNumConfigurations; */
873 };
874
875
876 /* Configuration descriptor */
877 static __u8 root_hub_config_des[] =
878 {
879 0x09, /* __u8 bLength; */
880 0x02, /* __u8 bDescriptorType; Configuration */
881 0x19, /* __u16 wTotalLength; */
882 0x00,
883 0x01, /* __u8 bNumInterfaces; */
884 0x01, /* __u8 bConfigurationValue; */
885 0x00, /* __u8 iConfiguration; */
886 0x40, /* __u8 bmAttributes;
887 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
888 0x00, /* __u8 MaxPower; */
889
890 /* interface */
891 0x09, /* __u8 if_bLength; */
892 0x04, /* __u8 if_bDescriptorType; Interface */
893 0x00, /* __u8 if_bInterfaceNumber; */
894 0x00, /* __u8 if_bAlternateSetting; */
895 0x01, /* __u8 if_bNumEndpoints; */
896 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
897 0x00, /* __u8 if_bInterfaceSubClass; */
898 0x00, /* __u8 if_bInterfaceProtocol; */
899 0x00, /* __u8 if_iInterface; */
900
901 /* endpoint */
902 0x07, /* __u8 ep_bLength; */
903 0x05, /* __u8 ep_bDescriptorType; Endpoint */
904 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
905 0x03, /* __u8 ep_bmAttributes; Interrupt */
906 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
907 0x00,
908 0xff /* __u8 ep_bInterval; 255 ms */
909 };
910
911 static unsigned char root_hub_str_index0[] =
912 {
913 0x04, /* __u8 bLength; */
914 0x03, /* __u8 bDescriptorType; String-descriptor */
915 0x09, /* __u8 lang ID */
916 0x04, /* __u8 lang ID */
917 };
918
919 static unsigned char root_hub_str_index1[] =
920 {
921 28, /* __u8 bLength; */
922 0x03, /* __u8 bDescriptorType; String-descriptor */
923 'O', /* __u8 Unicode */
924 0, /* __u8 Unicode */
925 'H', /* __u8 Unicode */
926 0, /* __u8 Unicode */
927 'C', /* __u8 Unicode */
928 0, /* __u8 Unicode */
929 'I', /* __u8 Unicode */
930 0, /* __u8 Unicode */
931 ' ', /* __u8 Unicode */
932 0, /* __u8 Unicode */
933 'R', /* __u8 Unicode */
934 0, /* __u8 Unicode */
935 'o', /* __u8 Unicode */
936 0, /* __u8 Unicode */
937 'o', /* __u8 Unicode */
938 0, /* __u8 Unicode */
939 't', /* __u8 Unicode */
940 0, /* __u8 Unicode */
941 ' ', /* __u8 Unicode */
942 0, /* __u8 Unicode */
943 'H', /* __u8 Unicode */
944 0, /* __u8 Unicode */
945 'u', /* __u8 Unicode */
946 0, /* __u8 Unicode */
947 'b', /* __u8 Unicode */
948 0, /* __u8 Unicode */
949 };
950
951 /* Hub class-specific descriptor is constructed dynamically */
952
953
954 /*-------------------------------------------------------------------------*/
955
956 #define OK(x) len = (x); break
957 #ifdef DEBUG
958 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
959 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
960 #else
961 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
962 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
963 #endif
964 #define RD_RH_STAT roothub_status(&gohci)
965 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
966
967 /* request to virtual root hub */
968
969 int rh_check_port_status(ohci_t *controller)
970 {
971 __u32 temp, ndp, i;
972 int res;
973
974 res = -1;
975 temp = roothub_a (controller);
976 ndp = (temp & RH_A_NDP);
977 #ifdef CONFIG_AT91C_PQFP_UHPBUG
978 ndp = (ndp == 2) ? 1:0;
979 #endif
980 for (i = 0; i < ndp; i++) {
981 temp = roothub_portstatus (controller, i);
982 /* check for a device disconnect */
983 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
984 (RH_PS_PESC | RH_PS_CSC)) &&
985 ((temp & RH_PS_CCS) == 0)) {
986 res = i;
987 break;
988 }
989 }
990 return res;
991 }
992
993 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
994 void *buffer, int transfer_len, struct devrequest *cmd)
995 {
996 void * data = buffer;
997 int leni = transfer_len;
998 int len = 0;
999 int stat = 0;
1000 __u32 datab[4];
1001 __u8 *data_buf = (__u8 *)datab;
1002 __u16 bmRType_bReq;
1003 __u16 wValue;
1004 __u16 wIndex;
1005 __u16 wLength;
1006
1007 #ifdef DEBUG
1008 urb_priv.actual_length = 0;
1009 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1010 #else
1011 wait_ms(1);
1012 #endif
1013 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1014 info("Root-Hub submit IRQ: NOT implemented");
1015 return 0;
1016 }
1017
1018 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1019 wValue = m16_swap (cmd->value);
1020 wIndex = m16_swap (cmd->index);
1021 wLength = m16_swap (cmd->length);
1022
1023 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1024 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1025
1026 switch (bmRType_bReq) {
1027 /* Request Destination:
1028 without flags: Device,
1029 RH_INTERFACE: interface,
1030 RH_ENDPOINT: endpoint,
1031 RH_CLASS means HUB here,
1032 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1033 */
1034
1035 case RH_GET_STATUS:
1036 *(__u16 *) data_buf = m16_swap (1); OK (2);
1037 case RH_GET_STATUS | RH_INTERFACE:
1038 *(__u16 *) data_buf = m16_swap (0); OK (2);
1039 case RH_GET_STATUS | RH_ENDPOINT:
1040 *(__u16 *) data_buf = m16_swap (0); OK (2);
1041 case RH_GET_STATUS | RH_CLASS:
1042 *(__u32 *) data_buf = m32_swap (
1043 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1044 OK (4);
1045 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1046 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1047
1048 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1049 switch (wValue) {
1050 case (RH_ENDPOINT_STALL): OK (0);
1051 }
1052 break;
1053
1054 case RH_CLEAR_FEATURE | RH_CLASS:
1055 switch (wValue) {
1056 case RH_C_HUB_LOCAL_POWER:
1057 OK(0);
1058 case (RH_C_HUB_OVER_CURRENT):
1059 WR_RH_STAT(RH_HS_OCIC); OK (0);
1060 }
1061 break;
1062
1063 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1064 switch (wValue) {
1065 case (RH_PORT_ENABLE):
1066 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1067 case (RH_PORT_SUSPEND):
1068 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1069 case (RH_PORT_POWER):
1070 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1071 case (RH_C_PORT_CONNECTION):
1072 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1073 case (RH_C_PORT_ENABLE):
1074 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1075 case (RH_C_PORT_SUSPEND):
1076 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1077 case (RH_C_PORT_OVER_CURRENT):
1078 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1079 case (RH_C_PORT_RESET):
1080 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1081 }
1082 break;
1083
1084 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1085 switch (wValue) {
1086 case (RH_PORT_SUSPEND):
1087 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1088 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1089 if (RD_RH_PORTSTAT & RH_PS_CCS)
1090 WR_RH_PORTSTAT (RH_PS_PRS);
1091 OK (0);
1092 case (RH_PORT_POWER):
1093 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1094 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1095 if (RD_RH_PORTSTAT & RH_PS_CCS)
1096 WR_RH_PORTSTAT (RH_PS_PES );
1097 OK (0);
1098 }
1099 break;
1100
1101 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1102
1103 case RH_GET_DESCRIPTOR:
1104 switch ((wValue & 0xff00) >> 8) {
1105 case (0x01): /* device descriptor */
1106 len = min_t(unsigned int,
1107 leni,
1108 min_t(unsigned int,
1109 sizeof (root_hub_dev_des),
1110 wLength));
1111 data_buf = root_hub_dev_des; OK(len);
1112 case (0x02): /* configuration descriptor */
1113 len = min_t(unsigned int,
1114 leni,
1115 min_t(unsigned int,
1116 sizeof (root_hub_config_des),
1117 wLength));
1118 data_buf = root_hub_config_des; OK(len);
1119 case (0x03): /* string descriptors */
1120 if(wValue==0x0300) {
1121 len = min_t(unsigned int,
1122 leni,
1123 min_t(unsigned int,
1124 sizeof (root_hub_str_index0),
1125 wLength));
1126 data_buf = root_hub_str_index0;
1127 OK(len);
1128 }
1129 if(wValue==0x0301) {
1130 len = min_t(unsigned int,
1131 leni,
1132 min_t(unsigned int,
1133 sizeof (root_hub_str_index1),
1134 wLength));
1135 data_buf = root_hub_str_index1;
1136 OK(len);
1137 }
1138 default:
1139 stat = USB_ST_STALLED;
1140 }
1141 break;
1142
1143 case RH_GET_DESCRIPTOR | RH_CLASS:
1144 {
1145 __u32 temp = roothub_a (&gohci);
1146
1147 data_buf [0] = 9; /* min length; */
1148 data_buf [1] = 0x29;
1149 data_buf [2] = temp & RH_A_NDP;
1150 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1151 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1152 #endif
1153 #if 0 /* def CONFIG_CPU_MONAHANS */
1154 data_buf [2] = (data_buf [2] == 2) ? 3:0;
1155 #endif
1156
1157 data_buf [3] = 0;
1158 if (temp & RH_A_PSM) /* per-port power switching? */
1159 data_buf [3] |= 0x1;
1160 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1161 data_buf [3] |= 0x10;
1162 #if 1
1163 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1164 data_buf [3] |= 0x8;
1165 #endif
1166
1167 /* corresponds to data_buf[4-7] */
1168 datab [1] = 0;
1169 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1170 temp = roothub_b (&gohci);
1171 data_buf [7] = temp & RH_B_DR;
1172 if (data_buf [2] < 7) {
1173 data_buf [8] = 0xff;
1174 } else {
1175 data_buf [0] += 2;
1176 data_buf [8] = (temp & RH_B_DR) >> 8;
1177 data_buf [10] = data_buf [9] = 0xff;
1178 }
1179
1180 len = min_t(unsigned int, leni,
1181 min_t(unsigned int, data_buf [0], wLength));
1182 OK (len);
1183 }
1184
1185 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1186
1187 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1188
1189 default:
1190 dbg ("unsupported root hub command");
1191 stat = USB_ST_STALLED;
1192 }
1193
1194 #ifdef DEBUG
1195 ohci_dump_roothub (&gohci, 1);
1196 #else
1197 wait_ms(1);
1198 #endif
1199
1200 len = min_t(int, len, leni);
1201 if (data != data_buf)
1202 memcpy (data, data_buf, len);
1203 dev->act_len = len;
1204 dev->status = stat;
1205
1206 #ifdef DEBUG
1207 if (transfer_len)
1208 urb_priv.actual_length = transfer_len;
1209 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1210 #else
1211 wait_ms(1);
1212 #endif
1213
1214 return stat;
1215 }
1216
1217 /*-------------------------------------------------------------------------*/
1218
1219 /* common code for handling submit messages - used for all but root hub */
1220 /* accesses. */
1221 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1222 int transfer_len, struct devrequest *setup, int interval)
1223 {
1224 int stat = 0;
1225 int maxsize = usb_maxpacket(dev, pipe);
1226 int timeout;
1227
1228 /* device pulled? Shortcut the action. */
1229 if (devgone == dev) {
1230 dev->status = USB_ST_CRC_ERR;
1231 return 0;
1232 }
1233
1234 #ifdef DEBUG
1235 urb_priv.actual_length = 0;
1236 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1237 #else
1238 wait_ms(1);
1239 #endif
1240 if (!maxsize) {
1241 err("submit_common_message: pipesize for pipe %lx is zero",
1242 pipe);
1243 return -1;
1244 }
1245
1246 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1247 err("sohci_submit_job failed");
1248 return -1;
1249 }
1250
1251 wait_ms(10);
1252 /* ohci_dump_status(&gohci); */
1253
1254 /* allow more time for a BULK device to react - some are slow */
1255 #define BULK_TO 5000 /* timeout in milliseconds */
1256 if (usb_pipetype (pipe) == PIPE_BULK)
1257 timeout = BULK_TO;
1258 else
1259 timeout = 100;
1260
1261 /* wait for it to complete */
1262 for (;;) {
1263 /* check whether the controller is done */
1264 stat = hc_interrupt();
1265 if (stat < 0) {
1266 stat = USB_ST_CRC_ERR;
1267 break;
1268 }
1269 if (stat >= 0 && stat != 0xff) {
1270 /* 0xff is returned for an SF-interrupt */
1271 break;
1272 }
1273 if (--timeout) {
1274 wait_ms(1);
1275 } else {
1276 err("CTL:TIMEOUT ");
1277 stat = USB_ST_CRC_ERR;
1278 break;
1279 }
1280 }
1281 /* we got an Root Hub Status Change interrupt */
1282 if (got_rhsc) {
1283 #ifdef DEBUG
1284 ohci_dump_roothub (&gohci, 1);
1285 #endif
1286 got_rhsc = 0;
1287 /* abuse timeout */
1288 timeout = rh_check_port_status(&gohci);
1289 if (timeout >= 0) {
1290 #if 0 /* this does nothing useful, but leave it here in case that changes */
1291 /* the called routine adds 1 to the passed value */
1292 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1293 #endif
1294 /*
1295 * XXX
1296 * This is potentially dangerous because it assumes
1297 * that only one device is ever plugged in!
1298 */
1299 devgone = dev;
1300 }
1301 }
1302
1303 dev->status = stat;
1304 dev->act_len = transfer_len;
1305
1306 #ifdef DEBUG
1307 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1308 #else
1309 wait_ms(1);
1310 #endif
1311
1312 /* free TDs in urb_priv */
1313 urb_free_priv (&urb_priv);
1314 return 0;
1315 }
1316
1317 /* submit routines called from usb.c */
1318 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1319 int transfer_len)
1320 {
1321 info("submit_bulk_msg");
1322 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1323 }
1324
1325 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1326 int transfer_len, struct devrequest *setup)
1327 {
1328 int maxsize = usb_maxpacket(dev, pipe);
1329
1330 info("submit_control_msg");
1331 #ifdef DEBUG
1332 urb_priv.actual_length = 0;
1333 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1334 #else
1335 wait_ms(1);
1336 #endif
1337 if (!maxsize) {
1338 err("submit_control_message: pipesize for pipe %lx is zero",
1339 pipe);
1340 return -1;
1341 }
1342 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1343 gohci.rh.dev = dev;
1344 /* root hub - redirect */
1345 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1346 setup);
1347 }
1348
1349 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1350 }
1351
1352 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1353 int transfer_len, int interval)
1354 {
1355 info("submit_int_msg");
1356 return -1;
1357 }
1358
1359 /*-------------------------------------------------------------------------*
1360 * HC functions
1361 *-------------------------------------------------------------------------*/
1362
1363 /* reset the HC and BUS */
1364
1365 static int hc_reset (ohci_t *ohci)
1366 {
1367 int timeout = 30;
1368 int smm_timeout = 50; /* 0,5 sec */
1369
1370 dbg("%s\n", __FUNCTION__);
1371
1372 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1373 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1374 info("USB HC TakeOver from SMM");
1375 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1376 wait_ms (10);
1377 if (--smm_timeout == 0) {
1378 err("USB HC TakeOver failed!");
1379 return -1;
1380 }
1381 }
1382 }
1383
1384 /* Disable HC interrupts */
1385 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1386
1387 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1388 ohci->slot_name,
1389 readl(&ohci->regs->control));
1390
1391 /* Reset USB (needed by some controllers) */
1392 writel (0, &ohci->regs->control);
1393
1394 /* HC Reset requires max 10 us delay */
1395 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1396 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1397 if (--timeout == 0) {
1398 err("USB HC reset timed out!");
1399 return -1;
1400 }
1401 udelay (1);
1402 }
1403 return 0;
1404 }
1405
1406 /*-------------------------------------------------------------------------*/
1407
1408 /* Start an OHCI controller, set the BUS operational
1409 * enable interrupts
1410 * connect the virtual root hub */
1411
1412 static int hc_start (ohci_t * ohci)
1413 {
1414 __u32 mask;
1415 unsigned int fminterval;
1416
1417 ohci->disabled = 1;
1418
1419 /* Tell the controller where the control and bulk lists are
1420 * The lists are empty now. */
1421
1422 writel (0, &ohci->regs->ed_controlhead);
1423 writel (0, &ohci->regs->ed_bulkhead);
1424
1425 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1426
1427 fminterval = 0x2edf;
1428 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1429 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1430 writel (fminterval, &ohci->regs->fminterval);
1431 writel (0x628, &ohci->regs->lsthresh);
1432
1433 /* start controller operations */
1434 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1435 ohci->disabled = 0;
1436 writel (ohci->hc_control, &ohci->regs->control);
1437
1438 /* disable all interrupts */
1439 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1440 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1441 OHCI_INTR_OC | OHCI_INTR_MIE);
1442 writel (mask, &ohci->regs->intrdisable);
1443 /* clear all interrupts */
1444 mask &= ~OHCI_INTR_MIE;
1445 writel (mask, &ohci->regs->intrstatus);
1446 /* Choose the interrupts we care about now - but w/o MIE */
1447 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1448 writel (mask, &ohci->regs->intrenable);
1449
1450 #ifdef OHCI_USE_NPS
1451 /* required for AMD-756 and some Mac platforms */
1452 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1453 &ohci->regs->roothub.a);
1454 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1455 #endif /* OHCI_USE_NPS */
1456
1457 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1458 /* POTPGT delay is bits 24-31, in 2 ms units. */
1459 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1460
1461 /* connect the virtual root hub */
1462 ohci->rh.devnum = 0;
1463
1464 return 0;
1465 }
1466
1467 /*-------------------------------------------------------------------------*/
1468
1469 /* an interrupt happens */
1470
1471 static int
1472 hc_interrupt (void)
1473 {
1474 ohci_t *ohci = &gohci;
1475 struct ohci_regs *regs = ohci->regs;
1476 int ints;
1477 int stat = -1;
1478
1479 if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1480 ints = OHCI_INTR_WDH;
1481 } else {
1482 ints = readl (&regs->intrstatus);
1483 }
1484
1485 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1486
1487 if (ints & OHCI_INTR_RHSC) {
1488 got_rhsc = 1;
1489 }
1490
1491 if (ints & OHCI_INTR_UE) {
1492 ohci->disabled++;
1493 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1494 ohci->slot_name);
1495 /* e.g. due to PCI Master/Target Abort */
1496
1497 #ifdef DEBUG
1498 ohci_dump (ohci, 1);
1499 #else
1500 wait_ms(1);
1501 #endif
1502 /* FIXME: be optimistic, hope that bug won't repeat often. */
1503 /* Make some non-interrupt context restart the controller. */
1504 /* Count and limit the retries though; either hardware or */
1505 /* software errors can go forever... */
1506 hc_reset (ohci);
1507 return -1;
1508 }
1509
1510 if (ints & OHCI_INTR_WDH) {
1511 wait_ms(1);
1512 writel (OHCI_INTR_WDH, &regs->intrdisable);
1513 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1514 writel (OHCI_INTR_WDH, &regs->intrenable);
1515 }
1516
1517 if (ints & OHCI_INTR_SO) {
1518 dbg("USB Schedule overrun\n");
1519 writel (OHCI_INTR_SO, &regs->intrenable);
1520 stat = -1;
1521 }
1522
1523 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1524 if (ints & OHCI_INTR_SF) {
1525 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1526 wait_ms(1);
1527 writel (OHCI_INTR_SF, &regs->intrdisable);
1528 if (ohci->ed_rm_list[frame] != NULL)
1529 writel (OHCI_INTR_SF, &regs->intrenable);
1530 stat = 0xff;
1531 }
1532
1533 writel (ints, &regs->intrstatus);
1534 return stat;
1535 }
1536
1537 /*-------------------------------------------------------------------------*/
1538
1539 /*-------------------------------------------------------------------------*/
1540
1541 /* De-allocate all resources.. */
1542
1543 static void hc_release_ohci (ohci_t *ohci)
1544 {
1545 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1546
1547 if (!ohci->disabled)
1548 hc_reset (ohci);
1549 }
1550
1551 /*-------------------------------------------------------------------------*/
1552
1553 /*
1554 * low level initalisation routine, called from usb.c
1555 */
1556 static char ohci_inited = 0;
1557
1558 int usb_lowlevel_init(void)
1559 {
1560 /* do board dependant init */
1561 if(usb_board_init())
1562 return -1;
1563
1564 memset (&gohci, 0, sizeof (ohci_t));
1565 memset (&urb_priv, 0, sizeof (urb_priv_t));
1566
1567 /* align the storage */
1568 if ((__u32)&ghcca[0] & 0xff) {
1569 err("HCCA not aligned!!");
1570 return -1;
1571 }
1572 phcca = &ghcca[0];
1573 info("aligned ghcca %p", phcca);
1574 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1575 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1576 err("EDs not aligned!!");
1577 return -1;
1578 }
1579 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1580 if ((__u32)gtd & 0x7) {
1581 err("TDs not aligned!!");
1582 return -1;
1583 }
1584 ptd = gtd;
1585 gohci.hcca = phcca;
1586 memset (phcca, 0, sizeof (struct ohci_hcca));
1587
1588 gohci.disabled = 1;
1589 gohci.sleeping = 0;
1590 gohci.irq = -1;
1591 gohci.regs = (struct ohci_regs *)OHCI_REGS_BASE;
1592
1593 gohci.flags = 0;
1594 gohci.slot_name = "delta/zylonite";
1595
1596 if (hc_reset (&gohci) < 0) {
1597 hc_release_ohci (&gohci);
1598 err ("can't reset usb-%s", gohci.slot_name);
1599 /* Initialization failed disable clocks */
1600 CKENA &= ~(CKENA_2_USBHOST | CKENA_20_UDC);
1601 return -1;
1602 }
1603
1604 /* FIXME this is a second HC reset; why?? */
1605 /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1606 wait_ms(10); */
1607
1608 if (hc_start (&gohci) < 0) {
1609 err ("can't start usb-%s", gohci.slot_name);
1610 hc_release_ohci (&gohci);
1611 /* Initialization failed */
1612 CKENA &= ~(CKENA_2_USBHOST | CKENA_20_UDC);
1613 return -1;
1614 }
1615
1616 #ifdef DEBUG
1617 ohci_dump (&gohci, 1);
1618 #else
1619 wait_ms(1);
1620 #endif
1621 ohci_inited = 1;
1622 return 0;
1623 }
1624
1625 int usb_lowlevel_stop(void)
1626 {
1627 /* this gets called really early - before the controller has */
1628 /* even been initialized! */
1629 if (!ohci_inited)
1630 return 0;
1631 /* TODO release any interrupts, etc. */
1632 /* call hc_release_ohci() here ? */
1633 hc_reset (&gohci);
1634
1635 /* board dependant cleanup */
1636 if(usb_board_stop())
1637 return -1;
1638
1639 return 0;
1640 }
1641
1642 #endif /* CONFIG_USB_OHCI */
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