2 * Copyright (C) 2012 Samsung Electronics
4 * Author: InKi Dae <inki.dae@samsung.com>
5 * Author: Donghwa Lee <dh09.lee@samsung.com>
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/dsim.h>
12 #include <asm/arch/mipi_dsim.h>
13 #include <asm/arch/power.h>
14 #include <asm/arch/cpu.h>
16 #include "exynos_mipi_dsi_lowlevel.h"
17 #include "exynos_mipi_dsi_common.h"
19 void exynos_mipi_dsi_func_reset(struct mipi_dsim_device
*dsim
)
23 struct exynos_mipi_dsim
*mipi_dsim
=
24 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
26 reg
= readl(&mipi_dsim
->swrst
);
30 writel(reg
, &mipi_dsim
->swrst
);
33 void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device
*dsim
)
37 struct exynos_mipi_dsim
*mipi_dsim
=
38 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
40 reg
= readl(&mipi_dsim
->swrst
);
45 writel(reg
, &mipi_dsim
->swrst
);
48 void exynos_mipi_dsi_sw_release(struct mipi_dsim_device
*dsim
)
50 struct exynos_mipi_dsim
*mipi_dsim
=
51 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
52 unsigned int reg
= readl(&mipi_dsim
->intsrc
);
54 reg
|= INTSRC_SWRST_RELEASE
;
56 writel(reg
, &mipi_dsim
->intsrc
);
59 void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device
*dsim
,
60 unsigned int mode
, unsigned int mask
)
62 struct exynos_mipi_dsim
*mipi_dsim
=
63 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
64 unsigned int reg
= readl(&mipi_dsim
->intmsk
);
71 writel(reg
, &mipi_dsim
->intmsk
);
74 void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device
*dsim
,
78 struct exynos_mipi_dsim
*mipi_dsim
=
79 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
81 reg
= readl(&mipi_dsim
->fifoctrl
);
83 writel(reg
& ~(cfg
), &mipi_dsim
->fifoctrl
);
87 writel(reg
, &mipi_dsim
->fifoctrl
);
91 * this function set PLL P, M and S value in D-PHY
93 void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device
*dsim
,
96 struct exynos_mipi_dsim
*mipi_dsim
=
97 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
99 writel(DSIM_AFC_CTL(value
), &mipi_dsim
->phyacchr
);
102 void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device
*dsim
,
103 unsigned int width_resol
, unsigned int height_resol
)
106 struct exynos_mipi_dsim
*mipi_dsim
=
107 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
109 /* standby should be set after configuration so set to not ready*/
110 reg
= (readl(&mipi_dsim
->mdresol
)) & ~(DSIM_MAIN_STAND_BY
);
111 writel(reg
, &mipi_dsim
->mdresol
);
113 /* reset resolution */
114 reg
&= ~(DSIM_MAIN_VRESOL(0x7ff) | DSIM_MAIN_HRESOL(0x7ff));
115 reg
|= DSIM_MAIN_VRESOL(height_resol
) | DSIM_MAIN_HRESOL(width_resol
);
117 reg
|= DSIM_MAIN_STAND_BY
;
118 writel(reg
, &mipi_dsim
->mdresol
);
121 void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device
*dsim
,
122 unsigned int cmd_allow
, unsigned int vfront
, unsigned int vback
)
125 struct exynos_mipi_dsim
*mipi_dsim
=
126 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
128 reg
= (readl(&mipi_dsim
->mvporch
)) &
129 ~((DSIM_CMD_ALLOW_MASK
) | (DSIM_STABLE_VFP_MASK
) |
130 (DSIM_MAIN_VBP_MASK
));
132 reg
|= ((cmd_allow
& 0xf) << DSIM_CMD_ALLOW_SHIFT
) |
133 ((vfront
& 0x7ff) << DSIM_STABLE_VFP_SHIFT
) |
134 ((vback
& 0x7ff) << DSIM_MAIN_VBP_SHIFT
);
136 writel(reg
, &mipi_dsim
->mvporch
);
139 void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device
*dsim
,
140 unsigned int front
, unsigned int back
)
143 struct exynos_mipi_dsim
*mipi_dsim
=
144 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
146 reg
= (readl(&mipi_dsim
->mhporch
)) &
147 ~((DSIM_MAIN_HFP_MASK
) | (DSIM_MAIN_HBP_MASK
));
149 reg
|= (front
<< DSIM_MAIN_HFP_SHIFT
) | (back
<< DSIM_MAIN_HBP_SHIFT
);
151 writel(reg
, &mipi_dsim
->mhporch
);
154 void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device
*dsim
,
155 unsigned int vert
, unsigned int hori
)
158 struct exynos_mipi_dsim
*mipi_dsim
=
159 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
161 reg
= (readl(&mipi_dsim
->msync
)) &
162 ~((DSIM_MAIN_VSA_MASK
) | (DSIM_MAIN_HSA_MASK
));
164 reg
|= ((vert
& 0x3ff) << DSIM_MAIN_VSA_SHIFT
) |
165 (hori
<< DSIM_MAIN_HSA_SHIFT
);
167 writel(reg
, &mipi_dsim
->msync
);
170 void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device
*dsim
,
171 unsigned int vert
, unsigned int hori
)
174 struct exynos_mipi_dsim
*mipi_dsim
=
175 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
177 reg
= (readl(&mipi_dsim
->sdresol
)) &
178 ~(DSIM_SUB_STANDY_MASK
);
180 writel(reg
, &mipi_dsim
->sdresol
);
182 reg
&= ~(DSIM_SUB_VRESOL_MASK
) | ~(DSIM_SUB_HRESOL_MASK
);
183 reg
|= ((vert
& 0x7ff) << DSIM_SUB_VRESOL_SHIFT
) |
184 ((hori
& 0x7ff) << DSIM_SUB_HRESOL_SHIFT
);
185 writel(reg
, &mipi_dsim
->sdresol
);
188 reg
|= (1 << DSIM_SUB_STANDY_SHIFT
);
189 writel(reg
, &mipi_dsim
->sdresol
);
192 void exynos_mipi_dsi_init_config(struct mipi_dsim_device
*dsim
)
194 struct mipi_dsim_config
*dsim_config
= dsim
->dsim_config
;
195 struct exynos_mipi_dsim
*mipi_dsim
=
196 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
197 unsigned int cfg
= (readl(&mipi_dsim
->config
)) &
198 ~((1 << DSIM_EOT_PACKET_SHIFT
) |
199 (0x1f << DSIM_HSA_MODE_SHIFT
) |
200 (0x3 << DSIM_NUM_OF_DATALANE_SHIFT
));
202 cfg
|= (dsim_config
->auto_flush
<< DSIM_AUTO_FLUSH_SHIFT
) |
203 (dsim_config
->eot_disable
<< DSIM_EOT_PACKET_SHIFT
) |
204 (dsim_config
->auto_vertical_cnt
<< DSIM_AUTO_MODE_SHIFT
) |
205 (dsim_config
->hse
<< DSIM_HSE_MODE_SHIFT
) |
206 (dsim_config
->hfp
<< DSIM_HFP_MODE_SHIFT
) |
207 (dsim_config
->hbp
<< DSIM_HBP_MODE_SHIFT
) |
208 (dsim_config
->hsa
<< DSIM_HSA_MODE_SHIFT
) |
209 (dsim_config
->e_no_data_lane
<< DSIM_NUM_OF_DATALANE_SHIFT
);
211 writel(cfg
, &mipi_dsim
->config
);
214 void exynos_mipi_dsi_display_config(struct mipi_dsim_device
*dsim
,
215 struct mipi_dsim_config
*dsim_config
)
217 struct exynos_mipi_dsim
*mipi_dsim
=
218 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
220 u32 reg
= (readl(&mipi_dsim
->config
)) &
221 ~((0x3 << DSIM_BURST_MODE_SHIFT
) | (1 << DSIM_VIDEO_MODE_SHIFT
)
222 | (0x3 << DSIM_MAINVC_SHIFT
) | (0x7 << DSIM_MAINPIX_SHIFT
)
223 | (0x3 << DSIM_SUBVC_SHIFT
) | (0x7 << DSIM_SUBPIX_SHIFT
));
225 if (dsim_config
->e_interface
== DSIM_VIDEO
)
226 reg
|= (1 << DSIM_VIDEO_MODE_SHIFT
);
227 else if (dsim_config
->e_interface
== DSIM_COMMAND
)
228 reg
&= ~(1 << DSIM_VIDEO_MODE_SHIFT
);
230 printf("unknown lcd type.\n");
235 reg
|= ((u8
) (dsim_config
->e_burst_mode
) & 0x3) << DSIM_BURST_MODE_SHIFT
236 | ((u8
) (dsim_config
->e_virtual_ch
) & 0x3) << DSIM_MAINVC_SHIFT
237 | ((u8
) (dsim_config
->e_pixel_format
) & 0x7) << DSIM_MAINPIX_SHIFT
;
239 writel(reg
, &mipi_dsim
->config
);
242 void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device
*dsim
,
243 unsigned int lane
, unsigned int enable
)
246 struct exynos_mipi_dsim
*mipi_dsim
=
247 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
249 reg
= readl(&mipi_dsim
->config
);
252 reg
|= DSIM_LANE_ENx(lane
);
254 reg
&= ~DSIM_LANE_ENx(lane
);
256 writel(reg
, &mipi_dsim
->config
);
259 void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device
*dsim
,
263 struct exynos_mipi_dsim
*mipi_dsim
=
264 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
266 /* get the data lane number. */
267 cfg
= DSIM_NUM_OF_DATA_LANE(count
);
269 writel(cfg
, &mipi_dsim
->config
);
272 void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device
*dsim
,
273 unsigned int enable
, unsigned int afc_code
)
275 struct exynos_mipi_dsim
*mipi_dsim
=
276 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
277 unsigned int reg
= readl(&mipi_dsim
->phyacchr
);
283 reg
&= ~(0x7 << DSIM_AFC_CTL_SHIFT
);
284 reg
|= DSIM_AFC_CTL(afc_code
);
288 writel(reg
, &mipi_dsim
->phyacchr
);
291 void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device
*dsim
,
294 struct exynos_mipi_dsim
*mipi_dsim
=
295 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
296 unsigned int reg
= (readl(&mipi_dsim
->clkctrl
)) &
297 ~(DSIM_PLL_BYPASS_EXTERNAL
);
299 reg
|= enable
<< DSIM_PLL_BYPASS_SHIFT
;
301 writel(reg
, &mipi_dsim
->clkctrl
);
304 void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device
*dsim
,
305 unsigned int freq_band
)
307 struct exynos_mipi_dsim
*mipi_dsim
=
308 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
309 unsigned int reg
= (readl(&mipi_dsim
->pllctrl
)) &
310 ~(0x1f << DSIM_FREQ_BAND_SHIFT
);
312 reg
|= ((freq_band
& 0x1f) << DSIM_FREQ_BAND_SHIFT
);
314 writel(reg
, &mipi_dsim
->pllctrl
);
317 void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device
*dsim
,
318 unsigned int pre_divider
, unsigned int main_divider
,
321 struct exynos_mipi_dsim
*mipi_dsim
=
322 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
323 unsigned int reg
= (readl(&mipi_dsim
->pllctrl
)) &
326 reg
|= ((pre_divider
& 0x3f) << DSIM_PREDIV_SHIFT
) |
327 ((main_divider
& 0x1ff) << DSIM_MAIN_SHIFT
) |
328 ((scaler
& 0x7) << DSIM_SCALER_SHIFT
);
330 writel(reg
, &mipi_dsim
->pllctrl
);
333 void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device
*dsim
,
334 unsigned int lock_time
)
336 struct exynos_mipi_dsim
*mipi_dsim
=
337 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
339 writel(lock_time
, &mipi_dsim
->plltmr
);
342 void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device
*dsim
,
345 struct exynos_mipi_dsim
*mipi_dsim
=
346 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
347 unsigned int reg
= (readl(&mipi_dsim
->pllctrl
)) &
348 ~(0x1 << DSIM_PLL_EN_SHIFT
);
350 reg
|= ((enable
& 0x1) << DSIM_PLL_EN_SHIFT
);
352 writel(reg
, &mipi_dsim
->pllctrl
);
355 void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device
*dsim
,
358 struct exynos_mipi_dsim
*mipi_dsim
=
359 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
360 unsigned int reg
= (readl(&mipi_dsim
->clkctrl
)) &
361 ~(0x3 << DSIM_BYTE_CLK_SRC_SHIFT
);
363 reg
|= ((unsigned int) src
) << DSIM_BYTE_CLK_SRC_SHIFT
;
365 writel(reg
, &mipi_dsim
->clkctrl
);
368 void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device
*dsim
,
371 struct exynos_mipi_dsim
*mipi_dsim
=
372 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
373 unsigned int reg
= (readl(&mipi_dsim
->clkctrl
)) &
374 ~(1 << DSIM_BYTE_CLKEN_SHIFT
);
376 reg
|= enable
<< DSIM_BYTE_CLKEN_SHIFT
;
378 writel(reg
, &mipi_dsim
->clkctrl
);
381 void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device
*dsim
,
382 unsigned int enable
, unsigned int prs_val
)
384 struct exynos_mipi_dsim
*mipi_dsim
=
385 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
386 unsigned int reg
= (readl(&mipi_dsim
->clkctrl
)) &
387 ~((1 << DSIM_ESC_CLKEN_SHIFT
) | (0xffff));
389 reg
|= enable
<< DSIM_ESC_CLKEN_SHIFT
;
393 writel(reg
, &mipi_dsim
->clkctrl
);
396 void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device
*dsim
,
397 unsigned int lane_sel
, unsigned int enable
)
399 struct exynos_mipi_dsim
*mipi_dsim
=
400 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
401 unsigned int reg
= readl(&mipi_dsim
->clkctrl
);
404 reg
|= DSIM_LANE_ESC_CLKEN(lane_sel
);
406 reg
&= ~DSIM_LANE_ESC_CLKEN(lane_sel
);
408 writel(reg
, &mipi_dsim
->clkctrl
);
411 void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device
*dsim
,
414 struct exynos_mipi_dsim
*mipi_dsim
=
415 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
416 unsigned int reg
= (readl(&mipi_dsim
->escmode
)) &
417 ~(0x1 << DSIM_FORCE_STOP_STATE_SHIFT
);
419 reg
|= ((enable
& 0x1) << DSIM_FORCE_STOP_STATE_SHIFT
);
421 writel(reg
, &mipi_dsim
->escmode
);
424 unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device
*dsim
)
426 struct exynos_mipi_dsim
*mipi_dsim
=
427 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
428 unsigned int reg
= readl(&mipi_dsim
->status
);
431 * check clock and data lane states.
432 * if MIPI-DSI controller was enabled at bootloader then
433 * TX_READY_HS_CLK is enabled otherwise STOP_STATE_CLK.
434 * so it should be checked for two case.
436 if ((reg
& DSIM_STOP_STATE_DAT(0xf)) &&
437 ((reg
& DSIM_STOP_STATE_CLK
) ||
438 (reg
& DSIM_TX_READY_HS_CLK
)))
444 void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device
*dsim
,
445 unsigned int cnt_val
)
447 struct exynos_mipi_dsim
*mipi_dsim
=
448 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
449 unsigned int reg
= (readl(&mipi_dsim
->escmode
)) &
450 ~(0x7ff << DSIM_STOP_STATE_CNT_SHIFT
);
452 reg
|= ((cnt_val
& 0x7ff) << DSIM_STOP_STATE_CNT_SHIFT
);
454 writel(reg
, &mipi_dsim
->escmode
);
457 void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device
*dsim
,
458 unsigned int timeout
)
460 struct exynos_mipi_dsim
*mipi_dsim
=
461 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
462 unsigned int reg
= (readl(&mipi_dsim
->timeout
)) &
463 ~(0xff << DSIM_BTA_TOUT_SHIFT
);
465 reg
|= (timeout
<< DSIM_BTA_TOUT_SHIFT
);
467 writel(reg
, &mipi_dsim
->timeout
);
470 void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device
*dsim
,
471 unsigned int timeout
)
473 struct exynos_mipi_dsim
*mipi_dsim
=
474 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
475 unsigned int reg
= (readl(&mipi_dsim
->timeout
)) &
476 ~(0xffff << DSIM_LPDR_TOUT_SHIFT
);
478 reg
|= (timeout
<< DSIM_LPDR_TOUT_SHIFT
);
480 writel(reg
, &mipi_dsim
->timeout
);
483 void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device
*dsim
,
486 struct exynos_mipi_dsim
*mipi_dsim
=
487 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
488 unsigned int reg
= readl(&mipi_dsim
->escmode
);
490 reg
&= ~DSIM_CMD_LPDT_LP
;
493 reg
|= DSIM_CMD_LPDT_LP
;
495 writel(reg
, &mipi_dsim
->escmode
);
498 void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device
*dsim
,
501 struct exynos_mipi_dsim
*mipi_dsim
=
502 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
503 unsigned int reg
= readl(&mipi_dsim
->escmode
);
505 reg
&= ~DSIM_TX_LPDT_LP
;
508 reg
|= DSIM_TX_LPDT_LP
;
510 writel(reg
, &mipi_dsim
->escmode
);
513 void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device
*dsim
,
516 struct exynos_mipi_dsim
*mipi_dsim
=
517 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
518 unsigned int reg
= (readl(&mipi_dsim
->clkctrl
)) &
519 ~(1 << DSIM_TX_REQUEST_HSCLK_SHIFT
);
521 reg
|= enable
<< DSIM_TX_REQUEST_HSCLK_SHIFT
;
523 writel(reg
, &mipi_dsim
->clkctrl
);
526 void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device
*dsim
,
527 unsigned int swap_en
)
529 struct exynos_mipi_dsim
*mipi_dsim
=
530 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
531 unsigned int reg
= readl(&mipi_dsim
->phyacchr1
);
533 reg
&= ~(0x3 << DSIM_DPDN_SWAP_DATA_SHIFT
);
534 reg
|= (swap_en
& 0x3) << DSIM_DPDN_SWAP_DATA_SHIFT
;
536 writel(reg
, &mipi_dsim
->phyacchr1
);
539 void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device
*dsim
,
540 unsigned int hs_zero
)
542 struct exynos_mipi_dsim
*mipi_dsim
=
543 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
544 unsigned int reg
= (readl(&mipi_dsim
->pllctrl
)) &
545 ~(0xf << DSIM_ZEROCTRL_SHIFT
);
547 reg
|= ((hs_zero
& 0xf) << DSIM_ZEROCTRL_SHIFT
);
549 writel(reg
, &mipi_dsim
->pllctrl
);
552 void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device
*dsim
, unsigned int prep
)
554 struct exynos_mipi_dsim
*mipi_dsim
=
555 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
556 unsigned int reg
= (readl(&mipi_dsim
->pllctrl
)) &
557 ~(0x7 << DSIM_PRECTRL_SHIFT
);
559 reg
|= ((prep
& 0x7) << DSIM_PRECTRL_SHIFT
);
561 writel(reg
, &mipi_dsim
->pllctrl
);
564 void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device
*dsim
)
566 struct exynos_mipi_dsim
*mipi_dsim
=
567 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
568 unsigned int reg
= readl(&mipi_dsim
->intsrc
);
570 reg
|= INTSRC_PLL_STABLE
;
572 writel(reg
, &mipi_dsim
->intsrc
);
575 void exynos_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device
*dsim
)
577 struct exynos_mipi_dsim
*mipi_dsim
=
578 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
580 writel(0xffffffff, &mipi_dsim
->intsrc
);
583 unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device
*dsim
)
586 struct exynos_mipi_dsim
*mipi_dsim
=
587 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
589 reg
= readl(&mipi_dsim
->status
);
591 return reg
& DSIM_PLL_STABLE
? 1 : 0;
594 unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device
*dsim
)
596 struct exynos_mipi_dsim
*mipi_dsim
=
597 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
599 return readl(&mipi_dsim
->fifoctrl
) & ~(0x1f);
602 void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device
*dsim
,
603 unsigned int di
, const unsigned char data0
, const unsigned char data1
)
605 struct exynos_mipi_dsim
*mipi_dsim
=
606 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
607 unsigned int reg
= (DSIM_PKTHDR_DAT1(data1
) | DSIM_PKTHDR_DAT0(data0
) |
610 writel(reg
, &mipi_dsim
->pkthdr
);
613 unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device
616 struct exynos_mipi_dsim
*mipi_dsim
=
617 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
618 unsigned int reg
= readl(&mipi_dsim
->intsrc
);
620 return (reg
& INTSRC_FRAME_DONE
) ? 1 : 0;
623 void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device
*dsim
)
625 struct exynos_mipi_dsim
*mipi_dsim
=
626 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
627 unsigned int reg
= readl(&mipi_dsim
->intsrc
);
629 writel(reg
| INTSRC_FRAME_DONE
, &mipi_dsim
->intsrc
);
632 void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device
*dsim
,
633 unsigned int tx_data
)
635 struct exynos_mipi_dsim
*mipi_dsim
=
636 (struct exynos_mipi_dsim
*)samsung_get_base_mipi_dsim();
638 writel(tx_data
, &mipi_dsim
->payload
);