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[thirdparty/linux.git] / drivers / video / fbdev / omap2 / omapfb / dss / rfbi.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/drivers/video/omap2/dss/rfbi.c
4 *
5 * Copyright (C) 2009 Nokia Corporation
6 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 *
8 * Some code and ideas taken from drivers/video/omap/ driver
9 * by Imre Deak.
10 */
11
12 #define DSS_SUBSYS_NAME "RFBI"
13
14 #include <linux/kernel.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/export.h>
17 #include <linux/vmalloc.h>
18 #include <linux/clk.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/kfifo.h>
22 #include <linux/ktime.h>
23 #include <linux/hrtimer.h>
24 #include <linux/seq_file.h>
25 #include <linux/semaphore.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/component.h>
29
30 #include <video/omapfb_dss.h>
31 #include "dss.h"
32
33 struct rfbi_reg { u16 idx; };
34
35 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
36
37 #define RFBI_REVISION RFBI_REG(0x0000)
38 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
39 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
40 #define RFBI_CONTROL RFBI_REG(0x0040)
41 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
42 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
43 #define RFBI_CMD RFBI_REG(0x004c)
44 #define RFBI_PARAM RFBI_REG(0x0050)
45 #define RFBI_DATA RFBI_REG(0x0054)
46 #define RFBI_READ RFBI_REG(0x0058)
47 #define RFBI_STATUS RFBI_REG(0x005c)
48
49 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
50 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
51 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
52 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
53 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
54 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
55
56 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
57 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
58
59 #define REG_FLD_MOD(idx, val, start, end) \
60 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
61
62 enum omap_rfbi_cycleformat {
63 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
64 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
65 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
66 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
67 };
68
69 enum omap_rfbi_datatype {
70 OMAP_DSS_RFBI_DATATYPE_12 = 0,
71 OMAP_DSS_RFBI_DATATYPE_16 = 1,
72 OMAP_DSS_RFBI_DATATYPE_18 = 2,
73 OMAP_DSS_RFBI_DATATYPE_24 = 3,
74 };
75
76 enum omap_rfbi_parallelmode {
77 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
78 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
79 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
80 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
81 };
82
83 static int rfbi_convert_timings(struct rfbi_timings *t);
84 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
85
86 static struct {
87 struct platform_device *pdev;
88 void __iomem *base;
89
90 unsigned long l4_khz;
91
92 enum omap_rfbi_datatype datatype;
93 enum omap_rfbi_parallelmode parallelmode;
94
95 enum omap_rfbi_te_mode te_mode;
96 int te_enabled;
97
98 void (*framedone_callback)(void *data);
99 void *framedone_callback_data;
100
101 struct omap_dss_device *dssdev[2];
102
103 struct semaphore bus_lock;
104
105 struct omap_video_timings timings;
106 int pixel_size;
107 int data_lines;
108 struct rfbi_timings intf_timings;
109
110 struct omap_dss_device output;
111 } rfbi;
112
113 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
114 {
115 __raw_writel(val, rfbi.base + idx.idx);
116 }
117
118 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
119 {
120 return __raw_readl(rfbi.base + idx.idx);
121 }
122
123 static int rfbi_runtime_get(void)
124 {
125 int r;
126
127 DSSDBG("rfbi_runtime_get\n");
128
129 r = pm_runtime_get_sync(&rfbi.pdev->dev);
130 WARN_ON(r < 0);
131 return r < 0 ? r : 0;
132 }
133
134 static void rfbi_runtime_put(void)
135 {
136 int r;
137
138 DSSDBG("rfbi_runtime_put\n");
139
140 r = pm_runtime_put_sync(&rfbi.pdev->dev);
141 WARN_ON(r < 0 && r != -ENOSYS);
142 }
143
144 static void rfbi_bus_lock(void)
145 {
146 down(&rfbi.bus_lock);
147 }
148
149 static void rfbi_bus_unlock(void)
150 {
151 up(&rfbi.bus_lock);
152 }
153
154 static void rfbi_write_command(const void *buf, u32 len)
155 {
156 switch (rfbi.parallelmode) {
157 case OMAP_DSS_RFBI_PARALLELMODE_8:
158 {
159 const u8 *b = buf;
160 for (; len; len--)
161 rfbi_write_reg(RFBI_CMD, *b++);
162 break;
163 }
164
165 case OMAP_DSS_RFBI_PARALLELMODE_16:
166 {
167 const u16 *w = buf;
168 BUG_ON(len & 1);
169 for (; len; len -= 2)
170 rfbi_write_reg(RFBI_CMD, *w++);
171 break;
172 }
173
174 case OMAP_DSS_RFBI_PARALLELMODE_9:
175 case OMAP_DSS_RFBI_PARALLELMODE_12:
176 default:
177 BUG();
178 }
179 }
180
181 static void rfbi_read_data(void *buf, u32 len)
182 {
183 switch (rfbi.parallelmode) {
184 case OMAP_DSS_RFBI_PARALLELMODE_8:
185 {
186 u8 *b = buf;
187 for (; len; len--) {
188 rfbi_write_reg(RFBI_READ, 0);
189 *b++ = rfbi_read_reg(RFBI_READ);
190 }
191 break;
192 }
193
194 case OMAP_DSS_RFBI_PARALLELMODE_16:
195 {
196 u16 *w = buf;
197 BUG_ON(len & ~1);
198 for (; len; len -= 2) {
199 rfbi_write_reg(RFBI_READ, 0);
200 *w++ = rfbi_read_reg(RFBI_READ);
201 }
202 break;
203 }
204
205 case OMAP_DSS_RFBI_PARALLELMODE_9:
206 case OMAP_DSS_RFBI_PARALLELMODE_12:
207 default:
208 BUG();
209 }
210 }
211
212 static void rfbi_write_data(const void *buf, u32 len)
213 {
214 switch (rfbi.parallelmode) {
215 case OMAP_DSS_RFBI_PARALLELMODE_8:
216 {
217 const u8 *b = buf;
218 for (; len; len--)
219 rfbi_write_reg(RFBI_PARAM, *b++);
220 break;
221 }
222
223 case OMAP_DSS_RFBI_PARALLELMODE_16:
224 {
225 const u16 *w = buf;
226 BUG_ON(len & 1);
227 for (; len; len -= 2)
228 rfbi_write_reg(RFBI_PARAM, *w++);
229 break;
230 }
231
232 case OMAP_DSS_RFBI_PARALLELMODE_9:
233 case OMAP_DSS_RFBI_PARALLELMODE_12:
234 default:
235 BUG();
236
237 }
238 }
239
240 static void rfbi_write_pixels(const void __iomem *buf, int scr_width,
241 u16 x, u16 y,
242 u16 w, u16 h)
243 {
244 int start_offset = scr_width * y + x;
245 int horiz_offset = scr_width - w;
246 int i;
247
248 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
249 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
250 const u16 __iomem *pd = buf;
251 pd += start_offset;
252
253 for (; h; --h) {
254 for (i = 0; i < w; ++i) {
255 const u8 __iomem *b = (const u8 __iomem *)pd;
256 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
257 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
258 ++pd;
259 }
260 pd += horiz_offset;
261 }
262 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
263 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
264 const u32 __iomem *pd = buf;
265 pd += start_offset;
266
267 for (; h; --h) {
268 for (i = 0; i < w; ++i) {
269 const u8 __iomem *b = (const u8 __iomem *)pd;
270 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
271 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
272 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
273 ++pd;
274 }
275 pd += horiz_offset;
276 }
277 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
278 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
279 const u16 __iomem *pd = buf;
280 pd += start_offset;
281
282 for (; h; --h) {
283 for (i = 0; i < w; ++i) {
284 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
285 ++pd;
286 }
287 pd += horiz_offset;
288 }
289 } else {
290 BUG();
291 }
292 }
293
294 static int rfbi_transfer_area(struct omap_dss_device *dssdev,
295 void (*callback)(void *data), void *data)
296 {
297 u32 l;
298 int r;
299 struct omap_overlay_manager *mgr = rfbi.output.manager;
300 u16 width = rfbi.timings.x_res;
301 u16 height = rfbi.timings.y_res;
302
303 /*BUG_ON(callback == 0);*/
304 BUG_ON(rfbi.framedone_callback != NULL);
305
306 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
307
308 dss_mgr_set_timings(mgr, &rfbi.timings);
309
310 r = dss_mgr_enable(mgr);
311 if (r)
312 return r;
313
314 rfbi.framedone_callback = callback;
315 rfbi.framedone_callback_data = data;
316
317 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
318
319 l = rfbi_read_reg(RFBI_CONTROL);
320 l = FLD_MOD(l, 1, 0, 0); /* enable */
321 if (!rfbi.te_enabled)
322 l = FLD_MOD(l, 1, 4, 4); /* ITE */
323
324 rfbi_write_reg(RFBI_CONTROL, l);
325
326 return 0;
327 }
328
329 static void framedone_callback(void *data)
330 {
331 void (*callback)(void *data);
332
333 DSSDBG("FRAMEDONE\n");
334
335 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
336
337 callback = rfbi.framedone_callback;
338 rfbi.framedone_callback = NULL;
339
340 if (callback != NULL)
341 callback(rfbi.framedone_callback_data);
342 }
343
344 #if 1 /* VERBOSE */
345 static void rfbi_print_timings(void)
346 {
347 u32 l;
348 u32 time;
349
350 l = rfbi_read_reg(RFBI_CONFIG(0));
351 time = 1000000000 / rfbi.l4_khz;
352 if (l & (1 << 4))
353 time *= 2;
354
355 DSSDBG("Tick time %u ps\n", time);
356 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
357 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
358 "REONTIME %d, REOFFTIME %d\n",
359 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
360 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
361
362 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
363 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
364 "ACCESSTIME %d\n",
365 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
366 (l >> 22) & 0x3f);
367 }
368 #else
369 static void rfbi_print_timings(void) {}
370 #endif
371
372
373
374
375 static u32 extif_clk_period;
376
377 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
378 {
379 int bus_tick = extif_clk_period * div;
380 return (ps + bus_tick - 1) / bus_tick * bus_tick;
381 }
382
383 static int calc_reg_timing(struct rfbi_timings *t, int div)
384 {
385 t->clk_div = div;
386
387 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
388
389 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
390 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
391 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
392
393 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
394 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
395 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
396
397 t->access_time = round_to_extif_ticks(t->access_time, div);
398 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
399 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
400
401 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
402 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
403 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
404 t->we_on_time, t->we_off_time, t->re_cycle_time,
405 t->we_cycle_time);
406 DSSDBG("[reg]rdaccess %d cspulse %d\n",
407 t->access_time, t->cs_pulse_width);
408
409 return rfbi_convert_timings(t);
410 }
411
412 static int calc_extif_timings(struct rfbi_timings *t)
413 {
414 u32 max_clk_div;
415 int div;
416
417 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
418 for (div = 1; div <= max_clk_div; div++) {
419 if (calc_reg_timing(t, div) == 0)
420 break;
421 }
422
423 if (div <= max_clk_div)
424 return 0;
425
426 DSSERR("can't setup timings\n");
427 return -1;
428 }
429
430
431 static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
432 {
433 int r;
434
435 if (!t->converted) {
436 r = calc_extif_timings(t);
437 if (r < 0)
438 DSSERR("Failed to calc timings\n");
439 }
440
441 BUG_ON(!t->converted);
442
443 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
444 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
445
446 /* TIMEGRANULARITY */
447 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
448 (t->tim[2] ? 1 : 0), 4, 4);
449
450 rfbi_print_timings();
451 }
452
453 static int ps_to_rfbi_ticks(int time, int div)
454 {
455 unsigned long tick_ps;
456 int ret;
457
458 /* Calculate in picosecs to yield more exact results */
459 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
460
461 ret = (time + tick_ps - 1) / tick_ps;
462
463 return ret;
464 }
465
466 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
467 {
468 *clk_period = 1000000000 / rfbi.l4_khz;
469 *max_clk_div = 2;
470 }
471
472 static int rfbi_convert_timings(struct rfbi_timings *t)
473 {
474 u32 l;
475 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
476 int actim, recyc, wecyc;
477 int div = t->clk_div;
478
479 if (div <= 0 || div > 2)
480 return -1;
481
482 /* Make sure that after conversion it still holds that:
483 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
484 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
485 */
486 weon = ps_to_rfbi_ticks(t->we_on_time, div);
487 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
488 if (weoff <= weon)
489 weoff = weon + 1;
490 if (weon > 0x0f)
491 return -1;
492 if (weoff > 0x3f)
493 return -1;
494
495 reon = ps_to_rfbi_ticks(t->re_on_time, div);
496 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
497 if (reoff <= reon)
498 reoff = reon + 1;
499 if (reon > 0x0f)
500 return -1;
501 if (reoff > 0x3f)
502 return -1;
503
504 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
505 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
506 if (csoff <= cson)
507 csoff = cson + 1;
508 if (csoff < max(weoff, reoff))
509 csoff = max(weoff, reoff);
510 if (cson > 0x0f)
511 return -1;
512 if (csoff > 0x3f)
513 return -1;
514
515 l = cson;
516 l |= csoff << 4;
517 l |= weon << 10;
518 l |= weoff << 14;
519 l |= reon << 20;
520 l |= reoff << 24;
521
522 t->tim[0] = l;
523
524 actim = ps_to_rfbi_ticks(t->access_time, div);
525 if (actim <= reon)
526 actim = reon + 1;
527 if (actim > 0x3f)
528 return -1;
529
530 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
531 if (wecyc < weoff)
532 wecyc = weoff;
533 if (wecyc > 0x3f)
534 return -1;
535
536 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
537 if (recyc < reoff)
538 recyc = reoff;
539 if (recyc > 0x3f)
540 return -1;
541
542 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
543 if (cs_pulse > 0x3f)
544 return -1;
545
546 l = wecyc;
547 l |= recyc << 6;
548 l |= cs_pulse << 12;
549 l |= actim << 22;
550
551 t->tim[1] = l;
552
553 t->tim[2] = div - 1;
554
555 t->converted = 1;
556
557 return 0;
558 }
559
560 /* xxx FIX module selection missing */
561 static int rfbi_setup_te(enum omap_rfbi_te_mode mode,
562 unsigned hs_pulse_time, unsigned vs_pulse_time,
563 int hs_pol_inv, int vs_pol_inv, int extif_div)
564 {
565 int hs, vs;
566 int min;
567 u32 l;
568
569 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
570 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
571 if (hs < 2)
572 return -EDOM;
573 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
574 min = 2;
575 else /* OMAP_DSS_RFBI_TE_MODE_1 */
576 min = 4;
577 if (vs < min)
578 return -EDOM;
579 if (vs == hs)
580 return -EINVAL;
581 rfbi.te_mode = mode;
582 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
583 mode, hs, vs, hs_pol_inv, vs_pol_inv);
584
585 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
586 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
587
588 l = rfbi_read_reg(RFBI_CONFIG(0));
589 if (hs_pol_inv)
590 l &= ~(1 << 21);
591 else
592 l |= 1 << 21;
593 if (vs_pol_inv)
594 l &= ~(1 << 20);
595 else
596 l |= 1 << 20;
597
598 return 0;
599 }
600
601 /* xxx FIX module selection missing */
602 static int rfbi_enable_te(bool enable, unsigned line)
603 {
604 u32 l;
605
606 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
607 if (line > (1 << 11) - 1)
608 return -EINVAL;
609
610 l = rfbi_read_reg(RFBI_CONFIG(0));
611 l &= ~(0x3 << 2);
612 if (enable) {
613 rfbi.te_enabled = 1;
614 l |= rfbi.te_mode << 2;
615 } else
616 rfbi.te_enabled = 0;
617 rfbi_write_reg(RFBI_CONFIG(0), l);
618 rfbi_write_reg(RFBI_LINE_NUMBER, line);
619
620 return 0;
621 }
622
623 static int rfbi_configure_bus(int rfbi_module, int bpp, int lines)
624 {
625 u32 l;
626 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
627 enum omap_rfbi_cycleformat cycleformat;
628 enum omap_rfbi_datatype datatype;
629 enum omap_rfbi_parallelmode parallelmode;
630
631 switch (bpp) {
632 case 12:
633 datatype = OMAP_DSS_RFBI_DATATYPE_12;
634 break;
635 case 16:
636 datatype = OMAP_DSS_RFBI_DATATYPE_16;
637 break;
638 case 18:
639 datatype = OMAP_DSS_RFBI_DATATYPE_18;
640 break;
641 case 24:
642 datatype = OMAP_DSS_RFBI_DATATYPE_24;
643 break;
644 default:
645 BUG();
646 return 1;
647 }
648 rfbi.datatype = datatype;
649
650 switch (lines) {
651 case 8:
652 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
653 break;
654 case 9:
655 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
656 break;
657 case 12:
658 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
659 break;
660 case 16:
661 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
662 break;
663 default:
664 BUG();
665 return 1;
666 }
667 rfbi.parallelmode = parallelmode;
668
669 if ((bpp % lines) == 0) {
670 switch (bpp / lines) {
671 case 1:
672 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
673 break;
674 case 2:
675 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
676 break;
677 case 3:
678 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
679 break;
680 default:
681 BUG();
682 return 1;
683 }
684 } else if ((2 * bpp % lines) == 0) {
685 if ((2 * bpp / lines) == 3)
686 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
687 else {
688 BUG();
689 return 1;
690 }
691 } else {
692 BUG();
693 return 1;
694 }
695
696 switch (cycleformat) {
697 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
698 cycle1 = lines;
699 break;
700
701 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
702 cycle1 = lines;
703 cycle2 = lines;
704 break;
705
706 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
707 cycle1 = lines;
708 cycle2 = lines;
709 cycle3 = lines;
710 break;
711
712 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
713 cycle1 = lines;
714 cycle2 = (lines / 2) | ((lines / 2) << 16);
715 cycle3 = (lines << 16);
716 break;
717 }
718
719 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
720
721 l = 0;
722 l |= FLD_VAL(parallelmode, 1, 0);
723 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
724 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
725 l |= FLD_VAL(datatype, 6, 5);
726 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
727 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
728 l |= FLD_VAL(cycleformat, 10, 9);
729 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
730 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
731 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
732 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
733 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
734 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
735 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
736 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
737
738 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
739 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
740 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
741
742
743 l = rfbi_read_reg(RFBI_CONTROL);
744 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
745 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
746 rfbi_write_reg(RFBI_CONTROL, l);
747
748
749 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
750 bpp, lines, cycle1, cycle2, cycle3);
751
752 return 0;
753 }
754
755 static int rfbi_configure(struct omap_dss_device *dssdev)
756 {
757 return rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size,
758 rfbi.data_lines);
759 }
760
761 static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
762 void *data)
763 {
764 return rfbi_transfer_area(dssdev, callback, data);
765 }
766
767 static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h)
768 {
769 rfbi.timings.x_res = w;
770 rfbi.timings.y_res = h;
771 }
772
773 static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size)
774 {
775 rfbi.pixel_size = pixel_size;
776 }
777
778 static void rfbi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
779 {
780 rfbi.data_lines = data_lines;
781 }
782
783 static void rfbi_set_interface_timings(struct omap_dss_device *dssdev,
784 struct rfbi_timings *timings)
785 {
786 rfbi.intf_timings = *timings;
787 }
788
789 static void rfbi_dump_regs(struct seq_file *s)
790 {
791 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
792
793 if (rfbi_runtime_get())
794 return;
795
796 DUMPREG(RFBI_REVISION);
797 DUMPREG(RFBI_SYSCONFIG);
798 DUMPREG(RFBI_SYSSTATUS);
799 DUMPREG(RFBI_CONTROL);
800 DUMPREG(RFBI_PIXEL_CNT);
801 DUMPREG(RFBI_LINE_NUMBER);
802 DUMPREG(RFBI_CMD);
803 DUMPREG(RFBI_PARAM);
804 DUMPREG(RFBI_DATA);
805 DUMPREG(RFBI_READ);
806 DUMPREG(RFBI_STATUS);
807
808 DUMPREG(RFBI_CONFIG(0));
809 DUMPREG(RFBI_ONOFF_TIME(0));
810 DUMPREG(RFBI_CYCLE_TIME(0));
811 DUMPREG(RFBI_DATA_CYCLE1(0));
812 DUMPREG(RFBI_DATA_CYCLE2(0));
813 DUMPREG(RFBI_DATA_CYCLE3(0));
814
815 DUMPREG(RFBI_CONFIG(1));
816 DUMPREG(RFBI_ONOFF_TIME(1));
817 DUMPREG(RFBI_CYCLE_TIME(1));
818 DUMPREG(RFBI_DATA_CYCLE1(1));
819 DUMPREG(RFBI_DATA_CYCLE2(1));
820 DUMPREG(RFBI_DATA_CYCLE3(1));
821
822 DUMPREG(RFBI_VSYNC_WIDTH);
823 DUMPREG(RFBI_HSYNC_WIDTH);
824
825 rfbi_runtime_put();
826 #undef DUMPREG
827 }
828
829 static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
830 {
831 struct omap_overlay_manager *mgr = rfbi.output.manager;
832 struct dss_lcd_mgr_config mgr_config;
833
834 mgr_config.io_pad_mode = DSS_IO_PAD_MODE_RFBI;
835
836 mgr_config.stallmode = true;
837 /* Do we need fifohandcheck for RFBI? */
838 mgr_config.fifohandcheck = false;
839
840 mgr_config.video_port_width = rfbi.pixel_size;
841 mgr_config.lcden_sig_polarity = 0;
842
843 dss_mgr_set_lcd_config(mgr, &mgr_config);
844
845 /*
846 * Set rfbi.timings with default values, the x_res and y_res fields
847 * are expected to be already configured by the panel driver via
848 * omapdss_rfbi_set_size()
849 */
850 rfbi.timings.hsw = 1;
851 rfbi.timings.hfp = 1;
852 rfbi.timings.hbp = 1;
853 rfbi.timings.vsw = 1;
854 rfbi.timings.vfp = 0;
855 rfbi.timings.vbp = 0;
856
857 rfbi.timings.interlace = false;
858 rfbi.timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
859 rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
860 rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
861 rfbi.timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
862 rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
863
864 dss_mgr_set_timings(mgr, &rfbi.timings);
865 }
866
867 static int rfbi_display_enable(struct omap_dss_device *dssdev)
868 {
869 struct omap_dss_device *out = &rfbi.output;
870 int r;
871
872 if (out->manager == NULL) {
873 DSSERR("failed to enable display: no output/manager\n");
874 return -ENODEV;
875 }
876
877 r = rfbi_runtime_get();
878 if (r)
879 return r;
880
881 r = dss_mgr_register_framedone_handler(out->manager,
882 framedone_callback, NULL);
883 if (r) {
884 DSSERR("can't get FRAMEDONE irq\n");
885 goto err1;
886 }
887
888 rfbi_config_lcd_manager(dssdev);
889
890 rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size,
891 rfbi.data_lines);
892
893 rfbi_set_timings(dssdev->phy.rfbi.channel, &rfbi.intf_timings);
894
895 return 0;
896 err1:
897 rfbi_runtime_put();
898 return r;
899 }
900
901 static void rfbi_display_disable(struct omap_dss_device *dssdev)
902 {
903 struct omap_dss_device *out = &rfbi.output;
904
905 dss_mgr_unregister_framedone_handler(out->manager,
906 framedone_callback, NULL);
907
908 rfbi_runtime_put();
909 }
910
911 static int rfbi_init_display(struct omap_dss_device *dssdev)
912 {
913 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
914 return 0;
915 }
916
917 static void rfbi_init_output(struct platform_device *pdev)
918 {
919 struct omap_dss_device *out = &rfbi.output;
920
921 out->dev = &pdev->dev;
922 out->id = OMAP_DSS_OUTPUT_DBI;
923 out->output_type = OMAP_DISPLAY_TYPE_DBI;
924 out->name = "rfbi.0";
925 out->dispc_channel = OMAP_DSS_CHANNEL_LCD;
926 out->owner = THIS_MODULE;
927
928 omapdss_register_output(out);
929 }
930
931 static void rfbi_uninit_output(struct platform_device *pdev)
932 {
933 struct omap_dss_device *out = &rfbi.output;
934
935 omapdss_unregister_output(out);
936 }
937
938 /* RFBI HW IP initialisation */
939 static int rfbi_bind(struct device *dev, struct device *master, void *data)
940 {
941 struct platform_device *pdev = to_platform_device(dev);
942 u32 rev;
943 struct resource *rfbi_mem;
944 struct clk *clk;
945 int r;
946
947 rfbi.pdev = pdev;
948
949 sema_init(&rfbi.bus_lock, 1);
950
951 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
952 if (!rfbi_mem) {
953 DSSERR("can't get IORESOURCE_MEM RFBI\n");
954 return -EINVAL;
955 }
956
957 rfbi.base = devm_ioremap(&pdev->dev, rfbi_mem->start,
958 resource_size(rfbi_mem));
959 if (!rfbi.base) {
960 DSSERR("can't ioremap RFBI\n");
961 return -ENOMEM;
962 }
963
964 clk = clk_get(&pdev->dev, "ick");
965 if (IS_ERR(clk)) {
966 DSSERR("can't get ick\n");
967 return PTR_ERR(clk);
968 }
969
970 rfbi.l4_khz = clk_get_rate(clk) / 1000;
971
972 clk_put(clk);
973
974 pm_runtime_enable(&pdev->dev);
975
976 r = rfbi_runtime_get();
977 if (r)
978 goto err_runtime_get;
979
980 msleep(10);
981
982 rev = rfbi_read_reg(RFBI_REVISION);
983 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
984 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
985
986 rfbi_runtime_put();
987
988 dss_debugfs_create_file("rfbi", rfbi_dump_regs);
989
990 rfbi_init_output(pdev);
991
992 return 0;
993
994 err_runtime_get:
995 pm_runtime_disable(&pdev->dev);
996 return r;
997 }
998
999 static void rfbi_unbind(struct device *dev, struct device *master, void *data)
1000 {
1001 struct platform_device *pdev = to_platform_device(dev);
1002
1003 rfbi_uninit_output(pdev);
1004
1005 pm_runtime_disable(&pdev->dev);
1006
1007 return 0;
1008 }
1009
1010 static const struct component_ops rfbi_component_ops = {
1011 .bind = rfbi_bind,
1012 .unbind = rfbi_unbind,
1013 };
1014
1015 static int rfbi_probe(struct platform_device *pdev)
1016 {
1017 return component_add(&pdev->dev, &rfbi_component_ops);
1018 }
1019
1020 static int rfbi_remove(struct platform_device *pdev)
1021 {
1022 component_del(&pdev->dev, &rfbi_component_ops);
1023 return 0;
1024 }
1025
1026 static int rfbi_runtime_suspend(struct device *dev)
1027 {
1028 dispc_runtime_put();
1029
1030 return 0;
1031 }
1032
1033 static int rfbi_runtime_resume(struct device *dev)
1034 {
1035 int r;
1036
1037 r = dispc_runtime_get();
1038 if (r < 0)
1039 return r;
1040
1041 return 0;
1042 }
1043
1044 static const struct dev_pm_ops rfbi_pm_ops = {
1045 .runtime_suspend = rfbi_runtime_suspend,
1046 .runtime_resume = rfbi_runtime_resume,
1047 };
1048
1049 static struct platform_driver omap_rfbihw_driver = {
1050 .probe = rfbi_probe,
1051 .remove = rfbi_remove,
1052 .driver = {
1053 .name = "omapdss_rfbi",
1054 .pm = &rfbi_pm_ops,
1055 .suppress_bind_attrs = true,
1056 },
1057 };
1058
1059 int __init rfbi_init_platform_driver(void)
1060 {
1061 return platform_driver_register(&omap_rfbihw_driver);
1062 }
1063
1064 void rfbi_uninit_platform_driver(void)
1065 {
1066 platform_driver_unregister(&omap_rfbihw_driver);
1067 }