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1 /* The dpalloc function used and implemented in this file was derieved
2 * from PPCBoot/U-Boot file "arch/powerpc/cpu/mpc8260/commproc.c".
3 */
4
5 /* Author: Arun Dharankar <ADharankar@ATTBI.Com>
6 * This example is meant to only demonstrate how the IDMA could be used.
7 */
8
9 /*
10 * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
11 * copyright notice:
12 *
13 * General Purpose functions for the global management of the
14 * 8260 Communication Processor Module.
15 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
16 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
17 * 2.3.99 Updates
18 *
19 * In addition to the individual control of the communication
20 * channels, there are a few functions that globally affect the
21 * communication processor.
22 *
23 * Buffer descriptors must be allocated from the dual ported memory
24 * space. The allocator for that is here. When the communication
25 * process is reset, we reclaim the memory available. There is
26 * currently no deallocator for this memory.
27 */
28
29
30 #include <common.h>
31 #include <console.h>
32 #include <exports.h>
33
34 DECLARE_GLOBAL_DATA_PTR;
35
36 #define STANDALONE
37
38 #ifndef STANDALONE /* Linked into/Part of PPCBoot */
39 #include <command.h>
40 #include <watchdog.h>
41 #else /* Standalone app of PPCBoot */
42 #define WATCHDOG_RESET() { \
43 *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0x556c; \
44 *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0xaa39; \
45 }
46 #endif /* STANDALONE */
47
48 static int debug = 1;
49
50 #define DEBUG(fmt, args...) { \
51 if(debug != 0) { \
52 printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__); \
53 printf(fmt, ##args); \
54 } \
55 }
56
57 #define CPM_CR_IDMA1_SBLOCK (0x14)
58 #define CPM_CR_IDMA2_SBLOCK (0x15)
59 #define CPM_CR_IDMA3_SBLOCK (0x16)
60 #define CPM_CR_IDMA4_SBLOCK (0x17)
61 #define CPM_CR_IDMA1_PAGE (0x07)
62 #define CPM_CR_IDMA2_PAGE (0x08)
63 #define CPM_CR_IDMA3_PAGE (0x09)
64 #define CPM_CR_IDMA4_PAGE (0x0a)
65 #define PROFF_IDMA1_BASE ((uint)0x87fe)
66 #define PROFF_IDMA2_BASE ((uint)0x88fe)
67 #define PROFF_IDMA3_BASE ((uint)0x89fe)
68 #define PROFF_IDMA4_BASE ((uint)0x8afe)
69
70 #define CPM_CR_INIT_TRX ((ushort)0x0000)
71 #define CPM_CR_FLG ((ushort)0x0001)
72
73 #define mk_cr_cmd(PG, SBC, MCN, OP) \
74 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
75
76
77 #pragma pack(1)
78 typedef struct ibdbits {
79 unsigned b_valid:1;
80 unsigned b_resv1:1;
81 unsigned b_wrap:1;
82 unsigned b_interrupt:1;
83 unsigned b_last:1;
84 unsigned b_resv2:1;
85 unsigned b_cm:1;
86 unsigned b_resv3:2;
87 unsigned b_sdn:1;
88 unsigned b_ddn:1;
89 unsigned b_dgbl:1;
90 unsigned b_dbo:2;
91 unsigned b_resv4:1;
92 unsigned b_ddtb:1;
93 unsigned b_resv5:2;
94 unsigned b_sgbl:1;
95 unsigned b_sbo:2;
96 unsigned b_resv6:1;
97 unsigned b_sdtb:1;
98 unsigned b_resv7:9;
99 } ibdbits_t;
100
101 #pragma pack(1)
102 typedef union ibdbitsu {
103 ibdbits_t b;
104 uint i;
105 } ibdbitsu_t;
106
107 #pragma pack(1)
108 typedef struct idma_buf_desc {
109 ibdbitsu_t ibd_bits; /* Status and Control */
110 uint ibd_datlen; /* Data length in buffer */
111 uint ibd_sbuf; /* Source buffer addr in host mem */
112 uint ibd_dbuf; /* Destination buffer addr in host mem */
113 } ibd_t;
114
115
116 #pragma pack(1)
117 typedef struct dcmbits {
118 unsigned b_fb:1;
119 unsigned b_lp:1;
120 unsigned b_resv1:3;
121 unsigned b_tc2:1;
122 unsigned b_resv2:1;
123 unsigned b_wrap:3;
124 unsigned b_sinc:1;
125 unsigned b_dinc:1;
126 unsigned b_erm:1;
127 unsigned b_dt:1;
128 unsigned b_sd:2;
129 } dcmbits_t;
130
131 #pragma pack(1)
132 typedef union dcmbitsu {
133 dcmbits_t b;
134 ushort i;
135 } dcmbitsu_t;
136
137 #pragma pack(1)
138 typedef struct pram_idma {
139 ushort pi_ibase;
140 dcmbitsu_t pi_dcmbits;
141 ushort pi_ibdptr;
142 ushort pi_dprbuf;
143 ushort pi_bufinv; /* internal to CPM */
144 ushort pi_ssmax;
145 ushort pi_dprinptr; /* internal to CPM */
146 ushort pi_sts;
147 ushort pi_dproutptr; /* internal to CPM */
148 ushort pi_seob;
149 ushort pi_deob;
150 ushort pi_dts;
151 ushort pi_retadd;
152 ushort pi_resv1; /* internal to CPM */
153 uint pi_bdcnt;
154 uint pi_sptr;
155 uint pi_dptr;
156 uint pi_istate;
157 } pram_idma_t;
158
159
160 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
161 volatile ibd_t *bdf;
162 volatile pram_idma_t *piptr;
163
164 volatile int dmadone;
165 volatile int *dmadonep = &dmadone;
166 void dmadone_handler (void *);
167
168 int idma_init (void);
169 void idma_start (int, int, int, uint, uint, int);
170 uint dpalloc (uint, uint);
171
172
173 uint dpinit_done = 0;
174
175
176 #ifdef STANDALONE
177 int ctrlc (void)
178 {
179 if (tstc()) {
180 switch (getc ()) {
181 case 0x03: /* ^C - Control C */
182 return 1;
183 default:
184 break;
185 }
186 }
187 return 0;
188 }
189 void * memset(void * s,int c,size_t count)
190 {
191 char *xs = (char *) s;
192 while (count--)
193 *xs++ = c;
194 return s;
195 }
196 int memcmp(const void * cs,const void * ct,size_t count)
197 {
198 const unsigned char *su1, *su2;
199 int res = 0;
200 for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
201 if ((res = *su1 - *su2) != 0)
202 break;
203 return res;
204 }
205 #endif /* STANDALONE */
206
207 #ifdef STANDALONE
208 int mem_to_mem_idma2intr (int argc, char * const argv[])
209 #else
210 int do_idma (bd_t * bd, int argc, char * const argv[])
211 #endif /* STANDALONE */
212 {
213 int i;
214
215 app_startup(argv);
216 dpinit_done = 0;
217
218 idma_init ();
219
220 DEBUG ("Installing dma handler\n");
221 install_hdlr (7, dmadone_handler, (void *) bdf);
222
223 memset ((void *) 0x100000, 'a', 512);
224 memset ((void *) 0x200000, 'b', 512);
225
226 for (i = 0; i < 32; i++) {
227 printf ("Startin IDMA, iteration=%d\n", i);
228 idma_start (1, 1, 512, 0x100000, 0x200000, 3);
229 }
230
231 DEBUG ("Uninstalling dma handler\n");
232 free_hdlr (7);
233
234 return 0;
235 }
236
237 void
238 idma_start (int sinc, int dinc, int sz, uint sbuf, uint dbuf, int ttype)
239 {
240 /* ttype is for M-M, M-P, P-M or P-P: not used for now */
241
242 piptr->pi_istate = 0; /* manual says: clear it before every START_IDMA */
243 piptr->pi_dcmbits.b.b_resv1 = 0;
244
245 if (sinc == 1)
246 piptr->pi_dcmbits.b.b_sinc = 1;
247 else
248 piptr->pi_dcmbits.b.b_sinc = 0;
249
250 if (dinc == 1)
251 piptr->pi_dcmbits.b.b_dinc = 1;
252 else
253 piptr->pi_dcmbits.b.b_dinc = 0;
254
255 piptr->pi_dcmbits.b.b_erm = 0;
256 piptr->pi_dcmbits.b.b_sd = 0x00; /* M-M */
257
258 bdf->ibd_sbuf = sbuf;
259 bdf->ibd_dbuf = dbuf;
260 bdf->ibd_bits.b.b_cm = 0;
261 bdf->ibd_bits.b.b_interrupt = 1;
262 bdf->ibd_bits.b.b_wrap = 1;
263 bdf->ibd_bits.b.b_last = 1;
264 bdf->ibd_bits.b.b_sdn = 0;
265 bdf->ibd_bits.b.b_ddn = 0;
266 bdf->ibd_bits.b.b_dgbl = 0;
267 bdf->ibd_bits.b.b_ddtb = 0;
268 bdf->ibd_bits.b.b_sgbl = 0;
269 bdf->ibd_bits.b.b_sdtb = 0;
270 bdf->ibd_bits.b.b_dbo = 1;
271 bdf->ibd_bits.b.b_sbo = 1;
272 bdf->ibd_bits.b.b_valid = 1;
273 bdf->ibd_datlen = 512;
274
275 *dmadonep = 0;
276
277 immap->im_sdma.sdma_idmr2 = (uchar) 0xf;
278
279 immap->im_cpm.cp_cpcr = mk_cr_cmd (CPM_CR_IDMA2_PAGE,
280 CPM_CR_IDMA2_SBLOCK, 0x0,
281 0x9) | 0x00010000;
282
283 while (*dmadonep != 1) {
284 if (ctrlc ()) {
285 DEBUG ("\nInterrupted waiting for DMA interrupt.\n");
286 goto done;
287 }
288 printf ("Waiting for DMA interrupt (dmadone=%d b_valid = %d)...\n",
289 dmadone, bdf->ibd_bits.b.b_valid);
290 udelay (1000000);
291 }
292 printf ("DMA complete notification received!\n");
293
294 done:
295 DEBUG ("memcmp(0x%08x, 0x%08x, 512) = %d\n",
296 sbuf, dbuf, memcmp ((void *) sbuf, (void *) dbuf, 512));
297
298 return;
299 }
300
301 #define MAX_INT_BUFSZ 64
302 #define DCM_WRAP 0 /* MUST be consistant with MAX_INT_BUFSZ */
303
304 int idma_init (void)
305 {
306 uint memaddr;
307
308 immap->im_cpm.cp_rccr &= ~0x00F3FFFF;
309 immap->im_cpm.cp_rccr |= 0x00A00A00;
310
311 memaddr = dpalloc (sizeof (pram_idma_t), 64);
312
313 *(volatile u16 *)&immap->im_dprambase16
314 [PROFF_IDMA2_BASE / sizeof(u16)] = memaddr;
315 piptr = (volatile pram_idma_t *) ((uint) (immap) + memaddr);
316
317 piptr->pi_resv1 = 0; /* manual says: clear it */
318 piptr->pi_dcmbits.b.b_fb = 0;
319 piptr->pi_dcmbits.b.b_lp = 1;
320 piptr->pi_dcmbits.b.b_erm = 0;
321 piptr->pi_dcmbits.b.b_dt = 0;
322
323 memaddr = (uint) dpalloc (sizeof (ibd_t), 64);
324 piptr->pi_ibase = piptr->pi_ibdptr = (volatile short) memaddr;
325 bdf = (volatile ibd_t *) ((uint) (immap) + memaddr);
326 bdf->ibd_bits.b.b_valid = 0;
327
328 memaddr = (uint) dpalloc (64, 64);
329 piptr->pi_dprbuf = (volatile ushort) memaddr;
330 piptr->pi_dcmbits.b.b_wrap = 4;
331 piptr->pi_ssmax = 32;
332
333 piptr->pi_sts = piptr->pi_ssmax;
334 piptr->pi_dts = piptr->pi_ssmax;
335
336 return 1;
337 }
338
339 void dmadone_handler (void *arg)
340 {
341 immap->im_sdma.sdma_idmr2 = (uchar) 0x0;
342
343 *dmadonep = 1;
344
345 return;
346 }
347
348
349 static uint dpbase = 0;
350
351 uint dpalloc (uint size, uint align)
352 {
353 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
354 uint retloc;
355 uint align_mask, off;
356 uint savebase;
357
358 /* Pointer to initial global data area */
359
360 if (dpinit_done == 0) {
361 dpbase = gd->arch.dp_alloc_base;
362 dpinit_done = 1;
363 }
364
365 align_mask = align - 1;
366 savebase = dpbase;
367
368 if ((off = (dpbase & align_mask)) != 0)
369 dpbase += (align - off);
370
371 if ((off = size & align_mask) != 0)
372 size += align - off;
373
374 if ((dpbase + size) >= gd->arch.dp_alloc_top) {
375 dpbase = savebase;
376 printf ("dpalloc: ran out of dual port ram!");
377 return 0;
378 }
379
380 retloc = dpbase;
381 dpbase += size;
382
383 memset ((void *) &immr->im_dprambase[retloc], 0, size);
384
385 return (retloc);
386 }