4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
24 #include "qemu/cutils.h"
26 #include "exec/exec-all.h"
27 #include "exec/target_page.h"
29 #include "hw/qdev-core.h"
30 #include "hw/qdev-properties.h"
31 #if !defined(CONFIG_USER_ONLY)
32 #include "hw/boards.h"
33 #include "hw/xen/xen.h"
35 #include "sysemu/kvm.h"
36 #include "sysemu/sysemu.h"
37 #include "qemu/timer.h"
38 #include "qemu/config-file.h"
39 #include "qemu/error-report.h"
40 #if defined(CONFIG_USER_ONLY)
42 #else /* !CONFIG_USER_ONLY */
44 #include "exec/memory.h"
45 #include "exec/ioport.h"
46 #include "sysemu/dma.h"
47 #include "sysemu/numa.h"
48 #include "sysemu/hw_accel.h"
49 #include "exec/address-spaces.h"
50 #include "sysemu/xen-mapcache.h"
51 #include "trace-root.h"
53 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
55 #include <linux/falloc.h>
59 #include "qemu/rcu_queue.h"
60 #include "qemu/main-loop.h"
61 #include "translate-all.h"
62 #include "sysemu/replay.h"
64 #include "exec/memory-internal.h"
65 #include "exec/ram_addr.h"
68 #include "migration/vmstate.h"
70 #include "qemu/range.h"
72 #include "qemu/mmap-alloc.h"
75 #include "monitor/monitor.h"
77 //#define DEBUG_SUBPAGE
79 #if !defined(CONFIG_USER_ONLY)
80 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
81 * are protected by the ramlist lock.
83 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
85 static MemoryRegion
*system_memory
;
86 static MemoryRegion
*system_io
;
88 AddressSpace address_space_io
;
89 AddressSpace address_space_memory
;
91 MemoryRegion io_mem_rom
, io_mem_notdirty
;
92 static MemoryRegion io_mem_unassigned
;
94 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
95 #define RAM_PREALLOC (1 << 0)
97 /* RAM is mmap-ed with MAP_SHARED */
98 #define RAM_SHARED (1 << 1)
100 /* Only a portion of RAM (used_length) is actually used, and migrated.
101 * This used_length size can change across reboots.
103 #define RAM_RESIZEABLE (1 << 2)
107 #ifdef TARGET_PAGE_BITS_VARY
108 int target_page_bits
;
109 bool target_page_bits_decided
;
112 struct CPUTailQ cpus
= QTAILQ_HEAD_INITIALIZER(cpus
);
113 /* current CPU in the current thread. It is only valid inside
115 __thread CPUState
*current_cpu
;
116 /* 0 = Do not count executed instructions.
117 1 = Precise instruction counting.
118 2 = Adaptive rate instruction counting. */
121 uintptr_t qemu_host_page_size
;
122 intptr_t qemu_host_page_mask
;
124 bool set_preferred_target_page_bits(int bits
)
126 /* The target page size is the lowest common denominator for all
127 * the CPUs in the system, so we can only make it smaller, never
128 * larger. And we can't make it smaller once we've committed to
131 #ifdef TARGET_PAGE_BITS_VARY
132 assert(bits
>= TARGET_PAGE_BITS_MIN
);
133 if (target_page_bits
== 0 || target_page_bits
> bits
) {
134 if (target_page_bits_decided
) {
137 target_page_bits
= bits
;
143 #if !defined(CONFIG_USER_ONLY)
145 static void finalize_target_page_bits(void)
147 #ifdef TARGET_PAGE_BITS_VARY
148 if (target_page_bits
== 0) {
149 target_page_bits
= TARGET_PAGE_BITS_MIN
;
151 target_page_bits_decided
= true;
155 typedef struct PhysPageEntry PhysPageEntry
;
157 struct PhysPageEntry
{
158 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
160 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
164 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
166 /* Size of the L2 (and L3, etc) page tables. */
167 #define ADDR_SPACE_BITS 64
170 #define P_L2_SIZE (1 << P_L2_BITS)
172 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
174 typedef PhysPageEntry Node
[P_L2_SIZE
];
176 typedef struct PhysPageMap
{
179 unsigned sections_nb
;
180 unsigned sections_nb_alloc
;
182 unsigned nodes_nb_alloc
;
184 MemoryRegionSection
*sections
;
187 struct AddressSpaceDispatch
{
188 MemoryRegionSection
*mru_section
;
189 /* This is a multi-level map on the physical address space.
190 * The bottom level has pointers to MemoryRegionSections.
192 PhysPageEntry phys_map
;
196 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
197 typedef struct subpage_t
{
201 uint16_t sub_section
[];
204 #define PHYS_SECTION_UNASSIGNED 0
205 #define PHYS_SECTION_NOTDIRTY 1
206 #define PHYS_SECTION_ROM 2
207 #define PHYS_SECTION_WATCH 3
209 static void io_mem_init(void);
210 static void memory_map_init(void);
211 static void tcg_commit(MemoryListener
*listener
);
213 static MemoryRegion io_mem_watch
;
216 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
217 * @cpu: the CPU whose AddressSpace this is
218 * @as: the AddressSpace itself
219 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
220 * @tcg_as_listener: listener for tracking changes to the AddressSpace
222 struct CPUAddressSpace
{
225 struct AddressSpaceDispatch
*memory_dispatch
;
226 MemoryListener tcg_as_listener
;
229 struct DirtyBitmapSnapshot
{
232 unsigned long dirty
[];
237 #if !defined(CONFIG_USER_ONLY)
239 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
241 static unsigned alloc_hint
= 16;
242 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
243 map
->nodes_nb_alloc
= MAX(map
->nodes_nb_alloc
, alloc_hint
);
244 map
->nodes_nb_alloc
= MAX(map
->nodes_nb_alloc
, map
->nodes_nb
+ nodes
);
245 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
246 alloc_hint
= map
->nodes_nb_alloc
;
250 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
257 ret
= map
->nodes_nb
++;
259 assert(ret
!= PHYS_MAP_NODE_NIL
);
260 assert(ret
!= map
->nodes_nb_alloc
);
262 e
.skip
= leaf
? 0 : 1;
263 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
264 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
265 memcpy(&p
[i
], &e
, sizeof(e
));
270 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
271 hwaddr
*index
, hwaddr
*nb
, uint16_t leaf
,
275 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
277 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
278 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
280 p
= map
->nodes
[lp
->ptr
];
281 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
283 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
284 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
290 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
296 static void phys_page_set(AddressSpaceDispatch
*d
,
297 hwaddr index
, hwaddr nb
,
300 /* Wildly overreserve - it doesn't matter much. */
301 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
303 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
306 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
307 * and update our entry so we can skip it and go directly to the destination.
309 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
311 unsigned valid_ptr
= P_L2_SIZE
;
316 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
321 for (i
= 0; i
< P_L2_SIZE
; i
++) {
322 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
329 phys_page_compact(&p
[i
], nodes
);
333 /* We can only compress if there's only one child. */
338 assert(valid_ptr
< P_L2_SIZE
);
340 /* Don't compress if it won't fit in the # of bits we have. */
341 if (lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 3)) {
345 lp
->ptr
= p
[valid_ptr
].ptr
;
346 if (!p
[valid_ptr
].skip
) {
347 /* If our only child is a leaf, make this a leaf. */
348 /* By design, we should have made this node a leaf to begin with so we
349 * should never reach here.
350 * But since it's so simple to handle this, let's do it just in case we
355 lp
->skip
+= p
[valid_ptr
].skip
;
359 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
361 if (d
->phys_map
.skip
) {
362 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
366 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
369 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
370 * the section must cover the entire address space.
372 return int128_gethi(section
->size
) ||
373 range_covers_byte(section
->offset_within_address_space
,
374 int128_getlo(section
->size
), addr
);
377 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
379 PhysPageEntry lp
= d
->phys_map
, *p
;
380 Node
*nodes
= d
->map
.nodes
;
381 MemoryRegionSection
*sections
= d
->map
.sections
;
382 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
385 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
386 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
387 return §ions
[PHYS_SECTION_UNASSIGNED
];
390 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
393 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
394 return §ions
[lp
.ptr
];
396 return §ions
[PHYS_SECTION_UNASSIGNED
];
400 bool memory_region_is_unassigned(MemoryRegion
*mr
)
402 return mr
!= &io_mem_rom
&& mr
!= &io_mem_notdirty
&& !mr
->rom_device
403 && mr
!= &io_mem_watch
;
406 /* Called from RCU critical section */
407 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
409 bool resolve_subpage
)
411 MemoryRegionSection
*section
= atomic_read(&d
->mru_section
);
415 if (section
&& section
!= &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] &&
416 section_covers_addr(section
, addr
)) {
419 section
= phys_page_find(d
, addr
);
422 if (resolve_subpage
&& section
->mr
->subpage
) {
423 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
424 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
427 atomic_set(&d
->mru_section
, section
);
432 /* Called from RCU critical section */
433 static MemoryRegionSection
*
434 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
435 hwaddr
*plen
, bool resolve_subpage
)
437 MemoryRegionSection
*section
;
441 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
442 /* Compute offset within MemoryRegionSection */
443 addr
-= section
->offset_within_address_space
;
445 /* Compute offset within MemoryRegion */
446 *xlat
= addr
+ section
->offset_within_region
;
450 /* MMIO registers can be expected to perform full-width accesses based only
451 * on their address, without considering adjacent registers that could
452 * decode to completely different MemoryRegions. When such registers
453 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
454 * regions overlap wildly. For this reason we cannot clamp the accesses
457 * If the length is small (as is the case for address_space_ldl/stl),
458 * everything works fine. If the incoming length is large, however,
459 * the caller really has to do the clamping through memory_access_size.
461 if (memory_region_is_ram(mr
)) {
462 diff
= int128_sub(section
->size
, int128_make64(addr
));
463 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
469 * flatview_do_translate - translate an address in FlatView
471 * @fv: the flat view that we want to translate on
472 * @addr: the address to be translated in above address space
473 * @xlat: the translated address offset within memory region. It
475 * @plen_out: valid read/write length of the translated address. It
476 * can be @NULL when we don't care about it.
477 * @page_mask_out: page mask for the translated address. This
478 * should only be meaningful for IOMMU translated
479 * addresses, since there may be huge pages that this bit
480 * would tell. It can be @NULL if we don't care about it.
481 * @is_write: whether the translation operation is for write
482 * @is_mmio: whether this can be MMIO, set true if it can
484 * This function is called from RCU critical section
486 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
490 hwaddr
*page_mask_out
,
493 AddressSpace
**target_as
)
496 MemoryRegionSection
*section
;
497 IOMMUMemoryRegion
*iommu_mr
;
498 IOMMUMemoryRegionClass
*imrc
;
499 hwaddr page_mask
= (hwaddr
)(-1);
500 hwaddr plen
= (hwaddr
)(-1);
507 section
= address_space_translate_internal(
508 flatview_to_dispatch(fv
), addr
, &addr
,
511 iommu_mr
= memory_region_get_iommu(section
->mr
);
515 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
517 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
518 IOMMU_WO
: IOMMU_RO
);
519 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
520 | (addr
& iotlb
.addr_mask
));
521 page_mask
&= iotlb
.addr_mask
;
522 plen
= MIN(plen
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
523 if (!(iotlb
.perm
& (1 << is_write
))) {
527 fv
= address_space_to_flatview(iotlb
.target_as
);
528 *target_as
= iotlb
.target_as
;
533 if (page_mask
== (hwaddr
)(-1)) {
534 /* Not behind an IOMMU, use default page size. */
535 page_mask
= ~TARGET_PAGE_MASK
;
539 *page_mask_out
= page_mask
;
549 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
552 /* Called from RCU critical section */
553 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
556 MemoryRegionSection section
;
559 /* Try to get maximum page mask during translation. */
562 /* This can never be MMIO. */
563 section
= flatview_do_translate(address_space_to_flatview(as
), addr
,
564 &xlat
, &plen
, NULL
, is_write
, false, &as
);
566 /* Illegal translation */
567 if (section
.mr
== &io_mem_unassigned
) {
571 /* Convert memory region offset into address space offset */
572 xlat
+= section
.offset_within_address_space
-
573 section
.offset_within_region
;
575 if (plen
== (hwaddr
)-1) {
577 * We use default page size here. Logically it only happens
578 * for identity mappings.
580 plen
= TARGET_PAGE_SIZE
;
583 /* Convert to address mask */
586 return (IOMMUTLBEntry
) {
588 .iova
= addr
& ~plen
,
589 .translated_addr
= xlat
& ~plen
,
591 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
596 return (IOMMUTLBEntry
) {0};
599 /* Called from RCU critical section */
600 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
601 hwaddr
*plen
, bool is_write
)
604 MemoryRegionSection section
;
605 AddressSpace
*as
= NULL
;
607 /* This can be MMIO, so setup MMIO bit. */
608 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
609 is_write
, true, &as
);
612 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
613 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
614 *plen
= MIN(page
, *plen
);
620 /* Called from RCU critical section */
621 MemoryRegionSection
*
622 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
623 hwaddr
*xlat
, hwaddr
*plen
)
625 MemoryRegionSection
*section
;
626 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
628 section
= address_space_translate_internal(d
, addr
, xlat
, plen
, false);
630 assert(!memory_region_is_iommu(section
->mr
));
635 #if !defined(CONFIG_USER_ONLY)
637 static int cpu_common_post_load(void *opaque
, int version_id
)
639 CPUState
*cpu
= opaque
;
641 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
642 version_id is increased. */
643 cpu
->interrupt_request
&= ~0x01;
649 static int cpu_common_pre_load(void *opaque
)
651 CPUState
*cpu
= opaque
;
653 cpu
->exception_index
= -1;
658 static bool cpu_common_exception_index_needed(void *opaque
)
660 CPUState
*cpu
= opaque
;
662 return tcg_enabled() && cpu
->exception_index
!= -1;
665 static const VMStateDescription vmstate_cpu_common_exception_index
= {
666 .name
= "cpu_common/exception_index",
668 .minimum_version_id
= 1,
669 .needed
= cpu_common_exception_index_needed
,
670 .fields
= (VMStateField
[]) {
671 VMSTATE_INT32(exception_index
, CPUState
),
672 VMSTATE_END_OF_LIST()
676 static bool cpu_common_crash_occurred_needed(void *opaque
)
678 CPUState
*cpu
= opaque
;
680 return cpu
->crash_occurred
;
683 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
684 .name
= "cpu_common/crash_occurred",
686 .minimum_version_id
= 1,
687 .needed
= cpu_common_crash_occurred_needed
,
688 .fields
= (VMStateField
[]) {
689 VMSTATE_BOOL(crash_occurred
, CPUState
),
690 VMSTATE_END_OF_LIST()
694 const VMStateDescription vmstate_cpu_common
= {
695 .name
= "cpu_common",
697 .minimum_version_id
= 1,
698 .pre_load
= cpu_common_pre_load
,
699 .post_load
= cpu_common_post_load
,
700 .fields
= (VMStateField
[]) {
701 VMSTATE_UINT32(halted
, CPUState
),
702 VMSTATE_UINT32(interrupt_request
, CPUState
),
703 VMSTATE_END_OF_LIST()
705 .subsections
= (const VMStateDescription
*[]) {
706 &vmstate_cpu_common_exception_index
,
707 &vmstate_cpu_common_crash_occurred
,
714 CPUState
*qemu_get_cpu(int index
)
719 if (cpu
->cpu_index
== index
) {
727 #if !defined(CONFIG_USER_ONLY)
728 void cpu_address_space_init(CPUState
*cpu
, AddressSpace
*as
, int asidx
)
730 CPUAddressSpace
*newas
;
732 /* Target code should have set num_ases before calling us */
733 assert(asidx
< cpu
->num_ases
);
736 /* address space 0 gets the convenience alias */
740 /* KVM cannot currently support multiple address spaces. */
741 assert(asidx
== 0 || !kvm_enabled());
743 if (!cpu
->cpu_ases
) {
744 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
747 newas
= &cpu
->cpu_ases
[asidx
];
751 newas
->tcg_as_listener
.commit
= tcg_commit
;
752 memory_listener_register(&newas
->tcg_as_listener
, as
);
756 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
758 /* Return the AddressSpace corresponding to the specified index */
759 return cpu
->cpu_ases
[asidx
].as
;
763 void cpu_exec_unrealizefn(CPUState
*cpu
)
765 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
767 cpu_list_remove(cpu
);
769 if (cc
->vmsd
!= NULL
) {
770 vmstate_unregister(NULL
, cc
->vmsd
, cpu
);
772 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
773 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
777 Property cpu_common_props
[] = {
778 #ifndef CONFIG_USER_ONLY
779 /* Create a memory property for softmmu CPU object,
780 * so users can wire up its memory. (This can't go in qom/cpu.c
781 * because that file is compiled only once for both user-mode
782 * and system builds.) The default if no link is set up is to use
783 * the system address space.
785 DEFINE_PROP_LINK("memory", CPUState
, memory
, TYPE_MEMORY_REGION
,
788 DEFINE_PROP_END_OF_LIST(),
791 void cpu_exec_initfn(CPUState
*cpu
)
796 #ifndef CONFIG_USER_ONLY
797 cpu
->thread_id
= qemu_get_thread_id();
798 cpu
->memory
= system_memory
;
799 object_ref(OBJECT(cpu
->memory
));
803 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
805 CPUClass
*cc ATTRIBUTE_UNUSED
= CPU_GET_CLASS(cpu
);
809 #ifndef CONFIG_USER_ONLY
810 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
811 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
813 if (cc
->vmsd
!= NULL
) {
814 vmstate_register(NULL
, cpu
->cpu_index
, cc
->vmsd
, cpu
);
819 #if defined(CONFIG_USER_ONLY)
820 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
824 tb_invalidate_phys_page_range(pc
, pc
+ 1, 0);
829 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
832 hwaddr phys
= cpu_get_phys_page_attrs_debug(cpu
, pc
, &attrs
);
833 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
835 /* Locks grabbed by tb_invalidate_phys_addr */
836 tb_invalidate_phys_addr(cpu
->cpu_ases
[asidx
].as
,
837 phys
| (pc
& ~TARGET_PAGE_MASK
));
842 #if defined(CONFIG_USER_ONLY)
843 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
848 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
854 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
858 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
859 int flags
, CPUWatchpoint
**watchpoint
)
864 /* Add a watchpoint. */
865 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
866 int flags
, CPUWatchpoint
**watchpoint
)
870 /* forbid ranges which are empty or run off the end of the address space */
871 if (len
== 0 || (addr
+ len
- 1) < addr
) {
872 error_report("tried to set invalid watchpoint at %"
873 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
876 wp
= g_malloc(sizeof(*wp
));
882 /* keep all GDB-injected watchpoints in front */
883 if (flags
& BP_GDB
) {
884 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
886 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
889 tlb_flush_page(cpu
, addr
);
896 /* Remove a specific watchpoint. */
897 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
902 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
903 if (addr
== wp
->vaddr
&& len
== wp
->len
904 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
905 cpu_watchpoint_remove_by_ref(cpu
, wp
);
912 /* Remove a specific watchpoint by reference. */
913 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
915 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
917 tlb_flush_page(cpu
, watchpoint
->vaddr
);
922 /* Remove all matching watchpoints. */
923 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
925 CPUWatchpoint
*wp
, *next
;
927 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
928 if (wp
->flags
& mask
) {
929 cpu_watchpoint_remove_by_ref(cpu
, wp
);
934 /* Return true if this watchpoint address matches the specified
935 * access (ie the address range covered by the watchpoint overlaps
936 * partially or completely with the address range covered by the
939 static inline bool cpu_watchpoint_address_matches(CPUWatchpoint
*wp
,
943 /* We know the lengths are non-zero, but a little caution is
944 * required to avoid errors in the case where the range ends
945 * exactly at the top of the address space and so addr + len
946 * wraps round to zero.
948 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
949 vaddr addrend
= addr
+ len
- 1;
951 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
956 /* Add a breakpoint. */
957 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
958 CPUBreakpoint
**breakpoint
)
962 bp
= g_malloc(sizeof(*bp
));
967 /* keep all GDB-injected breakpoints in front */
968 if (flags
& BP_GDB
) {
969 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
971 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
974 breakpoint_invalidate(cpu
, pc
);
982 /* Remove a specific breakpoint. */
983 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
987 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
988 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
989 cpu_breakpoint_remove_by_ref(cpu
, bp
);
996 /* Remove a specific breakpoint by reference. */
997 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
999 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
1001 breakpoint_invalidate(cpu
, breakpoint
->pc
);
1006 /* Remove all matching breakpoints. */
1007 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
1009 CPUBreakpoint
*bp
, *next
;
1011 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
1012 if (bp
->flags
& mask
) {
1013 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1018 /* enable or disable single step mode. EXCP_DEBUG is returned by the
1019 CPU loop after each instruction */
1020 void cpu_single_step(CPUState
*cpu
, int enabled
)
1022 if (cpu
->singlestep_enabled
!= enabled
) {
1023 cpu
->singlestep_enabled
= enabled
;
1024 if (kvm_enabled()) {
1025 kvm_update_guest_debug(cpu
, 0);
1027 /* must flush all the translated code to avoid inconsistencies */
1028 /* XXX: only flush what is necessary */
1034 void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1041 fprintf(stderr
, "qemu: fatal: ");
1042 vfprintf(stderr
, fmt
, ap
);
1043 fprintf(stderr
, "\n");
1044 cpu_dump_state(cpu
, stderr
, fprintf
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1045 if (qemu_log_separate()) {
1047 qemu_log("qemu: fatal: ");
1048 qemu_log_vprintf(fmt
, ap2
);
1050 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1058 #if defined(CONFIG_USER_ONLY)
1060 struct sigaction act
;
1061 sigfillset(&act
.sa_mask
);
1062 act
.sa_handler
= SIG_DFL
;
1063 sigaction(SIGABRT
, &act
, NULL
);
1069 #if !defined(CONFIG_USER_ONLY)
1070 /* Called from RCU critical section */
1071 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
1075 block
= atomic_rcu_read(&ram_list
.mru_block
);
1076 if (block
&& addr
- block
->offset
< block
->max_length
) {
1079 RAMBLOCK_FOREACH(block
) {
1080 if (addr
- block
->offset
< block
->max_length
) {
1085 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
1089 /* It is safe to write mru_block outside the iothread lock. This
1094 * xxx removed from list
1098 * call_rcu(reclaim_ramblock, xxx);
1101 * atomic_rcu_set is not needed here. The block was already published
1102 * when it was placed into the list. Here we're just making an extra
1103 * copy of the pointer.
1105 ram_list
.mru_block
= block
;
1109 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1116 end
= TARGET_PAGE_ALIGN(start
+ length
);
1117 start
&= TARGET_PAGE_MASK
;
1120 block
= qemu_get_ram_block(start
);
1121 assert(block
== qemu_get_ram_block(end
- 1));
1122 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1124 tlb_reset_dirty(cpu
, start1
, length
);
1129 /* Note: start and end must be within the same ram block. */
1130 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1134 DirtyMemoryBlocks
*blocks
;
1135 unsigned long end
, page
;
1142 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1143 page
= start
>> TARGET_PAGE_BITS
;
1147 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1149 while (page
< end
) {
1150 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1151 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1152 unsigned long num
= MIN(end
- page
, DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1154 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1161 if (dirty
&& tcg_enabled()) {
1162 tlb_reset_dirty_range_all(start
, length
);
1168 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1169 (ram_addr_t start
, ram_addr_t length
, unsigned client
)
1171 DirtyMemoryBlocks
*blocks
;
1172 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1173 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1174 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1175 DirtyBitmapSnapshot
*snap
;
1176 unsigned long page
, end
, dest
;
1178 snap
= g_malloc0(sizeof(*snap
) +
1179 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1180 snap
->start
= first
;
1183 page
= first
>> TARGET_PAGE_BITS
;
1184 end
= last
>> TARGET_PAGE_BITS
;
1189 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1191 while (page
< end
) {
1192 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1193 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1194 unsigned long num
= MIN(end
- page
, DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1196 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1197 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1198 offset
>>= BITS_PER_LEVEL
;
1200 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1201 blocks
->blocks
[idx
] + offset
,
1204 dest
+= num
>> BITS_PER_LEVEL
;
1209 if (tcg_enabled()) {
1210 tlb_reset_dirty_range_all(start
, length
);
1216 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1220 unsigned long page
, end
;
1222 assert(start
>= snap
->start
);
1223 assert(start
+ length
<= snap
->end
);
1225 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1226 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1228 while (page
< end
) {
1229 if (test_bit(page
, snap
->dirty
)) {
1237 /* Called from RCU critical section */
1238 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1239 MemoryRegionSection
*section
,
1241 hwaddr paddr
, hwaddr xlat
,
1243 target_ulong
*address
)
1248 if (memory_region_is_ram(section
->mr
)) {
1250 iotlb
= memory_region_get_ram_addr(section
->mr
) + xlat
;
1251 if (!section
->readonly
) {
1252 iotlb
|= PHYS_SECTION_NOTDIRTY
;
1254 iotlb
|= PHYS_SECTION_ROM
;
1257 AddressSpaceDispatch
*d
;
1259 d
= flatview_to_dispatch(section
->fv
);
1260 iotlb
= section
- d
->map
.sections
;
1264 /* Make accesses to pages with watchpoints go via the
1265 watchpoint trap routines. */
1266 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1267 if (cpu_watchpoint_address_matches(wp
, vaddr
, TARGET_PAGE_SIZE
)) {
1268 /* Avoid trapping reads of pages with a write breakpoint. */
1269 if ((prot
& PAGE_WRITE
) || (wp
->flags
& BP_MEM_READ
)) {
1270 iotlb
= PHYS_SECTION_WATCH
+ paddr
;
1271 *address
|= TLB_MMIO
;
1279 #endif /* defined(CONFIG_USER_ONLY) */
1281 #if !defined(CONFIG_USER_ONLY)
1283 static int subpage_register (subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1285 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1287 static void *(*phys_mem_alloc
)(size_t size
, uint64_t *align
) =
1288 qemu_anon_ram_alloc
;
1291 * Set a custom physical guest memory alloator.
1292 * Accelerators with unusual needs may need this. Hopefully, we can
1293 * get rid of it eventually.
1295 void phys_mem_set_alloc(void *(*alloc
)(size_t, uint64_t *align
))
1297 phys_mem_alloc
= alloc
;
1300 static uint16_t phys_section_add(PhysPageMap
*map
,
1301 MemoryRegionSection
*section
)
1303 /* The physical section number is ORed with a page-aligned
1304 * pointer to produce the iotlb entries. Thus it should
1305 * never overflow into the page-aligned value.
1307 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1309 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1310 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1311 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1312 map
->sections_nb_alloc
);
1314 map
->sections
[map
->sections_nb
] = *section
;
1315 memory_region_ref(section
->mr
);
1316 return map
->sections_nb
++;
1319 static void phys_section_destroy(MemoryRegion
*mr
)
1321 bool have_sub_page
= mr
->subpage
;
1323 memory_region_unref(mr
);
1325 if (have_sub_page
) {
1326 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1327 object_unref(OBJECT(&subpage
->iomem
));
1332 static void phys_sections_free(PhysPageMap
*map
)
1334 while (map
->sections_nb
> 0) {
1335 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1336 phys_section_destroy(section
->mr
);
1338 g_free(map
->sections
);
1342 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1344 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1346 hwaddr base
= section
->offset_within_address_space
1348 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1349 MemoryRegionSection subsection
= {
1350 .offset_within_address_space
= base
,
1351 .size
= int128_make64(TARGET_PAGE_SIZE
),
1355 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1357 if (!(existing
->mr
->subpage
)) {
1358 subpage
= subpage_init(fv
, base
);
1360 subsection
.mr
= &subpage
->iomem
;
1361 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1362 phys_section_add(&d
->map
, &subsection
));
1364 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1366 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1367 end
= start
+ int128_get64(section
->size
) - 1;
1368 subpage_register(subpage
, start
, end
,
1369 phys_section_add(&d
->map
, section
));
1373 static void register_multipage(FlatView
*fv
,
1374 MemoryRegionSection
*section
)
1376 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1377 hwaddr start_addr
= section
->offset_within_address_space
;
1378 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1379 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1383 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1386 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1388 MemoryRegionSection now
= *section
, remain
= *section
;
1389 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1391 if (now
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1392 uint64_t left
= TARGET_PAGE_ALIGN(now
.offset_within_address_space
)
1393 - now
.offset_within_address_space
;
1395 now
.size
= int128_min(int128_make64(left
), now
.size
);
1396 register_subpage(fv
, &now
);
1398 now
.size
= int128_zero();
1400 while (int128_ne(remain
.size
, now
.size
)) {
1401 remain
.size
= int128_sub(remain
.size
, now
.size
);
1402 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1403 remain
.offset_within_region
+= int128_get64(now
.size
);
1405 if (int128_lt(remain
.size
, page_size
)) {
1406 register_subpage(fv
, &now
);
1407 } else if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1408 now
.size
= page_size
;
1409 register_subpage(fv
, &now
);
1411 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1412 register_multipage(fv
, &now
);
1417 void qemu_flush_coalesced_mmio_buffer(void)
1420 kvm_flush_coalesced_mmio_buffer();
1423 void qemu_mutex_lock_ramlist(void)
1425 qemu_mutex_lock(&ram_list
.mutex
);
1428 void qemu_mutex_unlock_ramlist(void)
1430 qemu_mutex_unlock(&ram_list
.mutex
);
1433 void ram_block_dump(Monitor
*mon
)
1439 monitor_printf(mon
, "%24s %8s %18s %18s %18s\n",
1440 "Block Name", "PSize", "Offset", "Used", "Total");
1441 RAMBLOCK_FOREACH(block
) {
1442 psize
= size_to_str(block
->page_size
);
1443 monitor_printf(mon
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1444 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1445 (uint64_t)block
->offset
,
1446 (uint64_t)block
->used_length
,
1447 (uint64_t)block
->max_length
);
1455 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1456 * may or may not name the same files / on the same filesystem now as
1457 * when we actually open and map them. Iterate over the file
1458 * descriptors instead, and use qemu_fd_getpagesize().
1460 static int find_max_supported_pagesize(Object
*obj
, void *opaque
)
1463 long *hpsize_min
= opaque
;
1465 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1466 mem_path
= object_property_get_str(obj
, "mem-path", NULL
);
1468 long hpsize
= qemu_mempath_getpagesize(mem_path
);
1469 if (hpsize
< *hpsize_min
) {
1470 *hpsize_min
= hpsize
;
1473 *hpsize_min
= getpagesize();
1480 long qemu_getrampagesize(void)
1482 long hpsize
= LONG_MAX
;
1483 long mainrampagesize
;
1484 Object
*memdev_root
;
1487 mainrampagesize
= qemu_mempath_getpagesize(mem_path
);
1489 mainrampagesize
= getpagesize();
1492 /* it's possible we have memory-backend objects with
1493 * hugepage-backed RAM. these may get mapped into system
1494 * address space via -numa parameters or memory hotplug
1495 * hooks. we want to take these into account, but we
1496 * also want to make sure these supported hugepage
1497 * sizes are applicable across the entire range of memory
1498 * we may boot from, so we take the min across all
1499 * backends, and assume normal pages in cases where a
1500 * backend isn't backed by hugepages.
1502 memdev_root
= object_resolve_path("/objects", NULL
);
1504 object_child_foreach(memdev_root
, find_max_supported_pagesize
, &hpsize
);
1506 if (hpsize
== LONG_MAX
) {
1507 /* No additional memory regions found ==> Report main RAM page size */
1508 return mainrampagesize
;
1511 /* If NUMA is disabled or the NUMA nodes are not backed with a
1512 * memory-backend, then there is at least one node using "normal" RAM,
1513 * so if its page size is smaller we have got to report that size instead.
1515 if (hpsize
> mainrampagesize
&&
1516 (nb_numa_nodes
== 0 || numa_info
[0].node_memdev
== NULL
)) {
1519 error_report("Huge page support disabled (n/a for main memory).");
1522 return mainrampagesize
;
1528 long qemu_getrampagesize(void)
1530 return getpagesize();
1535 static int64_t get_file_size(int fd
)
1537 int64_t size
= lseek(fd
, 0, SEEK_END
);
1544 static int file_ram_open(const char *path
,
1545 const char *region_name
,
1550 char *sanitized_name
;
1556 fd
= open(path
, O_RDWR
);
1558 /* @path names an existing file, use it */
1561 if (errno
== ENOENT
) {
1562 /* @path names a file that doesn't exist, create it */
1563 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1568 } else if (errno
== EISDIR
) {
1569 /* @path names a directory, create a file there */
1570 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1571 sanitized_name
= g_strdup(region_name
);
1572 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1578 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1580 g_free(sanitized_name
);
1582 fd
= mkstemp(filename
);
1590 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1591 error_setg_errno(errp
, errno
,
1592 "can't open backing store %s for guest RAM",
1597 * Try again on EINTR and EEXIST. The latter happens when
1598 * something else creates the file between our two open().
1605 static void *file_ram_alloc(RAMBlock
*block
,
1613 block
->page_size
= qemu_fd_getpagesize(fd
);
1614 block
->mr
->align
= block
->page_size
;
1615 #if defined(__s390x__)
1616 if (kvm_enabled()) {
1617 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1621 if (memory
< block
->page_size
) {
1622 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1623 "or larger than page size 0x%zx",
1624 memory
, block
->page_size
);
1628 memory
= ROUND_UP(memory
, block
->page_size
);
1631 * ftruncate is not supported by hugetlbfs in older
1632 * hosts, so don't bother bailing out on errors.
1633 * If anything goes wrong with it under other filesystems,
1636 * Do not truncate the non-empty backend file to avoid corrupting
1637 * the existing data in the file. Disabling shrinking is not
1638 * enough. For example, the current vNVDIMM implementation stores
1639 * the guest NVDIMM labels at the end of the backend file. If the
1640 * backend file is later extended, QEMU will not be able to find
1641 * those labels. Therefore, extending the non-empty backend file
1642 * is disabled as well.
1644 if (truncate
&& ftruncate(fd
, memory
)) {
1645 perror("ftruncate");
1648 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
,
1649 block
->flags
& RAM_SHARED
);
1650 if (area
== MAP_FAILED
) {
1651 error_setg_errno(errp
, errno
,
1652 "unable to map backing store for guest RAM");
1657 os_mem_prealloc(fd
, area
, memory
, smp_cpus
, errp
);
1658 if (errp
&& *errp
) {
1659 qemu_ram_munmap(area
, memory
);
1669 /* Called with the ramlist lock held. */
1670 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1672 RAMBlock
*block
, *next_block
;
1673 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1675 assert(size
!= 0); /* it would hand out same offset multiple times */
1677 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1681 RAMBLOCK_FOREACH(block
) {
1682 ram_addr_t end
, next
= RAM_ADDR_MAX
;
1684 end
= block
->offset
+ block
->max_length
;
1686 RAMBLOCK_FOREACH(next_block
) {
1687 if (next_block
->offset
>= end
) {
1688 next
= MIN(next
, next_block
->offset
);
1691 if (next
- end
>= size
&& next
- end
< mingap
) {
1693 mingap
= next
- end
;
1697 if (offset
== RAM_ADDR_MAX
) {
1698 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1706 unsigned long last_ram_page(void)
1709 ram_addr_t last
= 0;
1712 RAMBLOCK_FOREACH(block
) {
1713 last
= MAX(last
, block
->offset
+ block
->max_length
);
1716 return last
>> TARGET_PAGE_BITS
;
1719 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1723 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1724 if (!machine_dump_guest_core(current_machine
)) {
1725 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1727 perror("qemu_madvise");
1728 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1729 "but dump_guest_core=off specified\n");
1734 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1739 bool qemu_ram_is_shared(RAMBlock
*rb
)
1741 return rb
->flags
& RAM_SHARED
;
1744 /* Called with iothread lock held. */
1745 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
1750 assert(!new_block
->idstr
[0]);
1753 char *id
= qdev_get_dev_path(dev
);
1755 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
1759 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
1762 RAMBLOCK_FOREACH(block
) {
1763 if (block
!= new_block
&&
1764 !strcmp(block
->idstr
, new_block
->idstr
)) {
1765 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
1773 /* Called with iothread lock held. */
1774 void qemu_ram_unset_idstr(RAMBlock
*block
)
1776 /* FIXME: arch_init.c assumes that this is not called throughout
1777 * migration. Ignore the problem since hot-unplug during migration
1778 * does not work anyway.
1781 memset(block
->idstr
, 0, sizeof(block
->idstr
));
1785 size_t qemu_ram_pagesize(RAMBlock
*rb
)
1787 return rb
->page_size
;
1790 /* Returns the largest size of page in use */
1791 size_t qemu_ram_pagesize_largest(void)
1796 RAMBLOCK_FOREACH(block
) {
1797 largest
= MAX(largest
, qemu_ram_pagesize(block
));
1803 static int memory_try_enable_merging(void *addr
, size_t len
)
1805 if (!machine_mem_merge(current_machine
)) {
1806 /* disabled by the user */
1810 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
1813 /* Only legal before guest might have detected the memory size: e.g. on
1814 * incoming migration, or right after reset.
1816 * As memory core doesn't know how is memory accessed, it is up to
1817 * resize callback to update device state and/or add assertions to detect
1818 * misuse, if necessary.
1820 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
1824 newsize
= HOST_PAGE_ALIGN(newsize
);
1826 if (block
->used_length
== newsize
) {
1830 if (!(block
->flags
& RAM_RESIZEABLE
)) {
1831 error_setg_errno(errp
, EINVAL
,
1832 "Length mismatch: %s: 0x" RAM_ADDR_FMT
1833 " in != 0x" RAM_ADDR_FMT
, block
->idstr
,
1834 newsize
, block
->used_length
);
1838 if (block
->max_length
< newsize
) {
1839 error_setg_errno(errp
, EINVAL
,
1840 "Length too large: %s: 0x" RAM_ADDR_FMT
1841 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
1842 newsize
, block
->max_length
);
1846 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
1847 block
->used_length
= newsize
;
1848 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
1850 memory_region_set_size(block
->mr
, newsize
);
1851 if (block
->resized
) {
1852 block
->resized(block
->idstr
, newsize
, block
->host
);
1857 /* Called with ram_list.mutex held */
1858 static void dirty_memory_extend(ram_addr_t old_ram_size
,
1859 ram_addr_t new_ram_size
)
1861 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
1862 DIRTY_MEMORY_BLOCK_SIZE
);
1863 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
1864 DIRTY_MEMORY_BLOCK_SIZE
);
1867 /* Only need to extend if block count increased */
1868 if (new_num_blocks
<= old_num_blocks
) {
1872 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
1873 DirtyMemoryBlocks
*old_blocks
;
1874 DirtyMemoryBlocks
*new_blocks
;
1877 old_blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[i
]);
1878 new_blocks
= g_malloc(sizeof(*new_blocks
) +
1879 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
1881 if (old_num_blocks
) {
1882 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
1883 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
1886 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
1887 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
1890 atomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
1893 g_free_rcu(old_blocks
, rcu
);
1898 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
)
1901 RAMBlock
*last_block
= NULL
;
1902 ram_addr_t old_ram_size
, new_ram_size
;
1905 old_ram_size
= last_ram_page();
1907 qemu_mutex_lock_ramlist();
1908 new_block
->offset
= find_ram_offset(new_block
->max_length
);
1910 if (!new_block
->host
) {
1911 if (xen_enabled()) {
1912 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
1913 new_block
->mr
, &err
);
1915 error_propagate(errp
, err
);
1916 qemu_mutex_unlock_ramlist();
1920 new_block
->host
= phys_mem_alloc(new_block
->max_length
,
1921 &new_block
->mr
->align
);
1922 if (!new_block
->host
) {
1923 error_setg_errno(errp
, errno
,
1924 "cannot set up guest memory '%s'",
1925 memory_region_name(new_block
->mr
));
1926 qemu_mutex_unlock_ramlist();
1929 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
1933 new_ram_size
= MAX(old_ram_size
,
1934 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
1935 if (new_ram_size
> old_ram_size
) {
1936 dirty_memory_extend(old_ram_size
, new_ram_size
);
1938 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1939 * QLIST (which has an RCU-friendly variant) does not have insertion at
1940 * tail, so save the last element in last_block.
1942 RAMBLOCK_FOREACH(block
) {
1944 if (block
->max_length
< new_block
->max_length
) {
1949 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
1950 } else if (last_block
) {
1951 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
1952 } else { /* list is empty */
1953 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
1955 ram_list
.mru_block
= NULL
;
1957 /* Write list before version */
1960 qemu_mutex_unlock_ramlist();
1962 cpu_physical_memory_set_dirty_range(new_block
->offset
,
1963 new_block
->used_length
,
1966 if (new_block
->host
) {
1967 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
1968 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
1969 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
1970 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_DONTFORK
);
1971 ram_block_notify_add(new_block
->host
, new_block
->max_length
);
1976 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
1980 RAMBlock
*new_block
;
1981 Error
*local_err
= NULL
;
1984 if (xen_enabled()) {
1985 error_setg(errp
, "-mem-path not supported with Xen");
1989 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1991 "host lacks kvm mmu notifiers, -mem-path unsupported");
1995 if (phys_mem_alloc
!= qemu_anon_ram_alloc
) {
1997 * file_ram_alloc() needs to allocate just like
1998 * phys_mem_alloc, but we haven't bothered to provide
2002 "-mem-path not supported with this accelerator");
2006 size
= HOST_PAGE_ALIGN(size
);
2007 file_size
= get_file_size(fd
);
2008 if (file_size
> 0 && file_size
< size
) {
2009 error_setg(errp
, "backing store %s size 0x%" PRIx64
2010 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2011 mem_path
, file_size
, size
);
2015 new_block
= g_malloc0(sizeof(*new_block
));
2017 new_block
->used_length
= size
;
2018 new_block
->max_length
= size
;
2019 new_block
->flags
= share
? RAM_SHARED
: 0;
2020 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, !file_size
, errp
);
2021 if (!new_block
->host
) {
2026 ram_block_add(new_block
, &local_err
);
2029 error_propagate(errp
, local_err
);
2037 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2038 bool share
, const char *mem_path
,
2045 fd
= file_ram_open(mem_path
, memory_region_name(mr
), &created
, errp
);
2050 block
= qemu_ram_alloc_from_fd(size
, mr
, share
, fd
, errp
);
2064 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2065 void (*resized
)(const char*,
2068 void *host
, bool resizeable
,
2069 MemoryRegion
*mr
, Error
**errp
)
2071 RAMBlock
*new_block
;
2072 Error
*local_err
= NULL
;
2074 size
= HOST_PAGE_ALIGN(size
);
2075 max_size
= HOST_PAGE_ALIGN(max_size
);
2076 new_block
= g_malloc0(sizeof(*new_block
));
2078 new_block
->resized
= resized
;
2079 new_block
->used_length
= size
;
2080 new_block
->max_length
= max_size
;
2081 assert(max_size
>= size
);
2083 new_block
->page_size
= getpagesize();
2084 new_block
->host
= host
;
2086 new_block
->flags
|= RAM_PREALLOC
;
2089 new_block
->flags
|= RAM_RESIZEABLE
;
2091 ram_block_add(new_block
, &local_err
);
2094 error_propagate(errp
, local_err
);
2100 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2101 MemoryRegion
*mr
, Error
**errp
)
2103 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, false, mr
, errp
);
2106 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, MemoryRegion
*mr
, Error
**errp
)
2108 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, false, mr
, errp
);
2111 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2112 void (*resized
)(const char*,
2115 MemoryRegion
*mr
, Error
**errp
)
2117 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
, true, mr
, errp
);
2120 static void reclaim_ramblock(RAMBlock
*block
)
2122 if (block
->flags
& RAM_PREALLOC
) {
2124 } else if (xen_enabled()) {
2125 xen_invalidate_map_cache_entry(block
->host
);
2127 } else if (block
->fd
>= 0) {
2128 qemu_ram_munmap(block
->host
, block
->max_length
);
2132 qemu_anon_ram_free(block
->host
, block
->max_length
);
2137 void qemu_ram_free(RAMBlock
*block
)
2144 ram_block_notify_remove(block
->host
, block
->max_length
);
2147 qemu_mutex_lock_ramlist();
2148 QLIST_REMOVE_RCU(block
, next
);
2149 ram_list
.mru_block
= NULL
;
2150 /* Write list before version */
2153 call_rcu(block
, reclaim_ramblock
, rcu
);
2154 qemu_mutex_unlock_ramlist();
2158 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2165 RAMBLOCK_FOREACH(block
) {
2166 offset
= addr
- block
->offset
;
2167 if (offset
< block
->max_length
) {
2168 vaddr
= ramblock_ptr(block
, offset
);
2169 if (block
->flags
& RAM_PREALLOC
) {
2171 } else if (xen_enabled()) {
2175 if (block
->fd
>= 0) {
2176 flags
|= (block
->flags
& RAM_SHARED
?
2177 MAP_SHARED
: MAP_PRIVATE
);
2178 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2179 flags
, block
->fd
, offset
);
2182 * Remap needs to match alloc. Accelerators that
2183 * set phys_mem_alloc never remap. If they did,
2184 * we'd need a remap hook here.
2186 assert(phys_mem_alloc
== qemu_anon_ram_alloc
);
2188 flags
|= MAP_PRIVATE
| MAP_ANONYMOUS
;
2189 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2192 if (area
!= vaddr
) {
2193 fprintf(stderr
, "Could not remap addr: "
2194 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"\n",
2198 memory_try_enable_merging(vaddr
, length
);
2199 qemu_ram_setup_dump(vaddr
, length
);
2204 #endif /* !_WIN32 */
2206 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2207 * This should not be used for general purpose DMA. Use address_space_map
2208 * or address_space_rw instead. For local memory (e.g. video ram) that the
2209 * device owns, use memory_region_get_ram_ptr.
2211 * Called within RCU critical section.
2213 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2215 RAMBlock
*block
= ram_block
;
2217 if (block
== NULL
) {
2218 block
= qemu_get_ram_block(addr
);
2219 addr
-= block
->offset
;
2222 if (xen_enabled() && block
->host
== NULL
) {
2223 /* We need to check if the requested address is in the RAM
2224 * because we don't want to map the entire memory in QEMU.
2225 * In that case just map until the end of the page.
2227 if (block
->offset
== 0) {
2228 return xen_map_cache(addr
, 0, 0, false);
2231 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2233 return ramblock_ptr(block
, addr
);
2236 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2237 * but takes a size argument.
2239 * Called within RCU critical section.
2241 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2242 hwaddr
*size
, bool lock
)
2244 RAMBlock
*block
= ram_block
;
2249 if (block
== NULL
) {
2250 block
= qemu_get_ram_block(addr
);
2251 addr
-= block
->offset
;
2253 *size
= MIN(*size
, block
->max_length
- addr
);
2255 if (xen_enabled() && block
->host
== NULL
) {
2256 /* We need to check if the requested address is in the RAM
2257 * because we don't want to map the entire memory in QEMU.
2258 * In that case just map the requested area.
2260 if (block
->offset
== 0) {
2261 return xen_map_cache(addr
, *size
, lock
, lock
);
2264 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2267 return ramblock_ptr(block
, addr
);
2271 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2274 * ptr: Host pointer to look up
2275 * round_offset: If true round the result offset down to a page boundary
2276 * *ram_addr: set to result ram_addr
2277 * *offset: set to result offset within the RAMBlock
2279 * Returns: RAMBlock (or NULL if not found)
2281 * By the time this function returns, the returned pointer is not protected
2282 * by RCU anymore. If the caller is not within an RCU critical section and
2283 * does not hold the iothread lock, it must have other means of protecting the
2284 * pointer, such as a reference to the region that includes the incoming
2287 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2291 uint8_t *host
= ptr
;
2293 if (xen_enabled()) {
2294 ram_addr_t ram_addr
;
2296 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2297 block
= qemu_get_ram_block(ram_addr
);
2299 *offset
= ram_addr
- block
->offset
;
2306 block
= atomic_rcu_read(&ram_list
.mru_block
);
2307 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2311 RAMBLOCK_FOREACH(block
) {
2312 /* This case append when the block is not mapped. */
2313 if (block
->host
== NULL
) {
2316 if (host
- block
->host
< block
->max_length
) {
2325 *offset
= (host
- block
->host
);
2327 *offset
&= TARGET_PAGE_MASK
;
2334 * Finds the named RAMBlock
2336 * name: The name of RAMBlock to find
2338 * Returns: RAMBlock (or NULL if not found)
2340 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2344 RAMBLOCK_FOREACH(block
) {
2345 if (!strcmp(name
, block
->idstr
)) {
2353 /* Some of the softmmu routines need to translate from a host pointer
2354 (typically a TLB entry) back to a ram offset. */
2355 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2360 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2362 return RAM_ADDR_INVALID
;
2365 return block
->offset
+ offset
;
2368 /* Called within RCU critical section. */
2369 static void notdirty_mem_write(void *opaque
, hwaddr ram_addr
,
2370 uint64_t val
, unsigned size
)
2372 bool locked
= false;
2374 assert(tcg_enabled());
2375 if (!cpu_physical_memory_get_dirty_flag(ram_addr
, DIRTY_MEMORY_CODE
)) {
2378 tb_invalidate_phys_page_fast(ram_addr
, size
);
2382 stb_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2385 stw_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2388 stl_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2398 /* Set both VGA and migration bits for simplicity and to remove
2399 * the notdirty callback faster.
2401 cpu_physical_memory_set_dirty_range(ram_addr
, size
,
2402 DIRTY_CLIENTS_NOCODE
);
2403 /* we remove the notdirty callback only if the code has been
2405 if (!cpu_physical_memory_is_clean(ram_addr
)) {
2406 tlb_set_dirty(current_cpu
, current_cpu
->mem_io_vaddr
);
2410 static bool notdirty_mem_accepts(void *opaque
, hwaddr addr
,
2411 unsigned size
, bool is_write
)
2416 static const MemoryRegionOps notdirty_mem_ops
= {
2417 .write
= notdirty_mem_write
,
2418 .valid
.accepts
= notdirty_mem_accepts
,
2419 .endianness
= DEVICE_NATIVE_ENDIAN
,
2422 /* Generate a debug exception if a watchpoint has been hit. */
2423 static void check_watchpoint(int offset
, int len
, MemTxAttrs attrs
, int flags
)
2425 CPUState
*cpu
= current_cpu
;
2426 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
2427 CPUArchState
*env
= cpu
->env_ptr
;
2428 target_ulong pc
, cs_base
;
2433 assert(tcg_enabled());
2434 if (cpu
->watchpoint_hit
) {
2435 /* We re-entered the check after replacing the TB. Now raise
2436 * the debug interrupt so that is will trigger after the
2437 * current instruction. */
2438 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
2441 vaddr
= (cpu
->mem_io_vaddr
& TARGET_PAGE_MASK
) + offset
;
2442 vaddr
= cc
->adjust_watchpoint_address(cpu
, vaddr
, len
);
2443 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
2444 if (cpu_watchpoint_address_matches(wp
, vaddr
, len
)
2445 && (wp
->flags
& flags
)) {
2446 if (flags
== BP_MEM_READ
) {
2447 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
2449 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
2451 wp
->hitaddr
= vaddr
;
2452 wp
->hitattrs
= attrs
;
2453 if (!cpu
->watchpoint_hit
) {
2454 if (wp
->flags
& BP_CPU
&&
2455 !cc
->debug_check_watchpoint(cpu
, wp
)) {
2456 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2459 cpu
->watchpoint_hit
= wp
;
2461 /* Both tb_lock and iothread_mutex will be reset when
2462 * cpu_loop_exit or cpu_loop_exit_noexc longjmp
2463 * back into the cpu_exec main loop.
2466 tb_check_watchpoint(cpu
);
2467 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
2468 cpu
->exception_index
= EXCP_DEBUG
;
2471 cpu_get_tb_cpu_state(env
, &pc
, &cs_base
, &cpu_flags
);
2472 tb_gen_code(cpu
, pc
, cs_base
, cpu_flags
, 1);
2473 cpu_loop_exit_noexc(cpu
);
2477 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2482 /* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2483 so these check for a hit then pass through to the normal out-of-line
2485 static MemTxResult
watch_mem_read(void *opaque
, hwaddr addr
, uint64_t *pdata
,
2486 unsigned size
, MemTxAttrs attrs
)
2490 int asidx
= cpu_asidx_from_attrs(current_cpu
, attrs
);
2491 AddressSpace
*as
= current_cpu
->cpu_ases
[asidx
].as
;
2493 check_watchpoint(addr
& ~TARGET_PAGE_MASK
, size
, attrs
, BP_MEM_READ
);
2496 data
= address_space_ldub(as
, addr
, attrs
, &res
);
2499 data
= address_space_lduw(as
, addr
, attrs
, &res
);
2502 data
= address_space_ldl(as
, addr
, attrs
, &res
);
2510 static MemTxResult
watch_mem_write(void *opaque
, hwaddr addr
,
2511 uint64_t val
, unsigned size
,
2515 int asidx
= cpu_asidx_from_attrs(current_cpu
, attrs
);
2516 AddressSpace
*as
= current_cpu
->cpu_ases
[asidx
].as
;
2518 check_watchpoint(addr
& ~TARGET_PAGE_MASK
, size
, attrs
, BP_MEM_WRITE
);
2521 address_space_stb(as
, addr
, val
, attrs
, &res
);
2524 address_space_stw(as
, addr
, val
, attrs
, &res
);
2527 address_space_stl(as
, addr
, val
, attrs
, &res
);
2534 static const MemoryRegionOps watch_mem_ops
= {
2535 .read_with_attrs
= watch_mem_read
,
2536 .write_with_attrs
= watch_mem_write
,
2537 .endianness
= DEVICE_NATIVE_ENDIAN
,
2540 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2541 const uint8_t *buf
, int len
);
2542 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, int len
,
2545 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2546 unsigned len
, MemTxAttrs attrs
)
2548 subpage_t
*subpage
= opaque
;
2552 #if defined(DEBUG_SUBPAGE)
2553 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2554 subpage
, len
, addr
);
2556 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2562 *data
= ldub_p(buf
);
2565 *data
= lduw_p(buf
);
2578 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2579 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2581 subpage_t
*subpage
= opaque
;
2584 #if defined(DEBUG_SUBPAGE)
2585 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2586 " value %"PRIx64
"\n",
2587 __func__
, subpage
, len
, addr
, value
);
2605 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2608 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2609 unsigned len
, bool is_write
)
2611 subpage_t
*subpage
= opaque
;
2612 #if defined(DEBUG_SUBPAGE)
2613 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2614 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2617 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2621 static const MemoryRegionOps subpage_ops
= {
2622 .read_with_attrs
= subpage_read
,
2623 .write_with_attrs
= subpage_write
,
2624 .impl
.min_access_size
= 1,
2625 .impl
.max_access_size
= 8,
2626 .valid
.min_access_size
= 1,
2627 .valid
.max_access_size
= 8,
2628 .valid
.accepts
= subpage_accepts
,
2629 .endianness
= DEVICE_NATIVE_ENDIAN
,
2632 static int subpage_register (subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2637 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2639 idx
= SUBPAGE_IDX(start
);
2640 eidx
= SUBPAGE_IDX(end
);
2641 #if defined(DEBUG_SUBPAGE)
2642 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2643 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2645 for (; idx
<= eidx
; idx
++) {
2646 mmio
->sub_section
[idx
] = section
;
2652 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2656 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2659 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2660 NULL
, TARGET_PAGE_SIZE
);
2661 mmio
->iomem
.subpage
= true;
2662 #if defined(DEBUG_SUBPAGE)
2663 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2664 mmio
, base
, TARGET_PAGE_SIZE
);
2666 subpage_register(mmio
, 0, TARGET_PAGE_SIZE
-1, PHYS_SECTION_UNASSIGNED
);
2671 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2674 MemoryRegionSection section
= {
2677 .offset_within_address_space
= 0,
2678 .offset_within_region
= 0,
2679 .size
= int128_2_64(),
2682 return phys_section_add(map
, §ion
);
2685 MemoryRegion
*iotlb_to_region(CPUState
*cpu
, hwaddr index
, MemTxAttrs attrs
)
2687 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2688 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2689 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpuas
->memory_dispatch
);
2690 MemoryRegionSection
*sections
= d
->map
.sections
;
2692 return sections
[index
& ~TARGET_PAGE_MASK
].mr
;
2695 static void io_mem_init(void)
2697 memory_region_init_io(&io_mem_rom
, NULL
, &unassigned_mem_ops
, NULL
, NULL
, UINT64_MAX
);
2698 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2701 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
2702 * which can be called without the iothread mutex.
2704 memory_region_init_io(&io_mem_notdirty
, NULL
, ¬dirty_mem_ops
, NULL
,
2706 memory_region_clear_global_locking(&io_mem_notdirty
);
2708 memory_region_init_io(&io_mem_watch
, NULL
, &watch_mem_ops
, NULL
,
2712 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2714 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2717 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2718 assert(n
== PHYS_SECTION_UNASSIGNED
);
2719 n
= dummy_section(&d
->map
, fv
, &io_mem_notdirty
);
2720 assert(n
== PHYS_SECTION_NOTDIRTY
);
2721 n
= dummy_section(&d
->map
, fv
, &io_mem_rom
);
2722 assert(n
== PHYS_SECTION_ROM
);
2723 n
= dummy_section(&d
->map
, fv
, &io_mem_watch
);
2724 assert(n
== PHYS_SECTION_WATCH
);
2726 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2731 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2733 phys_sections_free(&d
->map
);
2737 static void tcg_commit(MemoryListener
*listener
)
2739 CPUAddressSpace
*cpuas
;
2740 AddressSpaceDispatch
*d
;
2742 /* since each CPU stores ram addresses in its TLB cache, we must
2743 reset the modified entries */
2744 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2745 cpu_reloading_memory_map();
2746 /* The CPU and TLB are protected by the iothread lock.
2747 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2748 * may have split the RCU critical section.
2750 d
= address_space_to_dispatch(cpuas
->as
);
2751 atomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2752 tlb_flush(cpuas
->cpu
);
2755 static void memory_map_init(void)
2757 system_memory
= g_malloc(sizeof(*system_memory
));
2759 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2760 address_space_init(&address_space_memory
, system_memory
, "memory");
2762 system_io
= g_malloc(sizeof(*system_io
));
2763 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2765 address_space_init(&address_space_io
, system_io
, "I/O");
2768 MemoryRegion
*get_system_memory(void)
2770 return system_memory
;
2773 MemoryRegion
*get_system_io(void)
2778 #endif /* !defined(CONFIG_USER_ONLY) */
2780 /* physical memory access (slow version, mainly for debug) */
2781 #if defined(CONFIG_USER_ONLY)
2782 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
2783 uint8_t *buf
, int len
, int is_write
)
2790 page
= addr
& TARGET_PAGE_MASK
;
2791 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
2794 flags
= page_get_flags(page
);
2795 if (!(flags
& PAGE_VALID
))
2798 if (!(flags
& PAGE_WRITE
))
2800 /* XXX: this code should not depend on lock_user */
2801 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
2804 unlock_user(p
, addr
, l
);
2806 if (!(flags
& PAGE_READ
))
2808 /* XXX: this code should not depend on lock_user */
2809 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
2812 unlock_user(p
, addr
, 0);
2823 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
2826 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
2827 addr
+= memory_region_get_ram_addr(mr
);
2829 /* No early return if dirty_log_mask is or becomes 0, because
2830 * cpu_physical_memory_set_dirty_range will still call
2831 * xen_modified_memory.
2833 if (dirty_log_mask
) {
2835 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
2837 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
2838 assert(tcg_enabled());
2840 tb_invalidate_phys_range(addr
, addr
+ length
);
2842 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
2844 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
2847 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
2849 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
2851 /* Regions are assumed to support 1-4 byte accesses unless
2852 otherwise specified. */
2853 if (access_size_max
== 0) {
2854 access_size_max
= 4;
2857 /* Bound the maximum access by the alignment of the address. */
2858 if (!mr
->ops
->impl
.unaligned
) {
2859 unsigned align_size_max
= addr
& -addr
;
2860 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
2861 access_size_max
= align_size_max
;
2865 /* Don't attempt accesses larger than the maximum. */
2866 if (l
> access_size_max
) {
2867 l
= access_size_max
;
2874 static bool prepare_mmio_access(MemoryRegion
*mr
)
2876 bool unlocked
= !qemu_mutex_iothread_locked();
2877 bool release_lock
= false;
2879 if (unlocked
&& mr
->global_locking
) {
2880 qemu_mutex_lock_iothread();
2882 release_lock
= true;
2884 if (mr
->flush_coalesced_mmio
) {
2886 qemu_mutex_lock_iothread();
2888 qemu_flush_coalesced_mmio_buffer();
2890 qemu_mutex_unlock_iothread();
2894 return release_lock
;
2897 /* Called within RCU critical section. */
2898 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
2901 int len
, hwaddr addr1
,
2902 hwaddr l
, MemoryRegion
*mr
)
2906 MemTxResult result
= MEMTX_OK
;
2907 bool release_lock
= false;
2910 if (!memory_access_is_direct(mr
, true)) {
2911 release_lock
|= prepare_mmio_access(mr
);
2912 l
= memory_access_size(mr
, l
, addr1
);
2913 /* XXX: could force current_cpu to NULL to avoid
2917 /* 64 bit write access */
2919 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 8,
2923 /* 32 bit write access */
2924 val
= (uint32_t)ldl_p(buf
);
2925 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 4,
2929 /* 16 bit write access */
2931 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 2,
2935 /* 8 bit write access */
2937 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 1,
2945 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2946 memcpy(ptr
, buf
, l
);
2947 invalidate_and_set_dirty(mr
, addr1
, l
);
2951 qemu_mutex_unlock_iothread();
2952 release_lock
= false;
2964 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true);
2970 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2971 const uint8_t *buf
, int len
)
2976 MemTxResult result
= MEMTX_OK
;
2981 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true);
2982 result
= flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
2990 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
2992 const uint8_t *buf
, int len
)
2994 return flatview_write(address_space_to_flatview(as
), addr
, attrs
, buf
, len
);
2997 /* Called within RCU critical section. */
2998 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
2999 MemTxAttrs attrs
, uint8_t *buf
,
3000 int len
, hwaddr addr1
, hwaddr l
,
3005 MemTxResult result
= MEMTX_OK
;
3006 bool release_lock
= false;
3009 if (!memory_access_is_direct(mr
, false)) {
3011 release_lock
|= prepare_mmio_access(mr
);
3012 l
= memory_access_size(mr
, l
, addr1
);
3015 /* 64 bit read access */
3016 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 8,
3021 /* 32 bit read access */
3022 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 4,
3027 /* 16 bit read access */
3028 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 2,
3033 /* 8 bit read access */
3034 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 1,
3043 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3044 memcpy(buf
, ptr
, l
);
3048 qemu_mutex_unlock_iothread();
3049 release_lock
= false;
3061 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false);
3067 MemTxResult
flatview_read_full(FlatView
*fv
, hwaddr addr
,
3068 MemTxAttrs attrs
, uint8_t *buf
, int len
)
3073 MemTxResult result
= MEMTX_OK
;
3078 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false);
3079 result
= flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
3087 static MemTxResult
flatview_rw(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
3088 uint8_t *buf
, int len
, bool is_write
)
3091 return flatview_write(fv
, addr
, attrs
, (uint8_t *)buf
, len
);
3093 return flatview_read(fv
, addr
, attrs
, (uint8_t *)buf
, len
);
3097 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
,
3098 MemTxAttrs attrs
, uint8_t *buf
,
3099 int len
, bool is_write
)
3101 return flatview_rw(address_space_to_flatview(as
),
3102 addr
, attrs
, buf
, len
, is_write
);
3105 void cpu_physical_memory_rw(hwaddr addr
, uint8_t *buf
,
3106 int len
, int is_write
)
3108 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
3109 buf
, len
, is_write
);
3112 enum write_rom_type
{
3117 static inline void cpu_physical_memory_write_rom_internal(AddressSpace
*as
,
3118 hwaddr addr
, const uint8_t *buf
, int len
, enum write_rom_type type
)
3128 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true);
3130 if (!(memory_region_is_ram(mr
) ||
3131 memory_region_is_romd(mr
))) {
3132 l
= memory_access_size(mr
, l
, addr1
);
3135 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
3138 memcpy(ptr
, buf
, l
);
3139 invalidate_and_set_dirty(mr
, addr1
, l
);
3142 flush_icache_range((uintptr_t)ptr
, (uintptr_t)ptr
+ l
);
3153 /* used for ROM loading : can write in RAM and ROM */
3154 void cpu_physical_memory_write_rom(AddressSpace
*as
, hwaddr addr
,
3155 const uint8_t *buf
, int len
)
3157 cpu_physical_memory_write_rom_internal(as
, addr
, buf
, len
, WRITE_DATA
);
3160 void cpu_flush_icache_range(hwaddr start
, int len
)
3163 * This function should do the same thing as an icache flush that was
3164 * triggered from within the guest. For TCG we are always cache coherent,
3165 * so there is no need to flush anything. For KVM / Xen we need to flush
3166 * the host's instruction cache at least.
3168 if (tcg_enabled()) {
3172 cpu_physical_memory_write_rom_internal(&address_space_memory
,
3173 start
, NULL
, len
, FLUSH_CACHE
);
3184 static BounceBuffer bounce
;
3186 typedef struct MapClient
{
3188 QLIST_ENTRY(MapClient
) link
;
3191 QemuMutex map_client_list_lock
;
3192 static QLIST_HEAD(map_client_list
, MapClient
) map_client_list
3193 = QLIST_HEAD_INITIALIZER(map_client_list
);
3195 static void cpu_unregister_map_client_do(MapClient
*client
)
3197 QLIST_REMOVE(client
, link
);
3201 static void cpu_notify_map_clients_locked(void)
3205 while (!QLIST_EMPTY(&map_client_list
)) {
3206 client
= QLIST_FIRST(&map_client_list
);
3207 qemu_bh_schedule(client
->bh
);
3208 cpu_unregister_map_client_do(client
);
3212 void cpu_register_map_client(QEMUBH
*bh
)
3214 MapClient
*client
= g_malloc(sizeof(*client
));
3216 qemu_mutex_lock(&map_client_list_lock
);
3218 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3219 if (!atomic_read(&bounce
.in_use
)) {
3220 cpu_notify_map_clients_locked();
3222 qemu_mutex_unlock(&map_client_list_lock
);
3225 void cpu_exec_init_all(void)
3227 qemu_mutex_init(&ram_list
.mutex
);
3228 /* The data structures we set up here depend on knowing the page size,
3229 * so no more changes can be made after this point.
3230 * In an ideal world, nothing we did before we had finished the
3231 * machine setup would care about the target page size, and we could
3232 * do this much later, rather than requiring board models to state
3233 * up front what their requirements are.
3235 finalize_target_page_bits();
3238 qemu_mutex_init(&map_client_list_lock
);
3241 void cpu_unregister_map_client(QEMUBH
*bh
)
3245 qemu_mutex_lock(&map_client_list_lock
);
3246 QLIST_FOREACH(client
, &map_client_list
, link
) {
3247 if (client
->bh
== bh
) {
3248 cpu_unregister_map_client_do(client
);
3252 qemu_mutex_unlock(&map_client_list_lock
);
3255 static void cpu_notify_map_clients(void)
3257 qemu_mutex_lock(&map_client_list_lock
);
3258 cpu_notify_map_clients_locked();
3259 qemu_mutex_unlock(&map_client_list_lock
);
3262 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, int len
,
3271 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
);
3272 if (!memory_access_is_direct(mr
, is_write
)) {
3273 l
= memory_access_size(mr
, l
, addr
);
3274 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
)) {
3287 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3288 int len
, bool is_write
)
3290 return flatview_access_valid(address_space_to_flatview(as
),
3291 addr
, len
, is_write
);
3295 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3297 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3302 MemoryRegion
*this_mr
;
3308 if (target_len
== 0) {
3313 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3315 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3321 /* Map a physical memory region into a host virtual address.
3322 * May map a subset of the requested range, given by and returned in *plen.
3323 * May return NULL if resources needed to perform the mapping are exhausted.
3324 * Use only for reads OR writes - not for read-modify-write operations.
3325 * Use cpu_register_map_client() to know when retrying the map operation is
3326 * likely to succeed.
3328 void *address_space_map(AddressSpace
*as
,
3337 FlatView
*fv
= address_space_to_flatview(as
);
3345 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
);
3347 if (!memory_access_is_direct(mr
, is_write
)) {
3348 if (atomic_xchg(&bounce
.in_use
, true)) {
3352 /* Avoid unbounded allocations */
3353 l
= MIN(l
, TARGET_PAGE_SIZE
);
3354 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3358 memory_region_ref(mr
);
3361 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3367 return bounce
.buffer
;
3371 memory_region_ref(mr
);
3372 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3374 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3380 /* Unmaps a memory region previously mapped by address_space_map().
3381 * Will also mark the memory as dirty if is_write == 1. access_len gives
3382 * the amount of memory that was actually read or written by the caller.
3384 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3385 int is_write
, hwaddr access_len
)
3387 if (buffer
!= bounce
.buffer
) {
3391 mr
= memory_region_from_host(buffer
, &addr1
);
3394 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3396 if (xen_enabled()) {
3397 xen_invalidate_map_cache_entry(buffer
);
3399 memory_region_unref(mr
);
3403 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3404 bounce
.buffer
, access_len
);
3406 qemu_vfree(bounce
.buffer
);
3407 bounce
.buffer
= NULL
;
3408 memory_region_unref(bounce
.mr
);
3409 atomic_mb_set(&bounce
.in_use
, false);
3410 cpu_notify_map_clients();
3413 void *cpu_physical_memory_map(hwaddr addr
,
3417 return address_space_map(&address_space_memory
, addr
, plen
, is_write
);
3420 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3421 int is_write
, hwaddr access_len
)
3423 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3426 #define ARG1_DECL AddressSpace *as
3429 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3430 #define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3431 #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3432 #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3433 #define RCU_READ_LOCK(...) rcu_read_lock()
3434 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3435 #include "memory_ldst.inc.c"
3437 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3449 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3455 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3460 #define ARG1_DECL MemoryRegionCache *cache
3462 #define SUFFIX _cached
3463 #define TRANSLATE(addr, ...) \
3464 address_space_translate(cache->as, cache->xlat + (addr), __VA_ARGS__)
3465 #define IS_DIRECT(mr, is_write) true
3466 #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3467 #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3468 #define RCU_READ_LOCK() rcu_read_lock()
3469 #define RCU_READ_UNLOCK() rcu_read_unlock()
3470 #include "memory_ldst.inc.c"
3472 /* virtual memory access for debug (includes writing to ROM) */
3473 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3474 uint8_t *buf
, int len
, int is_write
)
3480 cpu_synchronize_state(cpu
);
3485 page
= addr
& TARGET_PAGE_MASK
;
3486 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3487 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3488 /* if no physical page mapped, return an error */
3489 if (phys_addr
== -1)
3491 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3494 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3496 cpu_physical_memory_write_rom(cpu
->cpu_ases
[asidx
].as
,
3499 address_space_rw(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3500 MEMTXATTRS_UNSPECIFIED
,
3511 * Allows code that needs to deal with migration bitmaps etc to still be built
3512 * target independent.
3514 size_t qemu_target_page_size(void)
3516 return TARGET_PAGE_SIZE
;
3519 int qemu_target_page_bits(void)
3521 return TARGET_PAGE_BITS
;
3524 int qemu_target_page_bits_min(void)
3526 return TARGET_PAGE_BITS_MIN
;
3531 * A helper function for the _utterly broken_ virtio device model to find out if
3532 * it's running on a big endian machine. Don't do this at home kids!
3534 bool target_words_bigendian(void);
3535 bool target_words_bigendian(void)
3537 #if defined(TARGET_WORDS_BIGENDIAN)
3544 #ifndef CONFIG_USER_ONLY
3545 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3552 mr
= address_space_translate(&address_space_memory
,
3553 phys_addr
, &phys_addr
, &l
, false);
3555 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3560 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3566 RAMBLOCK_FOREACH(block
) {
3567 ret
= func(block
->idstr
, block
->host
, block
->offset
,
3568 block
->used_length
, opaque
);
3578 * Unmap pages of memory from start to start+length such that
3579 * they a) read as 0, b) Trigger whatever fault mechanism
3580 * the OS provides for postcopy.
3581 * The pages must be unmapped by the end of the function.
3582 * Returns: 0 on success, none-0 on failure
3585 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3589 uint8_t *host_startaddr
= rb
->host
+ start
;
3591 if ((uintptr_t)host_startaddr
& (rb
->page_size
- 1)) {
3592 error_report("ram_block_discard_range: Unaligned start address: %p",
3597 if ((start
+ length
) <= rb
->used_length
) {
3598 uint8_t *host_endaddr
= host_startaddr
+ length
;
3599 if ((uintptr_t)host_endaddr
& (rb
->page_size
- 1)) {
3600 error_report("ram_block_discard_range: Unaligned end address: %p",
3605 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3607 if (rb
->page_size
== qemu_host_page_size
) {
3608 #if defined(CONFIG_MADVISE)
3609 /* Note: We need the madvise MADV_DONTNEED behaviour of definitely
3612 ret
= madvise(host_startaddr
, length
, MADV_DONTNEED
);
3615 /* Huge page case - unfortunately it can't do DONTNEED, but
3616 * it can do the equivalent by FALLOC_FL_PUNCH_HOLE in the
3619 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3620 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3626 error_report("ram_block_discard_range: Failed to discard range "
3627 "%s:%" PRIx64
" +%zx (%d)",
3628 rb
->idstr
, start
, length
, ret
);
3631 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3632 "/%zx/" RAM_ADDR_FMT
")",
3633 rb
->idstr
, start
, length
, rb
->used_length
);
3642 void page_size_init(void)
3644 /* NOTE: we can always suppose that qemu_host_page_size >=
3646 if (qemu_host_page_size
== 0) {
3647 qemu_host_page_size
= qemu_real_host_page_size
;
3649 if (qemu_host_page_size
< TARGET_PAGE_SIZE
) {
3650 qemu_host_page_size
= TARGET_PAGE_SIZE
;
3652 qemu_host_page_mask
= -(intptr_t)qemu_host_page_size
;
3655 #if !defined(CONFIG_USER_ONLY)
3657 static void mtree_print_phys_entries(fprintf_function mon
, void *f
,
3658 int start
, int end
, int skip
, int ptr
)
3660 if (start
== end
- 1) {
3661 mon(f
, "\t%3d ", start
);
3663 mon(f
, "\t%3d..%-3d ", start
, end
- 1);
3665 mon(f
, " skip=%d ", skip
);
3666 if (ptr
== PHYS_MAP_NODE_NIL
) {
3669 mon(f
, " ptr=#%d", ptr
);
3671 mon(f
, " ptr=[%d]", ptr
);
3676 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3677 int128_sub((size), int128_one())) : 0)
3679 void mtree_print_dispatch(fprintf_function mon
, void *f
,
3680 AddressSpaceDispatch
*d
, MemoryRegion
*root
)
3684 mon(f
, " Dispatch\n");
3685 mon(f
, " Physical sections\n");
3687 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
3688 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
3689 const char *names
[] = { " [unassigned]", " [not dirty]",
3690 " [ROM]", " [watch]" };
3692 mon(f
, " #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
" %s%s%s%s%s",
3694 s
->offset_within_address_space
,
3695 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
3696 s
->mr
->name
? s
->mr
->name
: "(noname)",
3697 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
3698 s
->mr
== root
? " [ROOT]" : "",
3699 s
== d
->mru_section
? " [MRU]" : "",
3700 s
->mr
->is_iommu
? " [iommu]" : "");
3703 mon(f
, " alias=%s", s
->mr
->alias
->name
?
3704 s
->mr
->alias
->name
: "noname");
3709 mon(f
, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
3710 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
3711 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
3714 Node
*n
= d
->map
.nodes
+ i
;
3716 mon(f
, " [%d]\n", i
);
3718 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
3719 PhysPageEntry
*pe
= *n
+ j
;
3721 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
3725 mtree_print_phys_entries(mon
, f
, jprev
, j
, prev
.skip
, prev
.ptr
);
3731 if (jprev
!= ARRAY_SIZE(*n
)) {
3732 mtree_print_phys_entries(mon
, f
, jprev
, j
, prev
.skip
, prev
.ptr
);