1 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
4 flags for MIPS16 and non-MIPS16 instructions.
5 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
6 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
7 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
8 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
9 and non-MIPS16 instructions. Fix formatting.
11 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
13 * config/tc-mips.c (reg_needs_delay): Move later in file.
15 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
17 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
18 Alexander Ivchenko <alexander.ivchenko@intel.com>
19 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
20 Sergey Lega <sergey.s.lega@intel.com>
21 Anna Tikhonova <anna.tikhonova@intel.com>
22 Ilya Tocar <ilya.tocar@intel.com>
23 Andrey Turetskiy <andrey.turetskiy@intel.com>
24 Ilya Verbin <ilya.verbin@intel.com>
25 Kirill Yukhin <kirill.yukhin@intel.com>
26 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
28 * config/tc-i386-intel.c (O_zmmword_ptr): New.
29 (i386_types): Add zmmword.
30 (i386_intel_simplify_register): Allow regzmm.
31 (i386_intel_simplify): Handle zmmwords.
32 (i386_intel_operand): Handle RC/SAE, vector operations and
34 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
35 (struct RC_Operation): New.
36 (struct Mask_Operation): New.
37 (struct Broadcast_Operation): New.
38 (vex_prefix): Size of bytes increased to 4 to support EVEX
40 (enum i386_error): Add new error codes: unsupported_broadcast,
41 broadcast_not_on_src_operand, broadcast_needed,
42 unsupported_masking, mask_not_on_destination, no_default_mask,
43 unsupported_rc_sae, rc_sae_operand_not_last_imm,
44 invalid_register_operand, try_vector_disp8.
45 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
46 rounding, broadcast, memshift.
47 (struct RC_name): New.
51 (extra_symbol_chars): Add '{'.
52 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
53 (i386_operand_type): Add regzmm, regmask and vec_disp8.
54 (match_mem_size): Handle zmmwords.
55 (operand_type_match): Handle zmm-registers.
56 (mode_from_disp_size): Handle vec_disp8.
57 (fits_in_vec_disp8): New.
58 (md_begin): Handle {} properly.
59 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
60 (build_vex_prefix): Handle vrex.
61 (build_evex_prefix): New.
62 (process_immext): Adjust to properly handle EVEX.
63 (md_assemble): Add EVEX encoding support.
64 (swap_2_operands): Correctly handle operands with masking,
65 broadcasting or RC/SAE.
66 (check_VecOperands): Support EVEX features.
67 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
68 (match_template): Support regzmm and handle new error codes.
69 (process_suffix): Handle zmmwords and zmm-registers.
70 (check_byte_reg): Extend to zmm-registers.
71 (process_operands): Extend to zmm-registers.
72 (build_modrm_byte): Handle EVEX.
73 (output_insn): Adjust to properly handle EVEX case.
74 (disp_size): Handle vec_disp8.
75 (output_disp): Support compressed disp8*N evex feature.
76 (output_imm): Handle RC/SAE immediates properly.
77 (check_VecOperations): New.
78 (i386_immediate): Handle EVEX features.
79 (i386_index_check): Handle zmmwords and zmm-registers.
80 (RC_SAE_immediate): New.
81 (i386_att_operand): Handle EVEX features.
82 (parse_real_register): Add a check for ZMM/Mask registers.
83 (OPTION_MEVEXLIG): New.
84 (OPTION_MEVEXWIG): New.
85 (md_longopts): Add mevexlig and mevexwig.
86 (md_parse_option): Handle mevexlig and mevexwig options.
87 (md_show_usage): Add description for mevexlig and mevexwig.
88 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
89 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
91 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
93 * config/tc-i386.c (cpu_arch): Add .sha.
94 * doc/c-i386.texi: Document sha/.sha.
96 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
97 Kirill Yukhin <kirill.yukhin@intel.com>
98 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
100 * config/tc-i386.c (BND_PREFIX): New.
101 (struct _i386_insn): Add new field bnd_prefix.
102 (add_bnd_prefix): New.
104 (i386_operand_type): Add regbnd.
105 (md_assemble): Handle BND prefixes.
106 (parse_insn): Likewise.
107 (output_branch): Likewise.
108 (output_jump): Likewise.
109 (build_modrm_byte): Handle regbnd.
110 (OPTION_MADD_BND_PREFIX): New.
111 (md_longopts): Add entry for 'madd-bnd-prefix'.
112 (md_parse_option): Handle madd-bnd-prefix option.
113 (md_show_usage): Add description for madd-bnd-prefix
115 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
117 2013-07-24 Tristan Gingold <gingold@adacore.com>
119 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
122 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
124 * config/tc-s390.c (s390_machine): Don't force the .machine
125 argument to lower case.
127 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
129 * config/tc-arm.c (s_arm_arch_extension): Improve error message
130 for invalid extension.
132 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
134 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
135 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
136 (aarch64_abi): New variable.
137 (ilp32_p): Change to be a macro.
138 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
139 (struct aarch64_option_abi_value_table): New struct.
140 (aarch64_abis): New table.
141 (aarch64_parse_abi): New function.
142 (aarch64_long_opts): Add entry for -mabi=.
143 * doc/as.texinfo (Target AArch64 options): Document -mabi.
144 * doc/c-aarch64.texi: Likewise.
146 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
148 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
151 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
153 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
155 * config/rx-parse.y: (rx_check_float_support): Add function to
156 check floating point operation support for target RX100 and
158 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
159 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
160 RX200, RX600, and RX610
162 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
164 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
166 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
168 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
169 * doc/c-avr.texi: Likewise.
171 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
173 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
174 error with older GCCs.
175 (mips16_macro_build): Dereference args.
177 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
179 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
180 New functions, split out from...
181 (reg_lookup): ...here. Remove itbl support.
182 (reglist_lookup): Delete.
183 (mips_operand_token_type): New enum.
184 (mips_operand_token): New structure.
185 (mips_operand_tokens): New variable.
186 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
187 (mips_parse_arguments): New functions.
188 (md_begin): Initialize mips_operand_tokens.
189 (mips_arg_info): Add a token field. Remove optional_reg field.
190 (match_char, match_expression): New functions.
191 (match_const_int): Use match_expression. Remove "s" argument
192 and return a boolean result. Remove O_register handling.
193 (match_regno, match_reg, match_reg_range): New functions.
194 (match_int_operand, match_mapped_int_operand, match_msb_operand)
195 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
196 (match_addiusp_operand, match_clo_clz_dest_operand)
197 (match_lwm_swm_list_operand, match_entry_exit_operand)
198 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
199 (match_tied_reg_operand): Remove "s" argument and return a boolean
200 result. Match tokens rather than text. Update calls to
201 match_const_int. Rely on match_regno to call check_regno.
202 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
203 "arg" argument. Return a boolean result.
204 (parse_float_constant): Replace with...
205 (match_float_constant): ...this new function.
206 (match_operand): Remove "s" argument and return a boolean result.
207 Update calls to subfunctions.
208 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
209 rather than string-parsing routines. Update handling of optional
210 registers for token scheme.
212 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
214 * config/tc-mips.c (parse_float_constant): Split out from...
217 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
219 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
222 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
224 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
225 (match_entry_exit_operand): New function.
226 (match_save_restore_list_operand): Likewise.
227 (match_operand): Use them.
228 (check_absolute_expr): Delete.
229 (mips16_ip): Rewrite main parsing loop to use mips_operands.
231 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
233 * config/tc-mips.c: Enable functions commented out in previous patch.
234 (SKIP_SPACE_TABS): Move further up file.
235 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
236 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
237 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
238 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
239 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
240 (micromips_imm_b_map, micromips_imm_c_map): Delete.
241 (mips_lookup_reg_pair): Delete.
242 (macro): Use report_bad_range and report_bad_field.
243 (mips_immed, expr_const_in_range): Delete.
244 (mips_ip): Rewrite main parsing loop to use new functions.
246 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
248 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
249 Change return type to bfd_boolean.
250 (report_bad_range, report_bad_field): New functions.
251 (mips_arg_info): New structure.
252 (match_const_int, convert_reg_type, check_regno, match_int_operand)
253 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
254 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
255 (match_addiusp_operand, match_clo_clz_dest_operand)
256 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
257 (match_pc_operand, match_tied_reg_operand, match_operand)
258 (check_completed_insn): New functions, commented out for now.
260 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
262 * config/tc-mips.c (insn_insert_operand): New function.
263 (macro_build, mips16_macro_build): Put null character check
264 in the for loop and convert continues to breaks. Use operand
265 structures to handle constant operands.
267 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
269 * config/tc-mips.c (validate_mips_insn): Move further up file.
270 Add insn_bits and decode_operand arguments. Use the mips_operand
271 fields to work out which bits an operand occupies. Detect double
273 (validate_micromips_insn): Move further up file. Call into
276 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
278 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
280 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
282 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
284 (macro): Update accordingly.
286 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
288 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
290 (md_assemble): Remove imm_reloc handling.
291 (mips_ip): Update commentary. Use offset_expr and offset_reloc
292 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
293 Use a temporary array rather than imm_reloc when parsing
294 constant expressions. Remove imm_reloc initialization.
295 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
296 for the relaxable field. Use a relax_char variable to track the
297 type of this field. Remove imm_reloc initialization.
299 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
301 * config/tc-mips.c (mips16_ip): Handle "I".
303 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
305 * config/tc-mips.c (mips_flag_nan2008): New variable.
306 (options): Add OPTION_NAN enum value.
307 (md_longopts): Handle it.
308 (md_parse_option): Likewise.
309 (s_nan): New function.
310 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
311 (md_show_usage): Add -mnan.
313 * doc/as.texinfo (Overview): Add -mnan.
314 * doc/c-mips.texi (MIPS Opts): Document -mnan.
315 (MIPS NaN Encodings): New node. Document .nan directive.
316 (MIPS-Dependent): List the new node.
318 2013-07-09 Tristan Gingold <gingold@adacore.com>
320 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
322 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
324 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
325 for 'A' and assume that the constant has been elided if the result
328 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
330 * config/tc-mips.c (gprel16_reloc_p): New function.
331 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
333 (offset_high_part, small_offset_p): New functions.
334 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
335 register load and store macros, handle the 16-bit offset case first.
336 If a 16-bit offset is not suitable for the instruction we're
337 generating, load it into the temporary register using
338 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
339 M_L_DAB code once the address has been constructed. For double load
340 and store macros, again handle the 16-bit offset case first.
341 If the second register cannot be accessed from the same high
342 part as the first, load it into AT using ADDRESS_ADDI_INSN.
343 Fix the handling of LD in cases where the first register is the
344 same as the base. Also handle the case where the offset is
345 not 16 bits and the second register cannot be accessed from the
346 same high part as the first. For unaligned loads and stores,
347 fuse the offbits == 12 and old "ab" handling. Apply this handling
348 whenever the second offset needs a different high part from the first.
349 Construct the offset using ADDRESS_ADDI_INSN where possible,
350 for offbits == 16 as well as offbits == 12. Use offset_reloc
351 when constructing the individual loads and stores.
352 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
353 and offset_reloc before matching against a particular opcode.
354 Handle elided 'A' constants. Allow 'A' constants to use
355 relocation operators.
357 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
359 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
360 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
361 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
363 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
365 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
366 Require the msb to be <= 31 for "+s". Check that the size is <= 31
367 for both "+s" and "+S".
369 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
371 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
372 (mips_ip, mips16_ip): Handle "+i".
374 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
376 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
377 (micromips_to_32_reg_h_map): Rename to...
378 (micromips_to_32_reg_h_map1): ...this.
379 (micromips_to_32_reg_i_map): Rename to...
380 (micromips_to_32_reg_h_map2): ...this.
381 (mips_lookup_reg_pair): New function.
382 (gpr_write_mask, macro): Adjust after above renaming.
383 (validate_micromips_insn): Remove "mi" handling.
384 (mips_ip): Likewise. Parse both registers in a pair for "mh".
386 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
388 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
389 (mips_ip): Remove "+D" and "+T" handling.
391 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
393 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
396 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
398 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
400 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
402 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
403 (aarch64_force_relocation): Likewise.
405 2013-07-02 Alan Modra <amodra@gmail.com>
407 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
409 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
411 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
412 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
413 Replace @sc{mips16} with literal `MIPS16'.
414 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
416 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
418 * config/tc-aarch64.c (reloc_table): Replace
419 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
420 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
421 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
422 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
423 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
424 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
425 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
426 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
427 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
428 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
429 (aarch64_force_relocation): Likewise.
431 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
433 * config/tc-aarch64.c (ilp32_p): New static variable.
434 (elf64_aarch64_target_format): Return the target according to the
436 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
437 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
438 (aarch64_dwarf2_addr_size): New function.
439 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
440 (DWARF2_ADDR_SIZE): New define.
442 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
444 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
446 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
448 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
450 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
452 * config/tc-mips.c (mips_set_options): Add insn32 member.
453 (mips_opts): Initialize it.
454 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
455 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
456 (md_longopts): Add "minsn32" and "mno-insn32" options.
457 (is_size_valid): Handle insn32 mode.
458 (md_assemble): Pass instruction string down to macro.
459 (brk_fmt): Add second dimension and insn32 mode initializers.
460 (mfhl_fmt): Likewise.
461 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
462 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
463 (macro_build_jalr, move_register): Handle insn32 mode.
464 (macro_build_branch_rs): Likewise.
465 (macro): Handle insn32 mode.
466 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
467 (mips_ip): Handle insn32 mode.
468 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
469 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
470 (mips_handle_align): Handle insn32 mode.
471 (md_show_usage): Add -minsn32 and -mno-insn32.
473 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
475 (-minsn32, -mno-insn32): New options.
476 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
478 (MIPS assembly options): New node. Document .set insn32 and
480 (MIPS-Dependent): List the new node.
482 2013-06-25 Nick Clifton <nickc@redhat.com>
484 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
485 the PC in indirect addressing on 430xv2 parts.
486 (msp430_operands): Add version test to hardware bug encoding
489 2013-06-24 Roland McGrath <mcgrathr@google.com>
491 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
492 so it skips whitespace before it.
493 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
495 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
496 (arm_reg_parse_multi): Skip whitespace first.
497 (parse_reg_list): Likewise.
498 (parse_vfp_reg_list): Likewise.
499 (s_arm_unwind_save_mmxwcg): Likewise.
501 2013-06-24 Nick Clifton <nickc@redhat.com>
504 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
506 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
508 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
510 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
512 * config/tc-mips.c: Assert that offsetT and valueT are at least
514 (GPR_SMIN, GPR_SMAX): New macros.
515 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
517 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
519 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
520 conditions. Remove any code deselected by them.
521 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
523 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
525 * NEWS: Note removal of ECOFF support.
526 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
527 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
528 (MULTI_CFILES): Remove config/e-mipsecoff.c.
529 * Makefile.in: Regenerate.
530 * configure.in: Remove MIPS ECOFF references.
531 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
533 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
534 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
535 (mips-*-*): ...this single case.
536 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
537 MIPS emulations to be e-mipself*.
538 * configure: Regenerate.
539 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
540 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
541 (mips-*-sysv*): Remove coff and ecoff cases.
542 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
543 * ecoff.c: Remove reference to MIPS ECOFF.
544 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
545 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
546 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
547 (mips_hi_fixup): Tweak comment.
548 (append_insn): Require a howto.
549 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
551 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
553 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
554 Use "CPU" instead of "cpu".
555 * doc/c-mips.texi: Likewise.
556 (MIPS Opts): Rename to MIPS Options.
557 (MIPS option stack): Rename to MIPS Option Stack.
558 (MIPS ASE instruction generation overrides): Rename to
559 MIPS ASE Instruction Generation Overrides (for now).
560 (MIPS floating-point): Rename to MIPS Floating-Point.
562 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
564 * doc/c-mips.texi (MIPS Macros): New section.
565 (MIPS Object): Replace with...
566 (MIPS Small Data): ...this new section.
568 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
570 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
571 Capitalize name. Use @kindex instead of @cindex for .set entries.
573 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
575 * doc/c-mips.texi (MIPS Stabs): Remove section.
577 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
579 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
580 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
581 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
582 (ISA_SUPPORTS_VIRT64_ASE): Delete.
583 (mips_ase): New structure.
584 (mips_ases): New table.
585 (FP64_ASES): New macro.
586 (mips_ase_groups): New array.
587 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
588 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
590 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
591 (md_parse_option): Use mips_ases and mips_set_ase instead of
592 separate case statements for each ASE option.
593 (mips_after_parse_args): Use FP64_ASES. Use
594 mips_check_isa_supports_ases to check the ASEs against
596 (s_mipsset): Use mips_ases and mips_set_ase instead of
597 separate if statements for each ASE option. Use
598 mips_check_isa_supports_ases, even when a non-ASE option
601 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
603 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
605 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
607 * config/tc-mips.c (md_shortopts, options, md_longopts)
608 (md_longopts_size): Move earlier in file.
610 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
612 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
613 with a single "ase" bitmask.
614 (mips_opts): Update accordingly.
615 (file_ase, file_ase_explicit): New variables.
616 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
617 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
618 (ISA_HAS_ROR): Adjust for mips_set_options change.
619 (is_opcode_valid): Take the base ase mask directly from mips_opts.
620 (mips_ip): Adjust for mips_set_options change.
621 (md_parse_option): Likewise. Update file_ase_explicit.
622 (mips_after_parse_args): Adjust for mips_set_options change.
623 Use bitmask operations to select the default ASEs. Set file_ase
624 rather than individual per-ASE variables.
625 (s_mipsset): Adjust for mips_set_options change.
626 (mips_elf_final_processing): Test file_ase rather than
627 file_ase_mdmx. Remove commented-out code.
629 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
631 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
632 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
633 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
634 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
635 (mips_after_parse_args): Use the new "ase" field to choose
637 (mips_cpu_info_table): Move ASEs from the "flags" field to the
640 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
642 * config/tc-arm.c (symbol_preemptible): New function.
643 (relax_branch): Use it.
645 2013-06-17 Catherine Moore <clm@codesourcery.com>
646 Maciej W. Rozycki <macro@codesourcery.com>
647 Chao-Ying Fu <fu@mips.com>
649 * config/tc-mips.c (mips_set_options): Add ase_eva.
650 (mips_set_options mips_opts): Add ase_eva.
651 (file_ase_eva): Declare.
652 (ISA_SUPPORTS_EVA_ASE): Define.
653 (IS_SEXT_9BIT_NUM): Define.
654 (MIPS_CPU_ASE_EVA): Define.
655 (is_opcode_valid): Add support for ase_eva.
656 (macro_build): Likewise.
658 (validate_mips_insn): Likewise.
659 (validate_micromips_insn): Likewise.
661 (options): Add OPTION_EVA and OPTION_NO_EVA.
662 (md_longopts): Add -meva and -mno-eva.
663 (md_parse_option): Process new options.
664 (mips_after_parse_args): Check for valid EVA combinations.
665 (s_mipsset): Likewise.
667 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
669 * dwarf2dbg.h (dwarf2_move_insn): Declare.
670 * dwarf2dbg.c (line_subseg): Add pmove_tail.
671 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
672 (dwarf2_gen_line_info_1): Update call accordingly.
673 (dwarf2_move_insn): New function.
674 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
676 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
680 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
683 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
684 (dwarf2_gen_line_info_1): Delete.
685 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
686 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
687 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
688 (dwarf2_directive_loc): Push previous .locs instead of generating
691 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
693 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
694 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
696 2013-06-13 Nick Clifton <nickc@redhat.com>
699 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
700 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
701 function. Generates an error if the adjusted offset is out of a
704 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
706 * config/tc-nios2.c (md_apply_fix): Mask constant
707 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
709 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
711 * config/tc-mips.c (append_insn): Don't do branch relaxation for
712 MIPS-3D instructions either.
713 (md_convert_frag): Update the COPx branch mask accordingly.
715 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
717 * doc/as.texinfo (Overview): Add --relax-branch and
719 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
722 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
724 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
727 2013-06-08 Catherine Moore <clm@codesourcery.com>
729 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
730 (is_opcode_valid_16): Pass ase value to opcode_is_member.
731 (append_insn): Change INSN_xxxx to ASE_xxxx.
733 2013-06-01 George Thomas <george.thomas@atmel.com>
735 * gas/config/tc-avr.c: Change ISA for devices with USB support to
738 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
740 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
743 2013-05-31 Paul Brook <paul@codesourcery.com>
746 * config/tc-mips.c (s_ehword): New.
748 2013-05-30 Paul Brook <paul@codesourcery.com>
750 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
752 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
754 * write.c (resolve_reloc_expr_symbols): On REL targets don't
755 convert relocs who have no relocatable field either. Rephrase
756 the conditional so that the PC-relative check is only applied
759 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
761 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
764 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
766 * config/tc-aarch64.c (reloc_table): Update to use
767 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
768 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
769 (md_apply_fix): Likewise.
770 (aarch64_force_relocation): Likewise.
772 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
774 * config/tc-arm.c (it_fsm_post_encode): Improve
775 warning messages about deprecated IT block formats.
777 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
779 * config/tc-aarch64.c (md_apply_fix): Move value range checking
780 inside fx_done condition.
782 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
784 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
786 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
788 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
789 and clean up warning when using PRINT_OPCODE_TABLE.
791 2013-05-20 Alan Modra <amodra@gmail.com>
793 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
794 and data fixups performing shift/high adjust/sign extension on
795 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
796 when writing data fixups rather than recalculating size.
798 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
800 * doc/c-msp430.texi: Fix typo.
802 2013-05-16 Tristan Gingold <gingold@adacore.com>
804 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
805 are also TOC symbols.
807 2013-05-16 Nick Clifton <nickc@redhat.com>
809 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
810 Add -mcpu command to specify core type.
811 * doc/c-msp430.texi: Update documentation.
813 2013-05-09 Andrew Pinski <apinski@cavium.com>
815 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
816 (mips_opts): Update for the new field.
817 (file_ase_virt): New variable.
818 (ISA_SUPPORTS_VIRT_ASE): New macro.
819 (ISA_SUPPORTS_VIRT64_ASE): New macro.
820 (MIPS_CPU_ASE_VIRT): New define.
821 (is_opcode_valid): Handle ase_virt.
822 (macro_build): Handle "+J".
823 (validate_mips_insn): Likewise.
825 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
826 (md_longopts): Add mvirt and mnovirt
827 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
828 (mips_after_parse_args): Handle ase_virt field.
829 (s_mipsset): Handle "virt" and "novirt".
830 (mips_elf_final_processing): Add a comment about virt ASE might need
832 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
833 * doc/c-mips.texi: Document -mvirt and -mno-virt.
834 Document ".set virt" and ".set novirt".
836 2013-05-09 Alan Modra <amodra@gmail.com>
838 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
839 control of operand flag bits.
841 2013-05-07 Alan Modra <amodra@gmail.com>
843 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
844 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
845 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
846 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
847 (md_apply_fix): Set fx_no_overflow for assorted relocations.
848 Shift and sign-extend fieldval for use by some VLE reloc
849 operand->insert functions.
851 2013-05-06 Paul Brook <paul@codesourcery.com>
852 Catherine Moore <clm@codesourcery.com>
854 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
855 (limited_pcrel_reloc_p): Likewise.
856 (md_apply_fix): Likewise.
857 (tc_gen_reloc): Likewise.
859 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
861 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
862 (mips_fix_adjustable): Adjust pc-relative check to use
865 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
867 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
868 (s_mips_stab): Do not restrict to stabn only.
870 2013-05-02 Nick Clifton <nickc@redhat.com>
872 * config/tc-msp430.c: Add support for the MSP430X architecture.
873 Add code to insert a NOP instruction after any instruction that
874 might change the interrupt state.
875 Add support for the LARGE memory model.
876 Add code to initialise the .MSP430.attributes section.
877 * config/tc-msp430.h: Add support for the MSP430X architecture.
878 * doc/c-msp430.texi: Document the new -mL and -mN command line
880 * NEWS: Mention support for the MSP430X architecture.
882 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
884 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
885 alpha*-*-linux*ecoff*.
887 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
889 * config/tc-mips.c (mips_ip): Add sizelo.
890 For "+C", "+G", and "+H", set sizelo and compare against it.
892 2013-04-29 Nick Clifton <nickc@redhat.com>
894 * as.c (Options): Add -gdwarf-sections.
895 (parse_args): Likewise.
896 * as.h (flag_dwarf_sections): Declare.
897 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
898 (process_entries): When -gdwarf-sections is enabled generate
899 fragmentary .debug_line sections.
900 (out_debug_line): Set the section for the .debug_line section end
902 * doc/as.texinfo: Document -gdwarf-sections.
903 * NEWS: Mention -gdwarf-sections.
905 2013-04-26 Christian Groessler <chris@groessler.org>
907 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
908 according to the target parameter. Don't call s_segm since s_segm
909 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
911 (md_begin): Call s_segm according to target parameter from command
914 2013-04-25 Alan Modra <amodra@gmail.com>
916 * configure.in: Allow little-endian linux.
917 * configure: Regenerate.
919 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
921 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
922 "fstatus" control register to "eccinj".
924 2013-04-19 Kai Tietz <ktietz@redhat.com>
926 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
928 2013-04-15 Julian Brown <julian@codesourcery.com>
930 * expr.c (add_to_result, subtract_from_result): Make global.
931 * expr.h (add_to_result, subtract_from_result): Add prototypes.
932 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
933 subtract_from_result to handle extra bit of precision for .sleb128
936 2013-04-10 Julian Brown <julian@codesourcery.com>
938 * read.c (convert_to_bignum): Add sign parameter. Use it
939 instead of X_unsigned to determine sign of resulting bignum.
940 (emit_expr): Pass extra argument to convert_to_bignum.
941 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
942 X_extrabit to convert_to_bignum.
943 (parse_bitfield_cons): Set X_extrabit.
944 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
945 Initialise X_extrabit field as appropriate.
946 (add_to_result): New.
947 (subtract_from_result): New.
949 * expr.h (expressionS): Add X_extrabit field.
951 2013-04-10 Jan Beulich <jbeulich@suse.com>
953 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
954 register being PC when is_t or writeback, and use distinct
955 diagnostic for the latter case.
957 2013-04-10 Jan Beulich <jbeulich@suse.com>
959 * gas/config/tc-arm.c (parse_operands): Re-write
961 (do_barrier): Remove bogus constraint().
962 (do_t_barrier): Remove.
964 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
966 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
967 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
969 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
971 2013-04-09 Jan Beulich <jbeulich@suse.com>
973 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
974 Use local variable Rt in more places.
975 (do_vmsr): Accept all control registers.
977 2013-04-09 Jan Beulich <jbeulich@suse.com>
979 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
980 if there was none specified for moves between scalar and core
983 2013-04-09 Jan Beulich <jbeulich@suse.com>
985 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
988 2013-04-08 Jan Beulich <jbeulich@suse.com>
990 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
993 2013-04-08 Jan Beulich <jbeulich@suse.com>
995 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
998 2013-04-03 Alan Modra <amodra@gmail.com>
1000 * doc/as.texinfo: Add support to generate man options for h8300.
1001 * doc/c-h8300.texi: Likewise.
1003 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1005 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1008 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1011 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1013 2013-03-26 Nick Clifton <nickc@redhat.com>
1016 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1017 start of the file each time.
1020 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1023 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1025 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1028 2013-03-21 Will Newton <will.newton@linaro.org>
1030 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1031 pc-relative str instructions in Thumb mode.
1033 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1035 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1036 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1038 * config/tc-h8300.h: Remove duplicated defines.
1040 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1043 * tc-avr.c (mcu_has_3_byte_pc): New function.
1044 (tc_cfi_frame_initial_instructions): Call it to find return
1047 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1050 * config/tc-tic6x.c (tic6x_try_encode): Handle
1051 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1052 encode register pair numbers when required.
1054 2013-03-15 Will Newton <will.newton@linaro.org>
1056 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1057 in vstr in Thumb mode for pre-ARMv7 cores.
1059 2013-03-14 Andreas Schwab <schwab@suse.de>
1061 * doc/c-arc.texi (ARC Directives): Revert last change and use
1062 @itemize instead of @table.
1063 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1065 2013-03-14 Nick Clifton <nickc@redhat.com>
1068 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1069 NULL message, instead just check ARM_CPU_IS_ANY directly.
1071 2013-03-14 Nick Clifton <nickc@redhat.com>
1074 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1076 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1077 to the @item directives.
1078 (ARM-Neon-Alignment): Move to correct place in the document.
1079 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1081 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1084 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1086 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1087 case. Add default BAD_CASE to switch.
1089 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1091 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1092 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1094 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1096 * config/tc-arm.c (crc_ext_armv8): New feature set.
1097 (UNPRED_REG): New macro.
1098 (do_crc32_1): New function.
1099 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1100 do_crc32ch, do_crc32cw): Likewise.
1102 (insns): Add entries for crc32 mnemonics.
1103 (arm_extensions): Add entry for crc.
1105 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1107 * write.h (struct fix): Add fx_dot_frag field.
1108 (dot_frag): Declare.
1109 * write.c (dot_frag): New variable.
1110 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1111 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1112 * expr.c (expr): Save value of frag_now in dot_frag when setting
1114 * read.c (emit_expr): Likewise. Delete comments.
1116 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1118 * config/tc-i386.c (flag_code_names): Removed.
1119 (i386_index_check): Rewrote.
1121 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1123 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1125 (aarch64_double_precision_fmovable): New function.
1126 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1127 function; handle hexadecimal representation of IEEE754 encoding.
1128 (parse_operands): Update the call to parse_aarch64_imm_float.
1130 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1132 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1133 (check_hle): Updated.
1134 (md_assemble): Likewise.
1135 (parse_insn): Likewise.
1137 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1139 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1140 (md_assemble): Check if REP prefix is OK.
1141 (parse_insn): Remove expecting_string_instruction. Set
1144 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1146 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1148 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1150 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1151 for system registers.
1153 2013-02-27 DJ Delorie <dj@redhat.com>
1155 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1156 (rl78_op): Handle %code().
1157 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1158 (tc_gen_reloc): Likwise; convert to a computed reloc.
1159 (md_apply_fix): Likewise.
1161 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1163 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1165 2013-02-25 Terry Guo <terry.guo@arm.com>
1167 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1168 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1169 list of accepted CPUs.
1171 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1174 * config/tc-i386.c (cpu_arch): Add ".smap".
1176 * doc/c-i386.texi: Document smap.
1178 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1180 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1181 mips_assembling_insn appropriately.
1182 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1184 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1186 * config/tc-mips.c (append_insn): Correct indentation, remove
1189 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1191 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1193 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1195 * configure.tgt: Add nios2-*-rtems*.
1197 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1199 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1202 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1204 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1205 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1207 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1209 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1212 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1213 Andrew Jenner <andrew@codesourcery.com>
1215 Based on patches from Altera Corporation.
1217 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1218 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1219 * Makefile.in: Regenerated.
1220 * configure.tgt: Add case for nios2*-linux*.
1221 * config/obj-elf.c: Conditionally include elf/nios2.h.
1222 * config/tc-nios2.c: New file.
1223 * config/tc-nios2.h: New file.
1224 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1225 * doc/Makefile.in: Regenerated.
1226 * doc/all.texi: Set NIOSII.
1227 * doc/as.texinfo (Overview): Add Nios II options.
1228 (Machine Dependencies): Include c-nios2.texi.
1229 * doc/c-nios2.texi: New file.
1230 * NEWS: Note Altera Nios II support.
1232 2013-02-06 Alan Modra <amodra@gmail.com>
1235 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1236 Don't skip fixups with fx_subsy non-NULL.
1237 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1238 with fx_subsy non-NULL.
1240 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1242 * doc/c-metag.texi: Add "@c man" markers.
1244 2013-02-04 Alan Modra <amodra@gmail.com>
1246 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1248 (TC_ADJUST_RELOC_COUNT): Delete.
1249 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1251 2013-02-04 Alan Modra <amodra@gmail.com>
1253 * po/POTFILES.in: Regenerate.
1255 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1257 * config/tc-metag.c: Make SWAP instruction less permissive with
1260 2013-01-29 DJ Delorie <dj@redhat.com>
1262 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1263 relocs in .word/.etc statements.
1265 2013-01-29 Roland McGrath <mcgrathr@google.com>
1267 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1268 immediate value for 8-bit offset" error so it shows line info.
1270 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1272 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1275 2013-01-24 Nick Clifton <nickc@redhat.com>
1277 * config/tc-v850.c: Add support for e3v5 architecture.
1278 * doc/c-v850.texi: Mention new support.
1280 2013-01-23 Nick Clifton <nickc@redhat.com>
1283 * config/tc-avr.c: Include dwarf2dbg.h.
1285 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1287 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1288 (tc_i386_fix_adjustable): Likewise.
1289 (lex_got): Likewise.
1290 (tc_gen_reloc): Likewise.
1292 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1294 * config/tc-aarch64.c (output_operand_error_record): Change to output
1295 the out-of-range error message as value-expected message if there is
1296 only one single value in the expected range.
1297 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1298 LSL #0 as a programmer-friendly feature.
1300 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1302 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1303 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1304 BFD_RELOC_64_SIZE relocations.
1305 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1307 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1308 relocations against local symbols.
1310 2013-01-16 Alan Modra <amodra@gmail.com>
1312 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1313 finding some sort of toc syntax error, and break to avoid
1314 compiler uninit warning.
1316 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1319 * config/tc-i386.c (lex_got): Increment length by 1 if the
1320 relocation token is removed.
1322 2013-01-15 Nick Clifton <nickc@redhat.com>
1324 * config/tc-v850.c (md_assemble): Allow signed values for
1327 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1329 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1332 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1334 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1335 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1336 * config/tc-ppc.c (md_show_usage): Likewise.
1337 (ppc_handle_align): Handle power8's group ending nop.
1339 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1341 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1342 that the assember exits after the opcodes have been printed.
1344 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1346 * app.c: Remove trailing white spaces.
1350 * dw2gencfi.c: Likewise.
1351 * dwarf2dbg.h: Likewise.
1352 * ecoff.c: Likewise.
1353 * input-file.c: Likewise.
1354 * itbl-lex.h: Likewise.
1355 * output-file.c: Likewise.
1358 * subsegs.c: Likewise.
1359 * symbols.c: Likewise.
1360 * write.c: Likewise.
1361 * config/tc-i386.c: Likewise.
1362 * doc/Makefile.am: Likewise.
1363 * doc/Makefile.in: Likewise.
1364 * doc/c-aarch64.texi: Likewise.
1365 * doc/c-alpha.texi: Likewise.
1366 * doc/c-arc.texi: Likewise.
1367 * doc/c-arm.texi: Likewise.
1368 * doc/c-avr.texi: Likewise.
1369 * doc/c-bfin.texi: Likewise.
1370 * doc/c-cr16.texi: Likewise.
1371 * doc/c-d10v.texi: Likewise.
1372 * doc/c-d30v.texi: Likewise.
1373 * doc/c-h8300.texi: Likewise.
1374 * doc/c-hppa.texi: Likewise.
1375 * doc/c-i370.texi: Likewise.
1376 * doc/c-i386.texi: Likewise.
1377 * doc/c-i860.texi: Likewise.
1378 * doc/c-m32c.texi: Likewise.
1379 * doc/c-m32r.texi: Likewise.
1380 * doc/c-m68hc11.texi: Likewise.
1381 * doc/c-m68k.texi: Likewise.
1382 * doc/c-microblaze.texi: Likewise.
1383 * doc/c-mips.texi: Likewise.
1384 * doc/c-msp430.texi: Likewise.
1385 * doc/c-mt.texi: Likewise.
1386 * doc/c-s390.texi: Likewise.
1387 * doc/c-score.texi: Likewise.
1388 * doc/c-sh.texi: Likewise.
1389 * doc/c-sh64.texi: Likewise.
1390 * doc/c-tic54x.texi: Likewise.
1391 * doc/c-tic6x.texi: Likewise.
1392 * doc/c-v850.texi: Likewise.
1393 * doc/c-xc16x.texi: Likewise.
1394 * doc/c-xgate.texi: Likewise.
1395 * doc/c-xtensa.texi: Likewise.
1396 * doc/c-z80.texi: Likewise.
1397 * doc/internals.texi: Likewise.
1399 2013-01-10 Roland McGrath <mcgrathr@google.com>
1401 * hash.c (hash_new_sized): Make it global.
1402 * hash.h: Declare it.
1403 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1406 2013-01-10 Will Newton <will.newton@imgtec.com>
1408 * Makefile.am: Add Meta.
1409 * Makefile.in: Regenerate.
1410 * config/tc-metag.c: New file.
1411 * config/tc-metag.h: New file.
1412 * configure.tgt: Add Meta.
1413 * doc/Makefile.am: Add Meta.
1414 * doc/Makefile.in: Regenerate.
1415 * doc/all.texi: Add Meta.
1416 * doc/as.texiinfo: Document Meta options.
1417 * doc/c-metag.texi: New file.
1419 2013-01-09 Steve Ellcey <sellcey@mips.com>
1421 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1423 * config/tc-mips.c (internalError): Remove, replace with abort.
1425 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1427 * config/tc-aarch64.c (parse_operands): Change to compare the result
1428 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1430 2013-01-07 Nick Clifton <nickc@redhat.com>
1433 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1434 anticipated character.
1435 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1436 here as it is no longer needed.
1438 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1440 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1441 * doc/c-score.texi (SCORE-Opts): Likewise.
1442 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1444 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1446 * config/tc-mips.c: Add support for MIPS r5900.
1447 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1449 (can_swap_branch_p, get_append_method): Detect some conditional
1450 short loops to fix a bug on the r5900 by NOP in the branch delay
1452 (M_MUL): Support 3 operands in multu on r5900.
1453 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1454 (s_mipsset): Force 32 bit floating point on r5900.
1455 (mips_ip): Check parameter range of instructions mfps and mtps on
1457 * configure.in: Detect CPU type when target string contains r5900
1458 (e.g. mips64r5900el-linux-gnu).
1460 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1462 * as.c (parse_args): Update copyright year to 2013.
1464 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1466 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1469 2013-01-02 Nick Clifton <nickc@redhat.com>
1472 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1475 For older changes see ChangeLog-2012
1477 Copyright (C) 2013 Free Software Foundation, Inc.
1479 Copying and distribution of this file, with or without modification,
1480 are permitted in any medium without royalty provided the copyright
1481 notice and this notice are preserved.
1487 version-control: never